A method, device, equipment and storage medium for arranging via holes on a printed circuit board

Abstract

The present application relates to the technical field of printed circuit board design, and discloses a via arrangement method, device, equipment and storage medium for a printed circuit board, including: for two signal vias corresponding to a group of high-speed differential signals, a ground network return via is arranged at the middle position between the two signal vias; the two signal vias share one ground network return via; for four signal vias corresponding to two groups of high-speed differential signals, a ground network return via is arranged at the middle position among the four signal vias; wherein, the four signal vias share one ground network return via. In the design of the via arrangement structure for high-speed differential signals to change layers, the present application only arranges one corresponding ground network return via for one or two groups of high-speed differential signals, that is, enables two or four signal vias to share one ground network return via, thereby simplifying the single-board design to improve the space utilization rate of the single board, and reducing the space occupied by high-speed differential signals while meeting the electrical performance requirements.

Description

Technical Field

[0001] The present invention relates to the technical field of printed circuit board design, and particularly relates to a method, device, equipment and storage medium for arranging vias on a printed circuit board. Background Art

[0002] In the design of high-speed and high-density single boards, the design and optimization of high-speed signals are particularly important. Among them, the impedance discontinuity points of high-speed signals and the processing of via holes for layer change are of utmost importance. In conventional high-speed differential signal design, a layout structure of 2 signal via holes for layer change + 2 ground via holes is adopted for a group of differential signals, and a layout structure of 4 signal via holes for layer change + 4 ground via holes is adopted for two groups of differential signals. Although this layout structure can meet the design requirements, it increases the layout difficulty.

[0003] Therefore, how to design via holes for layer change with better electrical performance is a technical problem that needs to be solved urgently by those skilled in the art. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a method, device, equipment and storage medium for arranging vias on a printed circuit board, which can simplify the single board design to improve the space utilization rate of the single board, and reduce the space occupied by high-speed differential signals while meeting the electrical performance requirements. The specific solutions are as follows:

[0005] The first aspect of the present application provides a method for arranging vias on a printed circuit board, including:

[0006] For two signal vias corresponding to a group of high-speed differential signals, a ground network return via is arranged at the middle position between the two signal vias; wherein, the two signal vias share one ground network return via;

[0007] For four signal vias corresponding to two groups of high-speed differential signals, a ground network return via is arranged at the middle position between the four signal vias; wherein, the four signal vias share one ground network return via.

[0008] Optionally, the step of arranging a ground network return via at the middle position between the two signal vias for two signal vias corresponding to a group of high-speed differential signals includes:

[0009] For two signal vias corresponding to a group of high-speed differential signals, a ground network return via is arranged at the middle position of the connecting line of the via centers of the two signal vias; wherein, the ground network return via is at the same distance from the two signal vias.

[0010] Optionally, the step of arranging a ground network return via at the middle position between the four signal vias for four signal vias corresponding to two groups of high-speed differential signals includes:

[0011] For four signal vias corresponding to two sets of high-speed differential signals, a ground network return via is provided at the intersection position formed by the connection line of the via centers of the two signal vias corresponding to each pair of high-speed differential signals; wherein, the distance from the ground network return via to the four signal vias is the same.

[0012] Optionally, the via arrangement method of the printed circuit board further includes:

[0013] For signal vias corresponding to more than two sets of high-speed differential signals, if the number of groups of signal vias corresponding to the high-speed differential signals is odd, then ground network return vias are provided; where n is the number of groups of signal vias corresponding to the high-speed differential signals;

[0014] The two signal vias corresponding to any one group of high-speed differential signals share only one ground network return via, and each ground network return via is provided at the middle position between the two signal vias with a sharing relationship; the four signal vias corresponding to every other two groups of high-speed differential signals share only one ground network return via, and each ground network return via is provided at the middle position between the four signal vias with a sharing relationship.

[0015] Optionally, the via arrangement method of the printed circuit board further includes:

[0016] For signal vias corresponding to more than two sets of high-speed differential signals, if the number of groups of signal vias corresponding to the high-speed differential signals is even, then ground network return vias are provided; where n is the number of groups of signal vias corresponding to the high-speed differential signals;

[0017] The four signal vias corresponding to every two groups of high-speed differential signals share only one ground network return via, and each ground network return via is provided at the middle position between the four signal vias with a sharing relationship.

[0018] Optionally, the via arrangement method of the printed circuit board further includes:

[0019] Establish a first package for two signal vias corresponding to a group of high-speed differential signals and the ground network return via provided at the middle position between the two signal vias, and establish a second package for four signal vias corresponding to two groups of high-speed differential signals and the ground network return via provided at the middle position between the four signal vias;

[0020] Obtain a via arrangement instruction, and determine the corresponding package type for the via arrangement instruction, and generate a via arrangement structure by calling the corresponding type of package; wherein, the package type is the first package or the second package.

[0021] Optionally, the first package and the second package further include the network relationship between components, so that when the package is called, a via arrangement structure is generated according to the network relationship.

[0022] The second aspect of the present application provides a via arrangement device for a printed circuit board, including:

[0023] A first arrangement module, configured to set a ground network return via at the middle position between two signal vias corresponding to a group of high-speed differential signals; wherein, the two signal vias share one ground network return via;

[0024] A second arrangement module, configured to set a ground network return via at the middle position between four signal vias corresponding to two groups of high-speed differential signals; wherein, the four signal vias share one ground network return via.

[0025] The third aspect of the present application provides an electronic device, the electronic device includes a processor and a memory; wherein the memory is used to store a computer program, and the computer program is loaded and executed by the processor to implement the foregoing via arrangement method for a printed circuit board.

[0026] The fourth aspect of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored, and when the computer-executable instructions are loaded and executed by a processor, the foregoing via arrangement method for a printed circuit board is implemented.

[0027] In the present application, for two signal vias corresponding to a group of high-speed differential signals, a ground network return via is set at the middle position between the two signal vias; wherein, the two signal vias share one ground network return via; for four signal vias corresponding to two groups of high-speed differential signals, a ground network return via is set at the middle position between the four signal vias; wherein, the four signal vias share one ground network return via. It can be seen that in the design of the via arrangement structure for high-speed differential signal layer change in the present application, only one corresponding ground network return via is set for one or two groups of high-speed differential signals, that is, two or four signal vias share one ground network return via, thereby simplifying the single-board design to improve the single-board space utilization rate, and reducing the space occupied by high-speed differential signals while meeting the electrical performance requirements. Description of the Drawings

[0028] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only the embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on the provided drawings.

[0029] Figure 1 It is a flowchart of a method for arranging vias on a printed circuit board provided by this application;

[0030] Figure 2 It is a conventional design structure diagram of a group of differential signals provided by this application;

[0031] Figure 3 It is a structure diagram of a group of differential signals using this solution provided by this application;

[0032] Figures 4(a) and 4(b) are specific simulation result diagrams provided by this application;

[0033] Figure 5 It is a conventional design structure diagram of two groups of differential signals provided by this application;

[0034] Figure 6 It is a structure diagram of two groups of differential signals using this solution provided by this application;

[0035] Figures 7(a) and 7(b) are specific simulation result diagrams provided by this application;

[0036] Figure 8 It is a specific flowchart of a method for arranging vias on a printed circuit board provided by this application;

[0037] Figure 9 It is a specific flowchart of a method for arranging vias on a printed circuit board provided by this application;

[0038] Figure 10 It is a schematic structural diagram of a via arrangement device on a printed circuit board provided by this application;

[0039] Figure 11 It is a structural diagram of an electronic device for arranging vias on a printed circuit board provided by this application. Specific Embodiments

[0040] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of them. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0041] The existing treatment of via holes for layer change generally is that for a group of differential signals, a layout structure of 2 signal via holes for layer change + 2 ground via holes is adopted, and for two groups of differential signals, a layout structure of 4 signal via holes for layer change + 4 ground via holes is adopted. Although this layout structure can meet the design requirements, it increases the layout difficulty. Aiming at the above technical defects, the present application provides a via hole layout scheme for a printed circuit board. In the design of the via hole layout structure for high-speed differential signals, for one or two groups of high-speed differential signals, only one corresponding ground network return via hole is set, that is, two or four signal via holes share one ground network return via hole, thereby simplifying the single-board design to improve the space utilization rate of the single board and reducing the space occupied by high-speed differential signals while meeting the electrical performance requirements.

[0042] Figure 1 It is a flowchart of a via hole layout method for a printed circuit board provided by an embodiment of the present application. Refer to Figure 1 As shown, the via hole layout method for the printed circuit board includes:

[0043] S11: For two signal via holes corresponding to a group of high-speed differential signals, a ground network return via hole is set at the middle position between the two signal via holes; wherein, the two signal via holes share one ground network return via hole.

[0044] For two signal via holes corresponding to a group of high-speed differential signals, generally Figure 2 the conventional design of a group of differential signals shown is adopted. A group of differential signals adopts a layout structure of 2 signal via holes for layer change + 2 ground via holes. A pair of differential signal via holes are in the middle, and the center-to-center distance of the holes is 40 mil. The center-to-center distance between the ground network return via holes on both sides and the corresponding signal via holes is also 40 mil.

[0045] In this embodiment, a new via hole layout structure is designed for two signal via holes corresponding to a group of high-speed differential signals. A ground network return via hole is set at the middle position between the two signal via holes. Wherein, the two signal via holes share one ground network return via hole. Specifically, a ground network return via hole is set at the middle position of the connecting line of the via hole centers of the two signal via holes; wherein, the distance from the ground network return via hole to the two signal via holes is the same. That is, a layout structure of 2 signal via holes + 1 ground network return via hole is adopted, with the high-speed signal via holes placed on both sides and the ground network return via hole in the middle, and the center-to-center distances of the holes are all the same (such as set to 40 mil). Compared with the conventional design, the same via hole package is adopted in this embodiment, and the diameter of the via hole anti-pad form, the back-drilling depth, the back-drilling diameter, and the wire-out layer are all kept consistent. Moreover, about 1 mm of the layer change area space is saved as a whole. Specifically as Figure 3 shown.

[0046] WillFigure 2 The conventional design of a set of differential signals shown and this embodiment Figure 3 were simulated and compared with the via impedance (TDR) index, and the simulation results shown in FIGS. 4(a) and 4(b) were obtained. According to the simulation results, comparing this embodiment with the conventional design, for PCIe signals, the TDR performance meets the design requirements of 85 ohm ± 10%, indicating that in the actual design, the layout structure in this embodiment can be adopted.

[0047] S12: For the four signal vias corresponding to two groups of high-speed differential signals, a ground network return via is arranged at the middle position of the four signal vias; wherein, the four signal vias share one ground network return via.

[0048] For the four signal vias corresponding to two groups of high-speed differential signals, generally Figure 5 the conventional design of the two groups of differential signals shown is adopted. The two groups of differential signals adopt a layout structure of 4 signal vias + 4 ground network return vias. The four vias on the left are a pair of differential vias for transmitting signals and their corresponding return ground vias, and the four vias on the right are a pair of differential vias for receiving signals and their corresponding return ground vias. The four pairs of differential signal vias are in the middle, and the center-to-center distance of the vias is 32 mil. The center-to-center distance between the ground network return vias on both sides and the corresponding signal vias is also 40 mil.

[0049] This embodiment adopts a new layout structure of differential signal vias for the four signal vias corresponding to two groups of high-speed differential signals. A ground network return via is arranged at the middle position of the four signal vias. Among them, the four signal vias share one ground network return via. Specifically, a ground network return via is arranged at the intersection position formed by the center connection lines of the two signal vias corresponding to each pair of high-speed differential signals. Among them, the ground network return via is at the same distance from the four signal vias. That is, this embodiment adopts a layout structure of 4 signal vias + 1 ground network return via, with the high-speed signal vias placed on both sides and the ground network return via in the middle, and the center-to-center distance of the vias is 40 mil. Compared with the conventional design, this embodiment uses the same via package, and the form diameter of the via anti-pad, the back-drilling depth, the back-drilling diameter, and the outgoing layer are all the same. And overall, about 1 mm of space in the layer-changing area is saved. Specifically as Figure 6 shown.

[0050] The Figure 5 conventional design of the two groups of differential signals shown and this embodiment Figure 6The through - hole impedance (TDR) index is simulated and compared to obtain the simulation results shown in Figures 7(a) and 7(b). According to the simulation results, comparing this embodiment with the conventional design, for PCIe signals, the TDR performance meets the design requirements of 85 ohm ± 10%, indicating that in the actual design, the layout structure in this embodiment can be adopted.

[0051] It should be noted that the through - hole diameter in this embodiment is generally set to 8 mil (drilled hole diameter) - 10 mil (formed hole diameter) as the carrier for signal interconnection.

[0052] It can be seen that in the embodiment of the present application, for two signal through - holes corresponding to a group of high - speed differential signals, a ground - network return through - hole is arranged at the middle position between the two signal through - holes; wherein, the two signal through - holes share one ground - network return through - hole; for four signal through - holes corresponding to two groups of high - speed differential signals, a ground - network return through - hole is arranged at the middle position among the four signal through - holes; wherein, the four signal through - holes share one ground - network return through - hole. In the design of the layout structure of high - speed differential signal via transitions in the embodiment of the present application, for one or two groups of high - speed differential signals, only one corresponding ground - network return through - hole is arranged, that is, two or four signal through - holes share one ground - network return through - hole, thereby simplifying the single - board design to improve the space utilization rate of the single - board and reducing the space occupied by high - speed differential signals while meeting the electrical performance requirements.

[0053] Figure 8 This is a flowchart of a method for arranging through - holes on a printed circuit board provided by an embodiment of the present application. Refer to Figure 8 As shown, the method for arranging through - holes on the printed circuit board includes:

[0054] S21: For signal through - holes corresponding to more than two groups of high - speed differential signals, if the number of groups of signal through - holes corresponding to high - speed differential signals is odd, then set ground - network return through - holes; where n is the number of groups of signal through - holes corresponding to high - speed differential signals; two signal through - holes corresponding to any one group of high - speed differential signals share the only one ground - network return through - hole, and each ground - network return through - hole is arranged at the middle position between the two signal through - holes with a sharing relationship; four signal through - holes corresponding to every other two groups of high - speed differential signals share the only one ground - network return through - hole, and each ground - network return through - hole is arranged at the middle position among the four signal through - holes with a sharing relationship.

[0055] In this embodiment, for signal through - holes corresponding to more than two groups of high - speed differential signals, if the number of groups of signal through - holes corresponding to high - speed differential signals is odd, then set Ground network return vias; where n is the number of groups of signal vias corresponding to high-speed differential signals; two of the signal vias corresponding to any group of high-speed differential signals share only one of the ground network return vias, and each of the ground network return vias is disposed at the middle position between the two signal vias having a sharing relationship; four of the signal vias corresponding to every other two groups of high-speed differential signals share only one of the ground network return vias, and each of the ground network return vias is disposed at the middle position between the four signal vias having a sharing relationship.

[0056] For example, for six signal vias corresponding to three groups of high-speed differential signals, n is 3. At this time, 2 ground network return vias are provided. Select two of the signal vias corresponding to any group of high-speed differential signals, and dispose one ground network return via at the middle position between the two signal vias, where the two signal vias share one ground network return via. At this time, there are still signal vias corresponding to two groups of high-speed differential signals left. For the four signal vias corresponding to these two groups of high-speed differential signals, dispose one ground network return via at the middle position between the four signal vias, where the four signal vias share one ground network return via. As described above, generally, one ground network return via is disposed at the middle position of the center connection line of the two signal vias.

[0057] S22: For signal vias corresponding to more than two groups of high-speed differential signals, if the number of groups of signal vias corresponding to high-speed differential signals is even, then set ground network return vias; where n is the number of groups of signal vias corresponding to high-speed differential signals; four of the signal vias corresponding to every two groups of high-speed differential signals share only one of the ground network return vias, and each of the ground network return vias is disposed at the middle position between the four signal vias having a sharing relationship.

[0058] In this embodiment, for signal vias corresponding to more than two groups of high-speed differential signals, if the number of groups of signal vias corresponding to high-speed differential signals is even, then set ground network return vias; where n is the number of groups of signal vias corresponding to high-speed differential signals; four of the signal vias corresponding to every two groups of high-speed differential signals share only one of the ground network return vias, and each of the ground network return vias is disposed at the middle position between the four signal vias having a sharing relationship.

[0059] For example, for eight signal vias corresponding to four groups of high-speed differential signals, n is 4. At this time, 2 ground network return vias are set. For four of the signal vias corresponding to any two groups of high-speed differential signals, they share one ground network return via, and each ground network return via is set at the middle position of the four signal vias with a sharing relationship. As mentioned above, generally, a ground network return via is set at the intersection position formed by the connecting line of the via centers of the two signal vias corresponding to each pair of high-speed differential signals.

[0060] Figure 9 The flowchart of a specific via arrangement method for a printed circuit board provided by an embodiment of the present application. Refer to Figure 9 As shown, the via arrangement method for the printed circuit board includes:

[0061] S31: For two signal vias corresponding to a group of high-speed differential signals, set a ground network return via at the middle position between the two signal vias; wherein, the two signal vias share one ground network return via.

[0062] S32: For four signal vias corresponding to two groups of high-speed differential signals, set a ground network return via at the middle position of the four signal vias; wherein, the four signal vias share one ground network return via.

[0063] In this embodiment, for the specific processes of the above steps S31 and S32, reference can be made to the corresponding content disclosed in the foregoing embodiments, and details will not be elaborated herein.

[0064] S33: Establish a first package for two signal vias corresponding to a group of high-speed differential signals and the ground network return via set at the middle position between the two signal vias, and establish a second package for four signal vias corresponding to two groups of high-speed differential signals and the ground network return via set at the middle position of the four signal vias.

[0065] S34: Obtain a via arrangement instruction, and determine the package type corresponding to the via arrangement instruction to generate a via arrangement structure by calling the corresponding type of package; wherein, the package type is the first package or the second package.

[0066] In this embodiment, while meeting the design requirements, a package library is established to facilitate actual design. Specifically, a first package is established for two signal vias corresponding to a group of high-speed differential signals and the ground network return via set at the middle position between the two signal vias, and a second package is established for four signal vias corresponding to two groups of high-speed differential signals and the ground network return via set at the middle position of the four signal vias.

[0067] Before design, obtain the via arrangement instruction, and determine the package type corresponding to the via arrangement instruction to generate a via arrangement structure by calling the corresponding type of package; wherein, the package type is the first package or the second package. Further, the first package and the second package also include the network relationship between components, so that when the package is called, the via arrangement structure is generated according to the network relationship. For example, for the two signal vias corresponding to a group of high-speed differential signals in this embodiment, a ground network return via is arranged at the middle position between the two signal vias. The center distance between the via centers of the three vias in the overall established package is 40 mil, which is convenient for direct calling and attaches the correct network relationship. For the four signal vias corresponding to two groups of high-speed differential signals in this embodiment, a ground network return via is arranged at the middle position between the four signal vias. The center distance between the via centers of the five vias in the overall established package is 40 mil, which is convenient for direct calling and attaches the correct network relationship.

[0068] It can be seen that in the embodiment of the present application, for the two signal vias corresponding to a group of high-speed differential signals, a ground network return via is arranged at the middle position between the two signal vias; wherein, the two signal vias share one ground network return via. For the four signal vias corresponding to two groups of high-speed differential signals, a ground network return via is arranged at the middle position between the four signal vias; wherein, the four signal vias share one ground network return via. On this basis, a first package is established for the two signal vias corresponding to a group of high-speed differential signals and the ground network return via arranged at the middle position between the two signal vias, and a second package is established for the four signal vias corresponding to two groups of high-speed differential signals and the ground network return via arranged at the middle position between the four signal vias. Before design, obtain the via arrangement instruction, and determine the package type corresponding to the via arrangement instruction to generate a via arrangement structure by calling the corresponding type of package; wherein, the package type is the first package or the second package. The embodiment of the present application provides a new via arrangement structure for high-speed differential signal layer change in high-speed and high-density single-board design. In the case of tight single-board layout space, by reducing the number of vias, changing the arrangement structure of signal vias and ground network return vias, and adopting an arrangement structure in which one or two groups of differential vias share one ground network return via, the design requirements are met. In addition, a package library is established for this arrangement structure as a whole, which also improves the actual design efficiency.

[0069] See Figure 10 As shown, the embodiment of the present application also correspondingly discloses a via arrangement device for a printed circuit board, including:

[0070] The first layout module 11 is configured to, for two signal vias corresponding to a group of high-speed differential signals, set a ground network return via at the middle position between the two signal vias; wherein, the two signal vias share one ground network return via.

[0071] The second layout module 12 is configured to, for four signal vias corresponding to two groups of high-speed differential signals, set a ground network return via at the middle position among the four signal vias; wherein, the four signal vias share one ground network return via.

[0072] It can be seen that in the embodiment of the present application, for two signal vias corresponding to a group of high-speed differential signals, a ground network return via is set at the middle position between the two signal vias; wherein, the two signal vias share one ground network return via. For four signal vias corresponding to two groups of high-speed differential signals, a ground network return via is set at the middle position among the four signal vias; wherein, the four signal vias share one ground network return via. In the design of the via layout structure for high-speed differential signal layer change, the embodiment of the present application only sets one corresponding ground network return via for one or two groups of high-speed differential signals, that is, two or four signal vias share one ground network return via, thereby simplifying the single-board design to improve the space utilization rate of the single board and reducing the space occupied by high-speed differential signals while meeting the electrical performance requirements.

[0073] In some specific embodiments, the first layout module 11 is specifically configured to, for two signal vias corresponding to a group of high-speed differential signals, set a ground network return via at the middle position of the center connection line of the two signal vias; wherein, the ground network return via is at the same distance from the two signal vias.

[0074] In some specific embodiments, the second layout module 11 is specifically configured to, for four signal vias corresponding to two groups of high-speed differential signals, set a ground network return via at the intersection position formed by the center connection lines of the two signal vias corresponding to each pair of high-speed differential signals; wherein, the ground network return via is at the same distance from the four signal vias.

[0075] In some specific embodiments, the via layout device of the printed circuit board further includes:

[0076] The third layout module is configured to, for signal vias corresponding to more than two groups of high-speed differential signals, if the number of groups of signal vias corresponding to high-speed differential signals is odd, then set n ground network return vias; where n is the number of groups of signal vias corresponding to high-speed differential signals; two signal vias corresponding to any group of high-speed differential signals share only one ground network return via, and each ground network return via is arranged at the middle position between the two signal vias with a sharing relationship; four signal vias corresponding to every other two groups of high-speed differential signals share only one ground network return via, and each ground network return via is arranged at the middle position between the four signal vias with a sharing relationship;

[0077] The fourth arrangement module is configured to, for signal vias corresponding to more than two groups of high-speed differential signals, if the number of groups of signal vias corresponding to high-speed differential signals is even, arrange n ground network return vias; where n is the number of groups of signal vias corresponding to high-speed differential signals; four signal vias corresponding to every two groups of high-speed differential signals share only one ground network return via, and each ground network return via is arranged at the middle position between the four signal vias with a sharing relationship;

[0078] The package establishment module is configured to establish a first package for two signal vias corresponding to a group of high-speed differential signals and the ground network return via arranged at the middle position between the two signal vias, and establish a second package for four signal vias corresponding to two groups of high-speed differential signals and the ground network return via arranged at the middle position between the four signal vias;

[0079] The package calling module is configured to obtain a via arrangement instruction and determine a corresponding package type to generate a via arrangement structure by calling the corresponding type of package; where the package type is the first package or the second package.

[0080] In some specific embodiments, the first package and the second package in the via arrangement device of the printed circuit board further include the network relationship between components, so that when the package is called, the via arrangement structure is generated according to the network relationship.

[0081] Furthermore, an embodiment of the present application further provides an electronic device. Figure 11 It is a structural diagram of an electronic device 20 shown according to an exemplary embodiment, and the content in the figure cannot be considered as any limitation on the scope of use of the present application.

[0082] Figure 11Schematic diagram of the structure of an electronic device 20 provided by an embodiment of the present application. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. Among them, the memory 22 is used to store a computer program, and the computer program is loaded and executed by the processor 21 to at least implement the following steps:

[0083] For two signal vias corresponding to a group of high-speed differential signals, a ground network return via is arranged at the middle position between the two signal vias; wherein, the two signal vias share one ground network return via;

[0084] For four signal vias corresponding to two groups of high-speed differential signals, a ground network return via is arranged at the middle position among the four signal vias; wherein, the four signal vias share one ground network return via.

[0085] Optionally, the step of arranging a ground network return via at the middle position between two signal vias corresponding to a group of high-speed differential signals includes:

[0086] For two signal vias corresponding to a group of high-speed differential signals, a ground network return via is arranged at the middle position of the connection line of the via centers of the two signal vias; wherein, the ground network return via is at the same distance from the two signal vias.

[0087] Optionally, the step of arranging a ground network return via at the middle position among four signal vias corresponding to two groups of high-speed differential signals includes:

[0088] For four signal vias corresponding to two groups of high-speed differential signals, a ground network return via is arranged at the intersection position of the connection lines of the via centers of the two signal vias corresponding to each pair of high-speed differential signals; wherein, the ground network return via is at the same distance from the four signal vias.

[0089] Optionally, the method for arranging vias on the printed circuit board further includes:

[0090] For signal vias corresponding to more than two groups of high-speed differential signals, if the number of groups of signal vias corresponding to the high-speed differential signals is odd, then n + 1 / 2 ground network return vias are arranged; wherein, n is the number of groups of signal vias corresponding to the high-speed differential signals;

[0091] The two signal vias corresponding to any group of high-speed differential signals share only one ground network return via, and each ground network return via is arranged at the middle position between the two signal vias with a sharing relationship; the four signal vias corresponding to every other two groups of high-speed differential signals share only one ground network return via, and each ground network return via is arranged at the middle position between the four signal vias with a sharing relationship.

[0092] Optionally, the via arrangement method of the printed circuit board further includes:

[0093] For the signal vias corresponding to more than two groups of high-speed differential signals, if the number of groups of signal vias corresponding to the high-speed differential signals is even, then n / 2 ground network return vias are arranged; where n is the number of groups of signal vias corresponding to the high-speed differential signals.

[0094] The four signal vias corresponding to every two groups of high-speed differential signals share only one ground network return via, and each ground network return via is arranged at the middle position between the four signal vias with a sharing relationship.

[0095] Optionally, the via arrangement method of the printed circuit board further includes:

[0096] Establish a first package for the two signal vias corresponding to a group of high-speed differential signals and the ground network return via arranged at the middle position between the two signal vias, and establish a second package for the four signal vias corresponding to two groups of high-speed differential signals and the ground network return via arranged at the middle position between the four signal vias.

[0097] Obtain a via arrangement instruction, and determine the package type corresponding to the via arrangement instruction to generate a via arrangement structure by calling the corresponding type of package; where the package type is the first package or the second package.

[0098] Optionally, the first package and the second package further include the network relationship between components, so that the via arrangement structure is generated according to the network relationship when the package is called.

[0099] In this embodiment, the power supply 23 is used to provide working voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows is any communication protocol applicable to the technical solution of the present application, and no specific limitation is made here; the input / output interface 25 is used to obtain external input data or output data to the outside, and its specific interface type can be selected according to specific application needs, and no specific limitation is made here.

[0100] In addition, the memory 22, as a carrier for storing resources, can be a read-only memory, a random access memory, a magnetic disk, an optical disc, etc. The resources stored thereon can include an operating system 221, a computer program 222, data 223, etc. The storage method can be transient storage or permanent storage.

[0101] Among them, the operating system 221 is used to manage and control each hardware device and the computer program 222 on the electronic device 20, so as to enable the processor 21 to perform operations and processing on the massive data 223 in the memory 22. It can be Windows Server, Netware, Unix, Linux, etc. In addition to the computer program that can be used to complete the via arrangement method of the printed circuit board executed by the electronic device 20 disclosed in any of the foregoing embodiments, the computer program 222 can further include computer programs that can be used to complete other specific tasks. The data 223 can include high-speed differential signals collected by the electronic device 20.

[0102] Furthermore, an embodiment of the present application also discloses a storage medium, in which a computer program is stored. When the computer program is loaded and executed by a processor, at least the following steps are implemented:

[0103] For two signal vias corresponding to a group of high-speed differential signals, a ground network return via is arranged at the middle position between the two signal vias; wherein, the two signal vias share one ground network return via;

[0104] For four signal vias corresponding to two groups of high-speed differential signals, a ground network return via is arranged at the middle position among the four signal vias; wherein, the four signal vias share one ground network return via.

[0105] The various embodiments in this specification are described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple. For the relevant parts, reference can be made to the description in the method part.

[0106] Finally, it should also be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the said element.

[0107] The above has introduced in detail the via arrangement method, device, equipment and storage medium of the printed circuit board provided by the present invention. Specific examples are used in this text to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. A method for arranging vias on a printed circuit board, characterized in that, it includes: For four signal vias corresponding to two groups of high-speed differential signals, a ground network return via is arranged at the intersection position formed by the connecting lines of the via centers of the two signal vias corresponding to each pair of high-speed differential signals, so that the signal vias are placed on both sides and the ground network return via is centered; wherein, the distance from the ground network return via to the four signal vias is the same; the four signal vias share one ground network return via; For signal vias corresponding to more than two groups of high-speed differential signals, if the number of groups of signal vias corresponding to high-speed differential signals is odd, then set ground network return vias; if the number of groups of signal vias corresponding to high-speed differential signals is even, then set ground network return vias; where n is the number of groups of signal vias corresponding to high-speed differential signals; Establish a first package for two signal vias corresponding to a group of high-speed differential signals and the ground network return via arranged at the middle position between the two signal vias, and establish a second package for four signal vias corresponding to two groups of high-speed differential signals and the ground network return via arranged at the middle position among the four signal vias; Obtain a via arrangement instruction, and determine the package type corresponding to the via arrangement instruction, and generate a via arrangement structure by calling the corresponding type of package; wherein, the package type is the first package or the second package.

2. The method for arranging vias on a printed circuit board according to claim 1, characterized in that, it further includes: For two signal vias corresponding to a group of high-speed differential signals, a ground network return via is arranged at the middle position of the connecting line of the via centers of the two signal vias; wherein, the two signal vias share one ground network return via; the distance from the ground network return via to the two signal vias is the same.

3. The method for arranging vias on a printed circuit board according to claim 1 or 2, characterized in that, it further includes: For signal vias corresponding to more than two groups of high-speed differential signals, if the number of groups of signal vias corresponding to high-speed differential signals is odd, then two signal vias corresponding to any group of high-speed differential signals share only one ground network return via, and each ground network return via is arranged at the middle position between the two signal vias with a sharing relationship; four signal vias corresponding to every other two groups of high-speed differential signals share only one ground network return via, and each ground network return via is arranged at the middle position among the four signal vias with a sharing relationship.

4. The method for arranging vias on a printed circuit board according to claim 1 or 2, characterized in that, it further includes: For signal vias corresponding to more than two groups of high-speed differential signals, if the number of groups of signal vias corresponding to high-speed differential signals is even, then four signal vias corresponding to every two groups of high-speed differential signals share only one ground network return via, and each ground network return via is arranged at the middle position among the four signal vias with a sharing relationship.

5. The method for arranging vias on a printed circuit board according to claim 1, characterized in that, The first package and the second package also include the network relationship between components, so that a via arrangement structure is generated according to the network relationship when the package is called.

6. A via arrangement device for a printed circuit board, characterized in that, it includes: The second layout module is used to set a ground network return via at the intersection position formed by the connection line of the via centers of the two signal vias corresponding to each pair of high-speed differential signals for the four signal vias corresponding to two groups of high-speed differential signals, so as to place the signal vias on both sides and center the ground network return via; wherein, the ground network return via is at the same distance from the four signal vias; the four signal vias share one ground network return via; The third layout module is used to set, for signal vias corresponding to more than two groups of high-speed differential signals, if the number of groups of signal vias corresponding to the high-speed differential signals is odd, such ground network return vias; The fourth layout module is used for signal vias corresponding to more than two groups of high-speed differential signals. If the number of groups of signal vias corresponding to high-speed differential signals is even, then ground network return vias are set; where n is the number of groups of signal vias corresponding to high-speed differential signals. The package establishment module is used to establish a first package for the two signal vias corresponding to a group of high-speed differential signals and the ground network return via set at the middle position between the two signal vias, and establish a second package for the four signal vias corresponding to two groups of high-speed differential signals and the ground network return via set at the middle position among the four signal vias; The package call module is used to obtain a via layout instruction and determine the package type corresponding to the via layout instruction to generate a via layout structure by calling the corresponding type of package; wherein, the package type is the first package or the second package.

7. An electronic device, characterized in that, the electronic device includes a processor and a memory; wherein the memory is used to store a computer program, and the computer program is loaded and executed by the processor to implement the via layout method of the printed circuit board according to any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that, it is used to store computer-executable instructions, and when the computer-executable instructions are loaded and executed by a processor, the via layout method of the printed circuit board according to any one of claims 1 to 5 is implemented.

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