Stacked chip ntc thermistor element and method for manufacturing the same

Abstract

The application relates to a laminated chip NTC thermistor element and a manufacturing method thereof. By optimizing the matching and process of the protective layer paste and the thermistor paste, the difference between the expansion coefficients of the protective layer and the thermistor layer is reduced, then the built-in protective layer and the thermistor layer are synchronously printed to form a blank body, the built-in protective layer has a flat cutting surface when the blank body is cut, finally, the problem of different expansion coefficients is overcome when the protective layer and the thermistor layer are sintered together, the built-in protective layer and the thermistor core are synchronously formed, the subsequent process flow for forming the built-in protective layer is avoided, thereby the process flow steps are saved, the manufacturing period and the manufacturing cost are reduced, and a laminated chip NTC thermistor element with high machining precision and standard specification size is obtained through the process flow.

Description

Technical Field

[0001] This application relates to the field of electronic component technology, and in particular to a multilayer chip NTC thermistor element and its manufacturing method. Background Technology

[0002] Multilayer chip NTC thermistors are a new type of leadless miniature component. As a surface mount technology (SMD) device, they are suitable for mounting on printed circuit boards (PCBs).

[0003] With the continuous advancement of technology, the requirements for the processing precision of electronic components are also constantly increasing. Traditional multilayer NTC thermistors use either sprayed glass coating or impregnated glass coating for the casing, but regardless of the method, the thickness of the glass protective layer cannot be precisely controlled, resulting in significant errors. Since the protective layer is located on the outer layer of the multilayer NTC thermistor, its dimensions determine the dimensions of the entire thermistor. Instability in the manufacturing process can cause surface undulations in the protective layer, leading to deviations in the overall dimensions of the NTC thermistor from standard values.

[0004] Meanwhile, the existing multilayer NTC thermistor manufacturing process involves many steps and is very complicated, resulting in a long production cycle and easy product backlog, causing inventory pressure.

[0005] Japanese Invention Patent Publication No. JP1998303004A discloses a thermistor element and its manufacturing method. The process involves forming a thin-film thermistor on the entire surface of a ceramic substrate. After forming a pair of internal electrodes on the thin-film thermistor, an insulating inorganic material layer is formed to cover the internal electrodes and the exposed thin-film thermistor. A conductive paste containing metal powder and an inorganic bonding material is applied to the insulating inorganic material layer above each internal electrode, and an external electrode is formed by sintering with an area smaller than the internal electrode using methods such as screen printing. Due to the sintering (baking) of the external electrode, the insulating inorganic material layer sandwiched between the external and internal electrodes is absorbed by the external electrode, and current flows through both the external and internal electrodes. Finally, the substrate is cut into a chip shape to obtain multiple thermistor elements. Through the absorption of the insulating inorganic material layer by the external electrode during the sintering process, the internal and external electrodes become conductive, thereby simplifying the manufacturing process and reducing manufacturing costs.

[0006] Japanese Patent Publication No. JP2003257708A discloses a thick-film thermistor element and its manufacturing method. A glass paste layer with a softening point in the same temperature range as the optimal combustion temperature range of the thermistor element is formed on an alumina substrate. A glass-free thermistor paste layer is formed on the glass paste layer. The glass layer and the thermistor layer are sintered simultaneously to prevent impurities in the glass layer from diffusing significantly into the thermistor layer during sintering, thereby avoiding the impact of glass impurities on the performance and reliability of the thermistor element.

[0007] Chinese invention patent publication number CN104335295A discloses an NTC thermistor element and its manufacturing method, including steps such as weighing raw materials, ball milling, calcination, pulping, casting, printing, stacking, sintering, forming external electrodes, and coating. By controlling the proportion of each component in the raw material formula, an NTC thermistor element with good heat resistance is obtained.

[0008] Chinese invention patent publication number CN112837877A discloses a surface encapsulation process for chip passive components. The process steps are: material preparation, material mixing, casting, overlay printing, cutting, adhesive removal, adhesive discharge, sintering, chamfering, phosphating, phosphorus burning, silver bonding, silver burning, and electroplating. By adding phosphating and phosphorus burning processes, a uniform insulating phosphating film is generated on the surface of the thermistor semiconductor element particles, which can also achieve the function of preventing product leakage. It replaces the traditional process of bonding melamine paper, bonding protective paste, spraying glass glaze, drying, rolling, glass burning, and pouring protective paste, thereby reducing the production process, reducing inventory and online costs. Summary of the Invention

[0009] Therefore, it is necessary to address the problems of insufficient dimensional accuracy, surface undulations, and cumbersome manufacturing processes of existing multilayer NTC thermistor elements by providing a multilayer NTC thermistor element and its manufacturing method.

[0010] A multilayer NTC thermistor element includes a thermistor core, an outer electrode layer, and an insulating built-in protective layer. The thermistor core includes alternating inner electrode layers and thermistor layers arranged vertically, the thermistor layers being electrically connected to or disconnected from the inner electrode layers under temperature control. The outer electrode layers cover two opposing electrical surfaces of the thermistor core, and are electrically connected to the inner electrode layers through these electrical surfaces. The built-in protective layer covers the portions of the thermistor core that are not on the electrical surfaces, and has a flat cut surface, a portion of which is covered by the outer electrode layer extending to the portions of the inner electrode core that are not on the electrical surfaces.

[0011] By adopting the above technical solution, the insulating built-in protective layer covers the non-electrical surface of the thermistor core. The multilayer chip NTC thermistor element can only form a conductive circuit through the external electrodes. Therefore, the protective layer can protect the internal thermistor core from both electrical and mechanical aspects. At the same time, the built-in protective layer has a flat cut surface, which makes the final multilayer chip NTC thermistor element have high processing precision and standard specifications.

[0012] In one embodiment, the built-in protective layer includes a base plate, a cover plate, and a side protective layer arranged sequentially in a vertical direction, wherein the side protective layer has a uniform thickness.

[0013] By adopting the above technical solution, a stacked NTC thermistor element with uniform side protective layer thickness is provided.

[0014] In one embodiment, the outer electrode layer and the built-in protective layer have a fixed size.

[0015] By adopting the above technical solution, a multilayer chip NTC thermistor element with small dimensional tolerances and conforming to standard design is provided.

[0016] This application also provides a method for manufacturing a multilayer chip NTC thermistor element, including multilayer printing, cutting and sintering steps, specifically: sequentially printing the base plate, the side protective layer, the thermistor core and the cover plate to form a blank; printing cutting lines on the cover plate; cutting the blank along the cutting lines to form a plurality of particles of the same size; heating the particles; sintering the thermistor core of the particles to form a ceramic body; and simultaneously sintering the base plate, the cover plate and the side protective layer to directly form the insulating built-in protective layer covering the surface of the ceramic body.

[0017] By adopting the above technical solution, the side protective layer and the thermal core are printed simultaneously during the overlay printing process. That is, the built-in protective layer is already covering the surface of the thermal core when the preform is formed. During cutting, the side protective layer is precisely cut by a dicing machine to form a smooth cutting surface. In the sintering stage, the base plate, side protective layer, and cover plate are sintered simultaneously to form the built-in protective layer. In contrast, in traditional processes, the thermal core and protective layer are sintered separately. Compared to this, the manufacturing process of this application saves manufacturing steps, reduces the manufacturing cycle, and lowers manufacturing costs while obtaining the same or even better products.

[0018] In one embodiment, during the overlay printing step of the side protective layer and the thermal core, the side protective layer and the thermal core are located on the same printing layer, the printing layer including the thermal core disposed at the center of the printing layer and the side protective layer disposed around the thermal core.

[0019] By adopting the above technical solution, the side protective layer is set around the thermal core, thereby protecting the thermal core on the side in the horizontal direction, while the printed layers stacked in the vertical direction make the adjacent printed layers protect each other.

[0020] In one embodiment, the printing step of the printed layer specifically includes: printing the side protective layer; printing the thermal core, the thermal core having the same thickness as the side protective layer to form a flat surface of the printed layer, the surface of the printed layer serving as a base for the next printed layer.

[0021] By adopting the above technical solution, the side protective layer is first printed. The side protective layer is printed according to the preset pattern of the graphic screen. During the printing of the side protective layer, the printing position and printing height of the thermal core are also defined to prevent the printing position of the thermal core from shifting and to ensure that the thermal core and the side protective layer have the same thickness so that the next printing layer can continue to be printed on a horizontal and flat surface.

[0022] In one embodiment, the thermistor core includes a plurality of thermistor layers and at least two inner electrode layers. In the printing step of the inner electrode layers, the inner electrode layer disposed near one end of the preform forms an A-position electrode layer, and the adjacent inner electrode layer disposed near the opposite end of the preform forms a B-position electrode layer. The A-position electrode layer and the B-position electrode layer are alternately disposed in the thickness direction of the preform, spaced apart from the thermistor layers.

[0023] By adopting the above technical solution, the A and B electrode layers, which are alternately arranged at both ends, can effectively utilize the characteristics of the thermistor material. When the circuits of the external electrodes are connected at both ends, a meaningful current will only flow at a specific temperature. At the same time, arranging the A and B electrodes at both ends can also easily increase the number of circuits while avoiding the problem of short circuits in the external electrodes.

[0024] In one embodiment, after the sintering step, a chamfering and end-sealing step is further included, in which the built-in protective layer on the opposite end faces of the ceramic body is cut to expose the A-position electrode layer and the B-position electrode layer to the outside, forming opposing electrical surfaces; after coating the electrical surfaces with conductive paste, heat treatment is performed to form an outer electrode layer.

[0025] By adopting the above technical solution, after the protective layer is formed by sintering, the flat cutting surface on the protective layer can be better and more completely exposed during the cutting process of the A-position electrode layer and the B-position electrode layer, thus making it easier to form an electrical surface and form an outer electrode layer on the electrical surface.

[0026] In one embodiment, prior to the overlay printing step, a step of preparing a thermistor layer paste is included. The step of preparing the thermistor layer paste specifically includes: uniformly mixing multiple metal oxides such as manganese oxide, cobalt oxide, nickel oxide, copper oxide, and iron oxide to form a thermistor powder; uniformly mixing the thermistor powder, binder, and solvent to form a thermistor mixture; and repeatedly grinding the thermistor mixture using a roller mill to form the thermistor layer paste.

[0027] By adopting the above technical solution, in the traditional process, the paste needs to be ground by a ball mill after mixing, and the powder and paste are then cast to form a film. However, in this application, a roller mill is used for grinding, so that the paste does not need to go through the casting process. During the grinding process, it is directly formed into a layered paste by roller pressure, which can be directly used for screen printing, thus eliminating the casting process.

[0028] In one embodiment, prior to the overlay printing step, a step of preparing an embedded protective layer slurry is included. This step specifically includes: providing glass powder; mixing the glass powder, the adhesive, and the solvent uniformly to form a protective layer mixture; and repeatedly grinding the protective layer mixture using a roller mill to form the protective layer slurry. The weight ratio range of the adhesive and solvent in the protective layer mixture is the same as that of the thermistor mixture, and the process parameter range for grinding the protective layer mixture is the same as that for grinding the thermistor layer mixture.

[0029] By adopting the above technical solution, the protective layer slurry and the thermistor layer slurry have the same type and ratio range of binder and solvent, and use the same range of process parameters, so that the two slurries have similar coefficients of expansion. In the subsequent sintering and molding steps, this prevents the built-in protective layer and the thermistor layer from cracking due to excessive difference in coefficients of expansion, which could lead to problems such as poor product contact.

[0030] In summary, the multilayer chip NTC thermistor element and its manufacturing process provided in this application have at least one of the following beneficial technical effects:

[0031] 1. A multilayer chip NTC thermistor element with a flat cut surface, high processing accuracy, and standard dimensions is provided.

[0032] 2. By using roll grinding and layer printing to create an internal protective layer, and then sintering the internal protective layer together with the thermosensitive core during sintering, manufacturing steps are saved, manufacturing cycle is reduced, and manufacturing costs are lowered.

[0033] 3. By improving the preparation process of the protective layer slurry, the protective layer slurry and the thermistor layer slurry have similar coefficients of thermal expansion, thereby preventing cracks from forming during sintering and causing poor product contact. Attached Figure Description

[0034] Figure 1 This is a first-view structural schematic diagram of a multilayer chip NTC thermistor element in one embodiment of this application;

[0035] Figure 2 This is a process flow diagram of the manufacturing process of a multilayer chip NTC thermistor element in one embodiment of this application;

[0036] Figure 3 This is a schematic diagram of a scenario involving the overlay printing step in one embodiment of this application;

[0037] Figure 4a This is a top view of the embryonic structure in step S31 of one embodiment of this application;

[0038] Figure 4b This is a side view of the embryonic structure in step S31 of one embodiment of this application;

[0039] Figure 5a This is a top view of the embryonic structure in step S32 of one embodiment of this application;

[0040] Figure 5b This is a side view of the embryonic structure in step S32 of one embodiment of this application;

[0041] Figure 6a This is a top view of the embryonic structure in step S33 of one embodiment of this application;

[0042] Figure 6b This is a side view of the embryonic structure in step S33 of one embodiment of this application;

[0043] Figure 7a This is a top view of the embryonic structure in step S34 of one embodiment of this application;

[0044] Figure 7b This is a side view of the embryonic structure in step S34 of one embodiment of this application;

[0045] Figure 8a This is a top view of the embryonic structure in step S35 of one embodiment of this application;

[0046] Figure 8b This is a side view of the embryonic structure in step S35 of one embodiment of this application;

[0047] Figure 9aThis is a top view of the embryonic structure in step S36 of one embodiment of this application;

[0048] Figure 9b This is a side view of the embryonic structure in step S36 of one embodiment of this application;

[0049] Figure 10a This is a top view of the embryonic structure in step S37 of one embodiment of this application;

[0050] Figure 10b This is a side view of the embryonic structure in step S37 of one embodiment of this application;

[0051] Figure 11a This is a top view of the embryonic structure in step S38 of one embodiment of this application;

[0052] Figure 11b This is a side view of the embryonic structure in step S38 of one embodiment of this application;

[0053] Figure 12 This is a flowchart illustrating the manufacturing process of multilayer chip NTC thermistor elements in the prior art.

[0054] Explanation of reference numerals in the attached figures:

[0055] 10. Thermistor core; 11. Inner electrode layer; 11a. A-position electrode layer; 11b. B-position electrode layer; 11c. Electrical surface; 12. Thermistor layer; 20. Built-in protective layer; 21. Base plate; 22. Side protective layer; 23. Cover plate; 30. Outer electrode layer; 100. Printed bottom surface. Detailed Implementation

[0056] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0057] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0058] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0059] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0060] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0061] It should be noted that when an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. When an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only possible implementation.

[0062] First, the concept of the NTC thermistor element involved in this application will be explained.

[0063] NTC thermistor: A thermistor is a common electronic component in circuits whose resistance changes with temperature. Thermistors are generally divided into two categories: positive temperature coefficient thermistors (PTCR) and negative temperature coefficient thermistors (NTCR). The resistance of an NTC thermistor is negatively correlated with temperature; as temperature increases, the resistance decreases exponentially. This characteristic makes NTC thermistors commonly used in circuits for temperature detection and control, compensating for the resistance of other positive temperature coefficient electronic components, and suppressing surge currents (preventing damage to electronic components from extremely high currents when a switch is turned on).

[0064] Stacked chip structure: Similar to the structure of multi-layer ceramic capacitors (MLCCs), it is formed by stacking multiple printed internal electrode layers and multiple thermistor layers alternately, which is equivalent to multiple thermistors connected in parallel.

[0065] The multilayer chip NTC thermistor element provided in this application is described below with reference to the accompanying drawings. Please refer to the attached drawings. Figure 1 , Figure 1This diagram illustrates a first-view structural schematic of a multilayer chip NTC thermistor element according to an embodiment of this application. The multilayer chip NTC thermistor element provided in this embodiment includes a thermistor core 10, an outer electrode layer 30, and an internal protective layer 20. The thermistor core 10 includes a thermistor layer 12 for providing resistance with a negative temperature-dependent change characteristic and an inner electrode layer 11 for internal electrical connection of the multilayer chip NTC thermistor element. The outer electrode layer 30 is electrically connected to the inner electrode layer 11, enabling electrical connection between the multilayer chip NTC thermistor element and external circuitry. The internal protective layer 20 is an insulating material covering the surface of the thermistor core 10, used to prevent electrical connection between the thermistor core 10 and structures outside the outer electrode layer 30, thereby preventing interference with the normal operation of the multilayer chip NTC thermistor element.

[0066] The thermistor layer 12 and the inner electrode layer 11 are alternately arranged in the vertical direction. The thermistor layer is connected to two non-electrically connected inner electrode layers 11 on opposite sides in the vertical direction, thereby forming a circuit structure in which two wires are respectively connected to the two ends of the thermistor. The resistance of this circuit structure mainly depends on the resistance value of the thermistor, that is, the resistance value of the multilayer chip NTC thermistor element is mainly determined by the resistance value of the thermistor layer 12.

[0067] It should be noted that the resistance value of the thermistor layer 12 is affected by factors such as the thickness of the thermistor layer 12, the type and composition of the thermistor material, the ambient temperature, and the manufacturing process. However, the specific resistance value variation of the thermistor layer 12 and the influencing factors are not the inventive concept of this application and will not be discussed further.

[0068] The inner electrode layer 11 includes an A-position electrode layer 11a and a B-position electrode layer 11b that are respectively connected to the opposite end faces of the thermistor core 10, so as to form two opposite electrical surfaces 11c on the thermistor core 10, which are electrically connected to different outer electrode layers 30, thereby avoiding short circuits in the circuit structure of the thermistor core 10.

[0069] The outer electrode layer 30 and the multiple inner electrode layers 11 are electrically connected simultaneously to form a circuit structure in which multiple thermistors are connected in parallel. By adjusting the distribution of the inner electrode layers 11, the parallel circuit structure of the thermistors can be controlled, thereby obtaining a multilayer chip NTC thermistor element with specific resistance properties according to actual application needs. Specifically, in this embodiment, the thermistor core 10 includes two A-position electrode layers 11a and two B-position electrode layers 11b. The A-position electrode layers 11a and B-position electrode layers 11b are alternately arranged with the thermistor layers 12 between them to form a parallel circuit.

[0070] It should be noted that those skilled in the art can adjust the distribution of the inner electrode layer 11 according to actual needs to form a circuit structure that is not limited to the embodiments shown in this application.

[0071] The built-in protective layer 20 covers the non-electrical surface 11c of the thermistor core 10 and is made of insulating material to protect the thermistor core 10 from mechanical corrosion and prevent other conductive components from interfering with the circuit structure of the thermistor core 10.

[0072] Specifically, the built-in protective layer 20 includes a base plate 21, a cover plate 23, and a side protective layer 22 arranged sequentially in the vertical direction. The side protective layer 22 has a flat cut surface on the side opposite to the thermistor core 10, thereby making the built-in protective layer 20 have a uniform thickness and a relatively small design error. The specifications and dimensions of the multilayer chip NTC thermistor element are mainly determined by the built-in protective layer 20 covering the thermistor core 10. Therefore, the built-in protective layer 20 with uniform thickness and small error enables the multilayer chip NTC thermistor element to have higher precision specifications and dimensions.

[0073] More specifically, the process and principle of forming the flat cut surface of the built-in protective layer 20 will be introduced later in the section on the manufacturing method of the multilayer chip NTC thermistor element.

[0074] The manufacturing method of the multilayer chip NTC thermistor element is described below with reference to the accompanying drawings. Please refer to... Figure 2 , Figure 2 This is a process flow diagram of the manufacturing process of a multilayer chip NTC thermistor element according to an embodiment of this application. The manufacturing method of the multilayer chip NTC thermistor element provided in this embodiment includes the following steps:

[0075] S1: Prepare powder by uniformly mixing various metal oxides such as manganese oxide, cobalt oxide, nickel oxide, copper oxide and iron oxide to form thermistor powder, which is used to form thermistor layer 12.

[0076] Specifically, in this embodiment, the mass percentage of manganese oxide is 35-40%, the mass percentage of cobalt oxide is 25-30%, the mass percentage of nickel oxide is 15-20%, the mass percentage of copper oxide is 5-10%, and the mass percentage of iron oxide is 5-10%.

[0077] It should be noted that the type and ratio of the thermistor powder are not limited to those described in the embodiments of this application. Those skilled in the art can adjust the type and ratio of the thermistor powder according to the actual properties of the thermistor layer 12.

[0078] S2: Preparation of slurries, including the preparation of the thermistor layer 12 slurry and the preparation of the protective layer slurry. The preparation of the two slurries will be described separately below.

[0079] S21: To prepare the thermistor layer 12 slurry, the thermistor powder, binder and solvent are mixed evenly in a certain proportion and then repeatedly ground using a roller mill to form the thermistor layer 12 slurry.

[0080] In this specific embodiment, the adhesive is epoxy resin comprising 10-15% of the thermistor powder by weight, and the solvent comprises 5-10% of the thermistor powder by weight. A three-roll mill is used for 4-5 grinding cycles, each lasting 1-2 hours.

[0081] In existing paste preparation processes, thermistor powder, binder, and solvent are typically ground using a ball mill to ensure sufficiently small particle sizes. This allows the paste to be cast into a 25-35µm thick film in subsequent casting processes, which is then directly laminated for printing. In this application, however, since screen printing is used for subsequent lamination, there is no need to pre-cast the paste into a film. Therefore, a ball mill is unnecessary during grinding; a lower-cost, less-wearing roller mill suffices, saving subsequent casting process steps.

[0082] S22: To prepare the protective layer slurry, glass powder, adhesive and solvent are mixed evenly in a certain proportion and then repeatedly ground with a roller mill to form the thermistor layer 12 slurry.

[0083] Specifically, glass powder, binder, and solvent are mixed uniformly in a ratio of 1:10-15%:5-10%, and then ground 4-5 times using a three-roll mill, each time for 1-2 hours. The weight ratio of binder and solvent in the protective layer slurry is the same as that of the thermistor mixture, and the process parameters for grinding the protective layer mixture are the same as those for grinding the thermistor layer 12 mixture. Since the built-in protective layer 20 and the thermistor layer 12 are co-sintered in the subsequent sintering process, and the thermistor layer 12 and the protective layer are made of different materials with different coefficients of thermal expansion, surface cracks and poor product contact may occur during sintering due to inconsistent expansion. By fine-tuning the ratio of the two slurries and the grinding process parameters within the same ratio range, the difference in the high-temperature expansion coefficients of the two slurries can be reduced, thereby alleviating the problems caused by the difference in expansion coefficients.

[0084] S3: Overlay printing, the base plate 21, side protective layer 22, thermistor core 10 and cover plate 23 of the overlay chip NTC thermistor element are sequentially printed on the printing base 100 to form a blank for subsequent sintering.

[0085] Specifically, please refer to Figure 3 , Figure 3This is a schematic diagram of the overlay printing step in one embodiment of this application. For ease of understanding, the dashed lines in the figure represent cutting lines in subsequent cutting processes.

[0086] Please see Figure 4a and Figure 4b , Figure 4a This is a top view of the embryonic structure in step S31 of one embodiment of this application. Figure 4b This is a side view of the embryo in step S31 of one embodiment of this application.

[0087] S31: First, a layer of glass paste is printed to form the base plate 21.

[0088] Please see Figure 5a and Figure 5b , Figure 5a This is a top view of the embryonic structure in step S32 of one embodiment of this application. Figure 5b This is a side view of the embryonic structure in step S32 of one embodiment of this application.

[0089] S32: Continue printing glass paste on the base plate 21 to form a partial side protective layer 22 on the base plate 21. It can be understood that steps S31 and S32 use the same paste for printing, and can be performed separately or simultaneously during the screen printing process.

[0090] Please see Figure 6a and Figure 6b , Figure 6a This is a top view of the embryonic structure in step S33 of one embodiment of this application. Figure 6b This is a side view of the embryonic structure in step S33 of one embodiment of this application.

[0091] S33: Print the internal electrode paste to form the A-position electrode layer 11a. One end of the A-position electrode layer 11a is connected to a relatively close cutting line, and the other end of the A-position electrode layer 11a is separated from another relatively distant cutting line by a protective layer. This allows one end of the A-position electrode layer 11a to be electrically connected to the outer electrode layer 30 through the electrical surface 11c formed by cutting in the molded product, while the other end is not electrically connected to the outer electrode layer 30 on the other side. This enables the thermistor layer 12 to be connected to the internal circuit of the multilayer chip NTC thermistor element and prevents the two outer electrode layers 30 from being directly electrically connected and causing a short circuit.

[0092] The printing thickness of the A-position electrode layer 11a is the same as the thickness of the side protective layer 22 in step S32, so that after the A-position electrode layer 11a is printed, the surface of the printed layer is still a flat plane, providing a good foundation for the printing of the next printed layer. At the same time, since the side protective layer 22 has been formed, the area surrounded by the side protective layer 22 is the printing area of ​​the A-position electrode layer 11a, thereby further defining the printing position of the A-position electrode layer 11a and improving the printing accuracy of the A-position electrode layer 11a. Since the side protective layer 22 is itself arranged around the periphery of the multilayer NTC thermistor element, it is easy to position, and the error of the printing position is relatively small.

[0093] Please see Figure 7a and Figure 7b , Figure 7a This is a top view of the embryonic structure in step S34 of one embodiment of this application. Figure 7b This is a side view of the embryonic structure in step S34 of one embodiment of this application.

[0094] S34: Continue printing glass paste on the flat surface formed by the A-position electrode layer 11a and the side protective layer 22 to form the next printed layer, the side protective layer 22.

[0095] It should be noted that, since the inner electrode layer 11 and the thermistor layer 12 are alternately arranged, and the thermistor layer 12 cannot be directly electrically connected to the outer electrode layer 30, the side protection layer 22 needs to be arranged completely around the periphery of the stacked NTC thermistor element, and there is no need to leave a clearance at the cut line.

[0096] Please see Figure 8a and Figure 8b , Figure 8a This is a top view of the embryonic structure in step S35 of one embodiment of this application. Figure 8b This is a side view of the embryonic structure in step S35 of one embodiment of this application.

[0097] S35: Thermistor paste is printed in the area surrounded by the side protective layer 22 to form thermistor layer 12. The outer side of the thermistor layer 12 is completely surrounded and wrapped by the side protective layer 22, and is electrically insulated from the outside. Thermistor layer 12 is directly printed on electrode layer 11a at position A, and electrode layer 11b at position B will be printed on the upper side of the thermistor layer 12, so that the thermistor layer 12 is electrically connected to electrode layer 11a at position A and electrode layer 11b at position B in the vertical direction, respectively.

[0098] It should be noted that those skilled in the art can design and print thermistor layers 12 of different thicknesses according to the needs of actual products, as long as the thermistor characteristics can be achieved.

[0099] It is understandable that when the thickness of the thermistor layer 12 changes, the thickness of the protective layer on the same printed layer as the thermistor layer 12 also changes accordingly, so as to ensure that each printed layer has a flat printed surface.

[0100] Please see Figure 9a and Figure 9b , Figure 9a This is a top view of the embryonic structure in step S36 of one embodiment of this application. Figure 9b This is a side view of the embryonic structure in step S36 of one embodiment of this application.

[0101] S36: Print the paste for the inner electrode layer 11 to form the B-position electrode layer 11b. The B-position electrode layer 11b is offset from the A-position electrode layer 11a, and the B-position electrode layer 11b and the A-position electrode layer 11a are symmetrically arranged around the midline of the preform, so as to achieve electrical connection with the outer electrode layer 30 on one side without connecting with the outer electrode layer 30 on the other side. Its specific structure will not be described in detail here, but those skilled in the art can understand it by referring to the A-position electrode layer 11a.

[0102] Please see Figure 10a and Figure 10b , Figure 10a This is a top view of the embryonic structure in step S37 of one embodiment of this application. Figure 10b This is a side view of the embryonic structure in step S37 of one embodiment of this application.

[0103] S37: Repeat the above steps to alternately print the A-position electrode layer 11a and the B-position electrode layer 11b with the thermistor layer 12 according to the product design requirements. Specifically, in this embodiment, the multilayer chip NTC thermistor element includes two A-position electrode layers 11a and two B-position electrode layers 11b.

[0104] It is understood that those skilled in the art can adaptively adjust the distribution of the A-position electrode layer 11a and the B-position electrode layer 11b according to different product requirements.

[0105] Please see Figure 11a and Figure 11b , Figure 11a This is a top view of the embryonic structure in step S38 of one embodiment of this application. Figure 11b This is a side view of the embryonic structure in step S38 of one embodiment of this application.

[0106] S38: Print glass paste to form cover plate 23. After the inner electrode layer 11, the thermistor layer 12 and the side protective layer 22 are printed, glass paste needs to be printed on the top layer to form cover plate 23, so as to completely cover the thermistor core 10.

[0107] During the printing process of cover plate 23, cutting lines are simultaneously printed on cover plate 23 to indicate the cutting position in subsequent cutting and segmentation processes.

[0108] S4: Cutting and Segmenting. Specifically, the preform is attached to a heat-sensitive cutting tape, and along the cutting lines printed on the cover plate 23, the whole preform is cut into particles of a specific size using a dicing machine for subsequent sintering processes.

[0109] During the cutting process, since the side protective layer 22 has been pre-printed on the preform, when the dicing machine cuts the preform directly along the cutting line, the outer side of the side protective layer 22 is cut by the dicing machine to form a flat cutting surface. After subsequent process steps, the built-in protective layer 20 of the stacked chip NTC thermistor element has a flat cutting surface.

[0110] In the prior art, the side protective layer 22 is formed by spraying glass slurry multiple times after the sintering process. However, the spraying process cannot guarantee that all areas have the same spray thickness, resulting in uneven thickness of the final side protective layer 22 and thus errors in the product's dimensions. In contrast, this application uses a multi-layer printing step to first print the side protective layer 22, and then directly cuts it to form the side protective layer 22 embedded in the product. The surface formed by cutting is smoother than the surface formed by spraying.

[0111] In addition to the side protective layer 22, the cutting surface formed by the cutting line also exposes one end of the inner electrode layer 11 directly to the outside, forming an electrical surface 11c for electrical connection with the outer electrode layer 30.

[0112] S5: Debonding. Specifically, the thermal cutting tape has particles formed during cutting adhered to it. The thermal cutting tape is placed in an oven and heated to the debonding temperature, so that the thermal cutting tape loses its stickiness and the particles fall off the thermal cutting tape independently.

[0113] S6: Debinding. Since the binders and organic solvents in the printing paste are all organic substances, and the subsequent sintering process is usually conducted in a reducing atmosphere, the organic substances cannot decompose under high-temperature reactions in a reducing atmosphere, thus affecting the effectiveness of the sintering process. Therefore, it is necessary to debind the particles before sintering by slowly heating them to 400-500℃ in an air atmosphere, allowing the organic substances to react with oxygen and decompose and volatilize.

[0114] S7: Sintering and forming. Specifically, the particles are placed in a sintering furnace and heated to 1000-1200℃ according to the heating curve. At this time, the thermistor layer 12 is sintered to form a ceramic body, the inner electrode layer 11 is solidified, and the built-in protective layer 20 forms an insulating glass glaze covering the thermistor core 10 to protect the thermistor core 10.

[0115] During the sintering process, since the thermistor electrode layer and the built-in protective layer 20 are sintered simultaneously, in addition to controlling the ratio of glass paste and thermistor paste and the process mentioned above, it is also necessary to control the temperature rise curve in the sintering process steps so that the thermistor layer 12 and the built-in protective layer 20 are sintered slowly to prevent the heating rate from being too high, which would cause the thermistor layer 12 and the built-in protective layer 20 to expand too quickly, generating mutual extrusion stress and causing surface cracks.

[0116] It should be noted that the atmosphere, sintering stability, and temperature rise profile during the sintering process also have a significant impact on the formed product. Products under different sintering parameters may therefore have completely different product properties, and the resulting differences and their causes are beyond the scope of this application.

[0117] S8: Chamfer and grind the cut surface to fully expose the electrical surface 11c. Specifically, the sintered particles are sorted through a sieve and loaded into a ball mill jar. The particles, diamond abrasive, and grinding stones are placed in the ball mill at a weight ratio of 1:(0.1-0.4):(0.6-1) and ground for more than 20 hours to cut the edges of the particle surface with diamond abrasive and grinding stones, ensuring that the electrical surface 11c is fully exposed.

[0118] S9: End sealing. Specifically, electrode slurry is coated on both ends of the particle with electrical surface 11c and then dried to form an outer electrode layer 30 electrically connected to the electrical surface 11c. During the coating process, the outer electrode layer 30 extends to the surrounding area to partially cover the built-in protective layer 20, thereby effectively protecting the interface between the built-in protective layer 20 and the outer electrode layer 30.

[0119] S10: Silver sintering. The end-capped particles are spread evenly in a high-temperature sintering pot and sintered at 800-850℃ for 40-50 minutes, so that the outer electrode layer 30 is fixedly connected to the electrical surface 11c.

[0120] S11: Electroplating. The silver-plated particles are mixed with steel balls in a specific ratio and placed in a special roller for electroplating of nickel and tin layers. When the multilayer NTC thermistor element is soldered to the PCB board surface, the silver in the outer electrode layer 30 may melt into the solder, causing solder corrosion. Therefore, it is necessary to electroplat a nickel and tin layer on the surface of the outer electrode layer 30 first to prevent corrosion.

[0121] S12: Testing and Packaging. Specifically, the electroplated products are sorted according to their resistance values ​​using a testing machine, and the multilayer NTC thermistor components with resistance values ​​that meet the standards are packaged and stored in the warehouse using a tape and reel machine.

[0122] Please compare and refer to the following: Figure 2 and Figure 12 ,Figure 12 This is a flowchart illustrating the manufacturing process of a multilayer NTC thermistor element in the prior art. Compared to the manufacturing process of multilayer NTC thermistor elements in the prior art, after the chamfering step, in order to form a protective layer on the outside of the thermistor core 10, it is necessary to go through the steps of sieve plate, applying protective paste, spraying glass glaze, drying, rolling, firing, and pouring protective paste. In this application, since the built-in protective layer 20 is printed into the preform during the multilayer printing process and sintered simultaneously with the thermistor layer 12, the above-mentioned process steps can be saved, the manufacturing cycle can be reduced, and the manufacturing cost can be lowered.

[0123] The manufacturing principle of the multilayer chip NTC thermistor element of this application is as follows: by optimizing the ratio and process of the protective layer paste and the thermistor paste, the difference in the coefficient of expansion between the protective layer and the thermistor layer 12 is reduced. Then, during the multilayer printing process, the built-in protective layer 20 and the thermistor layer 12 are printed simultaneously to form a blank. When cutting the blank, the built-in protective layer 20 is made to have a flat cutting surface. Finally, when the protective layer and the thermistor layer 12 are sintered together, the problem of different coefficients of expansion is overcome, so that the built-in protective layer 20 and the thermistor core 10 are formed simultaneously. This avoids the need for a separate process to form the built-in protective layer 20, thereby saving process steps, reducing manufacturing cycle and manufacturing cost. Through this process, a multilayer chip NTC thermistor element with high processing accuracy and standard specifications is obtained.

[0124] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0125] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A multilayer chip NTC thermistor element, characterized in that, include: The thermistor core (10) includes an inner electrode layer (11) and a thermistor layer (12) alternately arranged in the vertical direction. The thermistor layer (12) is electrically connected to or disconnected from the inner electrode layer (11) under temperature control. An outer electrode layer (30) covers two opposing electrical surfaces (11c) of the thermosensitive inner core (10), and the outer electrode layer (30) is electrically connected to the inner electrode layer (11) through the electrical surfaces (11c). An insulating built-in protective layer (20) covers the non-electrical surface (11c) of the thermistor core (10). The built-in protective layer (20) has a flat cut surface, and part of the cut surface is covered by the outer electrode layer (30) extending to the non-electrical surface (11c). The built-in protective layer (20) includes a base plate (21), a cover plate (23), and a side protective layer (22) arranged sequentially in the vertical direction. The outer side of the thermistor layer (12) is completely surrounded by the corresponding side protective layer (22). The side protective layer (22) is printed in layers and has a uniform thickness. Either the inner electrode layer (11) or the thermistor layer (12) of the printed thermistor core (10) is located in the same printed layer as the corresponding side protective layer (22) and has the same thickness to form a flat printed layer surface for providing a base surface for the next printed layer. The thermistor mixture is formed by uniformly mixing the thermistor powder, binder and solvent; the thermistor mixture is repeatedly ground using a roller mill to form the thermistor layer slurry of the thermistor layer (12); The built-in protective layer (20), including the side protective layer (22), is formed from a protective layer slurry; wherein glass powder, adhesive, and solvent are mixed evenly to form a protective layer mixture, and the protective layer mixture is repeatedly ground using a roller mill to form the protective layer slurry; wherein the weight ratio range of the adhesive and solvent in the protective layer mixture is the same as that of the thermistor mixture, and the range of process parameters for grinding the protective layer mixture is the same as that for grinding the thermistor mixture; The built-in protective layer (20) and the thermistor layer (12) of the thermistor core (10) are sintered together. The expansion coefficient of the protective layer slurry of the side protective layer (22) is similar to that of the thermistor layer slurry of the thermistor layer (12), thus avoiding sintering cracks.

2. The multilayer chip NTC thermistor element according to claim 1, characterized in that, The outer electrode layer (30) and the inner protective layer (20) have fixed dimensions.

3. The multilayer chip NTC thermistor element according to claim 1, characterized in that, The thermistor core (10) includes multiple thermistor layers (12) and at least two inner electrode layers (11). In the printing step of the inner electrode layer (11), the inner electrode layer (11) disposed near one end of the embryo forms an A-position electrode layer (11a), and the adjacent inner electrode layer (11) disposed near the opposite end of the embryo forms a B-position electrode layer (11b). The A-position electrode layer (11a) and the B-position electrode layer (11b) are alternately disposed at intervals from the thermistor layers (12) in the thickness direction of the embryo.

4. A method for manufacturing a multilayer chip NTC thermistor element as described in claim 1, characterized in that, The manufacturing method includes: Layered printing: The base plate (21), the side protective layer (22), the thermal core (10) and the cover plate (23) are printed sequentially to form a blank, and cutting lines are printed on the cover plate (23); Cutting and segmenting: Cutting the embryo along the cutting line to form several particles of the same size; Sintering: The particles are heated and the thermosensitive inner core (10) of the particles is sintered to form a ceramic body. The bottom plate (21), the cover plate (23) and the side protective layer (22) are sintered simultaneously to directly form the insulating inner protective layer (20) covering the surface of the ceramic body. Prior to the overlay printing step, a step of preparing a protective layer paste is also included, which includes: Provide glass powder; mix the glass powder, binder, and solvent evenly to form a protective layer mixture; repeatedly grind the protective layer mixture using a roller mill to form the protective layer slurry; The weight ratio range of the binder and solvent in the protective layer mixture is the same as that of the thermistor mixture, and the range of process parameters for grinding the protective layer mixture is the same as that for grinding the thermistor mixture.

5. The method for manufacturing a multilayer chip NTC thermistor element according to claim 4, characterized in that, In the overlay printing step of the side protective layer (22) and the thermal core (10), the printed layer includes the thermal core (10) disposed at the center of the printed layer and the side protective layer (22) disposed around the thermal core (10).

6. The method for manufacturing a multilayer chip NTC thermistor element according to claim 5, characterized in that, The overlay printing process includes: Print the side protective layer (22); The thermal core (10) is printed, and the thermal core (10) has the same thickness as the side protective layer (22) to form a flat surface of the printed layer, which serves as the base for the next printed layer.

7. The method for manufacturing a multilayer chip NTC thermistor element according to claim 4, characterized in that, The process includes the following steps after the cutting and segmentation step and before the sintering and forming step: Debonding: The thermal cutting tape has particles formed during cutting adhered to it. The thermal cutting tape is placed in an oven and heated to the debonding temperature so that the thermal cutting tape loses its stickiness and the particles fall off the thermal cutting tape independently. Debinding: In the sintering process of the sintering molding step, a reducing atmosphere is used. Organic matter cannot be decomposed by high temperature reaction under a reducing atmosphere. Debinding is performed on the particles before sintering. The organic matter is decomposed and volatilized by slow heating in an air atmosphere. Following the sintering and forming step, the process also includes: Chamfering: The built-in protective layer (20) on the opposite end faces of the ceramic body is cut so that the A-position electrode layer (11a) and B-position electrode layer (11b) of the thermosensitive core (10) are exposed to the outside, forming opposite electrical surfaces (11c). End sealing: After coating the electrical surface (11c) with conductive paste, heat treatment is performed to form an outer electrode layer (30). Silver sintering: The sealed particles are sintered at high temperature so that the outer electrode layer (30) is fixedly connected to the electrical surface (11c). Electroplating: A nickel layer and a tin layer are electroplated on the surface of the outer electrode layer (30) to prevent corrosion; Testing and Packaging: After electroplating, the products are sorted according to their resistance values ​​using a testing machine. The multilayer NTC thermistor elements with resistance values ​​that meet the standards are then packaged and stored in the warehouse using a tape and reel machine.

8. The method for manufacturing a multilayer chip NTC thermistor element according to claim 4, characterized in that, Prior to the overlay printing step, a step of preparing the thermistor layer paste is also included, including: Preparation of powder: Mix manganese oxide, cobalt oxide, nickel oxide, copper oxide and iron oxide evenly to form thermistor powder; The thermistor powder, binder, and solvent are mixed evenly to form a thermistor mixture; the thermistor mixture is repeatedly ground using a roller mill to form the thermistor slurry. The overlay printing process includes: Print a layer of glass paste to form a base plate (21). Continue printing glass paste on the base plate (21) to form a partial side protective layer (22) on the base plate (21); wherein the step of printing one layer of glass paste and the step of continuing to print glass paste on the base plate (21) are printed with the same paste. Print internal electrode paste to form an A-position electrode layer (11a), one end of which is connected to a relatively close cutting line, and the other end of which is separated from another relatively distant cutting line by a protective layer. Glass paste is printed on the flat surface formed by the A-position electrode layer (11a) and the corresponding side protective layer (22) to form the side protective layer (22) of the next printed layer. The thermistor layer paste is printed in the area surrounded by the side protective layer (22) to form the thermistor layer (12); the outer side of the thermistor layer (12) is completely surrounded and wrapped by the side protective layer (22), and the thermistor layer (12) is directly printed on the A-position electrode layer (11a); The inner electrode layer paste is printed to form the B-position electrode layer (11b); the B-position electrode layer (11b) is offset from the A-position electrode layer (11a) to achieve electrical connection with the outer electrode layer (30) on one side without connecting with the outer electrode layer (30) on the other side. Repeat the above steps to alternately print the A-position electrode layer (11a) and the B-position electrode layer (11b) with the thermistor layer (12); Print glass paste to form a cover plate (23); after the inner electrode layer (11), the thermistor layer (12) and the side protective layer (22) are printed, print glass paste on the top layer to form a cover plate (23) to achieve complete coverage of the thermistor core (10).

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