A circuit to prevent common-mode voltage lockup for fully differential operational amplifiers

Abstract

The present invention provides an anti-common-mode voltage lockout circuit for a fully differential operational amplifier, comprising: a two-stage operational amplifier main circuit, a common-mode feedback circuit, and an anti-lockout circuit; the anti-lockout circuit comprises a first MOS transistor, a second MOS transistor, a third MOS transistor, and a resistor, the gate of the first MOS transistor being connected to the input of the common-mode feedback circuit, the drain of the first MOS transistor, the gate of the second MOS transistor, and the gate of the third MOS transistor being connected to the resistor, and the drain of the second MOS transistor and the drain of the third MOS transistor being connected to the output of the first stage circuit of the operational amplifier of the two-stage operational amplifier main circuit. The present invention has a simple circuit structure, consumes few resources, quickly releases lockout, has little impact on the performance of the operational amplifier itself, and is suitable for a wide range of scenarios.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a common-mode voltage lockout prevention circuit for a fully differential operational amplifier. Background Art

[0002] The operational amplifier is an indispensable module in analog integrated circuits. In order to reduce the performance changes of the operational amplifier due to factors such as process temperature and voltage, the operational amplifier is usually used in feedback. At the same time, in order to improve the ability to suppress common-mode interference, the operational amplifier usually adopts a fully differential structure. Due to the instability of the common-mode level, an additional common-mode feedback circuit is required to stabilize the output common-mode level. According to the range of the common-mode level in the application scenario, there are usually two types of N-input fully differential operational amplifiers and P-input fully differential operational amplifiers, such as Figure 1 and Figure 2 shown.

[0003] In the feedback structure, such as Figure 3 In the resistor feedback variable gain amplifier shown in the figure, the output of the operational amplifier is connected to the input through the resistor R2. During normal operation, the common mode level of the input and output will be clamped to vcm by the common mode feedback circuit. However, when the amplifier is powered on, it may be locked at the power supply voltage or ground voltage and cannot start normally, that is, there is a degenerate state. If the operational amplifier uses Figure 1 As shown in the N-type input, this amplifier may be locked at a low level when powered on. At this time, the input vin+, vin-, vout+, and vout- voltages of the operational amplifier are all low, and the output of the common-mode feedback circuit is Figure 1 The vc voltage in is high, which turns off PM1 and PM2, while the vin+ and vin- are low, which turns off NM1 and NM2. The first-stage outputs va and vb of the N-type input amplifier are high. The circuit state is stable at this time, but it cannot work normally. Figure 2 If the P-type input is shown, the amplifier may be locked at a high level when powered on. At this time, the input vin+, vin-, vout+, and vout- voltages of the operational amplifier are all high, and the output of the common-mode feedback circuit is Figure 2The VC voltage in the circuit is low, shutting down NM1 and NM2. Meanwhile, the high vin+ and vin- levels shut down PM1 and PM2. The first-stage outputs va and vb of the P-type input amplifier are low. While the circuit remains stable, it will not function properly. It's important to note that if an N-type input operational amplifier is used, the degenerate state of latching at a high level will not occur. This is because if the output is high, the op amp's common-mode feedback circuit outputs VC at a low level, turning on PM1 and PM2. This pulls up the first-stage outputs va and vb, shutting down PM3 and PM4. Current sources I2 and I3 then pull the output down, breaking the high-level degenerate state. Similarly, if a P-type input operational amplifier is used, the degenerate state of latching at a low level will not occur. Therefore, to break the degenerate state and enable normal circuit startup, an anti-lockup circuit is required.

[0004] Existing op amp anti-common-mode voltage lockout circuit technologies (CN102394580B, CN106533373B) generally have problems such as complex circuits, relatively long unlocking time, and can only prevent high-level lockout. The usage scenarios are limited, and the lockout circuit affects the bandwidth and stability of the op amp. Summary of the Invention

[0005] In view of this, an embodiment of the present application provides a common-mode voltage lockout prevention circuit for a fully differential operational amplifier. The circuit has a simple structure, consumes few resources, has a fast unlocking speed, has little impact on the performance of the operational amplifier itself, and has no restrictions on usage scenarios.

[0006] The embodiments of the present application provide the following technical solutions: a common-mode voltage lockout prevention circuit for a fully differential operational amplifier, comprising: a two-stage operational amplifier main circuit, a common-mode feedback circuit, and an anti-lockout circuit;

[0007] The anti-lock circuit includes a first MOS transistor, a second MOS transistor, a third MOS transistor and a resistor, the gate of the first MOS transistor is connected to the input end of the common-mode feedback circuit, the drain of the first MOS transistor, the gate of the second MOS transistor, and the gate of the third MOS transistor are connected to the resistor, and the drain of the second MOS transistor and the drain of the third MOS transistor are connected to the output of the first stage circuit of the operational amplifier of the two-stage operational amplifier main circuit;

[0008] When the common-mode level of the input of the common-mode feedback circuit is locked at a high level, the high level is transmitted to the first MOS transistor, causing the first MOS transistor to be turned off, and the voltage of the second MOS transistor and the third MOS transistor is pulled down to a low level through the resistor, causing the second MOS transistor and the third MOS transistor to be turned on, thereby pulling the output voltage of the first-stage circuit of the operational amplifier from a low level to a high level, and outputting it to the second-stage circuit of the operational amplifier of the two-stage operational amplifier main circuit, thereby pulling down the output voltage of the second-stage circuit of the operational amplifier, and breaking the locked state;

[0009] When the common-mode level of the input of the common-mode feedback circuit is locked at a low level, the low level is transmitted to the first MOS transistor, causing the first MOS transistor to be turned off, and the voltage of the second MOS transistor and the third MOS transistor is pulled up to a high level through the resistor, causing the second MOS transistor and the third MOS transistor to be turned on, pulling the output voltage of the first-stage circuit of the operational amplifier from a high level to a low level, and outputting it to the second-stage circuit of the operational amplifier of the two-stage operational amplifier main circuit, pulling up the output voltage of the second-stage circuit of the operational amplifier, and breaking the locked state.

[0010] According to an embodiment of the present application, the first MOS transistor, the second MOS transistor, and the third MOS transistor are all P-type MOS transistors, or are all N-type MOS transistors.

[0011] According to an embodiment of the present application, when the first MOS transistor, the second MOS transistor, and the third MOS transistor are all P-type MOS transistors;

[0012] The first stage operational amplifier circuit is composed of a first PMOS transistor (PM1), a second PMOS transistor (PM2), a first NMOS transistor (NM1), a second NMOS transistor (MN2) and a current source I1;

[0013] The second-stage operational amplifier circuit is composed of a third NMOS transistor (NM3), a fourth NMOS transistor (NM4), a first resistor (R1), a second resistor (R2), a first capacitor (C1), a second capacitor (C2), and current sources I2 and I3.

[0014] According to one embodiment of the present application, the common-mode feedback circuit is composed of a third PMOS transistor (PM3), a fourth PMOS transistor (PM4), a fifth NMOS transistor (NM5), a sixth NMOS transistor (NM6), a third resistor (R3), a fourth resistor (R4) and a current source I4.

[0015] According to an embodiment of the present application, when the first MOS transistor, the second MOS transistor, and the third MOS transistor are all N-type MOS transistors;

[0016] The first stage operational amplifier circuit is composed of a first NMOS transistor (NM1), a second NMOS transistor (MN2), a first PMOS transistor (PM1), a second PMOS transistor (PM2) and a current source I1;

[0017] The second-stage operational amplifier circuit is composed of a third PMOS transistor (PM3), a fourth PMOS transistor (PM4), a first resistor (R1), a second resistor (R2), a first capacitor (C1), a second capacitor (C2), and current sources I2 and I3.

[0018] According to one embodiment of the present application, the common-mode feedback circuit is composed of a third NMOS transistor (NM3), a fourth NMOS transistor (NM4), a fifth PMOS transistor (PM5), a sixth PMOS transistor (PM6), a third resistor (R3), a fourth resistor (R4) and a current source I4.

[0019] Compared to existing operational amplifier common-mode voltage lockout prevention circuits, the embodiments of the present invention respectively design N-type and P-type common-mode voltage lockout prevention circuits for operational amplifiers with N-type and P-type inputs, which can correctly remove the operational amplifier from the locked state and enable normal operation. At the same time, the circuit structure is simple, requiring only the addition of three MOS tubes and one resistor, consuming little resources. The output node of the amplifier does not add additional MOS parasitic capacitance, thus having little impact on the performance of the operational amplifier itself. In the process of unlocking, charging and discharging are mainly pulled up to a high level by resistor R5, and pulled down to a low level by NM6 and NM7. Its gate voltage is the power supply. Under the same size, the discharge current generated is larger and faster than when the gate voltage is at an intermediate level. Different anti-lockout circuits are designed for operational amplifiers with different input types, suitable for different application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0021] Figure 1 The circuit structure of an N-type input fully differential operational amplifier is shown;

[0022] Figure 2 The circuit structure of a P-type input fully differential operational amplifier is shown;

[0023] Figure 3 This figure shows one of the applications of operational amplifiers, the circuit structure of a resistor feedback variable gain amplifier.

[0024] Figure 4 The circuit structure of an N-type input fully differential operational amplifier with an N-type common-mode lock-out prevention circuit according to an embodiment of the present invention is shown;

[0025] Figure 5 The circuit structure of a P-type input fully differential operational amplifier with a P-type anti-common-mode lock-up circuit according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0026] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0027] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of this application can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments, and the technical solutions of the present invention will be clearly and completely described. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0028] like Figure 4-Figure 5 As shown, an embodiment of the present invention provides an anti-common mode voltage lockout circuit for a fully differential operational amplifier, comprising: a two-stage operational amplifier main circuit, a common mode feedback circuit, and an anti-lockout circuit;

[0029] The anti-lock circuit includes a first MOS transistor, a second MOS transistor, a third MOS transistor and a resistor, the gate of the first MOS transistor is connected to the input end of the common-mode feedback circuit, the drain of the first MOS transistor, the gate of the second MOS transistor, and the gate of the third MOS transistor are connected to the resistor, and the drain of the second MOS transistor and the drain of the third MOS transistor are connected to the output of the first stage circuit of the operational amplifier of the two-stage operational amplifier main circuit;

[0030] When the common-mode level of the input of the common-mode feedback circuit is locked at a high level, the high level is transmitted to the first MOS transistor, causing the first MOS transistor to be turned off, and the voltage of the second MOS transistor and the third MOS transistor is pulled down to a low level through the resistor, causing the second MOS transistor and the third MOS transistor to be turned on, thereby pulling the output voltage of the first-stage circuit of the operational amplifier from a low level to a high level, and outputting it to the second-stage circuit of the operational amplifier of the two-stage operational amplifier main circuit, thereby pulling down the output voltage of the second-stage circuit of the operational amplifier, and breaking the locked state;

[0031] When the common-mode level of the input of the common-mode feedback circuit is locked at a low level, the low level is transmitted to the first MOS transistor, causing the first MOS transistor to be turned off, and the voltage of the second MOS transistor and the third MOS transistor is pulled up to a high level through the resistor, causing the second MOS transistor and the third MOS transistor to be turned on, pulling the output voltage of the first-stage circuit of the operational amplifier from a high level to a low level, and outputting it to the second-stage circuit of the operational amplifier of the two-stage operational amplifier main circuit, pulling up the output voltage of the second-stage circuit of the operational amplifier, and breaking the locked state.

[0032] The two-stage operational amplifier main circuit and the common-mode feedback circuit in this embodiment both adopt the circuit connection structure of the currently existing N-type and P-type input fully differential operational amplifier. The specific connection structure is shown in the attached Figure 4 and Figure 5 Of course, the anti-lock circuit in this embodiment is also applicable to other two-stage operational amplifiers and common-mode feedback circuit structures.

[0033] When the first MOS transistor, the second MOS transistor, and the third MOS transistor are all P-type MOS transistors, the operational amplifier first-stage circuit is composed of a first PMOS transistor (PM1), a second PMOS transistor (PM2), a first NMOS transistor (NM1), a second NMOS transistor (MN2), and a current source I1; the operational amplifier second-stage circuit is composed of a third NMOS transistor (NM3), a fourth NMOS transistor (NM4), a first resistor (R1), a second resistor (R2), a first capacitor (C1), a second capacitor (C2), and current sources I2 and I3. The common-mode feedback circuit is composed of a third PMOS transistor (PM3), a fourth PMOS transistor (PM4), a fifth NMOS transistor (NM5), a sixth NMOS transistor (NM6), a third resistor (R3), a fourth resistor (R4), and a current source I4.

[0034] When the first MOS transistor, the second MOS transistor, and the third MOS transistor are all N-type MOS transistors, the operational amplifier first-stage circuit is composed of a first NMOS transistor (NM1), a second NMOS transistor (MN2), a first PMOS transistor (PM1), a second PMOS transistor (PM2), and a current source I1; the operational amplifier second-stage circuit is composed of a third PMOS transistor (PM3), a fourth PMOS transistor (PM4), a first resistor (R1), a second resistor (R2), a first capacitor (C1), a second capacitor (C2), and current sources I2 and I3. The common-mode feedback circuit is composed of a third NMOS transistor (NM3), a fourth NMOS transistor (NM4), a fifth PMOS transistor (PM5), a sixth PMOS transistor (PM6), a third resistor (R3), a fourth resistor (R4), and a current source I4.

[0035] The anti-common-mode voltage lockout circuit of the present invention can be used in any application scenario of a fully differential operational amplifier. First, the common-mode voltage level in the application scenario is determined. A fully differential operational amplifier with either an N-type input or a P-type input can be selected. The corresponding N-type or P-type anti-common-mode voltage lockout circuit is then selected. By detecting the lockout voltage, the node is charged and discharged to release the lockout state and enable normal operation. The circuit is simple, consumes few resources, has a fast release speed, and has little impact on the performance of the operational amplifier circuit itself. It is applicable to a wide range of applications and is applicable to both high-level lockout and low-level lockout.

[0036] In a specific embodiment of the present invention, for an N-type input fully differential operational amplifier, an N-type anti-lock circuit needs to be added, such as Figure 4 As shown in the figure, it is mainly divided into four parts: the first stage of the op amp, the second stage of the op amp, the common-mode feedback circuit, and the anti-lockout circuit. NM1, MN2, PM1, PM2, and current source I1 constitute the first stage of the N-type input fully differential amplifier. PM3, PM4, R1, C1, R2, C2, and current sources I2 and I3 constitute the second stage of the N-type input fully differential amplifier. NM3, MN4, PM5, PM6, R3, R4, and current source I4 constitute the common-mode feedback circuit of the N-type input fully differential amplifier. NM5, NM6, NM7, and resistor R5 constitute the N-type anti-lockout circuit. Its working principle is as follows. When the N-type input fully differential operational amplifier is used in the feedback system and the common-mode level is locked at a low level, it can be seen from the previous analysis that at this time the vin+, vin-, vout+, and vout- voltages are all low, and va, vb, and vc are all high. The low levels of vout+ and vout- are transmitted to NM5 of the anti-lock circuit through resistors R3 and R4, causing it to be turned off. Therefore, the gate voltages of NM6 and NM7 are pulled up to a high level through the large resistor R5. NM6 and NM7 are turned on, pulling the output voltages va and vb of the first stage from a high level to a low level, turning on PM3 and PM4, pulling the output voltage high, and getting out of the locked state. At this time, the common-mode feedback circuit takes effect. After the output is pulled high, NM5 is turned on, pulling the gate voltages of NM6 and NM7 down to a low level. NM5, NM6, and NM7 are all turned off, there is no leakage current, and it does not affect the normal operation of the operational amplifier.

[0037] In a specific embodiment of the present invention, for a P-type input fully differential operational amplifier, a P-type anti-lock circuit needs to be added, such as Figure 5As shown in the figure, it is mainly divided into four parts: the first stage of the op amp, the second stage of the op amp, the common-mode feedback circuit, and the anti-lockout circuit. PM1, PM2, NM1, MN2, and current source I1 constitute the first stage of the P-type input fully differential amplifier. NM3, NM4, R1, C1, R2, C2, and current sources I2 and I3 constitute the second stage of the P-type input fully differential amplifier. PM3, PM4, NM5, NM6, R3, R4, and current source I4 constitute the common-mode feedback circuit of the P-type input fully differential amplifier. PM5, PM6, PM7, and resistor R5 constitute the N-type anti-lockout circuit. Its working principle is as follows. When a P-type input fully differential operational amplifier is used in a feedback system and the common-mode level is locked at a high level, it can be seen from the previous analysis that at this time the vin+, vin-, vout+, and vout- voltages are all high, and va, vb, and vc are all low. The high levels of vout+ and vout- are transmitted to PM5 of the anti-lock circuit through resistors R3 and R4, causing it to be turned off. Therefore, the gate voltages of PM6 and PM7 are pulled down to a low level through the large resistor R5. PM6 and PM7 are turned on, pulling the output voltages va and vb of the first stage from a low level to a high level, turning on NM3 and NM4, pulling the output voltage down, and getting out of the locked state. At this time, the common-mode feedback circuit takes effect, and after the output is pulled low, PM5 is turned on, pulling the gate voltages of PM6 and PM7 to a high level. PM5, PM6, and PM7 are all turned off, there is no leakage current, and the normal operation of the operational amplifier is not affected.

[0038] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A common-mode voltage lockout prevention circuit for a fully differential operational amplifier, characterized in that: include: Two-stage operational amplifier main circuit, common-mode feedback circuit and anti-lock circuit; The anti-lock circuit includes a first MOS transistor, a second MOS transistor, a third MOS transistor and a resistor, the gate of the first MOS transistor is connected to the input end of the common-mode feedback circuit, the drain of the first MOS transistor, the gate of the second MOS transistor, and the gate of the third MOS transistor are connected to the resistor, and the drain of the second MOS transistor and the drain of the third MOS transistor are connected to the output of the first stage circuit of the operational amplifier of the two-stage operational amplifier main circuit; When the common-mode level of the input of the common-mode feedback circuit is locked at a high level, the high level is transmitted to the first MOS transistor, causing the first MOS transistor to be turned off, and the voltage of the second MOS transistor and the third MOS transistor is pulled down to a low level through the resistor, causing the second MOS transistor and the third MOS transistor to be turned on, thereby pulling the output voltage of the first-stage circuit of the operational amplifier from a low level to a high level, and outputting it to the second-stage circuit of the operational amplifier of the two-stage operational amplifier main circuit, thereby pulling down the output voltage of the second-stage circuit of the operational amplifier, and breaking the locked state; When the common-mode level of the input of the common-mode feedback circuit is locked at a low level, the low level is transmitted to the first MOS transistor, causing the first MOS transistor to be turned off, and the voltage of the second MOS transistor and the third MOS transistor is pulled up to a high level through the resistor, causing the second MOS transistor and the third MOS transistor to be turned on, pulling the output voltage of the first-stage circuit of the operational amplifier from a high level to a low level, and outputting it to the second-stage circuit of the operational amplifier of the two-stage operational amplifier main circuit, pulling up the output voltage of the second-stage circuit of the operational amplifier, and breaking the locked state.

2. The anti-common mode voltage lock-up circuit for a fully differential operational amplifier according to claim 1, wherein: The first MOS transistor, the second MOS transistor, and the third MOS transistor are all P-type MOS transistors, or are all N-type MOS transistors.

3. The anti-common mode voltage lock-up circuit for a fully differential operational amplifier according to claim 2, wherein: When the first MOS transistor, the second MOS transistor, and the third MOS transistor are all P-type MOS transistors; The first stage operational amplifier circuit is composed of a first PMOS transistor (PM1), a second PMOS transistor (PM2), a first NMOS transistor (NM1), a second NMOS transistor (MN2) and a current source I1; The second-stage operational amplifier circuit is composed of a third NMOS transistor (NM3), a fourth NMOS transistor (NM4), a first resistor (R1), a second resistor (R2), a first capacitor (C1), a second capacitor (C2), and current sources I2 and I3.

4. The anti-common mode voltage lock-up circuit for a fully differential operational amplifier according to claim 3, wherein: The common-mode feedback circuit is composed of a third PMOS transistor (PM3), a fourth PMOS transistor (PM4), a fifth NMOS transistor (NM5), a sixth NMOS transistor (NM6), a third resistor (R3), a fourth resistor (R4) and a current source I4.

5. The anti-common mode voltage lock-up circuit for a fully differential operational amplifier according to claim 2, wherein: When the first MOS transistor, the second MOS transistor, and the third MOS transistor are all N-type MOS transistors; The first stage operational amplifier circuit is composed of a first NMOS transistor (NM1), a second NMOS transistor (MN2), a first PMOS transistor (PM1), a second PMOS transistor (PM2) and a current source I1; The second-stage operational amplifier circuit is composed of a third PMOS transistor (PM3), a fourth PMOS transistor (PM4), a first resistor (R1), a second resistor (R2), a first capacitor (C1), a second capacitor (C2), and current sources I2 and I3.

6. The anti-common mode voltage lock-up circuit for a fully differential operational amplifier according to claim 5, wherein: The common-mode feedback circuit is composed of a third NMOS transistor (NM3), a fourth NMOS transistor (NM4), a fifth PMOS transistor (PM5), a sixth PMOS transistor (PM6), a third resistor (R3), a fourth resistor (R4) and a current source I4.

Images