A display device and its working method, and storage medium

Abstract

The embodiment of the present disclosure provides a display device and its working method and storage medium. In the display device, a processor is configured to obtain grayscale information of a frame image, obtain row information showing black in the frame image according to the grayscale information, a driving circuit is configured to obtain row information showing black from the processor, and multiple driving channels are switched to a black state driving display mode according to the row information showing black, which can further reduce the power consumption of the display product.

Description

Technical Field

[0001] The embodiments of the present disclosure relate to, but are not limited to, the field of display technology, and in particular to a display device, a working method thereof, and a storage medium. Background Art

[0002] Organic Light Emitting Diode (OLED) and Quantum-dot Light Emitting Diode (QLED) are active light-emitting display devices with the advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, extremely high response speed, thinness, flexibility and low cost. Organic light-emitting diode (OLED) can be applied to mobile phones, monitors, laptops, digital cameras, instruments and other devices with display functions.

[0003] In actual applications, there are defects such as high power consumption of display products and poor user experience. Summary of the invention

[0004] The following is a summary of the subject matter of the detailed description of the present disclosure. This summary is not intended to limit the scope of the claims.

[0005] The problem to be solved by the embodiments of the present disclosure is to provide a display device and a working method thereof, and a storage medium to solve the technical problem of high power consumption of display products.

[0006] In a first aspect, in order to solve the technical problem of high power consumption of display products, an embodiment of the present disclosure provides a display device, including a processor and a driving circuit connected to the processor, wherein the driving circuit includes a plurality of driving channels;

[0007] The processor is configured to obtain grayscale information of a frame image, and obtain black line information in the frame image according to the grayscale information;

[0008] The driving circuit is configured to obtain row information displaying black from the processor, and switch the plurality of driving channels to a black driving display mode according to the row information displaying black.

[0009] In an exemplary embodiment, the processor is further configured to obtain line information showing non-black in the frame image according to the grayscale information;

[0010] The driving circuit is further configured to switch the plurality of driving channels to a normal driving display mode according to the row information displaying non-black color.

[0011] In an exemplary embodiment, the driving channel includes a driving output circuit, and switching the multiple driving channels to a normal driving display mode according to the row information displaying non-black includes: when receiving N rows of grayscale information before the row information displaying non-black, switching the multiple driving channels to the driving output circuit.

[0012] In an exemplary embodiment, N is a positive integer greater than or equal to 0 and less than or equal to 15.

[0013] In an exemplary embodiment, the driving output circuit includes an amplifier, and an output terminal of the amplifier serves as an output terminal of the driving channel.

[0014] In an exemplary embodiment, the processor is further configured to take the grayscale information of adjacent M rows in the frame image as a grayscale group, average the grayscale values ​​of the grayscale information in multiple grayscale groups, and obtain grayscale means of the multiple grayscale groups, wherein the grayscale means include grayscale values ​​displayed in a black state and grayscale values ​​displayed in a non-black state, and the row information displaying black is obtained based on the grayscale information row corresponding to the grayscale value displayed in the black state, and the row information displaying non-black is obtained based on the grayscale information row corresponding to the grayscale value displayed in the non-black state.

[0015] In an exemplary embodiment, M is a positive integer greater than or equal to 1 and less than or equal to 15.

[0016] In an exemplary embodiment, the frame image includes K rows and L columns of grayscale information, and the processor is further configured to count the L grayscale values ​​in any grayscale information row corresponding to the grayscale value displayed in the black state as a first count value, and count the L grayscale values ​​in any grayscale information row corresponding to the grayscale value displayed in the non-black state as a second count value, to obtain a one-dimensional cache table with a length of K.

[0017] In an exemplary embodiment, the driving circuit includes a black state display circuit, a black state display switch, and a plurality of switching switches, and the output ends of the plurality of driving channels are connected to the black state display circuit through the plurality of switching switches and the black state display switch;

[0018] The switching of the plurality of driving channels to the black driving display mode according to the row information displaying black includes: closing the plurality of switching switches and the black display switch so that the signal of the black display circuit is used as the output signal of the plurality of driving channels.

[0019] In an exemplary embodiment, the black state display circuit is configured to provide a highest voltage of a positive source voltage or a positive gray scale voltage to the plurality of driving channels.

[0020] In an exemplary embodiment, the black state display circuit includes a low voltage dropout linear regulator, one end of which is connected to the positive source voltage output terminal and the black state display switch, and the other end is connected to the highest voltage outputting the positive grayscale voltage and the black state display switch.

[0021] In an exemplary embodiment, the display device further includes a sub-pixel rendering borrowed color module and a uniform processing module, and the driving circuit is further configured to turn off the sub-pixel rendering borrowed color module and / or the uniform processing module according to the row information displaying black.

[0022] In an exemplary embodiment, the driving circuit includes a timing controller and a data driver, the processor is connected to the timing controller, and the switching of the multiple driving channels to the black driving display mode according to the row information displaying black includes: the timing controller receives grayscale information from the processor, and when receiving the grayscale row corresponding to the row information displaying black, controls the data driver to switch the multiple driving channels to the black display power supply terminal.

[0023] In an exemplary embodiment, the driving circuit includes a timing controller and a data driver, the processor is integrated in the data driver or the processor is connected to the driver, and the switching of the plurality of driving channels to a black state driving display mode according to the row information displaying black includes: the timing controller receives a frame image from an external system, and when a grayscale row corresponding to the row information displaying black is received, the processor controls the data driver to switch the plurality of driving channels to a black state display power supply terminal;

[0024] The processor is configured to obtain grayscale information of a frame image, including: the processor obtains grayscale information of a frame image of an external system.

[0025] In a second aspect, an embodiment of the present disclosure further provides a working method of a display device, wherein the display device includes a driving channel, and the method includes:

[0026] Acquire grayscale information of a frame image, and acquire row information showing black in the frame image according to the grayscale information;

[0027] The plurality of driving channels are switched to a black driving display mode according to the row information displaying black.

[0028] In an exemplary embodiment, the method further comprises:

[0029] Acquire information of rows showing non-black color in the frame image according to the grayscale information;

[0030] The plurality of driving channels are switched to a normal driving display mode according to the row information displaying non-black.

[0031] In a third aspect, an embodiment of the present disclosure further provides a computer-readable storage medium, wherein the storage medium is used to store computer program instructions, wherein the computer program instructions, when executed, can implement the working method of the display device described in any of the above embodiments.

[0032] A display device and a working method and a storage medium provided by the embodiments of the present disclosure, wherein a processor in the display device is configured to obtain grayscale information of a frame image, and obtain row information showing black in the frame image based on the grayscale information; a driving circuit is configured to obtain row information showing black from the processor, and multiple driving channels are switched to a black driving display mode based on the row information showing black, which can further reduce the power consumption of display products, improve product competitiveness, and enhance user experience.

[0033] Other features and advantages of the embodiments of the present disclosure will be described in the following description, and partly become apparent from the description, or understood by implementing the embodiments of the present disclosure. Other advantages of the embodiments of the present disclosure can be realized and obtained by the schemes described in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The accompanying drawings are used to provide an understanding of the technical solutions of the embodiments of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solutions of the embodiments of the present disclosure and do not constitute a limitation on the technical solutions of the present disclosure.

[0035] Figure 1 is a structural schematic diagram of a display device;

[0036] Figure 2 It is a structural schematic diagram of a display substrate;

[0037] Figure 3 It is a schematic diagram of the planar structure of a display area in a display substrate;

[0038] Figure 4 A schematic diagram of the cross-sectional structure of a display area in a display substrate;

[0039] Figure 5 is a schematic diagram of an equivalent circuit of a pixel driving circuit;

[0040] Figure 6 is a working timing diagram of a pixel driving circuit;

[0041] Figure 7 Shown is a schematic diagram of a display device provided by an embodiment of the present disclosure;

[0042] Figure 8FIG. 1 is a schematic diagram of a control circuit provided by an exemplary embodiment of the present disclosure;

[0043] Fig. 9 FIG. 1 is a schematic diagram of converting data in a frame memory into data in a line memory provided by an exemplary embodiment of the present disclosure;

[0044] Fig.10 FIG. 1 is a schematic diagram of a display device provided for an exemplary embodiment of the present disclosure;

[0045] Fig.11 Shown is a schematic diagram of a display device provided by an exemplary embodiment of the present disclosure;

[0046] Fig.12 Shown is a schematic diagram of a display device provided by an exemplary embodiment of the present disclosure;

[0047] Fig.13 Shown is a flow chart of a display device operating method provided by an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0048] The embodiments of the present disclosure will be described in detail below in conjunction with the accompanying drawings. The embodiments can be implemented in a number of different forms. A person of ordinary skill in the art can easily understand the fact that the methods and contents can be transformed into various forms without departing from the purpose and scope of the present disclosure. Therefore, the present disclosure should not be interpreted as being limited to the contents described in the following embodiments. In the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be arbitrarily combined with each other. In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits detailed descriptions of some known functions and known components. The drawings of the embodiments of the present disclosure only involve structures related to the embodiments of the present disclosure, and other structures can refer to the general design.

[0049] The proportions of the drawings in this disclosure can be used as a reference in actual processes, but are not limited thereto. For example, the thickness and spacing of each film layer, the width and spacing of each signal line can be adjusted according to actual conditions. The drawings described in this disclosure are only schematic diagrams of the structure, and one method of this disclosure is not limited to the shapes or values ​​shown in the drawings.

[0050] In the present specification, ordinal numbers such as “first”, “second” and “third” are provided to avoid confusion among constituent elements, and are not intended to limit the number.

[0051] In this specification, for the sake of convenience, the words and phrases indicating the orientation or positional relationship such as "middle", "upper", "lower", "front", "back", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like are used to illustrate the positional relationship of the constituent elements with reference to the drawings. This is only for the convenience of describing this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation of the present disclosure. The positional relationship of the constituent elements is appropriately changed according to the direction of describing each constituent element. Therefore, it is not limited to the words and phrases described in the specification, and can be appropriately replaced according to the situation.

[0052] In this specification, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this disclosure can be understood according to specific circumstances.

[0053] In this specification, a transistor refers to an element including at least three terminals: a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to a region where current mainly flows.

[0054] In this specification, the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode. In the case of using transistors with opposite polarities or when the current direction changes during circuit operation, the functions of the "source electrode" and the "drain electrode" are sometimes interchanged. Therefore, in this specification, the "source electrode" and the "drain electrode" may be interchanged, and the "source terminal" and the "drain terminal" may be interchanged. In the disclosed embodiments, the gate electrode may be referred to as a control electrode.

[0055] In this specification, "electrical connection" includes the case where components are connected together through an element having some electrical function. There is no particular limitation on the "element having some electrical function" as long as it can transmit and receive electrical signals between the connected components. Examples of "element having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.

[0056] The term "about" in the embodiments of the present disclosure means that the limits are not strictly defined and a numerical value within the range of process and measurement errors is allowed.

[0057] Figure 1 FIG. 1 is a schematic diagram of the structure of a display device. Figure 1 As shown, the display device may include a timing controller, a data driver, a scan driver, a light emitting driver and a pixel array, the timing controller is respectively connected to the data driver, the scan driver and the light emitting driver, the data driver is respectively connected to a plurality of data signal lines (D1 to Dn), the scan driver is respectively connected to a plurality of scan signal lines (S1 to Sm), and the light emitting driver is respectively connected to a plurality of light emitting signal lines (E1 to Eo). The pixel array may include a plurality of sub-pixels Pxij, i and j may be natural numbers, at least one sub-pixel Pxij may include a circuit unit and a light emitting device connected to the circuit unit, the circuit unit may include at least one scan signal line, at least one data signal line, at least one light emitting signal line and a pixel driving circuit. In an exemplary embodiment, the timing controller may provide a grayscale value and a control signal suitable for the specifications of the data driver to the data driver, may provide a clock signal suitable for the specifications of the scan driver, a scan start signal, etc. to the scan driver, and may provide a clock signal suitable for the specifications of the light emitting driver, an emission stop signal, etc. to the light emitting driver. The data driver can generate data voltages to be provided to data signal lines D1, D2, D3, ... and Dn using grayscale values ​​and control signals received from the timing controller. For example, the data driver can sample grayscale values ​​using a clock signal, and apply data voltages corresponding to grayscale values ​​to data signal lines D1 to Dn in units of pixel rows, where n can be a natural number. The scan driver can generate scan signals to be provided to scan signal lines S1, S2, S3, ... and Sm by receiving clock signals, scan start signals, etc. from the timing controller. For example, the scan driver can sequentially provide scan signals with conduction level pulses to scan signal lines S1 to Sm. For example, the scan driver can be constructed in the form of a shift register, and can sequentially transmit scan start signals provided in the form of conduction level pulses to the next level circuit under the control of the clock signal to generate scan signals, where m can be a natural number. The light-emitting driver can generate emission signals to be provided to light-emitting signal lines E1, E2, E3, ... and Eo by receiving clock signals, emission stop signals, etc. from the timing controller. For example, the light emitting driver may sequentially provide an emission signal having a cut-off level pulse to the light emitting signal lines E1 to Eo. For example, the light emitting driver may be constructed in the form of a shift register, and may generate an emission signal in a manner of sequentially transmitting an emission stop signal provided in the form of a cut-off level pulse to a next stage circuit under the control of a clock signal, and o may be a natural number.

[0058] Figure 2 Schematic diagram of the structure of a display substrate. Figure 2As shown, the display substrate may include a display area 100, a binding area 200 located on one side of the display area 100, and a frame area 300 located on the other side of the display area 100. In an exemplary embodiment, the display area 100 may be a flat area, including a plurality of sub-pixels Pxij constituting a pixel array, the plurality of sub-pixels Pxij being configured to display a dynamic picture or a still image, and the display area 100 may be referred to as an active area (AA). In an exemplary embodiment, the display substrate may be a flexible substrate, so that the display substrate may be deformable, such as curling, bending, folding, or rolling up. In an exemplary embodiment, the display substrate may further include a display area boundary BD, and the display area boundary BD may be an edge of the display area 100 close to the binding area 200.

[0059] In an exemplary embodiment, the binding area 200 may include a fan-out area, a bending area, a driver chip area, and a binding pin area arranged in sequence along a direction away from the display area. The fan-out area is connected to the display area and includes a plurality of data fan-out lines, and the data fan-out lines are configured to connect the data signal lines (Data Line) of the display area in a fan-out routing manner. The bending area is connected to the fan-out area and may include a composite insulating layer provided with a groove, which is configured to bend the binding area to the back of the display area. The driver chip area may include an integrated circuit (IC) configured to be connected to a plurality of data fan-out lines. The binding pin area may include a binding pad configured to be bound and connected to an external flexible printed circuit (FPC).

[0060] In an exemplary embodiment, the border area 300 may include a circuit area, a power line area, a crack dam area, and a cutting area arranged in sequence in a direction away from the display area. The circuit area is connected to the display area and may include at least a gate drive circuit, which is connected to the first scan signal line, the second scan signal line, the third scan signal line, and the light-emitting control line of the pixel drive circuit in the display area. The power line area is connected to the circuit area and may include at least a power lead, which extends in a direction parallel to the edge of the display area and is connected to the cathode in the display area. The crack dam area is connected to the power line area and may include at least a plurality of cracks set on the composite insulating layer. The cutting area is connected to the crack dam area and may include at least a cutting groove set on the composite insulating layer, and the cutting groove is configured so that after all the film layers of the display substrate are prepared, the cutting equipment cuts along the cutting groove respectively.

[0061] In an exemplary embodiment, the fan-out area in the binding area 200 and the power line area in the border area 300 may be provided with a first isolation dam and a second isolation dam, and the first isolation dam and the second isolation dam may extend in a direction parallel to the edge of the display area to form an annular structure surrounding the display area, and the edge of the display area is the edge on one side of the display area binding area or the border area.

[0062] Figure 3 FIG. 1 is a schematic diagram of a planar structure of a display area in a display substrate. Figure 3 As shown, the display substrate may include a plurality of pixel units P arranged in a matrix, and at least one pixel unit P may include a first sub-pixel P1 emitting a first color light, a second sub-pixel P2 emitting a second color light, and a third sub-pixel P3 and a fourth sub-pixel P4 emitting a third color light. Each sub-pixel may include a circuit unit and a light-emitting device, and the circuit unit may include at least a pixel driving circuit, and the pixel driving circuit is respectively connected to the scanning signal line, the data signal line and the light-emitting signal line, and the pixel driving circuit is configured to receive the data voltage transmitted by the data signal line under the control of the scanning signal line and the light-emitting signal line, and output a corresponding current to the light-emitting device. The light-emitting device in each sub-pixel is respectively connected to the pixel driving circuit of the sub-pixel, and the light-emitting device is configured to emit light of corresponding brightness in response to the current output by the pixel driving circuit of the sub-pixel.

[0063] In an exemplary embodiment, the first sub-pixel P1 may be a red sub-pixel (R) emitting red light, the second sub-pixel P2 may be a blue sub-pixel (B) emitting blue light, and the third sub-pixel P3 and the fourth sub-pixel P4 may be green sub-pixels (G) emitting green light. In an exemplary embodiment, the shape of the sub-pixels may be rectangular, rhombus, pentagonal or hexagonal, and the four sub-pixels may be arranged in a diamond shape to form an RGBG pixel arrangement. In other exemplary embodiments, the four sub-pixels may be arranged in a horizontal parallel arrangement, a vertical parallel arrangement or a square arrangement, etc., which is not limited in the present disclosure.

[0064] In an exemplary embodiment, a pixel unit may include three sub-pixels, and the three sub-pixels may be arranged in a horizontal parallel arrangement, a vertical parallel arrangement, or a triangular arrangement, which is not limited in the present disclosure.

[0065] Figure 4 FIG. 1 is a schematic diagram of a cross-sectional structure of a display region in a display substrate, illustrating the structure of four sub-pixels in the display region. Figure 4As shown, on a plane perpendicular to the display substrate, the display substrate may include a driving circuit layer 102 disposed on a substrate 101, a light emitting structure layer 103 disposed on a side of the driving circuit layer 102 away from the substrate 101, and a packaging structure layer 104 disposed on a side of the light emitting structure layer 103 away from the substrate 101. In some possible implementations, the display substrate may include other film layers, such as a touch structure layer, etc., which is not limited in the present disclosure.

[0066] In an exemplary embodiment, the substrate 101 may be a flexible substrate, or may be a rigid substrate. The driving circuit layer 102 of each sub-pixel may include a pixel driving circuit composed of a plurality of transistors and a storage capacitor. The light-emitting structure layer 103 of each sub-pixel may include a light-emitting device composed of a plurality of film layers, and the plurality of film layers may include at least an anode, a pixel definition layer, an organic light-emitting layer and a cathode, the anode is connected to the pixel driving circuit, the organic light-emitting layer is connected to the anode, the cathode is connected to the organic light-emitting layer, and the organic light-emitting layer emits light of corresponding colors under the drive of the anode and the cathode. The encapsulation structure layer 104 may include a first encapsulation layer, a second encapsulation layer and a third encapsulation layer stacked, the first encapsulation layer and the third encapsulation layer may be made of inorganic materials, the second encapsulation layer may be made of organic materials, and the second encapsulation layer is arranged between the first encapsulation layer and the third encapsulation layer to form an inorganic material / organic material / inorganic material stacked structure, which can ensure that external water vapor cannot enter the light-emitting structure layer 103.

[0067] In an exemplary embodiment, the organic light emitting layer may include a light emitting layer (EML) and any one or more of the following layers: a hole injection layer (HIL), a hole transport layer (HTL), an electron blocking layer (EBL), a hole blocking layer (HBL), an electron transport layer (ETL), and an electron injection layer (EIL). In an exemplary embodiment, one or more of the hole injection layer, the hole transport layer, the electron blocking layer, the hole blocking layer, the electron transport layer, and the electron injection layer of all sub-pixels may be a common layer connected together, and the light emitting layers of adjacent sub-pixels may have a small amount of overlap, or may be isolated from each other.

[0068] Figure 5 FIG. 1 is a schematic diagram of an equivalent circuit of a pixel driving circuit. In an exemplary embodiment, the pixel driving circuit may be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C or 8T1C structure. Figure 5As shown, the pixel driving circuit may include 7 transistors (first transistor T1 to seventh transistor T7) and 1 storage capacitor C, and the pixel driving circuit is respectively connected to 10 signal lines (data signal line D, first scanning signal line S1, second scanning signal line S2, third scanning signal line S3, fourth scanning signal line S4, light emitting signal line E, first initial signal line INIT1, second initial signal line INIT1, first power line VDD and second power line VSS).

[0069] In an exemplary embodiment, the pixel driving circuit may include a first node N1, a second node N2, and a third node N3. The first node N1 is respectively connected to the first electrode of the third transistor T3, the second electrode of the fourth transistor T4, and the second electrode of the fifth transistor T5, the second node N2 is respectively connected to the second electrode of the first transistor T1, the control electrode of the third transistor T3, and the second end of the storage capacitor C, and the third node N3 is respectively connected to the second electrode of the second transistor T2, the second electrode of the third transistor T3, and the first electrode of the sixth transistor T6.

[0070] In an exemplary embodiment, a first end of the storage capacitor C is connected to the first power line VDD, and a second end of the storage capacitor C is connected to the second node N2 , ie, the second end of the storage capacitor C is connected to the control electrode of the third transistor T3 .

[0071] In an exemplary embodiment, the control electrode of the first transistor T1 is connected to the second scan signal line S2, the first electrode of the first transistor T1 is connected to the first initialization signal line INIT1, and the second electrode of the first transistor T1 is connected to the second node N2. When the turned-on scan signal is applied to the second scan signal line S2, the first transistor T1 transmits the first initialization voltage to the second end of the storage capacitor C to initialize the storage capacitor C.

[0072] In an exemplary embodiment, a control electrode of the second transistor T2 is connected to the fourth scan signal line S4, a first electrode of the second transistor T2 is connected to the second electrode of the first transistor T1, and a second electrode of the second transistor T2 is connected to the third node N3. When a turned-on scan signal is applied to the fourth scan signal line S4, the second transistor T2 connects the control electrode of the third transistor T3 to the second electrode of the third transistor T3.

[0073] In an exemplary embodiment, the control electrode of the third transistor T3 is connected to the second node N2, that is, the control electrode of the third transistor T3 is connected to the second end of the storage capacitor C, the first electrode of the third transistor T3 is connected to the first node N1, and the second electrode of the third transistor T3 is connected to the third node N3. The third transistor T3 can be called a driving transistor, and the third transistor T3 determines the size of the driving current flowing between the first power line VDD and the light emitting device according to the potential difference between its control electrode and the first electrode.

[0074] In an exemplary embodiment, a control electrode of the fourth transistor T4 is connected to the third scan signal line S3, a first electrode of the fourth transistor T4 is connected to the data signal line D, and a second electrode of the fourth transistor T4 is connected to the first node N1. When a turned-on scan signal is applied to the third scan signal line S3, the fourth transistor T4 inputs a data voltage of the data signal line D to the first node N1.

[0075] In an exemplary embodiment, a control electrode of the fifth transistor T5 is connected to the light emitting signal line E, a first electrode of the fifth transistor T5 is connected to the first power line VDD, and a second electrode of the fifth transistor T5 is connected to the first node N1. A control electrode of the sixth transistor T6 is connected to the light emitting signal line E, a first electrode of the sixth transistor T6 is connected to the third node N3, and a second electrode of the sixth transistor T6 is connected to the first electrode of the light emitting device. When a turned-on light emitting signal is applied to the light emitting signal line E, the fifth transistor T5 and the sixth transistor T6 form a driving current path between the first power line VDD and the light emitting device to cause the light emitting device to emit light.

[0076] In an exemplary embodiment, the control electrode of the seventh transistor T7 is connected to the first scan signal line S1, the first electrode of the seventh transistor T7 is connected to the second initial signal line INIT2, and the second electrode of the seventh transistor T7 is connected to the first electrode of the light emitting device. When the turned-on scan signal is applied to the first scan signal line S1, the seventh transistor T7 transmits the second initial voltage to the first electrode of the light emitting device to initialize or release the charge accumulated in the first electrode of the light emitting device.

[0077] In an exemplary embodiment, the light-emitting device can be an OLED, including a stacked first electrode (anode), an organic light-emitting layer, and a second electrode (cathode), or can be a QLED, including a stacked first electrode (anode), a quantum dot light-emitting layer, and a second electrode (cathode).

[0078] In an exemplary embodiment, the second electrode of the light emitting device is connected to the second power line VSS, the signal of the second power line VSS is a low level signal, and the signal of the first power line VDD continuously provides a high level signal.

[0079] In an exemplary embodiment, the first transistor T1 to the seventh transistor T7 may be a P-type transistor, or may be an N-type transistor. Using the same type of transistors in the pixel driving circuit can simplify the process flow, reduce the process difficulty of the display panel, and improve the yield of the product. In some possible implementations, the first transistor T1 to the seventh transistor T7 may include a P-type transistor and an N-type transistor.

[0080] In an exemplary embodiment, the first transistor T1 to the seventh transistor T7 may be a low-temperature polysilicon transistor, or an oxide transistor, or a low-temperature polysilicon transistor and a metal oxide transistor. The active layer of the low-temperature polysilicon transistor is low-temperature polysilicon (LTPS), and the active layer of the metal oxide transistor is metal oxide semiconductor (Oxide). The low-temperature polysilicon transistor has the advantages of high mobility and fast charging, and the oxide transistor has the advantages of low leakage current. The low-temperature polysilicon transistor and the metal oxide transistor are integrated on a display substrate to form a low-temperature polycrystalline oxide (LTPO) display substrate, which can take advantage of the advantages of both, can achieve low-frequency driving, can reduce power consumption, and can improve display quality.

[0081] Figure 6 This is a working timing diagram of a pixel driving circuit. Figure 5 The operation process of the pixel driving circuit of the example is described in detail. Figure 5 The pixel driving circuit in the embodiment includes 7 transistors (first transistor T1 to seventh transistor T7) and 1 storage capacitor C, the first transistor T1 and the second transistor T2 are N-type oxide transistors, and the third transistor T3 to the seventh transistor T7 are P-type low temperature polysilicon transistors. In an exemplary embodiment, the operation process of the pixel driving circuit may include:

[0082] The first stage A1 is called the reset stage. The signal of the second scan signal line S2 is a turn-on signal (high level), and the signals of the first scan signal line S1, the third scan signal line S3, the fourth scan signal line S4 and the light-emitting signal line E are turn-off signals. The turn-on signal of the second scan signal line S2 turns on the first transistor T1, and the signal of the first initial signal line INIT1 is provided to the second node N2 through the first transistor T1 to initialize (reset) the storage capacitor C and clear the original charge in the storage capacitor. The turn-off signals of the first scan signal line S1, the third scan signal line S3, the fourth scan signal line S4 and the light-emitting signal line E turn off the second transistor T2, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6 and the seventh transistor T7. In this stage, the OLED does not emit light.

[0083] The second stage A2 is called the data writing stage or the threshold compensation stage. The signals of the first scanning signal line S1, the third scanning signal line S3 and the fourth scanning signal line S4 are the on signals, the signals of the second scanning signal line S2 and the light emitting signal line E are the off signals, and the data signal line D outputs the data voltage. In this stage, since the second end of the storage capacitor C is at a low level, the third transistor T3 is turned on. The on signals of the first scanning signal line S1, the third scanning signal line S3 and the fourth scanning signal line S4 turn on the second transistor T2, the fourth transistor T4 and the seventh transistor T7. The second transistor T2 and the fourth transistor T4 are turned on so that the data voltage output by the data signal line D is provided to the second node N2 through the first node N1, the turned-on third transistor T3, the third node N3 and the turned-on second transistor T2, and the difference between the data voltage output by the data signal line D and the threshold voltage of the third transistor T3 is charged into the storage capacitor C. The voltage of the second end (the second node N2) of the storage capacitor C is Vd-|Vth|, Vd is the data voltage output by the data signal line D, and Vth is the threshold voltage of the third transistor T3. The seventh transistor T7 is turned on so that the signal of the second initial signal line INIT2 is provided to the first electrode of the OLED, the first electrode of the OLED is initialized (reset), the pre-stored voltage inside it is cleared, the initialization is completed, and the OLED is ensured not to emit light. The disconnection signal of the second scanning signal line S2 disconnects the first transistor T1, and the disconnection signal of the light-emitting signal line E disconnects the fifth transistor T5 and the sixth transistor T6.

[0084] The third stage A3 is called the light-emitting stage, the signal of the light-emitting signal line E is a conduction signal, and the signals of the first scanning signal line S1, the second scanning signal line S2, the third scanning signal line S3 and the fourth scanning signal line S4 are disconnection signals. The conduction signal of the light-emitting signal line E turns on the fifth transistor T5 and the sixth transistor T6, and the power supply voltage output by the first power supply line VDD provides a driving voltage to the first electrode of the OLED through the turned-on fifth transistor T5, the third transistor T3 and the sixth transistor T6, driving the OLED to emit light.

[0085] During the driving process of the pixel driving circuit, the driving current flowing through the third transistor T3 (driving transistor) is determined by the voltage difference between its gate electrode and the first electrode. Since the voltage of the second node N2 is Vdata-|Vth|, the driving current of the third transistor T3 is:

[0086] I=K*(Vgs-Vth) 2 =K*[(Vdd-Vd+|Vth|)-Vth] 2 =K*[(Vdd-Vd)] 2

[0087] Among them, I is the driving current flowing through the third transistor T3, that is, the driving current driving the OLED, K is a constant, Vgs is the voltage difference between the gate electrode and the first electrode of the third transistor T3, Vth is the threshold voltage of the third transistor T3, Vd is the data voltage output by the data signal line D, and Vdd is the power supply voltage output by the first power supply line VDD.

[0088] For existing display products such as OLED mobile phones, consumers sometimes choose to use dark mode in order to save power. In dark mode applications, the screens of application scenarios such as WeChat reading, message notification bar, photo browsing, etc. have many black backgrounds (that is, the background area is displayed in black, also called dark display). Even when using dark mode, the power consumption of display products is still high and the user experience is not good.

[0089] In order to further reduce the power consumption of display products, the present disclosure provides a display device, such as Figure 7 As shown, the display device may include a processor 11 and a driving circuit 12 connected to the processor, and the driving circuit includes a plurality of driving channels 121;

[0090] The processor 11 is configured to obtain grayscale information of the frame image, and obtain black line information in the frame image according to the grayscale information;

[0091] The driving circuit 12 is configured to obtain row information displaying black from the processor 11 , and switch the plurality of driving channels 121 to a black driving display mode according to the row information displaying black.

[0092] In the display device provided by the present disclosure, the processor 11 is configured to obtain grayscale information of a frame image, and obtain row information displaying black in the frame image based on the grayscale information. The driving circuit 12 is configured to obtain row information displaying black from the processor 11, and switch multiple driving channels 121 to a black driving display mode based on the row information displaying black, which can further reduce the power consumption of the display product, improve product competitiveness, and enhance user experience.

[0093] In an exemplary embodiment, the processor 11 may also be configured to obtain line information showing non-black in the frame image according to the grayscale information;

[0094] The driving circuit 12 may also be configured to switch the plurality of driving channels 121 to a normal driving display mode according to the row information displaying non-black colors.

[0095] In an exemplary embodiment, after switching to the normal driving display mode, the display can be driven according to a normal driving circuit.

[0096] In an exemplary embodiment, Figure 8As shown, the driving channel 121 includes a driving output circuit 1211, and multiple driving channels 121 are switched to a normal driving display mode according to the row information displaying non-black, including: when receiving N rows of grayscale information before the row information displaying non-black, multiple driving channels 121 are switched to the driving output circuit 1211.

[0097] In an exemplary embodiment, the driving output circuit 1211 may be implemented by using related technologies, for example, a related driving circuit including a gamma circuit in the related technologies may be implemented.

[0098] In an exemplary embodiment, N is a positive integer greater than or equal to 0 and less than or equal to 15. When N is 0, multiple driving channels 121 will be switched to the driving output circuit 1211 only when the row information displaying non-black is received. When N is greater than 0, such as N is 1, 2, 4, etc., switching can be performed N rows in advance to avoid different switching speeds of different driving channels 121, thereby improving the display effect.

[0099] In an exemplary embodiment, if Figure 8 As shown, the driving output circuit 1211 may include an amplifier OP, and the output end of the amplifier OP may serve as the output end of the driving channel 121 .

[0100] In an exemplary embodiment, the processor 11 is further configured to treat the grayscale information of adjacent M rows in the frame image as a grayscale group, average the grayscale values ​​of the grayscale information in multiple grayscale groups, and obtain grayscale means of the multiple grayscale groups, wherein the grayscale means include grayscale values ​​displayed in a black state and grayscale values ​​displayed in a non-black state, and obtain row information displaying black according to the grayscale information row corresponding to the grayscale value displayed in a black state, and obtain row information displaying non-black according to the grayscale information row corresponding to the grayscale value displayed in a non-black state. In an exemplary embodiment, the grayscale value displayed in a black state may be 0, and the grayscale value displayed in a non-black state may be a non-zero value. In an exemplary embodiment, two adjacent grayscale groups may not contain the same grayscale information row, or may include the same grayscale information row.

[0101] In an exemplary embodiment, for the case where M is equal to 1

[0102] In an exemplary embodiment, M is a positive integer greater than or equal to 1 and less than or equal to 15. For example, M may be 1, 2, 4, and the like.

[0103] In an exemplary embodiment, for the case where the grayscale group contains n grayscales, the grayscale mean W = (W1+W2+W3+﹒﹒﹒+Wn) / n can be calculated using the following formula, where W is the calculated grayscale mean, W1 to Wn are n grayscale values ​​in the grayscale group, and n is the number of grayscales in the grayscale group.

[0104] When M is greater than 1, the grayscale average value is calculated together with the grayscale information of M rows in the frame memory, which can reduce the workload of the processor 11 and improve the processing speed.

[0105] In an exemplary embodiment, if Fig. 9 As shown, the frame image may include K rows and L columns of grayscale information (the grayscale information may be stored in the frame memory), and the processor 11 may be further configured to count the L grayscale values ​​in any grayscale information row corresponding to the grayscale value displayed in the black state as a first count value, and count the L grayscale values ​​in any grayscale information row corresponding to the grayscale value displayed in the non-black state as a second count value, to obtain a one-dimensional cache table with a length of K (which may be as shown in FIG. Fig. 9 Line memory), that is, the grayscale information of the first line of the Frame memory is counted as the first count value or the second count value and placed in the first position (first line) of the Line memory, and the grayscale information of the second line of the Frame memory is counted as the first count value or the second count value and placed in the second position (second line) of the Line memory, and so on. The size of the Line memory is consistent with the number of lines of the Frame memory. For example, the first count value may be 0, and the second count value may be 1. Fig. 9 The figure is a schematic diagram of converting the data stored in the frame memory into the data in the line memory.

[0106] In an exemplary embodiment, if Figure 8 As shown, the driving circuit 12 may include a black state display circuit 122, a black state display switch 123 and a plurality of switching switches 124, and the output ends of the plurality of driving channels 121 are connected to the black state display circuit 122 through the plurality of switching switches 124 and the black state display switch 123;

[0107] Switching the plurality of driving channels 121 to the black driving display mode according to the row information displaying black may include: closing the plurality of switching switches 124 and the black display switch 123 to make the signal of the black display circuit 122 serve as the output signal of the plurality of driving channels 121 .

[0108] In an exemplary embodiment, the black state display circuit 122 is configured to provide a positive source voltage AVDD or a highest voltage VGMP of a positive gray scale voltage to the plurality of driving channels 121 .

[0109] In the embodiment of the present disclosure, when displaying a black area, that is, for the number of lines of the frame image with Line memory equal to 0, multiple driving channels are switched to the black state driving display mode, and the driving channels are directly connected to the positive source voltage AVDD or the highest voltage VGMP of the positive grayscale voltage, and at the same time, the amplifier OP in the driving output circuit 1211 may not be driven, so that the black background can be ensured to be pure black and the purpose of reducing power consumption can be achieved; for the number of lines of the frame image with Line memory equal to 1, the driving channel is switched to the normal driving display mode to achieve normal display of the picture.

[0110] In an exemplary embodiment, the black state display circuit 122 includes a low voltage difference linear regulator, one end of the low voltage difference linear regulator is connected to the positive source voltage output terminal AVDD and the black state display switch 123, and the other end is connected to the highest voltage VGMP of the output positive grayscale voltage and the black state display switch 123.

[0111] In an exemplary embodiment, after the driving channel 121 switches to the black driving display mode, it no longer displays with normal driving. All driving channels 121 are driven with the positive source voltage AVDD or the highest voltage VGMP of the positive grayscale voltage as the driving signal, which greatly reduces power consumption during black display and improves user experience.

[0112] In an exemplary embodiment, the display device further includes a sub-pixel rendering color borrowing module and a uniform processing module, and the driving circuit 12 is further configured to turn off the sub-pixel rendering (SPR) color borrowing module and / or the uniform processing module according to the row information displaying black. In the embodiment of the present disclosure, since color borrowing and uniform processing are not required in the process of displaying black row information, and the SPR color borrowing and uniform processing modules are required for normal driving display, turning off the SPR color borrowing module and the uniform processing module will not have an adverse effect on the display effect of displaying black rows, and can further reduce power consumption.

[0113] In an exemplary embodiment, if Fig.10 As shown, the driving circuit 12 may also include a timing controller 125 and a data driver 126. The processor 11 is connected to the timing controller 125, and multiple driving channels 121 are switched to a black display mode according to row information displaying black, including: the timing controller receives grayscale information from the processor 11, and when receiving a grayscale row corresponding to the row information displaying black, controls the data driver 146 to switch the multiple driving channels 121 to a black display power supply terminal.

[0114] In an exemplary embodiment, the driving circuit 12 includes a timing controller 125 and a data driver 126, and the processor 11 is integrated in the data driver 126 (eg, Fig.11), or the processor 11 is connected to the data driver 126 (as shown Fig.12 As shown), according to the row information showing black, the plurality of driving channels 121 are switched to the black state driving display power supply terminal, including: when the timing controller receives the frame image of the external system and receives the gray scale row corresponding to the row information showing black, the processor 11 controls the data driver to switch the plurality of driving channels 121 to the black state display power supply terminal;

[0115] The processor 11 is configured to obtain grayscale information of a frame image, including: the processor 11 obtains grayscale information of a frame image of an external system.

[0116] In the embodiment of the present disclosure, the black state display power supply terminal may be the positive source voltage terminal AVDD in the black state driving circuit 122 or the highest voltage VGMP of the positive grayscale voltage.

[0117] In the embodiment of the present disclosure, the output ends of the data driver 126 and the driving channel 121 can be connected to the data signal lines of the display area in the display device, and are configured to provide data driving signals to the data signal lines.

[0118] In the embodiment of the present disclosure, the data driver 126 may include the above-mentioned driving channel 121 .

[0119] The present disclosure also provides a method for operating a display device, wherein the display device may include a driving channel such as Fig.13 As shown, the method may include:

[0120] Step S1: obtaining grayscale information of a frame image, and obtaining information of rows showing black in the frame image according to the grayscale information;

[0121] Step S2: switching a plurality of driving channels to a black driving display mode according to the row information displaying black.

[0122] In an exemplary embodiment, the method further comprises:

[0123] Acquire non-black line information in the frame image according to the grayscale information;

[0124] The plurality of driving channels are switched to a normal driving display mode according to the row information displaying non-black.

[0125] An embodiment of the present disclosure further provides a computer-readable storage medium, wherein the storage medium is used to store computer program instructions, wherein the computer program instructions, when executed, can implement the working method of the display device described in any of the above embodiments.

[0126] A display device and a working method and a storage medium provided by the embodiments of the present disclosure, wherein a processor in the display device is configured to obtain grayscale information of a frame image, and obtain row information showing black in the frame image based on the grayscale information; a driving circuit is configured to obtain row information showing black from the processor, and multiple driving channels are switched to a black driving display mode based on the row information showing black, which can further reduce the power consumption of display products, improve product competitiveness, and enhance user experience.

[0127] The drawings of the embodiments of the present disclosure only involve the structures involved in the embodiments of the present disclosure, and other structures may refer to the general design.

[0128] In the absence of conflict, the embodiments of the present invention, that is, the features in the embodiments, may be combined with each other to obtain new embodiments.

[0129] Although the embodiments disclosed in the present invention are as above, the contents are only embodiments adopted to facilitate understanding of the present invention and are not intended to limit the present invention. Any technician in the field to which the present invention belongs can make any modifications and changes in the form and details of implementation without departing from the spirit and scope disclosed in the present invention, but the patent protection scope of the present invention shall still be subject to the scope defined by the attached claims.

Claims

1. A display device, It is characterized in that It includes a processor and a driving circuit connected to the processor, wherein the driving circuit includes a plurality of driving channels; The processor is configured to obtain grayscale information of a frame image, take grayscale information of adjacent M rows in the frame image as a grayscale group, average the grayscale values ​​of the grayscale information in multiple grayscale groups to obtain grayscale mean values ​​of the multiple grayscale groups, wherein the grayscale mean values ​​include grayscale values ​​displayed in a black state, and obtain row information displaying black according to the grayscale information row corresponding to the grayscale value displayed in the black state; The driving circuit is configured to obtain row information displaying black from the processor, and switch the plurality of driving channels to a black driving display mode according to the row information displaying black.

2. The display device according to claim 1, It is characterized in that The grayscale mean value also includes a grayscale value displayed in a non-black state, and the processor is further configured to obtain row information displaying non-black according to a grayscale information row corresponding to the grayscale value displayed in a non-black state; The driving circuit is further configured to switch the plurality of driving channels to a normal driving display mode according to the row information displaying non-black color.

3. The display device according to claim 2, It is characterized in that The driving channels include a driving output circuit, and switching the multiple driving channels to a normal driving display mode according to the row information displaying non-black includes: when receiving N rows of grayscale information before the row information displaying non-black, switching the multiple driving channels to the driving output circuit.

4. The display device according to claim 3, It is characterized in that The N is a positive integer greater than or equal to 0 and less than or equal to 15.

5. The display device according to claim 3, It is characterized in that The driving output circuit includes an amplifier, and an output end of the amplifier serves as an output end of the driving channel.

6. The display device according to claim 1, It is characterized in that The M is a positive integer greater than or equal to 1 and less than or equal to 15.

7. The display device according to claim 2, It is characterized in that The frame image includes K rows and L columns of grayscale information, and the processor is further configured to count the L grayscale values ​​in any grayscale information row corresponding to the grayscale value displayed in the black state as a first count value, and count the L grayscale values ​​in any grayscale information row corresponding to the grayscale value displayed in the non-black state as a second count value, to obtain a one-dimensional cache table with a length of K.

8. The display device according to claim 2, It is characterized in that The driving circuit comprises a black state display circuit, a black state display switch and a plurality of switching switches, and the output ends of the plurality of driving channels are connected to the black state display circuit through the plurality of switching switches and the black state display switch; The switching of the plurality of driving channels to the black driving display mode according to the row information displaying black includes: closing the plurality of switching switches and the black display switch so that the signal of the black display circuit is used as the output signal of the plurality of driving channels.

9. The display device according to claim 8, It is characterized in that The black state display circuit is configured to provide a positive source voltage or a highest voltage of a positive grayscale voltage to the plurality of driving channels.

10. The display device according to claim 9, It is characterized in that The black state display circuit comprises a low voltage difference linear regulator, one end of the low voltage difference linear regulator is connected to the positive source voltage output end and the black state display switch, and the highest voltage of the positive grayscale voltage is connected to the black state display switch.

11. The display device according to claim 1, It is characterized in that The display device further comprises a sub-pixel rendering borrowed color module and a uniform processing module, and the driving circuit is further configured to turn off the sub-pixel rendering borrowed color module and / or the uniform processing module according to the row information displaying black.

12. The display device according to claim 1, It is characterized in that The driving circuit includes a timing controller and a data driver, the processor is connected to the timing controller, and the switching of the multiple driving channels to the black driving display mode according to the row information displaying black includes: the timing controller receives the grayscale information from the processor, and when receiving the grayscale row corresponding to the row information displaying black, controls the data driver to switch the multiple driving channels to the black display power supply terminal.

13. The display device according to claim 1, It is characterized in that The driving circuit includes a timing controller and a data driver, the processor is integrated in the data driver or the processor is connected to the driver, and the switching of the plurality of driving channels to a black state driving display mode according to the row information displaying black includes: the timing controller receives a frame image from an external system, and when a grayscale row corresponding to the row information displaying black is received, the processor controls the data driver to switch the plurality of driving channels to a black state display power supply terminal; The processor is configured to obtain grayscale information of a frame image, including: the processor obtains grayscale information of a frame image of an external system.

14. A method for operating a display device, It is characterized in that The display device includes a plurality of driving channels, and the working method includes: Obtaining grayscale information of a frame image, taking grayscale information of adjacent M rows in the frame image as a grayscale group, averaging grayscale values ​​of grayscale information in multiple grayscale groups to obtain grayscale mean values ​​of the multiple grayscale groups, wherein the grayscale mean values ​​include grayscale values ​​displayed in a black state, and obtaining row information displaying black according to the grayscale information row corresponding to the grayscale value displayed in the black state; The plurality of driving channels are switched to a black driving display mode according to the row information displaying black.

15. The working method according to claim 14, It is characterized in that The grayscale mean value also includes a grayscale value displayed in a non-black state, and the method further includes: Obtaining row information displaying non-black according to the grayscale information row corresponding to the grayscale value displayed in the non-black state; The plurality of driving channels are switched to a normal driving display mode according to the row information displaying non-black.

16. A computer-readable storage medium, It is characterized in that The storage medium is used to store computer program instructions, wherein the computer program instructions can implement the operating method of the display device described in any one of claims 14 to 15 when executed.

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