Multi-lane chip test log parallel resolution method
By establishing multiple communication channels on a PC to parse test logs in parallel, the problems of wasted PC resources and low efficiency in chip testing are solved, and the automation of multi-chip parallel testing is realized, improving testing efficiency and reducing costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SPREADTRUM COMMUNICATION (SHANGHAI) CO LTD
- Filing Date
- 2022-10-27
- Publication Date
- 2026-05-29
AI Technical Summary
In current chip testing, PC resources are wasted in large quantities and testing efficiency is low. Parallel testing of multiple chips cannot be achieved, resulting in a lot of time spent compiling and analyzing test log results, which affects cost and efficiency.
By establishing multiple communication channels on a PC, with each channel corresponding to a test board, and using a unified test log parsing template to parse test logs in parallel, a single PC can control the testing of multiple test boards and generate test reports.
It has enabled parallel testing automation of multiple chips, which has improved testing efficiency, reduced testing costs, simplified code complexity, and enabled timely identification of test failures.
Smart Images
Figure CN115656777B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of chip testing technology, and in particular to a method for parallel parsing of multi-channel chip test logs. Background Technology
[0002] In chip testing, a one-to-one approach is typically used, meaning one PC corresponds to one test board. Only after one chip is completed can the next be processed. While this ensures testing stability, the PC (host computer program) can only process the chips being tested on its corresponding test board at a time. This not only wastes PC resources but also requires a significant amount of time to process and analyze the test logs from multiple test boards, impacting testing efficiency and cost. Summary of the Invention
[0003] The parallel parsing method for multi-channel chip test logs provided by this invention can perform parallel testing of multiple chips simultaneously using a single PC, greatly improving testing efficiency.
[0004] This invention provides a method for parallel parsing of multi-channel chip test logs, executed on a PC used for chip testing, comprising:
[0005] Based on the results of the test machine loading test chips onto multiple test boards, a first communication channel corresponding to each test board is established.
[0006] Based on the communication channels, establish test tasks that correspond one-to-one with the communication channels;
[0007] Based on the test tasks, establish a second communication channel between each test task and the test machine;
[0008] The test task is executed by obtaining the test log sent by the corresponding test board from the first communication channel and parsing it according to the predetermined test log parsing template to obtain the test result. Based on the test result, control commands are sent to the test machine from the second communication channel.
[0009] A test report is generated based on the test results obtained from the multiple test tasks.
[0010] Optionally, the test logs sent by the corresponding test board are obtained from the first communication channel, and the test results are obtained by parsing them according to a predetermined test log parsing template, including:
[0011] Obtain the test log parsing template corresponding to the test chip;
[0012] Read the test log data sent in real time by the test board;
[0013] Each time test log data is read, the attributes of the test log parsing template are traversed based on the read test log data, and the test log data is filled into the test log parsing template.
[0014] Optionally, traversing the attributes of the test log parsing template includes:
[0015] The attributes that have been populated during the last read of test log data will be skipped during subsequent reads of test log data when iterating through the attributes of the test log parsing template.
[0016] Optionally, each time test log data is read, the process of iterating through the attributes of the test log parsing template based on the read test log data and filling the test log data into the test log parsing template further includes:
[0017] When the test reaches the predetermined time, the attributes that have not been filled in the test log parsing template will be filled with failure information.
[0018] Optionally, when all attributes corresponding to test cases in the test log parsing template are filled, the test result of the chip is determined based on the value of the attribute corresponding to the test case.
[0019] Optionally, the attributes of the log parsing template include the test program version, the chip's unique identifier, the test results of each test case, and the chip's test results.
[0020] Optionally, obtaining the test log parsing template corresponding to the test chip includes:
[0021] Load the test configuration file of the test chip, and determine the attributes in the test log parsing template based on the test configuration file.
[0022] Optionally, based on the results of the test equipment loading test chips onto multiple test boards, establishing a first communication channel corresponding one-to-one with each test board includes:
[0023] Obtain the test board information of the test instrument with the test chip loaded;
[0024] Establish a Socket communication channel with each test board that loads the test chip as the first communication channel.
[0025] Optionally, based on the test results obtained from multiple test tasks, a test report is generated, including:
[0026] The test results obtained from multiple tasks are statistically analyzed, and the start time of the test chip and the number of times the chip is tested on each test board are statistically analyzed to obtain the test report.
[0027] Optionally, based on the test results, sending control commands from the second communication channel to the test equipment includes:
[0028] Based on the test results, the defect classification of the test chip is determined;
[0029] The target destination of the test chip is determined based on the defect classification.
[0030] Control commands with the target flow direction are sent from the second communication channel to the test equipment.
[0031] In the technical solution provided by this invention, by establishing multiple communication channels, each independently corresponding to a test board, the test logs of the test boards are acquired and parsed using a unified test log parsing template. This enables a single PC to simultaneously control the testing of multiple test boards and summarize the parsing results of the test logs from multiple test boards to generate a log. The technical solution provided by this invention automates the parallel testing of multiple chips, effectively improving testing efficiency and reducing testing costs. Attached Figure Description
[0032] Figure 1 This is a flowchart of a parallel parsing method for multi-channel chip test logs according to an embodiment of the present invention;
[0033] Figure 2 This is an exemplary execution diagram of a parallel parsing method for multi-channel chip test logs according to an embodiment of the present invention;
[0034] Figure 3 This is a flowchart of the log parsing process in another embodiment of the parallel parsing method for multi-channel chip test logs of the present invention;
[0035] Figure 4 This is a flowchart illustrating the establishment of the first communication channel in a parallel parsing method for multi-channel chip test logs according to another embodiment of the present invention.
[0036] Figure 5 This is a flowchart illustrating the sending of control commands in a parallel parsing method for multi-channel chip test logs according to another embodiment of the present invention. Detailed Implementation
[0037] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0038] This invention provides a method for parallel parsing of multi-channel chip test logs, executed on a PC used for chip testing, such as... Figure 1 As shown, it includes:
[0039] Step 100: Based on the results of the test machine loading test chips onto multiple test boards, establish a first communication channel corresponding to each test board.
[0040] In some embodiments, the test bench may have multiple test boards. During testing, test chips can be loaded onto each test board, or only some test boards may be loaded with chips. When test chips are loaded onto each test board, the PC needs to establish a first communication channel with each test board. When test chips are loaded onto only some test boards, the PC only needs to establish a first communication channel with the test boards that have loaded test chips. Loading test chips refers to mounting the test chips onto a chip base on the test board.
[0041] Step 200: Based on the communication channel, establish a test task that corresponds one-to-one with the communication channel;
[0042] In some embodiments, after establishing a first communication channel, a test task is created for each first communication channel. Since there is a one-to-one correspondence between the communication channel and the test board, and the test task is also one-to-one with the first communication channel, a one-to-one relationship is formed between the test task and the test board. Creating a test task means starting an executable program module. During execution, the program module can perform the control and response actions required during the test, such as obtaining and parsing the test logs from the test board. Because there is a one-to-one correspondence between the test task and the test board, the execution of each test task is independent and does not affect each other.
[0043] Step 300: Based on the test task, establish a second communication channel between each test task and the test machine.
[0044] In some embodiments, to avoid mutual interference between test tasks during the control of the test equipment, a second communication channel is also established in this step, with each test task corresponding to the test equipment.
[0045] Step 400: Execute the test task, obtain the test log sent by the corresponding test board from the first communication channel, parse the test log according to the predetermined test log parsing template to obtain the test result, and send the control command to the test machine from the second communication channel according to the test result;
[0046] In some embodiments, during the execution of a test task, each test task acquires and parses the test logs of the corresponding test board in real time. After parsing, the test result for the entire chip is determined. Since chips with different defect types need to be processed separately, control commands need to be sent to the testing machine based on the test result, so that the testing machine can place chips with different defect types separately.
[0047] Step 500: Generate a test report based on the test results obtained from the multiple test tasks.
[0048] In some embodiments, since multiple test tasks use a predetermined unified template for data parsing, the resulting data has the same data structure, making it convenient to perform statistics when generating test reports.
[0049] like Figure 2 The diagram illustrates an exemplary execution of a parallel parsing method for multi-channel chip test logs. After the test machine's Handler loads the test chip onto multiple test boards, the PC establishes a first communication channel with each test board. The test system installed on the PC starts up, loads project information and configuration files, and creates multiple test tasks based on the configuration files. Each test task must include functions for receiving test logs, parsing test logs, and returning the parsing results. Each test task acquires the test log data of the corresponding test board in real time and sends it to the test log parsing module for parsing. The test log parsing module parses the logs according to a unified test log parsing template, obtains the results of each test case, determines the chip test results, and returns them. The chip test results are usually also returned to the Handler, allowing the Handler to move the test chip to the corresponding position. Finally, the results of each test task are summarized in a test report for statistical analysis.
[0050] In the technical solution provided by this invention, multiple communication channels are established, each independently corresponding to a test board. The test logs of the test boards are acquired and parsed using a unified test log parsing template. This enables a single PC to simultaneously control the testing of multiple test boards and summarize the parsing results of the test logs from multiple test boards to generate a new log. The technical solution provided by this invention automates the parallel testing of multiple chips, effectively improving testing efficiency and reducing testing costs.
[0051] As an optional implementation method, such as Figure 3 As shown, the test logs sent by the corresponding test board are obtained from the first communication channel, and the test results are obtained by parsing them according to the predetermined test log parsing template, including:
[0052] Step 410: Obtain the test log parsing template corresponding to the test chip;
[0053] In some embodiments, a unified test log data structure is used, enabling the simultaneous processing of test data from multiple chip products using the same test workflow, greatly simplifying code complexity. However, since different test chips focus on different test cases, this step requires determining the test log parsing template based on the predefined data structure applied to the test cases that the test chip focuses on.
[0054] Step 420: Read the test log data sent in real time by the test board;
[0055] In some embodiments, the test board sends test log data to the PC in real time during the test. The PC then parses the test log data using a test log parsing template, thereby enabling timely and accurate identification of test cases that failed in the event of a chip crash or an error in the test log upload.
[0056] Step 430: Each time test log data is read, the attributes of the test log parsing template are traversed based on the read test log data, and the test log data is filled into the test log parsing template.
[0057] In some embodiments, the attributes of the test log parsing template include each test case. Each time test log data is read, the attributes corresponding to the test log parsing template are populated. Thus, after the test board sends all the test log data, the statistical analysis of the test results for a single test chip is completed.
[0058] As an optional implementation, traversing the attributes of the test log parsing template includes:
[0059] The attributes that have been populated during the last read of test log data will be skipped during subsequent reads of test log data when iterating through the attributes of the test log parsing template.
[0060] In some embodiments, test cases are typically not executed repeatedly during a test round. Therefore, after each attribute is populated, it does not need to be shunted again in subsequent shunting processes. In this way, the number of attributes that need to be traversed during a test round will decrease, which can effectively improve test efficiency.
[0061] As an optional implementation, each time test log data is read, the process of traversing the attributes of the test log parsing template based on the read test log data and filling the test log data into the test log parsing template further includes:
[0062] When the test reaches the predetermined time, the attributes that have not been filled in the test log parsing template will be filled with failure information.
[0063] In some embodiments, the predetermined time is a pre-set time, which is set based on the designed execution speed or a priori execution speed. If an attribute is not filled after the predetermined time, it indicates that its execution time has exceeded the designed execution time or a priori execution time, and it is defective. Therefore, the value corresponding to the attribute is filled with failure information.
[0064] As an optional implementation, when all attributes corresponding to test cases in the test log parsing template are filled, the test result of the chip is determined based on the value of the attribute corresponding to the test case.
[0065] In some embodiments, when all attributes corresponding to test cases in the test log parsing template are filled, it indicates that no new test cases will be executed, that is, the test of the chip has ended. At this time, the test result of the chip can be determined based on the results of each test case.
[0066] As an optional implementation, the attributes of the log parsing template include the test program version, the chip's unique identifier, the test results of each test case, and the chip test results.
[0067] In some embodiments, the test program version refers to the firmware program version of the test board, the chip unique identifier is an identifier used to determine the chip's identity, the test result of each test case refers to the result of each test case being executed in the chip, and the chip test result refers to the statistical result after the chip has executed all the test cases.
[0068] As an optional implementation, obtaining the test log parsing template corresponding to the test chip includes:
[0069] Load the test configuration file of the test chip, and determine the attributes in the test log parsing template based on the test configuration file.
[0070] In some embodiments, the test configuration file refers to information such as the test cases to be used for a round of testing. Since the test log template needs to record information for each test case, the required attributes in the test log parsing template can be determined after loading the test configuration file.
[0071] As an optional implementation method, such as Figure 4 As shown, based on the results of the test equipment loading test chips onto multiple test boards, the establishment of a first communication channel corresponding one-to-one with the test board includes:
[0072] Step 210: Obtain the test board information of the test machine with the test chip loaded;
[0073] In some embodiments, test board information refers to whether each test board has a test chip loaded. Since test boards without a test chip loaded will not perform chip testing, they do not need to communicate with the PC, and therefore, there is no need to establish a first communication channel.
[0074] Step 220: Establish a Socket communication channel with each test board that has loaded the test chip as the first communication channel.
[0075] In some embodiments, when establishing a Socket communication channel, a Socket server can be installed on a PC and multiple communication ports can be established. A Socket client can be installed on a test board, with each client corresponding to a communication port for communication.
[0076] As an optional implementation, generating a test report based on the test results obtained from multiple test tasks includes:
[0077] The test results obtained from multiple tasks are statistically analyzed, and the start time of the test chip and the number of times the chip is tested on each test board are statistically analyzed to obtain the test report.
[0078] In some embodiments, since the test results of the chip depend to some extent on the test environment, in this embodiment, in addition to statistically analyzing the test results, the time when the test chip starts testing and the number of times each test board tests the chip are also statistically analyzed, so as to trace back the test environment of each chip during the testing process.
[0079] As an optional implementation method, such as Figure 5 As shown, based on the test results, sending control commands from the second communication channel to the test machine includes:
[0080] Step 440: Based on the test results, determine the defect classification of the test chip;
[0081] In some embodiments, the defect classification of a test chip refers to which module of the test chip has a defect, and this classification can be determined based on the failure status of the test cases. For example, the defect classification of a test chip may include memory defects and logic defects.
[0082] Step 450: Determine the target destination of the test chip based on the defect classification;
[0083] In some embodiments, the target flow of the test chips refers to the physical movement of the test equipment to different target locations. For example, the test equipment has multiple containers for holding chips, each container corresponding to a defect category. The PC can determine which container the test equipment needs to place the corresponding chip in based on the defect category.
[0084] Step 460: Send a control command with the target flow direction to the test machine from the second communication channel.
[0085] In some embodiments, each task sends a control command to the test equipment via a second communication channel, which instructs the test equipment to move the corresponding test chip to the corresponding position.
[0086] In various embodiments of the present invention, in order to make the chip testing system applicable to various chip platforms, a unified chip test log parsing template is used. This parsing template is based on a unified test log data structure, the basic attributes of which are defined as follows:
[0087] 1. Test program version; (REV)
[0088] 2. Chip UID (Unique ID)
[0089] 3. Test results for each test item; (each test case)
[0090] 4. Chip test results; (ErrorCode)
[0091] The chip test log parsing template primarily receives test logs printed by the chip via the serial port and extracts information such as the test software version, UID, test item results, and total chip test results. It also records the start time of the chip test and the number of times the chip was tested at each site.
[0092] When parsing test logs, each line of data is read sequentially, and then the test log parsing module is traversed until all attributes in the parsing template are matched. Finally, an ErrorCode is returned to the testing system. In a test round, once an attribute has been parsed, it does not participate in subsequent parsing. If an attribute is not matched before the test times out, the test case corresponding to that attribute fails, and the result is returned to the testing system.
[0093] Those skilled in the art will understand that all or part of the processes in the above method embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.
[0094] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A method for parallel parsing of multi-channel chip test logs, characterized in that, The PC used for chip testing includes: Based on the results of the test machine loading test chips onto multiple test boards, a first communication channel corresponding to each test board is established. Based on the communication channels, establish test tasks that correspond one-to-one with the communication channels; Based on the test tasks, establish a second communication channel between each test task and the test machine; The test task is executed by obtaining the test log sent by the corresponding test board from the first communication channel and parsing it according to the predetermined test log parsing template to obtain the test result. Based on the test result, control commands are sent to the test machine from the second communication channel. A test report is generated based on the test results obtained from multiple test tasks. The process of obtaining test logs sent by the corresponding test board from the first communication channel and parsing them according to a predetermined test log parsing template to obtain test results includes: Obtain the test log parsing template corresponding to the test chip; Read the test log data sent in real time by the test board; Each time test log data is read, the attributes of the test log parsing template are traversed based on the read test log data, and the test log data is filled into the test log parsing template.
2. The method according to claim 1, characterized in that, The attributes of the test log parsing template that are traversed include: The attributes that have been populated during the last read of test log data will be skipped during subsequent reads of test log data when iterating through the attributes of the test log parsing template.
3. The method according to claim 2, characterized in that, Each time test log data is read, the process of iterating through the attributes of the test log parsing template based on the read test log data and filling the test log parsing template with the test log data also includes: When the test reaches the predetermined time, the attributes that have not been filled in the test log parsing template will be filled with failure information.
4. The method according to any one of claims 2-3, characterized in that, When all attributes corresponding to test cases in the test log parsing template are filled in, the test result of the chip is determined based on the value of the attribute corresponding to the test case.
5. The method according to claim 1, characterized in that, The attributes of the log parsing template include the test program version, the chip's unique identifier, the test results of each test case, and the chip's test results.
6. The method according to claim 1, characterized in that, Obtaining the test log parsing template corresponding to the test chip includes: Load the test configuration file of the test chip, and determine the attributes in the test log parsing template based on the test configuration file.
7. The method according to claim 1, characterized in that, Based on the results of the test equipment loading test chips onto multiple test boards, the establishment of a first communication channel corresponding one-to-one with each test board includes: Obtain the test board information of the test instrument with the test chip loaded; Establish a Socket communication channel with each test board that loads the test chip as the first communication channel.
8. The method according to claim 1, characterized in that, Based on the test results obtained from multiple test tasks, a test report is generated, including: The test results obtained from multiple tasks are statistically analyzed, and the start time of the test chip and the number of times the chip is tested on each test board are statistically analyzed to obtain the test report.
9. The method according to claim 1, characterized in that, Based on the test results, sending control commands from the second communication channel to the test equipment includes: Based on the test results, the defect classification of the test chip is determined; The target destination of the test chip is determined based on the defect classification. Control commands with the target flow direction are sent from the second communication channel to the test equipment.