A storage resource management system and a storage system

Abstract

This application discloses a storage resource management system and a storage system, relating to the storage field. The storage resource management system includes: a first control module, used to determine the current access mode and generate a switching instruction based on the current access mode; and a first switching module, which includes multiple first ports and multiple second ports. The first ports are used to connect to computing resources, and the second ports are used to connect to storage resources. Upon receiving a switching instruction, the first switching module controls the connection between the first port and the second port corresponding to the switching instruction, so that the computing resources access the storage resources according to the current access mode. This application offers flexible configuration and ensures that if one data link fails or loses power, the remaining data links can still operate normally without affecting business operations, thus improving the reliability of the storage system.

Description

Technical Field

[0001] This application relates to the field of storage, and in particular to a storage resource management system and a storage system. Background Technology

[0002] With the development of technologies such as big data, cloud computing, and 5G, data is experiencing exponential growth, making the security and reliability of data storage increasingly important. Currently, hard drives, as the main storage devices, are all single-port, and the hard drives on the backplane are all mounted on a single CPU. This configuration is not flexible enough, and data will be lost if the hard drive or hardware link fails, resulting in poor reliability.

[0003] Therefore, how to provide a solution to the above-mentioned technical problems is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0004] The purpose of this application is to provide a storage resource management system and a storage system, which relates to the storage field. It is flexibly configurable and can ensure that if one data link fails or loses power, the remaining data links can still operate normally without affecting business operations, thereby improving the reliability of the storage system.

[0005] To address the aforementioned technical problems, this application provides a storage resource management system, comprising:

[0006] The first control module is used to determine the current access mode and generate a switching instruction based on the current access mode.

[0007] A first switching module includes multiple first ports and multiple second ports. The first ports are used to connect to computing resources, and the second ports are used to connect to storage resources. When the first switching module receives the switching instruction, it controls the first port and the second port corresponding to the switching instruction to connect, so that the computing resources access the storage resources according to the current access mode.

[0008] Optionally, the first control module is configured to generate a first switching instruction based on the first access mode if the current access mode is the first access mode;

[0009] The first switching module is configured to, upon receiving the first switching instruction, control the connection between the first port and the second port corresponding to the first switching instruction, so that any of the computing resources can access any of the storage resources through multiple data links.

[0010] Optionally, the first control module is configured to generate a second switching instruction based on the second access mode if the current access mode is the second access mode;

[0011] The first switching module is configured to, upon receiving the second switching instruction, control the connection between the first port and the second port corresponding to the second switching instruction, so that the multiple computing resources can access any of the storage resources.

[0012] Optionally, the storage resource is a dual-port hard disk;

[0013] The storage resource management system also includes:

[0014] A second control module, located on the same hard drive backplane as the dual-port hard drive, is used to determine the port status of the dual-port hard drive and process the signals output by the computing resources based on the port status; the port status is either a dual-port status or a single-port status.

[0015] Optionally, the storage resource management system may also include:

[0016] The second switching module is used to adjust the port status of the dual-port hard drive;

[0017] A first clock buffer is configured to not output the first clock signal when the port state is the single-port state, and to output the first clock signal when the port state is the dual-port state.

[0018] The second clock buffer is used to output the second clock signal.

[0019] Optionally, the second switching module includes a header and a jumper, wherein the header is connected to the dual-port enable terminal of the dual-port hard drive.

[0020] Optionally, the storage resource management system may also include:

[0021] The processing module is used to output control signals according to the port status and the IFDET signal output by the dual-port hard disk. The control signals include a first sub-control signal corresponding to the single-port status and a second sub-control signal corresponding to the dual-port status.

[0022] The first clock buffer is configured to not output the first clock signal when the first sub-control signal is received, and to output the first clock signal when the second sub-control signal is received.

[0023] Optionally, the processing module includes an OR gate, the first input of which is connected to the IFDET signal, the second input of which is connected to a dual-port enable signal, and the output of which is connected to the output enable terminal of the first clock buffer so as to output the control signal to the first clock buffer.

[0024] Optionally, the first switching module includes a first PCIe switch, a second PCIe switch, a third PCIeswitch, and a fourth PCIe switch, wherein:

[0025] The first port of the first PCIe switch and the first port of the second PCIe switch are the first ports of the first switching module, and the second ports of the third PCIe switch and the second ports of the fourth PCIe switch are the second ports of the first switching module. The second port of the first PCIe switch is connected to the first port of the third PCIe switch and the first port of the fourth PCIe switch, respectively. The second port of the second PCIe switch is connected to the first port of the third PCIe switch and the first port of the fourth PCIe switch, respectively.

[0026] To address the aforementioned technical problems, this application also provides a storage system, including storage resources and a storage resource management system as described in any of the above descriptions.

[0027] This application provides a storage resource management system in which both computing resources and storage resources are connected to ports corresponding to a first switching module. A first control module can control the connected ports in the switching module according to the current access mode, allowing computing resources to access storage resources according to different access modes. This system offers flexible configuration, supports multiple data links between storage and computing resources, and allows each storage resource to be accessed by multiple computing resources. Even if one data link fails or loses power, the remaining data links can still operate normally without affecting business operations, thus improving the reliability of the storage system. This application also provides a storage system with the same beneficial effects as the aforementioned storage resource management system. Attached Figure Description

[0028] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 A schematic diagram of a storage resource management system provided in this application;

[0030] Figure 2 A schematic diagram of another storage resource management system provided in this application;

[0031] Figure 3A schematic diagram of another storage resource management system provided in this application;

[0032] Figure 4 A hardware link diagram of a dual-port hard disk provided in this application;

[0033] Figure 5 A schematic diagram of another storage resource management system provided in this application;

[0034] Figure 6a A schematic diagram of another storage resource management system provided in this application;

[0035] Figure 6b This is a schematic diagram of another storage resource management system provided in this application. Detailed Implementation

[0036] The purpose of this application is to provide a storage resource management system and a storage system, which relates to the storage field. It is flexibly configurable and can ensure that if one data link fails or loses power, the remaining data links can still operate normally without affecting business operations, thereby improving the reliability of the storage system.

[0037] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0038] Firstly, please refer to Figure 1 , Figure 1 This application provides a schematic diagram of a storage resource management system, which includes:

[0039] The first control module 11 is used to determine the current access mode and generate a switching instruction based on the current access mode.

[0040] The first switching module 12 includes multiple first ports and multiple second ports. The first ports are used to connect to computing resources, and the second ports are used to connect to storage resources. When a switching command is received, the first switching module 12 controls the connection between the first port and the second port corresponding to the switching command so that the computing resources access the storage resources according to the current access mode.

[0041] The access mode specifically refers to the access pattern of computing resources to storage resources. Different access modes correspond to different data links. For example, computing resource CA can access storage resource SA through multiple data links at the same time, or computing resource CA and computing resource CB can access storage resource SA at the same time.

[0042] The first control module 11 first determines the current access mode, and then generates a switching instruction based on the current access mode. The switching instruction is used to control the connection of the corresponding first port and second port in the first switching module 12, adjust the storage resources that can be accessed by the computing resources, realize the switching of different access modes, and make the configuration flexible.

[0043] For example, refer to Figure 2 As shown, Figure 2 Only two storage resources and two computing resources are shown. The first switching module 12 includes first ports P11 and P12, and second ports P21 and P22. When P11 and P21 are connected, and P12 and P21 are connected, both computing resources CA and CB can access storage resource SA. When P11 and P21 are connected, and P12 and P21 are connected, both computing resources CA and CB can access storage resource SA. When P11 and P21 are connected, and P11 and P22 are connected, computing resource CA can access storage resource SA through data link 1 and data link 2. When P11 and P21 are connected, and P12 and P22 are connected, computing resource CA can access storage resource SA, and computing resource CB can access storage resource SB.

[0044] It is understood that the computing resources can be CPUs or computing resource pools, and the storage resources can be hard disks or storage resource pools. When the computing resources are computing resource pools and the storage resources are storage resource pools, a multi-host shared, high-concurrency NVMe storage resource pool can be realized, achieving dynamic resource allocation on a high-reliability basis. The first switching module 12 can select according to the type of computing resources and storage resources; this application does not impose specific limitations here.

[0045] As can be seen, in this embodiment, both computing resources and storage resources are connected to the ports corresponding to the first switching module 12. The first control module 11 can control the connected ports in the switching module according to the current access mode, so that computing resources can access storage resources according to different access modes. The configuration is flexible, and there can be multiple data links between storage resources and computing resources. Each storage resource can be accessed by multiple computing resources. If one data link fails or loses power, the remaining data links can still operate normally without affecting the business, thus improving the reliability of the storage system.

[0046] Based on the above embodiments:

[0047] As an optional embodiment, the first control module 11 is used to generate a first switching instruction based on the first access mode if the current access mode is the first access mode;

[0048] The first switching module 12 is used to control the connection of the first port and the second port corresponding to the first switching instruction when a first switching instruction is received, so that any computing resource can access any storage resource through multiple data links.

[0049] The first access mode corresponds to a computing resource accessing a storage resource through multiple data links. The first access mode essentially provides redundancy for the data links, such as... Figure 3 As shown, the system includes two computing resources, CPU 0 and CPU 1, and four storage resources, SSD 1, SSD 2, SSD 3, and SSD 4. The first switching module 12 includes first ports P11 and P12, and second ports P21 and P22. When P11 and P21 are connected, and P11 and P22 are connected, for SSD 1, CPU 0 can see both SSDs. If either data link fails, the SSD can still be accessed through the other data link, improving the reliability of the storage system.

[0050] As an optional embodiment, the first control module 11 is used to generate a second switching instruction based on the second access mode if the current access mode is the second access mode;

[0051] The first switching module 12 is used to control the connection between the first port and the second port corresponding to the second switching instruction when a second switching instruction is received, so that multiple computing resources can access any storage resource.

[0052] The second access mode corresponds to a mode where multiple computing resources can access the same storage resource. The second access mode essentially redundancy the data, such as... Figure 3 As shown, the system includes two computing resources, CPU0 and CPU1, and four storage resources, SSD1, SSD2, SSD3, and SSD4. The first switching module 12 includes first ports P11 and P12, and second ports P21 and P22. When P11 and P21 are connected, and P12 and P21 are connected, CPU0 and CPU1 can simultaneously access the same storage space for SSD1, performing redundant backups of stored data. If one data link fails or loses power, the remaining data links can still operate normally, without affecting business operations, thus improving the reliability of the storage system.

[0053] As an optional embodiment, the storage resource is a dual-port hard drive;

[0054] The storage resource management system also includes:

[0055] The second control module 21, which is located on the same hard disk backplane as the dual-port hard disk, is used to determine the port status of the dual-port hard disk and process the signals output by the computing resources based on the port status; the port status is either dual-port or single-port.

[0056] Specifically, the storage resource can be a dual-port hard drive. A dual-port hard drive supports two data links within a single host, allowing two storage controllers to access the same storage device simultaneously, thus achieving redundancy. Please refer to [link / reference]. Figure 4 , Figure 4 This is a schematic diagram of a two-port hardware link. For the purpose of simplifying the topology and facilitating understanding, Figure 4 Only one dual-port hard drive, namely an SSD, is identified, and its location is presented as a hard drive backplane. In addition to the SSD, the hard drive backplane also houses a second control module 21 for handling various non-standard signals. The hard drive backplane is connected to a baseboard containing a first processing module 22 and a first switching module 12 via cable, processing PCIe, 100M_CLK, PERST, and SMBUS signals before sending them to the SSD. Specifically, the second control module 21 can be a CPLD.

[0057] The second control module 21 can acquire the port status of the dual-port hard drive and process the signals output by the computing resources based on the port status. It is understood that a dual-port hard drive in dual-port mode corresponds to one access mode, and a dual-port hard drive in single-port mode corresponds to another access mode. Specifically, the second control module 21 can determine the port status of the dual-port hard drive based on the level of the dual-port enable terminal; if the dual-port enable terminal is high, it is in single-port mode; if the dual-port enable terminal is low, it is in dual-port mode.

[0058] As an optional embodiment, the storage resource management system further includes:

[0059] The second switching module is used to adjust the port status of the dual-port hard drive;

[0060] The first clock buffer CLK buffer0 is used to not output the first clock signal when the port state is single port state, and to output the first clock signal when the port state is dual port state.

[0061] The second clock buffer CLK buffer1 is used to output the second clock signal.

[0062] Unlike regular hard drives, dual-port hard drives need to handle two sets of 100M_CLK and two sets of PERST. As for signals such as SMBUS, PRSNT, and PWRDIS, they have no impact on dual-port operation, so no special processing is required.

[0063] Correspondingly, the hard drive backplane is also equipped with a second switching module, a first clock buffer CLK buffer0, and a second clock buffer CLK buffer1. As an optional embodiment, the second switching module includes a header and a jumper. The header is connected to the dual-port enable terminal of the dual-port hard drive. When the dual-port hard drive needs to be in dual-port mode, the header can be connected through the jumper to enable the dual port of the dual-port hard drive. The Dual port_EN signal is pulled low. After the second processing module 22 detects that the Dual port_EN signal is pulled low, it determines that the dual-port hard drive has entered dual-port mode. The second control module 21 will divide the PERST sent from the baseboard into two, namely PERST_0 and PERST_1, so as to control the two sets of X2 PCIeets respectively.

[0064] It is understandable that when the dual-port hard drive is in dual-port mode, two sets of 100M_CLK signals are required, and when the dual-port hard drive is in single-port mode, one set of 100M_CLK signals is required. Therefore, in this embodiment, the two clock buffers determine whether to output the 100M_CLK signal based on the state of the dual-port hard drive. For ease of control, this embodiment controls one clock buffer to continuously output the 100M_CLK signal when the dual-port hard drive is present, and controls the other clock buffer to output the 100M_CLK signal only when the dual-port hard drive is present and in dual-port mode.

[0065] As an optional embodiment, the storage resource management system further includes:

[0066] Processing module 22 is used to output control signals according to the port status and the IFDET signal output by the dual-port hard disk. The control signals include a first sub-control signal corresponding to the single-port status and a second sub-control signal corresponding to the dual-port status.

[0067] The first clock buffer CLK buffer0 is used to not output the first clock signal when the first sub-control signal is received, and to output the first clock signal when the second sub-control signal is received.

[0068] As an optional embodiment, the processing module 22 includes an OR gate, the first input of which is connected to the IFDET signal, the second input of which is connected to the dual-port enable signal, and the output of which is connected to the output enable terminal of the first clock buffer so as to output a control signal to the first clock buffer.

[0069] Specifically, refer to Figure 4As shown, in this embodiment, a processing module 22 is also provided on the hard disk backplane. The output terminal of the processing module 22 is connected to the output enable terminal of the first clock buffer CLK buffer0. The IFDET signal and Dual port_EN signal of the dual-port hard disk serve as the inputs of the processing module 22. The IFDET signal is also sent to the output enable terminal of the second clock buffer CLK buffer1. When the dual-port hard disk is in single-port state, the IFDET signal (active is low) output by the dual-port hard disk controls the output of the second clock buffer CLK buffer1 and CLK buffer0 to output CLK0. Since Dual port_EN is not enabled, it is at a high level, and it is connected to the IFDET signal through the logic gate (logic truth table as shown in the figure). Figure 1 As shown, the output controls the OE signal of the first clock buffer CLK buffer0 and CLK buffer1. At this time, OE is high, and CLK buffer1 has no CLK output. When the dual-port hard disk is in dual-port state, the IFDET signal (valid is low) output by the dual-port hard disk controls the output of the second clock buffer CLK buffer1 and CLK buffer0 to output CLK0. Dualport_EN is enabled and is low. It and the IFDET signal control the OE signal of the first clock buffer CLK buffer0 and CLK buffer1 through the logic gate logic output. At this time, OE is low, and the first clock buffer CLK buffer0 and CLK buffer1 also output normally.

[0070] Table 1 Truth Table of Logic Gates

[0071]

[0072] Specifically, the logic gate is an OR gate.

[0073] As an optional embodiment, the first switching module 12 includes a first PCIe switch, a second PCIe switch, a third PCIe switch, and a fourth PCIe switch, wherein:

[0074] The first port of the first PCIe switch and the first port of the second PCIe switch are the first ports of the first switching module 12. The second ports of the third PCIe switch and the second ports of the fourth PCIe switch are the second ports of the first switching module 12. The second port of the first PCIe switch is connected to the first port of the third PCIe switch and the first port of the fourth PCIe switch, respectively. The second port of the second PCIe switch is connected to the first port of the third PCIe switch and the first port of the fourth PCIe switch, respectively.

[0075] Understandably, referring to Figure 5 As shown, four PCIe switches (2x2) are added to the PCIe link from the CPU to the SSD. Firstly, this consumes only one PCIe lane per CPU, allowing the system to use more PCIe resources for other tasks. Secondly, the 2x2 PCIe switch design allows for flexible switching between dual-port and single-port modes via software configuration. Taking SSD 1 as an example, SSD 1 can be configured as a single-port or dual-port drive. Figure 6a The two x2 PCIe connections to SSD 1 originate from PCIe switch 1-0 and PCIe switch 1-1 respectively. Since both PCIe switch 1-0 and PCIe switch 1-1 originate from PCIe switch 0-0, this effectively redundancy in the data link. Under CPU0, two x2 PCIe devices, i.e., two SSDs, are visible. This link redundancy is enabled by the operating system's multiple path technology, as described above. Figure 6b When PCIe switch1-0 and PCIe switch1-1 originate from PCIe switch0-0 and PCIe switch0-1 respectively, SSD 1 is a dual-port, and CPU 0 and CPU 1 can access the same storage space simultaneously, performing redundant backups of the stored data.

[0076] Secondly, this application also provides a storage system, including storage resources and a storage resource management system, wherein the storage resource management system includes:

[0077] The first control module is used to determine the current access mode and generate a switching instruction based on the current access mode.

[0078] The first switching module includes multiple first ports and multiple second ports. The first ports are used to connect to computing resources, and the second ports are used to connect to storage resources. When a switching command is received, the first switching module controls the connection between the first port and the second port corresponding to the switching command so that the computing resources access the storage resources according to the current access mode.

[0079] The access mode specifically refers to the access pattern of computing resources to storage resources. Different access modes correspond to different data links. For example, computing resource CA can access storage resource SA through multiple data links at the same time, or computing resource CA and computing resource CB can access storage resource SA at the same time.

[0080] The first control module first determines the current access mode, and then generates a switching instruction based on the current access mode. The switching instruction is used to control the connection of the corresponding first port and second port in the first switching module, adjust the storage resources that can be accessed by the computing resources, realize the switching of different access modes, and make the configuration flexible.

[0081] It is understood that computing resources can be CPUs or computing resource pools, and storage resources can be hard disks or storage resource pools. When computing resources are computing resource pools and storage resources are storage resource pools, a multi-host shared, high-concurrency NVMe storage resource pool can be realized, achieving dynamic resource allocation on a high-reliability basis. The first switching module can select according to the type of computing and storage resources; this application does not impose specific limitations here.

[0082] As can be seen, in this embodiment, both computing resources and storage resources are connected to the ports corresponding to the first switching module. The first control module can control the connected ports in the switching module according to the current access mode, so that computing resources can access storage resources according to different access modes. The configuration is flexible, and there can be multiple data links between storage resources and computing resources. Each storage resource can be accessed by multiple computing resources. If one data link fails or loses power, the remaining data links can still operate normally without affecting the business, thus improving the reliability of the storage system.

[0083] As an optional embodiment, the first control module is used to generate a first switching instruction based on the first access mode if the current access mode is the first access mode;

[0084] The first switching module is used to control the connection of the first port and the second port corresponding to the first switching instruction when a first switching instruction is received, so that any computing resource can access any storage resource through multiple data links.

[0085] The first access mode corresponds to a computing resource accessing a storage resource through multiple data links. The first access mode is equivalent to redundancy of the data links. If any data link fails, the storage resource can still be accessed through another data link, thereby improving the reliability of the storage system.

[0086] As an optional embodiment, the first control module is used to generate a second switching instruction based on the second access mode if the current access mode is the second access mode;

[0087] The first switching module is used to control the connection between the first port and the second port corresponding to the second switching instruction when a second switching instruction is received, so that multiple computing resources can access any storage resource.

[0088] The second access mode corresponds to a mode in which multiple computing resources can access the same storage resource. The second access mode is equivalent to data redundancy. Multiple computing resources can access the same storage space at the same time and perform redundant backups of the stored data. If one data link fails or loses power, the other data links can still operate normally without affecting the business and improving the reliability of the storage system.

[0089] As an optional embodiment, the storage resource is a dual-port hard drive;

[0090] The storage resource management system also includes:

[0091] The second control module, located on the same hard drive backplane as the dual-port hard drive, is used to determine the port status of the dual-port hard drive and process the signals output by the computing resources based on the port status; the port status is either dual-port or single-port.

[0092] The first control module is used to determine the current access mode based on the mode indication information and generate a switching instruction based on the current access mode.

[0093] Specifically, the storage resource can be a dual-port hard drive. A dual-port hard drive supports two data links within a single host, simultaneously controlling two storage controllers to access the same storage device, achieving redundancy. The dual-port hard drive is connected to a hard drive backplane. In addition to the dual-port hard drive, the hard drive backplane also has a second control module for handling various non-standard signals. The hard drive backplane is connected to a baseboard containing a first processing module and a first switching module via cable, processing signals such as PCIe, 100M_CLK, PERST, and SMBUS before sending them to the dual-port hard drive.

[0094] The second control module can acquire the port status of the dual-port hard drive and process the signals output by the computing resources based on the port status. It can be understood that a dual-port hard drive in dual-port mode corresponds to one access mode, and a dual-port hard drive in single-port mode corresponds to another access mode. Specifically, the second control module can determine the port status of the dual-port hard drive based on the level of the dual-port enable pin; if the dual-port enable pin is high, it is in single-port mode; if the dual-port enable pin is low, it is in dual-port mode.

[0095] As an optional embodiment, the storage resource management system further includes:

[0096] The second switching module is used to adjust the port status of the dual-port hard drive;

[0097] The first clock buffer is used to not output the first clock signal when the port state is a single port state, and to output the first clock signal when the port state is a dual port state.

[0098] The second clock buffer is used to output the second clock signal.

[0099] Unlike regular hard drives, dual-port hard drives need to handle two sets of 100M_CLK and two sets of PERST. As for signals such as SMBUS, PRSNT, and PWRDIS, they have no impact on dual-port operation, so no special processing is required.

[0100] Correspondingly, the hard drive backplane is also equipped with a second switching module, a first clock buffer, and a second clock buffer. As an optional embodiment, the second switching module includes a header and a jumper. The header is connected to the dual-port enable terminal of the dual-port hard drive. When the dual-port hard drive needs to be in dual-port mode, the header can be connected through the jumper to enable the dual port of the dual-port hard drive. The Dual port_EN signal is pulled low. After the second processing module detects that the Dual port_EN signal is pulled low, it determines that the dual-port hard drive has entered dual-port mode. The second control module will divide the PERST sent from the baseboard into two, namely PERST_0 and PERST_1, so as to control the two sets of X2 PCIeets respectively.

[0101] It is understandable that when the dual-port hard drive is in dual-port mode, two sets of 100M_CLK signals are required, and when the dual-port hard drive is in single-port mode, one set of 100M_CLK signals is required. Therefore, in this embodiment, the two clock buffers determine whether to output the 100M_CLK signal based on the state of the dual-port hard drive. For ease of control, this embodiment controls one clock buffer to continuously output the 100M_CLK signal when the dual-port hard drive is present, and controls the other clock buffer to output the 100M_CLK signal only when the dual-port hard drive is present and in dual-port mode.

[0102] As an optional embodiment, the second switching module includes a header and a jumper, the header being connected to the dual-port enable terminal of the dual-port hard drive.

[0103] As an optional embodiment, the storage resource management system further includes:

[0104] The processing module is used to output control signals based on the port status and the IFDET signal output by the dual-port hard drive. The control signals include a first sub-control signal corresponding to the single-port status and a second sub-control signal corresponding to the dual-port status.

[0105] The first clock buffer is used to not output the first clock signal when the first sub-control signal is received, and to output the first clock signal when the second sub-control signal is received.

[0106] As an optional embodiment, the processing module includes an OR gate, the first input of which is connected to the IFDET signal, the second input of which is connected to a dual-port enable signal, and the output of which is connected to the output enable terminal of the first clock buffer so as to output a control signal to the first clock buffer.

[0107] Specifically, a processing module is also installed on the hard drive backplane. The output of the processing module is connected to the output enable terminal of the first clock buffer. The IFDET signal and Dual port_EN signal of the dual-port hard drive serve as inputs to the processing module. The IFDET signal is also sent to the output enable terminal of the second clock buffer. When the dual-port hard drive is in single-port mode, the IFDET signal (valid low) output by the dual-port hard drive controls the output of CLK buffer0 of the second clock buffer to output CLK0. Since Dual port_EN is not enabled, it is at a high level. It controls the OE signal of the first clock buffer CLK buffer0 through the logic gate output with the IFDET signal. At this time, OE is high, and CLK buffer1 has no CLK output. When the dual-port hard drive is in dual-port mode, the IFDET signal (valid low) output by the dual-port hard drive controls the output of CLK buffer0 of the second clock buffer to output CLK0. Dual port_EN is enabled, at a low level. It controls the OE signal of the first clock buffer CLK buffer0 through the logic gate output with the IFDET signal. At this time, OE is low, and CLK buffer0 of the first clock buffer also outputs normally.

[0108] Specifically, the logic gate is an OR gate.

[0109] As an optional embodiment, the first switching module includes a first PCIe switch, a second PCIe switch, a third PCIe switch, and a fourth PCIe switch, wherein:

[0110] The first port of the first PCIe switch and the first port of the second PCIe switch are the first ports of the first switching module. The second ports of the third PCIe switch and the second ports of the fourth PCIe switch are the second ports of the first switching module. The second port of the first PCIe switch is connected to the first port of the third PCIe switch and the first port of the fourth PCIe switch, respectively. The second port of the second PCIe switch is connected to the first port of the third PCIe switch and the first port of the fourth PCIe switch, respectively.

[0111] Understandably, adding four PCIe switches (2x2) to the CPU-to-SSD PCIe link serves several purposes. First, it consumes only one PCIe lane per CPU, freeing up more PCIe resources for other tasks. Second, the 2x2 PCIe switch design allows for flexible switching between dual-port and single-port modes via software configuration. Taking SSD 1 as an example, it can be single-ported or dual-ported. The two x2 PCIe lanes connecting SSD 1 originate from PCIeswitch 1-0 and PCIe switch 1-1 respectively. When both PCIe switch 1-0 and PCIe switch 1-1 originate from PCIeswitch 0-0, this effectively redundancy in the data link. Under CPU0, two x2 PCIe devices (two SSDs) are visible. This redundancy is further enhanced by operating system technologies like multiple path. When PCIe switch 1-0 and PCIe switch 1-1 originate from PCIe switch 0-0 and PCIe switch 0-1 respectively, the SSD... 1 is a dual-port CPU, where CPU 0 and CPU 1 can access the same storage space simultaneously and perform redundant backups of the stored data.

[0112] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0113] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A storage resource management system, characterized in that, include: The first control module is used to determine the current access mode and generate a switching instruction based on the current access mode. A first switching module includes multiple first ports and multiple second ports. The first ports are used to connect to computing resources, and the second ports are used to connect to storage resources. The first switching module is used to control the first port and the second port corresponding to the switching instruction to connect when it receives the switching instruction, so that the computing resources can access the storage resources according to the current access mode. The storage resource is a dual-port hard disk; The storage resource management system also includes: The second switching module is used to adjust the port status of the dual-port hard drive; the port status is either dual-port or single-port. A first clock buffer is configured to not output the first clock signal when the port state is the single-port state, and to output the first clock signal when the port state is the dual-port state. The second clock buffer is used to output the second clock signal; The second switching module includes a header and a jumper. The header is connected to the dual-port enable terminal of the dual-port hard drive. The jumper connects the header to pull the dual-port enable signal low, so that the dual-port hard drive enters the dual-port state. The processing module is used to output control signals according to the port status and the IFDET signal output by the dual-port hard disk. The control signals include a first sub-control signal corresponding to the single-port status and a second sub-control signal corresponding to the dual-port status. The first clock buffer is configured to not output the first clock signal when the first sub-control signal is received, and to output the first clock signal when the second sub-control signal is received; the first control module is configured to generate a first switching instruction based on the first access mode if the current access mode is the first access mode; The first switching module is configured to, upon receiving the first switching instruction, control the connection between the first port and the second port corresponding to the first switching instruction, so that any computing resource can access any storage resource through multiple data links; The first control module is configured to generate a second switching instruction based on the second access mode if the current access mode is the second access mode; The first switching module is configured to, upon receiving the second switching instruction, control the connection between the first port and the second port corresponding to the second switching instruction, so that the multiple computing resources can access any of the storage resources; The storage resource management system also includes: A second control module, located on the same hard drive backplane as the dual-port hard drive, is used to determine the port status of the dual-port hard drive and process the signals output by the computing resources based on the port status. The processing module includes an OR gate, the first input of which is connected to the IFDET signal, the second input of which is connected to the dual-port enable signal, and the output of which is connected to the output enable terminal of the first clock buffer so as to output the control signal to the first clock buffer.

2. The storage resource management system according to claim 1, characterized in that, The first switching module includes a first PCIe switch, a second PCIe switch, a third PCIe switch, and a fourth PCIe switch, wherein: The first port of the first PCIe switch and the first port of the second PCIe switch are the first ports of the first switching module, and the second ports of the third PCIe switch and the second ports of the fourth PCIe switch are the second ports of the first switching module. The second port of the first PCIe switch is connected to the first port of the third PCIe switch and the first port of the fourth PCIe switch, respectively. The second port of the second PCIe switch is connected to the first port of the third PCIe switch and the first port of the fourth PCIe switch, respectively.

3. A storage system, characterized in that, This includes storage resources and the storage resource management system as described in any one of claims 1-2.

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