Open / short circuit detection circuit and control method thereof

Abstract

This invention relates to the field of circuit technology, specifically to an open / short circuit detection circuit and its control method. The circuit includes an MCU, a load, and a detection circuit. The input terminal of the detection circuit is connected to the load, the first output terminal of the detection circuit is connected to the short-circuit detection pin of the MCU, and the second output terminal of the detection circuit is connected to the open-circuit detection pin of the MCU. The MCU is used to determine that the load is short-circuited when a high level is detected at the first output terminal through the open-circuit detection pin, and to determine that the load is open-circuited when a high level is detected at the second output terminal through the short-circuit detection pin. This invention uses the MCU to perform level detection on the load, thereby quickly determining the open / open circuit abnormal state of the load and improving the efficiency of open / open circuit detection.

Description

Technical Field

[0001] This invention relates to the field of circuit technology, specifically to an open / short circuit detection circuit and its control method. Background Technology

[0002] When connected to an external load, there is a risk of short circuits or open circuits in the power supply due to installation errors or vibrations during transportation. In related technologies, relying on manual measurement of power supply open and short circuit faults is too inefficient. Summary of the Invention

[0003] To address the aforementioned problems, this invention provides an open / short circuit detection circuit and its control method, which can perform level detection on the load via an MCU, thereby quickly determining the open / open circuit abnormal state of the load and improving the efficiency of open / open circuit detection.

[0004] To achieve the above objectives, the present invention provides the following technical solution:

[0005] An open / short circuit detection circuit includes: an MCU, a load, and a detection circuit;

[0006] The input terminal of the detection circuit is connected to the load, the first output terminal of the detection circuit is connected to the short-circuit detection pin of the MCU, and the second output terminal of the detection circuit is connected to the open-circuit detection pin of the MCU.

[0007] The MCU is configured to determine that the load is short-circuited when a high level is detected at the first output terminal via the short-circuit detection pin, and to determine that the load is open-circuited when a high level is detected at the second output terminal via the open-circuit detection pin.

[0008] Furthermore, the detection circuit includes: a MOSFET, a first voltage divider circuit, a second voltage divider circuit, an open-circuit output circuit, and a short-circuit output circuit;

[0009] The source of the MOS transistor and the input terminal of the first voltage divider circuit are connected to the first power supply terminal. The output terminal of the first voltage divider circuit is connected to one end of the short-circuit output circuit. The other end of the short-circuit output circuit is connected to the gate of the MOS transistor and the first output terminal, respectively.

[0010] The ground terminal of the first voltage divider circuit and the input terminal of the second voltage divider circuit are both connected to the second power supply terminal. The output terminal of the second voltage divider circuit is connected to the drain of the MOS transistor. The ground terminal of the second voltage divider circuit is connected to one end of the open-circuit output circuit, and the other end of the open-circuit output circuit is connected to the second output terminal.

[0011] When the load is short-circuited, the output of the first voltage divider circuit is at a low level, the drain of the MOS transistor is at a high level, triggering the open-circuit output circuit to output a high level to the first output terminal;

[0012] When the load is open, the voltage at the input terminal and the voltage at the output terminal of the second voltage divider circuit are both the supply voltage of the first power supply terminal, triggering the open-circuit output circuit to output a high level to the second output terminal.

[0013] Furthermore, the first voltage divider circuit includes: a first resistor and a second resistor, one end of the first resistor is connected to the first power supply terminal, the other end of the first resistor is connected to one end of the second resistor and one end of the short-circuit output circuit, and the other end of the second resistor is connected to the second power supply terminal.

[0014] Furthermore, the short-circuit output circuit includes: a first transistor, a third resistor, and a first diode. The base of the first transistor is connected to the other end of the first resistor, the emitter of the first transistor is grounded, the collector of the first transistor is connected to the gate of the MOS transistor and the cathode of the first diode, and the anode of the first diode is connected to one end of the third resistor and the first output terminal, respectively. The other end of the third resistor is connected to the third power supply terminal.

[0015] Furthermore, an eighth resistor is provided between the base of the first transistor and the other end of the first resistor, a ninth resistor is provided between the collector of the first transistor and the cathode of the first diode, and a tenth resistor is provided between the collector of the first transistor and the gate of the MOS transistor.

[0016] Furthermore, the second voltage divider circuit includes a fourth resistor and a fifth resistor. One end of the fourth resistor is connected to the second power supply terminal, and the other end of the fourth resistor is connected to one end of the fifth resistor and the drain of the MOSFET. The other end of the fifth resistor is connected to one end of the open-circuit output circuit.

[0017] Furthermore, the open-circuit output circuit includes: a second transistor, a third transistor, a second diode, a sixth resistor, and a seventh resistor. The emitter of the second transistor is connected to the other end of the fifth resistor, the collector of the second transistor is grounded, the base of the second transistor is connected to the base of the third transistor, the emitter of the third transistor is connected to the second power supply terminal, the collector of the third transistor is connected to one end of the sixth resistor and the cathode of the second diode, the other end of the sixth resistor is grounded, the anode of the second diode is connected to one end of the seventh resistor and the second output terminal, and the other end of the seventh resistor is connected to the third power supply terminal.

[0018] Furthermore, the collector of the second transistor is grounded through the eleventh resistor.

[0019] Furthermore, a twelfth resistor is provided between the collector of the third transistor and the cathode of the second diode.

[0020] A control method for an open / short circuit detection circuit, applied to any of the open / short circuit detection circuits described above, the method comprising the following steps:

[0021] Step S100: The MCU detects the level output by the first output terminal through the short-circuit detection pin and detects the level output by the second output terminal through the open-circuit detection pin.

[0022] Step S200: When a high level is detected by the short-circuit detection pin at the first output terminal, the load is determined to be short-circuited; when a high level is detected by the open-circuit detection pin at the second output terminal, the load is determined to be open-circuited.

[0023] The beneficial effects of this invention are as follows: This invention provides an open / short circuit detection circuit and its control method. By detecting the level output of the first output terminal through the open circuit detection pin of the MCU, it can be determined whether the load is short-circuited; by detecting the level output of the second output terminal through the short circuit detection pin of the MCU, it can be determined whether the load is open-circuited. This invention can improve the efficiency of open / open circuit detection of the load. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a circuit block diagram of an open / short circuit detection circuit according to an embodiment of the present invention;

[0026] Figure 2 This is a circuit diagram of an open / short circuit detection circuit according to an embodiment of the present invention;

[0027] Figure 3 This is a schematic diagram of the location of an open / short circuit detection circuit in an embodiment of the present invention. Detailed Implementation

[0028] This section will describe in detail specific embodiments of the present invention. Preferred embodiments of the present invention are shown in the accompanying drawings. The purpose of the drawings is to supplement the textual description with graphics, so that people can intuitively and vividly understand each technical feature and overall technical solution of the present invention, but they should not be construed as limiting the scope of protection of the present invention.

[0029] In the description of this invention, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., are based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0030] In the description of this invention, if there are words such as "several", they mean one or more, "multiple" means two or more, "greater than", "less than", "exceeding" etc. are understood to exclude the number itself, and "above", "below", "within" etc. are understood to include the number itself.

[0031] In the description of this invention, unless otherwise explicitly defined, terms such as "set up," "install," and "connect" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0032] This invention provides an open / short circuit detection circuit and its control method. The circuit uses MCU100 to detect the level and determine the open / open circuit abnormal state of load 200, thereby improving the open / open circuit detection efficiency of load 200.

[0033] refer to Figure 1 This invention provides an open / short circuit detection circuit, including: MCU100, load200 and detection circuit300;

[0034] The input terminal of the detection circuit 300 is connected to the load 200, the first output terminal 301 of the detection circuit 300 is connected to the short-circuit detection pin SHORT_DET of the MCU100, and the second output terminal 302 of the detection circuit 300 is connected to the open-circuit detection pin OPEN_DET of the MCU100.

[0035] The MCU100 is used to determine that the load 200 is short-circuited when a high level is detected by the short-circuit detection pin SHORT_DET at the first output terminal 301; and to determine that the load 200 is open-circuited when a high level is detected by the open-circuit detection pin OPEN_DET at the second output terminal 302.

[0036] It should be noted that, in some embodiments, the detection circuit 300 is used to output a low level through the first output terminal 301 and a low level through the second output terminal 302 when the load 200 is normal; to output a high level through the first output terminal 301 and a low level through the second output terminal 302 when the load 200 is open-circuited; and to output a high level through the first output terminal 301 and a high level through the second output terminal 302 when the load 200 is short-circuited. The MCU 100 is used to detect the open-circuit detection pin OPEN_DET when the load 200 is open-circuit. When both the first output terminal 301 and the second output terminal 302 output a low level, the load 200 is determined to be working normally. When the open-circuit detection pin OPEN_DET detects a high level output from the first output terminal 301 and a low level output from the second output terminal 302, the load 200 is determined to be open-circuited. When the open-circuit detection pin OPEN_DET detects a low level output from the first output terminal 301 and a high level output from the second output terminal 302, the load 200 is determined to be short-circuited.

[0037] The embodiments provided in this application do not require manual detection. By detecting the level output of the first output terminal 301 through the open-circuit detection pin OPEN_DET of the MCU100, it can be determined whether the load 200 is short-circuited; by detecting the level output of the second output terminal 302 through the short-circuit detection pin SHORT_DET of the MCU100, it can be determined whether the load 200 is open-circuited. By using the MCU100 to detect the level of the load 200, the open-circuit and open-circuit abnormal states of the load 200 can be quickly determined, improving the efficiency of open-circuit and open-circuit detection of the load 200.

[0038] refer to Figure 2 As a preferred embodiment of the above, the detection circuit 300 includes: a MOS transistor M1, a first voltage divider circuit 310, a second voltage divider circuit 320, an open-circuit output circuit 340, and a short-circuit output circuit 330.

[0039] The source of the MOS transistor M1 and the input terminal of the first voltage divider circuit 310 are connected to the first power supply terminal VCC. The output terminal of the first voltage divider circuit 310 is connected to one end of the short-circuit output circuit 330. The other end of the short-circuit output circuit 330 is connected to the gate of the MOS transistor M1 and the first output terminal 301, respectively.

[0040] The ground terminal of the first voltage divider circuit 310 and the input terminal of the second voltage divider circuit 320 are both connected to the second power supply terminal VDD_DEV. The output terminal of the second voltage divider circuit 320 is connected to the drain of the MOS transistor M1. The ground terminal of the second voltage divider circuit 320 is connected to one end of the open-circuit output circuit 340. The other end of the open-circuit output circuit 340 is connected to the second output terminal 302.

[0041] When the load 200 is short-circuited, the output of the first voltage divider circuit 310 is at a low level, the drain of the MOS transistor M1 is at a high level, triggering the open-circuit output circuit 340 to output a high level to the first output terminal 301.

[0042] When the load 200 is open circuit, the voltage at the input terminal and the voltage at the output terminal of the second voltage divider circuit 320 are both the supply voltage of the first power supply terminal VCC, triggering the open circuit output circuit 340 to output a high level to the second output terminal 302.

[0043] It should be noted that in some embodiments, when the load 200 is normal, the output of the first voltage divider circuit 310 is at a high level, the drain of the MOS transistor M1 is at a low level, triggering the short-circuit output circuit 330 to output a low level to the first output terminal 301; the voltage at the ground terminal of the second voltage divider circuit 320 is greater than the voltage at the input terminal, triggering the open-circuit output circuit 340 to output a low level to the second output terminal 302;

[0044] When the load 200 is short-circuited, the output of the first voltage divider circuit 310 is at a low level, the drain of the MOS transistor M1 is at a high level, triggering the open-circuit output circuit 340 to output a high level to the first output terminal 301; the voltage at the ground terminal of the second voltage divider circuit 320 is greater than the voltage at the input terminal, triggering the open-circuit output circuit 340 to output a low level to the second output terminal 302.

[0045] When the load 200 is open-circuited, the output of the first voltage divider circuit 310 is at a high level, and the drain of the MOS transistor M1 is at a low level, triggering the short-circuit output circuit 330 to output a low level to the first output terminal 301; the voltage at the input terminal and the voltage at the output terminal of the second voltage divider circuit 320 are equal, both being the supply voltage of the first power supply terminal VCC, triggering the open-circuit output circuit 340 to output a high level to the second output terminal 302.

[0046] As a preferred embodiment of the above, the first voltage divider circuit 310 includes: a first resistor R1 and a second resistor R2. One end of the first resistor R1 is connected to the first power supply terminal VCC, and the other end of the first resistor R1 is connected to one end of the second resistor R2 and one end of the short-circuit output circuit 330, respectively. The other end of the second resistor R2 is connected to the second power supply terminal VDD_DEV.

[0047] It should be noted that in the embodiments provided in this application, the first voltage divider circuit 310 formed by the first resistor R1 and the second resistor R2 can adjust the level of one end of the short-circuit output circuit 330, thereby adjusting the level of the first output terminal 301.

[0048] As a preferred embodiment of the above embodiment, the short-circuit output circuit 330 includes: a first transistor Q1, a third resistor R3, and a first diode D1. The base of the first transistor Q1 is connected to the other end of the first resistor R1, the emitter of the first transistor Q1 is grounded, the collector of the first transistor Q1 is connected to the gate of the MOSFET M1 and the cathode of the first diode D1, and the anode of the first diode D1 is connected to one end of the third resistor R3 and the first output terminal 301. The other end of the third resistor R3 is connected to the third power supply terminal VDD_IO.

[0049] It should be noted that in the embodiments provided in this application, the first voltage divider circuit 310 formed by the first resistor R1 and the second resistor R2 can adjust the level of the base of the first transistor Q1, and in combination with the level of the gate of the MOS transistor M1 and the level of the third resistor R3, the level of the first output terminal 301 can be adjusted.

[0050] As a preferred embodiment of the above, an eighth resistor R8 is provided between the base of the first transistor Q1 and the other end of the first resistor R1.

[0051] As a preferred embodiment of the above embodiment, a ninth resistor R9 is provided between the collector of the first transistor Q1 and the cathode of the first diode D1.

[0052] As a preferred embodiment of the above embodiment, a tenth resistor R10 is provided between the collector of the first transistor Q1 and the gate of the MOS transistor M1.

[0053] It should be noted that in the embodiments provided in this application, the eighth resistor R8, the ninth resistor R9, and the tenth resistor R10 serve as current limiting devices to ensure the normal operation of the circuit.

[0054] As a preferred embodiment of the above, the second voltage divider circuit 320 includes a fourth resistor R4 and a fifth resistor R5. One end of the fourth resistor R4 is connected to the second power supply terminal VDD_DEV, and the other end of the fourth resistor R4 is connected to one end of the fifth resistor R5 and the drain of the MOS transistor M1, respectively. The other end of the fifth resistor R5 is connected to one end of the open-circuit output circuit 340.

[0055] It should be noted that in the embodiments provided in this application, the second voltage divider circuit 320 formed by the fourth resistor R4 and the fifth resistor R5 can adjust the level of the open-circuit output circuit 340, thereby adjusting the level of the second output terminal 302.

[0056] As a preferred embodiment of the above, the open-circuit output circuit 340 includes: a second transistor Q2, a third transistor Q3, a sixth resistor R6, and a seventh resistor R7. The emitter of the second transistor Q2 is connected to the other end of the fifth resistor R5, the collector of the second transistor Q2 is grounded, the base of the second transistor Q2 is connected to the base of the third transistor Q3, the emitter of the third transistor Q3 is connected to the second power supply terminal VDD_DEV, the collector of the third transistor Q3 is connected to one end of the sixth resistor R6 and the cathode of the second diode D2, the other end of the sixth resistor R6 is grounded, the anode of the second diode D2 is connected to one end of the seventh resistor R7 and the second output terminal 302, and the other end of the seventh resistor R7 is connected to the third power supply terminal VDD_IO.

[0057] It should be noted that in the embodiments provided in this application, the second voltage divider circuit 320 formed by the fourth resistor R4 and the fifth resistor R5 can adjust the voltage level of the emitter of the second transistor Q2 and the emitter of the third transistor Q3, thereby adjusting the voltage level of the second output terminal 302. Combined with the voltage level of the seventh resistor R7, the voltage level of the second output terminal 302 is finally adjusted.

[0058] As a preferred embodiment of the above, the collector of the second transistor Q2 is grounded through the eleventh resistor R11.

[0059] As a preferred embodiment of the above, a twelfth resistor R12 is provided between the collector of the third transistor Q3 and the cathode of the second diode D2.

[0060] As a preferred embodiment of the above, the detection circuit 300 further includes a first capacitor, which is connected in parallel with the fourth resistor R4.

[0061] As a preferred embodiment of the above, the detection circuit 300 further includes a second capacitor, one end of which is connected to the second power supply terminal VDD_DEV, and the other end is grounded.

[0062] The working principle of this application is as follows:

[0063] In application, based on general application specifications, the circuit of this application meets the following conditions:

[0064] The supply voltage of the first power supply terminal VCC is equal to or greater than the supply voltage of the first power supply terminal VCC; the resistance values ​​of the fourth resistor R4 and the fifth resistor R5 are both a few ohms; the second transistor Q2 and the third transistor Q3 are PNP transistors of the same type.

[0065] like Figure 3 As shown, when load 200 is connected and working normally:

[0066] 1. The supply voltage at point A, pulled up by the first resistor R1 to the first power supply terminal VCC, is at a high level;

[0067] 2. Because point A is at a high level, MOSFET M1 is turned on, and point B is at a low level;

[0068] 3. Because point B is at a low level and MOSFET M1 is turned on, the level at point C is the supply voltage of the first power supply terminal VCC;

[0069] 4. Because there is a load of 200, the current flowing through the fourth resistor R4 is greater than the current flowing through the fifth resistor R5, and the voltage at point K is higher than the voltage at point M. Also, because the second transistor Q2 and the third transistor Q3 are the same type of PNP transistor with the same VCE parameter, the third transistor Q3 is not conducting.

[0070] 5. Because the third transistor Q3 is not conducting, point F is pulled down by the sixth resistor R6, and is at a low level;

[0071] 6. Because point F is at a low level, point J is pulled low by the second diode D2, and point J is at a low level.

[0072] 7. Because point B is at a low level, point H is pulled low by the first diode D1, so point H is at a low level.

[0073] When the load is 200 open circuit:

[0074] 1. The supply voltage at point A, pulled up by the first resistor R1 to the first power supply terminal VCC, is at a high level;

[0075] 2. Because point A is high, the first transistor Q1 is turned on, and point B is low;

[0076] 3. Because point B is low, MOSFET M1 is turned on, and the voltage level at point C is the supply voltage of the first power supply terminal VCC;

[0077] 4. Since there is no load of 200, the current flowing through the fourth resistor R4 is approximately the same as the current flowing through the fifth resistor R5. The voltage at point K and the voltage at point M are approximately the same, which is approximately the supply voltage of the first power supply terminal VCC. Furthermore, since the second transistor Q2 and the third transistor Q3 are the same type of PNP transistor with the same VCE parameter, the third transistor Q3 is conducting.

[0078] 5. Because the third transistor Q3 is turned on, the voltage level at point F is equal to the voltage level at point M, both of which are approximately the supply voltage of the first power supply terminal VCC;

[0079] 6. Because the voltage level at point F is approximately the supply voltage of the first power supply terminal VCC, point J is pulled up to the supply voltage of the third power supply terminal VDD_IO by the seventh resistor R7, so point J is at a high level.

[0080] 7. Because point B is at a low level, point H is pulled low by the first diode D1, so point H is at a low level.

[0081] When load 200 is short-circuited:

[0082] 1. Because the load 200 is short-circuited, the voltage at point N is 0V;

[0083] 2. Point A is subjected to voltage division by the first resistor R1 and the second resistor R2. Point A must meet the low-level requirement.

[0084] 3. Because point A is at a low level, the first transistor Q1 is not conducting, and point B is floating;

[0085] 4. Because point B is floating, MOSFET M1 is not conducting, and point C is pulled down to GND by the fourth resistor R4, so the voltage level at point C is GND.

[0086] 5. Because the load 200 is short-circuited, the current flowing through the fourth resistor R4 is greater than the current flowing through the fifth resistor R5, and the voltage at point K is higher than the voltage at point M. Also, because the second transistor Q2 and the third transistor Q3 are the same type of PNP transistor with the same VCE parameter, the third transistor Q3 is not conducting.

[0087] 6. Because the third transistor Q3 is not conducting, point F is pulled down by the sixth resistor R6, and is at a low level;

[0088] 7. Because point F is at a low level, point J is pulled low by the second diode D2, so point J is at a low level.

[0089] 8. Because point B is floating, point H is pulled up by R3 to the first power supply terminal VCC, so point H is high.

[0090] Furthermore, embodiments of the present invention provide a control method for an open / short circuit detection circuit, applied to the open / short circuit detection circuit described in any of the above embodiments, the method comprising the following steps:

[0091] In step S100, MCU100 detects the level output by the first output terminal 301 through the short-circuit detection pin SHORT_DET, and detects the level output by the second output terminal 302 through the open-circuit detection pin OPEN_DET.

[0092] Step S200: When a high level is detected by the short-circuit detection pin SHORT_DET at the output of the first output terminal 301, the load 200 is determined to be short-circuited; when a high level is detected by the open-circuit detection pin OPEN_DET at the output of the second output terminal 302, the load 200 is determined to be open-circuited.

[0093] Corresponding to the circuit embodiment described above, in this embodiment, the detection circuit 300 is configured to output a low level through the first output terminal 301 and a low level through the second output terminal 302 when the load 200 is normal; output a high level through the first output terminal 301 and a low level through the second output terminal 302 when the load 200 is open-circuited; and output a high level through both the first output terminal 301 and the second output terminal 302 when the load 200 is short-circuited. The MCU 100 is configured to detect the open-circuit detection pin OPEN_DET when the load 200 is open-circuited. When the first output terminal 301 outputs a low level and the second output terminal 302 outputs a low level, the load 200 is determined to be working normally; when the open-circuit detection pin OPEN_DET detects a high level output from the first output terminal 301 and a low level output from the second output terminal 302, the load 200 is determined to be open-circuited; when the open-circuit detection pin OPEN_DET detects a low level output from the first output terminal 301 and a high level output from the second output terminal 302, the load 200 is determined to be short-circuited.

[0094] The embodiments provided in this application do not require manual detection. By detecting the level output of the first output terminal 301 through the open-circuit detection pin OPEN_DET of the MCU100, it can be determined whether the load 200 is short-circuited; by detecting the level output of the second output terminal 302 through the short-circuit detection pin SHORT_DET of the MCU100, it can be determined whether the load 200 is open-circuited. By using the MCU100 to detect the level of the load 200, the open-circuit and open-circuit abnormal states of the load 200 can be quickly determined, improving the efficiency of open-circuit and open-circuit detection of the load 200.

[0095] The embodiments described in this invention are for the purpose of more clearly illustrating the technical solutions of the embodiments of this invention, and do not constitute a limitation on the technical solutions provided by the embodiments of this invention. As those skilled in the art will know, with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of this invention are also applicable to similar technical problems.

[0096] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of the present invention, and may include more or fewer steps than shown, or combine certain steps, or different steps.

[0097] The device embodiments described above are merely illustrative. The circuits described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network circuits. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0098] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / circuits in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0099] The terms "first," "second," "third," "fourth," etc. (if present) in the specification and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or circuits is not necessarily limited to those steps or circuits explicitly listed, but may include other steps or circuits not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0100] It should be understood that in this invention, "at least one (item)" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0101] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the circuit division described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple circuits or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, apparatus, or circuits, and may be electrical, mechanical, or other forms.

[0102] The circuits described above as separate components may or may not be physically separate. The components shown as circuits may or may not be physical circuits; that is, they may be located in one place or distributed across multiple network circuits. Some or all of the circuits can be selected to achieve the purpose of this embodiment according to actual needs.

[0103] Furthermore, the functional circuits in the various embodiments of the present invention can be integrated into a single processing circuit, or each circuit can exist physically separately, or two or more circuits can be integrated into a single circuit. The integrated circuits described above can be implemented in hardware or as software functional circuits.

[0104] The preferred embodiments of the present invention have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present invention. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and spirit of the present invention should be within the scope of the claims of the present invention. Although the description of the present invention has been quite detailed and particularly of several described embodiments, it is not intended to limit itself to any of these details or embodiments or any particular embodiment, but should be regarded as effectively covering the intended scope of the present invention by referring to the appended claims and considering the prior art to provide a broad possible interpretation of these claims. Furthermore, the present invention has been described above with respect to embodiments foreseeable by the inventors in order to provide a useful description, and non-substantial modifications to the present invention that have not yet been foreseen may still represent equivalent modifications to this disclosure.

Claims

1. An open / short detection circuit, characterized by comprising: The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load.

2. An open / short detection circuit according to claim 1, characterized in that, The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit for a load. The application relates to a short-circuit and open-circuit detection circuit 3. An open / short detection circuit according to claim 2, wherein The short circuit output circuit (330) comprises a first transistor (Q1), a third resistor (R3) and a first diode (D1), the base of the first transistor (Q1) is connected to the other end of the first resistor (R1), the emitter of the first transistor (Q1) is grounded, the collector of the first transistor (Q1) is connected to the gate of the MOS tube (M1) and the cathode of the first diode (D1) respectively, the anode of the first diode (D1) is connected to one end of the third resistor (R3) and the first output end (301) respectively; the other end of the third resistor (R3) is connected to the third power supply end (VDD_IO).

4. An open / short detection circuit according to claim 3, wherein An eighth resistor (R8) is arranged between the base of the first transistor (Q1) and the other end of the first resistor (R1), a ninth resistor (R9) is arranged between the collector of the first transistor (Q1) and the cathode of the first diode (D1), and a tenth resistor (R10) is arranged between the collector of the first transistor (Q1) and the gate of the MOS tube (M1).

5. An open / short detection circuit according to claim 1, wherein The second voltage dividing circuit (320) comprises a fourth resistor (R4) and a fifth resistor (R5), one end of the fourth resistor (R4) is connected to the second power supply end (VDD_DEV), the other end of the fourth resistor (R4) is connected to one end of the fifth resistor (R5) and the drain of the MOS tube (M1) respectively, and the other end of the fifth resistor (R5) is connected to one end of the open circuit output circuit (340).

6. An open / short detection circuit according to claim 5, wherein The open circuit output circuit (340) comprises a second transistor (Q2), a third transistor (Q3), a second diode (D2), a sixth resistor (R6) and a seventh resistor (R7), the emitter of the second transistor (Q2) is connected to the other end of the fifth resistor (R5), the collector of the second transistor (Q2) is grounded, the base of the second transistor (Q2) is connected to the base of the third transistor (Q3) and the collector of the second transistor (Q2), the emitter of the third transistor (Q3) is connected to the second power supply end (VDD_DEV), the collector of the third transistor (Q3) is connected to one end of the sixth resistor (R6) and the cathode of the second diode (D2) respectively, the other end of the sixth resistor (R6) is grounded, the anode of the second diode (D2) is connected to one end of the seventh resistor (R7) and the second output end (302) respectively, and the other end of the seventh resistor (R7) is connected to the third power supply end (VDD_IO).

7. An open / short detection circuit according to claim 6, wherein The collector of the second transistor (Q2) is grounded through an eleventh resistor (R11).

8. An open / short detection circuit according to claim 6, wherein A twelfth resistor (R12) is arranged between the collector of the third transistor (Q3) and the cathode of the second diode (D2).

9. A control method of an open / short circuit detection circuit, characterized by, The method applied to the open short circuit detection circuit in any one of claims 1 to 8 comprises the following steps: Step S100, the MCU (100) detects the level output by the first output end (301) through a short-circuit detection pin (SHORT_DET), and detects the level output by the second output end (302) through an open-circuit detection pin (OPEN_DET); Step S200, when detecting a high level output by the first output end (301) through the short-circuit detection pin (SHORT_DET), it is determined that the load (200) is short-circuited; when detecting a high level output by the second output end (302) through the open-circuit detection pin (OPEN_DET), it is determined that the load (200) is open-circuited.

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