Boot method, device and electronic equipment of basic input output system (BIOS)
By booting the BIOS from the CPU memory, the problem that the BIOS can only boot from memory is solved, enabling a more flexible boot method and improving boot efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- LOONGSON ZHONGKE (XIAN) TECH CO LTD
- Filing Date
- 2022-12-08
- Publication Date
- 2026-04-17
AI Technical Summary
In existing technologies, BIOS can only boot from memory, which greatly limits the boot method and cannot meet diverse boot requirements.
The BIOS boot file is moved to the CPU's memory via the bus between the CPU and the memory, and the BIOS is started in the CPU's memory. The execution area is determined by the CPU's memory structure type, and whether cache access is supported or not.
It reduces the limitations of BIOS boot methods, improves boot efficiency, and realizes a bus-based BIOS boot method.
Smart Images

Figure CN115729634B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of communication technology, and in particular to a boot method, apparatus, and electronic device for a Basic Input / Output System (BIOS). Background Technology
[0002] Currently, electronic devices are used more and more widely, and these devices often have a Basic Input Output System (BIOS). The BIOS sets various parameters of the system hardware and boots the operating system. Therefore, when an electronic device starts up, it is necessary to first boot the BIOS.
[0003] In current technology, the BIOS can only be booted from memory. This limits the boot method considerably. Summary of the Invention
[0004] In view of the above problems, embodiments of the present invention are proposed to provide a boot method for a basic input / output system BIOS that overcomes or at least partially solves the above problems, thereby reducing the limitations of the boot method.
[0005] Accordingly, embodiments of the present invention also provide a BIOS boot device, an electronic device, and a storage medium to ensure the implementation and application of the above methods.
[0006] To address the aforementioned problems, this invention discloses a method for booting a Basic Input / Output System (BIOS), applied to an electronic device. The electronic device includes a Central Processing Unit (CPU) and a memory for storing BIOS boot files, the CPU and the memory being connected via a bus. The method includes:
[0007] In response to a system startup command, the execution region of the BIOS migration code file is determined based on the CPU's storage structure type; the storage structure type is used to characterize whether the CPU supports cached access to the bus space of the bus.
[0008] The BIOS migration code file is executed in the execution area to move the BIOS boot file stored in the memory to the CPU's memory via the bus;
[0009] The BIOS of the electronic device is started in the CPU's memory based on the BIOS boot file.
[0010] This invention also discloses a BIOS boot device applied to an electronic device, the electronic device including a central processing unit (CPU) and a memory for storing BIOS boot files, the CPU and the memory being connected via a bus; the device includes:
[0011] The first determining module is used to determine the execution area of the BIOS migration code file according to the storage structure type of the CPU in response to the system startup command; the storage structure type is used to characterize whether the CPU supports cached access to the bus space of the bus;
[0012] An execution module is configured to execute the BIOS migration code file in the execution area to migrate the BIOS boot file stored in the memory to the CPU's memory via the bus;
[0013] A boot module is used to boot the BIOS of the electronic device from the memory of the CPU based on the BIOS boot file.
[0014] This invention also discloses an electronic device including a processor;
[0015] BIOS boot file storage; and
[0016] The program memory stores a program that, when executed by the processor, causes the processor to perform the following operations: in response to a system startup instruction, determining the execution region of the BIOS migration code file based on the processor's storage structure type; the storage structure type characterizes whether the processor supports cached access to the bus space of the bus;
[0017] The BIOS migration code file is executed in the execution area to migrate the BIOS boot file stored in the BIOS boot file memory to the processor's memory via the bus;
[0018] The BIOS of the electronic device is started in the processor's memory based on the BIOS boot file.
[0019] This invention also discloses a readable storage medium, wherein when the instructions in the storage medium are executed by a processor of an electronic device, the electronic device is able to perform one or more of the methods described in this invention.
[0020] The embodiments of the present invention have the following advantages:
[0021] In this embodiment of the invention, in response to a system boot command, the execution region of the BIOS migration code file is determined according to the CPU's storage structure type; the storage structure type is used to characterize whether the CPU supports cached access to the bus space. The BIOS migration code file is executed in the execution region to migrate the BIOS boot file stored in memory to the CPU's memory via the bus. The BIOS of the electronic device is then started in the CPU's memory based on the BIOS boot file. In this embodiment of the invention, based on the bus between the CPU and memory and the BIOS migration code file, the BIOS boot file in memory is migrated to the CPU's memory, and the BIOS of the electronic device is started in the CPU's memory. This achieves a method for starting the BIOS based on the bus, allowing the BIOS to be booted from a location other than its stored location, thereby reducing the limitations of the boot method to some extent.
[0022] Meanwhile, by moving and copying the BIOS boot files to the CPU's memory and booting from the CPU's memory, the BIOS boot efficiency can be improved to some extent. Attached Figure Description
[0023] Figure 1 This is a flowchart illustrating the steps of an embodiment of a BIOS boot method according to the present invention;
[0024] Figure 2 This is a hardware connection diagram shown in an embodiment of the present invention;
[0025] Figure 3 This is a schematic diagram of a processing flow provided in an embodiment of the present invention;
[0026] Figure 4 This is a structural block diagram of an embodiment of a BIOS boot device according to the present invention;
[0027] Figure 5 This is a structural block diagram of an electronic device for BIOS boot according to an exemplary embodiment. Detailed Implementation
[0028] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0029] One of the core concepts of this invention is that, based on the bus between the Central Processing Unit (CPU) and memory, and the BIOS migration code file, the BIOS boot file is moved from memory to the CPU's memory, and the BIOS of the electronic device is then booted from the CPU's memory. This achieves a bus-based BIOS boot method, allowing the BIOS to boot from a location other than its stored location, thus reducing the limitations of boot methods to some extent. Simultaneously, by moving and copying the BIOS boot file to the CPU's memory and booting from there, BIOS boot efficiency can be improved to some extent.
[0030] Reference Figure 1 This document illustrates a flowchart of an embodiment of a BIOS boot method according to the present invention. This method can be applied to an electronic device, which includes a CPU and a memory for storing BIOS boot files. The CPU and the memory are connected via a bus. Specifically, the method may include the following steps:
[0031] Step 101: In response to the system startup command, determine the execution area of the BIOS migration code file according to the storage structure type of the CPU; the storage structure type is used to characterize whether the CPU supports cached access to the bus space of the bus.
[0032] In this embodiment of the invention, the aforementioned memory can be flash memory, and the aforementioned bus is a high-speed serial computer expansion bus (Peripheral Component Interconnect, PCI) or a high-speed serial computer expansion bus (Peripheral Component Interconnect Express, PCIE). The aforementioned CPU can refer to the main CPU in an electronic device.
[0033] A system boot command can be used to instruct the BIOS in an electronic device to start. For example, this system boot command can be generated during the initial power-on phase to first start the BIOS in the electronic device. The BIOS relocation code file can be a pre-configured code file that moves the BIOS boot file from memory to the CPU's memory. By running the BIOS relocation code file, the BIOS boot file in memory can be copied to the CPU's memory. The BIOS boot file can be a pre-configured file for starting the BIOS; essentially, it can be a program, that is, a set of code files. Specifically, the BIOS boot file can be the BIOS system file itself.
[0034] Furthermore, the storage structure type can be used to characterize whether the CPU supports cached access to the bus space. The bus space can refer to the space allocated to the bus by the CPU, while the execution region refers to the region used to execute the BIOS migration code file.
[0035] Optionally, in one implementation, the step of determining the execution region of the BIOS relocation code file based on the CPU's memory structure type may specifically include the following steps:
[0036] Step 1011: If the storage structure type indicates that the CPU supports cached access to the bus space of the bus, the cache is determined as the execution region.
[0037] Step 1012: If the storage structure type indicates that the CPU does not support cached access to the bus space of the bus, the memory of the CPU is determined as the execution region.
[0038] In real-world applications, the CPUs used in electronic devices may differ. Some CPUs include a cache in their memory architecture, specifically a cache memory located between the CPU registers and main memory. The main memory can be the CPU's RAM as mentioned above. For example, some CPUs use a memory architecture that includes registers, a cache for a specific region, and main memory. Other CPUs, however, do not include a cache for a particular region, thus preventing cached access. Memory architecture types can be categorized into those with and without cache. A memory architecture with a cache indicates that the CPU supports cached access to the bus space, while a memory architecture without a cache indicates that the CPU does not support cached access to the bus space.
[0039] In this embodiment of the invention, the models of CPUs whose storage structures include memory cache can be collected in advance; that is, the models of CPUs that support cached access to the bus space. The model of the CPU used in the current electronic device is obtained, for example, by reading the parameter information of the CPU in the current electronic device to obtain the CPU model. Then, the obtained model is compared with the pre-collected CPU models. If a match is found, it is determined that the CPU's storage structure includes memory cache, and the CPU's storage structure type supports cached access to the bus space. Conversely, it is determined that the CPU's storage structure does not include memory cache, and the CPU's storage structure type does not support cached access to the bus space.
[0040] Accordingly, when the CPU supports cached access to the bus space and the cache is designated as the execution region, the BIOS migration code file can be prefetched from a specified region into the cache based on the bus space. The specified region is the area storing the BIOS migration code. In this embodiment of the invention, the cache is designated as the execution region when the storage structure type indicates that the CPU supports cached access to the bus space. When the storage structure type indicates that the CPU does not support cached access to the bus space, the CPU's memory is designated as the execution region. Since programs run faster in the cache, the running efficiency of the BIOS migration code can be improved to some extent, thereby improving the BIOS boot speed.
[0041] Step 102: Execute the BIOS migration code file in the execution area to migrate the BIOS boot file stored in the memory to the CPU's memory via the bus.
[0042] In this embodiment of the invention, the execution area can be jumped to execute the BIOS relocation code file. Accordingly, by executing the BIOS relocation code file, the BIOS boot file stored in the memory can be moved to the CPU's memory. Since the memory and CPU are connected via a PCI / PCIe bus, the moved BIOS boot file can reach the CPU's memory via the PCI / PCIe bus. For example, the BIOS relocation code file can first move the BIOS boot file to the CPU's memory via the PCI / PCIe bus.
[0043] Step 103: Start the BIOS of the electronic device in the memory of the CPU based on the BIOS boot file.
[0044] For example, a BIOS boot file can be run, thereby enabling the BIOS to boot from the CPU's memory.
[0045] In summary, the BIOS boot method provided by this invention, in response to a system boot command, determines the execution region of the BIOS migration code file based on the CPU's memory structure type; the memory structure type characterizes whether the CPU supports cached access to the bus space. The BIOS migration code file is executed in the execution region to move the BIOS boot file stored in memory to the CPU's memory via the bus. The BIOS of the electronic device is then booted from the CPU's memory based on the BIOS boot file. In this invention, based on the bus between the CPU and memory and the BIOS migration code file, the BIOS boot file in memory is moved to the CPU's memory, and the BIOS of the electronic device is booted from the CPU's memory. This achieves a bus-based BIOS boot method, allowing the BIOS to boot beyond its stored location, thus reducing the limitations of boot methods to some extent.
[0046] Meanwhile, by moving and copying the BIOS boot files to the CPU's memory and booting from the CPU's memory, the BIOS boot efficiency can be improved to some extent.
[0047] Optionally, in this embodiment of the invention, the electronic device may further include an intermediate device, which is connected to the CPU and the memory respectively via the bus; that is, the CPU and the intermediate device are linked via a PCI / PCIe bus, and the intermediate device and the memory are linked via a PCI / PCIe bus. Accordingly, before the step of determining the execution area of the BIOS relocation code file based on the CPU's memory structure type, this embodiment of the invention may first perform the following steps:
[0048] Step 201: If it is determined that the intermediate device includes a CPU, then pause the CPU included in the intermediate device.
[0049] The CPU included in the intermediate device can be a bridge chip with a CPU core. The intermediate device can be a bridge chip or other devices, such as a Field Programmable Gate Array (FPGA) or a Complex Programmable Logic Device (CPLD). Figure 2 This is a hardware connection diagram illustrating an embodiment of the present invention, such as... Figure 2 As shown, the CPU of the electronic device can be linked to an intermediate device via a PCI / PCIE bus, and memory can be connected to the intermediate device. The memory can also be mounted on the intermediate device; for example, the memory can be a flash memory mounted on a bridge chip. Figure 2The processor hardware connection method shown in the figure can support the method of booting BIOS based on PCI / PCIE bus in the embodiments of the present invention.
[0050] Specifically, during the CPU initialization phase, a disable instruction can be sent to the CPU included in the intermediate device to pause the CPU included in the intermediate device.
[0051] Since some intermediate devices have their own CPUs, in this embodiment of the invention, when an intermediate device includes a CPU, the CPU included in the intermediate device can be paused to avoid conflict between the CPU included in the intermediate device and the CPU of the electronic device. For example, if both access the memory at the same time and fetch instructions from the memory at the same time, a conflict may occur, thereby ensuring that subsequent operations can proceed normally.
[0052] Accordingly, during the operation of the aforementioned CPU, the CPUs included in the intermediate devices can be kept inactive to minimize conflicts.
[0053] Optionally, in this embodiment of the invention, before performing step 201 above, it may be determined whether the intermediate device includes a CPU through the following steps. That is, determining that the intermediate device includes a CPU may include:
[0054] Step 301: Obtain the device type of the intermediate device.
[0055] Specifically, the type parameter used to characterize the intermediate device can be obtained from the parameter data of the intermediate device. Based on the preset correspondence between device types and type parameters, the device type corresponding to the obtained type parameter is found, thereby obtaining the device type of the intermediate device.
[0056] Step 302: If the device type is the first specified type, determine that the intermediate device includes a CPU.
[0057] The first specified type is a device type that supports including a CPU. The first specified type can be a pre-collected list of device types that support including a CPU. For example, a bridge chip can include a CPU, i.e., the bridge chip supports including a CPU, while an FPGA cannot include a CPU, i.e., the FPGA does not support including a CPU. Accordingly, the first specified type can include bridge chips but not FPGAs. In this embodiment of the invention, a device type that can include a CPU is used as the first specified type.
[0058] To enrich the functionality of electronic devices, those that support CPUs are often equipped with CPU-enabled devices. Therefore, in this embodiment of the invention, if the device type is a first specified type, it can be determined that the intermediate device includes a CPU, thereby improving efficiency to some extent. Conversely, if the device type is not the first specified type, it can be determined that the intermediate device does not include a CPU.
[0059] It should be noted that, in this embodiment of the invention, if the device type is a first specified type, the configuration information of the intermediate device can be further detected. If the configuration information of the intermediate device indicates that a CPU is configured in the intermediate device, then it can be determined that the intermediate device includes a CPU, thereby ensuring the accuracy of the determination operation. Furthermore, by first determining whether the device type is the first specified type, and only proceeding with further detection if the device type is the first specified type, unnecessary detection of devices that do not support including a CPU can be avoided, thereby saving processing resources to a certain extent.
[0060] Optionally, the following steps may also be performed in embodiments of the present invention:
[0061] Step 401: When the device type of the intermediate device is the second specified type, after the BIOS boot file stored in the memory is moved to the CPU's memory via the bus, the intermediate device is initialized; wherein, the initialization of the intermediate device of the second specified type includes an address update operation on the memory.
[0062] In this embodiment of the invention, the execution order of the initialization operation of the intermediate device can be adjusted to after the step of moving the BIOS boot file stored in the memory to the CPU's memory via the bus. The second specified type can be pre-set; specifically, the device types that update the memory address during the initialization phase can be pre-collected. For example, if the memory address is updated during the initialization phase of a certain device, then that device type can be the second specified type. The second specified type may have the same device type as the first specified type. For example, the first specified type may include a bridge chip.
[0063] Specifically, an initialization disable instruction can be issued to the intermediate device. Correspondingly, after the step of moving the BIOS boot file stored in the memory to the CPU's memory via the bus is executed, an initialization enable instruction can be issued to the intermediate device so that the execution order of the intermediate device's initialization operation is adjusted to after the BIOS boot file is moved to memory, thereby allowing the intermediate device to perform the initialization operation after the BIOS boot file is moved to memory.
[0064] For example, when the intermediate device is a bridge chip, the window needs to be reconfigured for the bridge chip, that is, the memory needs to be reallocated and the bridge chip initialized. If the execution order of the initialization operations is not adjusted, the initialization operation of the bridge chip will cause the memory address to change, resulting in a change in the address of the data in memory, which in turn will prevent the CPU from addressing the data in memory correctly and thus prevent it from accessing the data in memory. Of course, if the intermediate device is a device that does not update the memory address during initialization, such as an FPGA, then the order can be not adjusted and the initialization operation of the intermediate device can be performed normally.
[0065] In this embodiment of the invention, when the initialization of intermediate devices updates the memory address, the execution order of the initialization operations of the intermediate devices is adjusted. The intermediate devices are initialized only after the BIOS boot file stored in memory has been moved to the CPU's memory via the bus. This avoids the memory address changing before the BIOS boot file is moved to the CPU's memory, thus preventing the inability to boot the BIOS from the CPU due to the inability to obtain the BIOS boot file.
[0066] Optionally, in this embodiment of the invention, the BIOS migration code file can be pre-stored in the memory where the BIOS file is stored. Of course, in practical applications, it can also be stored in other locations, such as other memory, and this embodiment of the invention does not impose any limitations on this. Taking the example of the BIOS migration code file being pre-stored in the memory where the BIOS file is stored, if the storage structure type indicates that the CPU does not support cached access to the bus space where the BIOS boot file is stored in the memory, and the execution area is memory, this embodiment of the invention can also perform the following steps:
[0067] Step 501: Copy the entry function code, the BIOS migration code file, and the exception output code from the memory to the memory. Accordingly, the system can jump to the memory to run the BIOS migration code file.
[0068] Accordingly, the step of executing the BIOS migration code file based on the execution region may specifically include: executing the entry function code in the memory to call and run the BIOS migration code file.
[0069] The entry function code can be C entry function code, which can define calling logic. Accordingly, by executing the entry function code, the BIOS migration code file can be called, and then the BIOS migration code file can be run, so that the BIOS boot file can be transferred from the bridge chip's flash to the CPU's memory through the PCI / PCIE bus.
[0070] In this way, execution can start directly from the entry function code, thus executing the BIOS relocation code file and ensuring the execution effect to a certain extent.
[0071] Furthermore, in this embodiment of the invention, the following operation can also be performed: when an error occurs during operation, output exception information based on the exception output code. The exception output code can be an exception printing code, which can be used to locate and output the location information of the fault. If the BIOS migration code fails to run, the exception output code can be further executed to obtain the location information of the fault as exception information and output it. Since the BIOS migration code file is copied into memory for execution, in this embodiment of the invention, by further copying the exception output code into memory, exception information can be easily obtained in the event of an error, thereby facilitating fault location.
[0072] Furthermore, when the execution region is the CPU cache, the step of executing the BIOS migration code file based on the execution region may specifically include: retrieving the BIOS migration code file from the memory based on the cache, and executing the retrieved BIOS migration code file.
[0073] The BIOS migration code file can include multiple instructions, each corresponding to an independently executable portion of the BIOS migration code file. Migration is achieved by executing these instructions. In this embodiment, the CPU cache can be initialized first. Then, the instructions corresponding to the BIOS migration code file are fetched from the CPU cache and executed. For the cache access mechanism, if the instructions are not present in the cache, a portion of the instructions will be fetched from memory and executed. Correspondingly, the remaining portions will be written to the cache, allowing subsequent direct access to the cache for execution, thus ensuring processing speed. It should be noted that in practical applications, the instructions constituting the entry function code can be fetched first, and the instructions from the BIOS migration code file to be called can be fetched during execution. This embodiment does not impose such limitations. It should also be noted that, in cases where the CPU supports cache access to the bus space, in one implementation, since the CPU and memory are connected via a PCI / PCIE bus, instructions can be prefetched into the cache through the PCI / PCIE bus space when fetching instructions from the cache. For example, instructions are first fetched from a designated area storing the BIOS migration code into the bus space via the PCI / PCIe bus, and then fetched from the bus space into the cache. It should be noted that in practical applications, the BIOS migration code file can also be pre-stored in the cache so that it can be executed directly from the cache.
[0074] Figure 3This is a schematic diagram of a processing flow provided by an embodiment of the present invention, such as... Figure 3 As shown, if the bridge chip includes a CPU, the CPU included in the bridge chip is paused. Conversely, if it does not include a CPU, subsequent operations can be performed directly. Specifically, after power-on, it can be detected whether the bridge chip includes a CPU. Further, if the main CPU of the electronic device supports cache access, it jumps to the cache and executes the BIOS migration code file. If the main CPU of the electronic device does not support cache access, the BIOS migration code file is copied to memory, and it jumps to memory to execute the BIOS migration code file. Here, the main CPU supporting cache access can specifically mean that the main CPU supports cache access to the bus space, that is, the main CPU's cache supports access to the bus space. Next, the BIOS boot file is moved to the CPU's memory, and the BIOS is started based on the BIOS boot file. And the bridge chip initialization operation is only performed after the BIOS boot file is moved to the CPU's memory. Of course, the bridge chip initialization operation can also be performed after the BIOS is successfully started based on the BIOS boot file, and this embodiment of the invention does not limit this.
[0075] Currently, BIOS boot files are often stored in NOR or NAND flash memory, and can only boot from such memory. In this invention, the CPU of the electronic device supports booting the BIOS via PCI / PCIe. The proposed method for booting the BIOS from the CPU via PCI / PCIe overcomes the limitation that the BIOS can only boot from NOR or NAND flash memory, providing a new option for hardware construction. Furthermore, different processing is applied to intermediate devices according to actual conditions to ensure normal BIOS boot, thereby guiding the operating system to boot normally.
[0076] It should be noted that, for the sake of simplicity, the method embodiments are all described as a series of actions. However, those skilled in the art should understand that the embodiments of the present invention are not limited to the described order of actions, because according to the embodiments of the present invention, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions involved are not necessarily essential to the embodiments of the present invention.
[0077] Reference Figure 4 This diagram illustrates a structural block diagram of an embodiment of a BIOS boot device according to the present invention, applied to an electronic device. The electronic device includes a central processing unit (CPU) and a memory for storing BIOS boot files, the CPU and the memory being connected via a bus; specifically, it may include the following modules:
[0078] The first determining module 21 is used to determine the execution area of the BIOS migration code file according to the storage structure type of the CPU in response to the system startup command; the storage structure type is used to characterize whether the CPU supports cached access to the bus space of the bus;
[0079] Execution module 22 is used to execute the BIOS migration code file in the execution area to migrate the BIOS boot file stored in the memory to the CPU's memory via the bus;
[0080] The boot module 23 is used to boot the BIOS of the electronic device from the memory of the CPU based on the BIOS boot file.
[0081] Optionally, the electronic device further includes an intermediate device, which is connected to the CPU and the memory respectively via the bus;
[0082] The device further includes:
[0083] A pause module is used to pause the CPU included in the intermediate device when it is determined that the intermediate device includes a CPU.
[0084] Optionally, the device further includes:
[0085] An acquisition module is used to acquire the device type of the intermediate device;
[0086] The second determining module is used to determine that the intermediate device includes a CPU when the device type is a first specified type.
[0087] Optionally, the device further includes:
[0088] An initialization module is used to initialize the intermediate device after the BIOS boot file stored in the memory is moved to the CPU's memory via the bus, when the device type of the intermediate device is a second specified type.
[0089] The initialization of the intermediate device of the second specified type includes an address update operation on the memory.
[0090] Optionally, the first determining module 21 is specifically used for:
[0091] When the storage structure type indicates that the CPU supports cached access to the bus space of the bus, the cache is identified as the execution region;
[0092] When the storage structure type indicates that the CPU does not support cached access to the bus space of the bus, the CPU's memory is determined as the execution region.
[0093] Optionally, if the execution region is the memory, the apparatus further includes:
[0094] The copy module is used to copy the entry function code, the BIOS migration code file, and the exception output code from the memory to the memory.
[0095] The execution module is specifically used for:
[0096] The entry function code is executed in the memory to call and run the BIOS migration code file;
[0097] The device further includes an output module, used to output exception information based on the exception output code when an error occurs during operation.
[0098] As the device embodiment is basically similar to the method embodiment, the description is relatively simple, and relevant parts can be found in the description of the method embodiment.
[0099] Figure 5 This is a structural block diagram illustrating an electronic device for BIOS boot according to an exemplary embodiment. For example, the electronic device 400 may be a mobile phone, computer, digital broadcasting terminal, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, etc.
[0100] Reference Figure 5 The electronic device 400 may include one or more of the following components: processing component 402, program memory 404, power supply component 406, multimedia component 408, audio component 410, input / output (I / O) interface 412, sensor component 414, communication component 416, and BIOS boot file memory 418.
[0101] Processing component 402 typically controls the overall operation of electronic device 400, such as operations associated with display, telephone calls, data communication, camera operation, and recording. Processing component 402 may include one or more processors 420 to execute instructions to complete all or part of the steps of the methods described above. Furthermore, processing component 402 may include one or more modules to facilitate interaction between processing component 402 and other components. For example, processing component 402 may include a multimedia module to facilitate interaction between multimedia component 408 and processing component 402.
[0102] Program memory 404 is configured to store various types of data to support the operation of device 400. Examples of this data include instructions for any application or method operating on electronic device 400, contact data, phonebook data, messages, pictures, videos, etc. Program memory 404 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, disk, or optical disk. BIOS boot file memory 418 may store BIOS boot files. When the program in program memory 404 is executed by processing component 402, processing component 402 causes the following operations:
[0103] In response to a system startup command, the execution area of the BIOS migration code file is determined based on the storage structure type of the processor 420 in the processing component 402; the storage structure type is used to characterize whether the processor 420 supports cached access to the bus space of the bus;
[0104] The BIOS migration code file is executed in the execution area to migrate the BIOS boot file stored in the BIOS boot file memory 418 to the memory of the processor 420 via the bus;
[0105] The BIOS of the electronic device is started in the memory of the processor 420 based on the BIOS boot file.
[0106] Power supply component 406 provides power to various components of electronic device 400. Power supply component 406 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 400.
[0107] Multimedia component 408 includes a screen that provides an output interface between the electronic device 400 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of the touch or swipe action but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 408 includes a front-facing camera and / or a rear-facing camera. When the electronic device 400 is in an operating mode, such as a shooting mode or a video mode, the front-facing camera and / or the rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.
[0108] Audio component 410 is configured to output and / or input audio signals. For example, audio component 410 includes a microphone (MIC) configured to receive external audio signals when electronic device 400 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 404 or transmitted via communication component 416. In some embodiments, audio component 410 also includes a speaker for outputting audio signals.
[0109] I / O interface 412 provides an interface between processing component 402 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.
[0110] Sensor assembly 414 includes one or more sensors for providing state assessments of various aspects of electronic device 400. For example, sensor assembly 414 may detect the on / off state of device 400, the relative positioning of components such as the display and keypad of electronic device 400, changes in position of electronic device 400 or a component of electronic device 400, the presence or absence of user contact with electronic device 400, orientation or acceleration / deceleration of electronic device 400, and temperature changes of electronic device 400. Sensor assembly 414 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 414 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 414 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor.
[0111] Communication component 416 is configured to facilitate wired or wireless communication between electronic device 400 and other devices. Electronic device 400 can access wireless networks based on communication standards, such as WiFi, 2G, or 3G, or combinations thereof. In one exemplary embodiment, communication component 414 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 414 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.
[0112] In an exemplary embodiment, the electronic device 400 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the methods described above.
[0113] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 404 including instructions, which can be executed by a processor 420 of an electronic device 400 to perform the above-described method. For example, the non-transitory computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.
[0114] A non-transitory computer-readable storage medium, when instructions in the storage medium are executed by a terminal's processor, enables the terminal to execute a method for launching an application, the method comprising: in response to a system startup instruction, determining an execution region for a BIOS migration code file based on the CPU's storage structure type; the storage structure type being used to characterize whether the CPU supports cached access to the bus space of the bus;
[0115] The BIOS migration code file is executed in the execution area to move the BIOS boot file stored in the memory to the CPU's memory via the bus;
[0116] The BIOS of the electronic device is started in the CPU's memory based on the BIOS boot file. The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.
[0117] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, apparatus, or computer program products. Therefore, embodiments of the present invention can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of the present invention can take the form of computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0118] Embodiments of the present invention are described with reference to flowchart illustrations and / or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0119] These computer program instructions may also be stored in a computer-readable storage medium capable of directing a computer or other programmable data processing terminal device to operate in a predictive manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0120] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal equipment, causing a series of operational steps to be performed on the computer or other programmable terminal equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable terminal equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0121] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present invention.
[0122] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.
[0123] The present invention has provided a detailed description of a BIOS boot method and apparatus, an electronic device, and a storage medium. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.
Claims
1. A method of starting a basic input / output system (BIOS), characterized by, Applied to an electronic device, the electronic device including a central processing unit (CPU) and a memory for storing BIOS boot files, the CPU and the memory being connected via a bus; the method includes: In response to a system startup command, the execution region of the BIOS migration code file is determined based on the CPU's storage structure type; the storage structure type is used to characterize whether the CPU supports cached access to the bus space of the bus. The BIOS migration code file is executed in the execution area to move the BIOS boot file stored in the memory to the CPU's memory via the bus; The BIOS of the electronic device is started in the CPU's memory based on the BIOS boot file; Wherein, if the storage structure type indicates that the CPU supports cached access to the bus space of the bus, the cache is determined as the execution region; if the storage structure type indicates that the CPU does not support cached access to the bus space of the bus, the CPU's memory is determined as the execution region. When the execution region is the cache, for the cache access mechanism, if the instruction does not exist in the cache, a portion of the instruction is fetched from the memory and executed. Correspondingly, the remaining instruction portions are written into the cache so that the cache can be directly accessed for execution later.
2. The method according to claim 1, characterized in that, The electronic device further includes an intermediate device, which is connected to the CPU and the memory respectively via the bus; Before determining the execution region of the BIOS relocation code file based on the CPU's storage structure type, the method further includes: If it is determined that the intermediate device includes a CPU, the CPU included in the intermediate device is paused.
3. The method according to claim 2, characterized in that, Determining that the intermediate device includes a CPU includes: Obtain the device type of the intermediate device; If the device type is a first specified type, it is determined that the intermediate device includes a CPU.
4. The method according to claim 2 or 3, characterized in that, The method further includes: When the device type of the intermediate device is the second specified type, the intermediate device is initialized after the BIOS boot file stored in the memory is moved to the CPU's memory via the bus; The initialization of the intermediate device of the second specified type includes an address update operation on the memory.
5. The method according to claim 1, characterized in that, When the execution region is the memory, the method further includes: Copy the entry function code, the BIOS migration code file, and the exception output code from the memory to the memory. The execution of the BIOS migration code file in the execution region includes: The entry function code is executed in the memory to call and run the BIOS migration code file; The method further includes: when an error occurs during operation, outputting exception information based on the exception output code.
6. A BIOS boot device, characterized in that, Applied to an electronic device, the electronic device includes a central processing unit (CPU) and a memory for storing BIOS boot files, the CPU and the memory being connected via a bus; the device includes: The first determining module is used to determine the execution area of the BIOS relocation code file according to the storage structure type of the CPU in response to the system startup command; the storage structure type is used to characterize whether the CPU supports cached access to the bus space of the bus; An execution module is configured to execute the BIOS migration code file in the execution area to migrate the BIOS boot file stored in the memory to the CPU's memory via the bus; A boot module, used to boot the BIOS of the electronic device from the memory of the CPU based on the BIOS boot file; Wherein, the first determining module is further configured to determine the cache as the execution region when the storage structure type indicates that the CPU supports cache access to the bus space of the bus; and to determine the CPU's memory as the execution region when the storage structure type indicates that the CPU does not support cache access to the bus space of the bus. The execution module is further configured to, when the execution region is the cache, for the cache access mechanism, if the instruction does not exist in the cache, first fetch a portion of the instructions from the memory and execute them, and correspondingly write the remaining instruction portions into the cache so that the cache can be directly accessed for execution later.
7. The apparatus according to claim 6, characterized in that, The electronic device further includes an intermediate device, which is connected to the CPU and the memory respectively via the bus; The device further includes: A pause module is used to pause the CPU included in the intermediate device when it is determined that the intermediate device includes a CPU.
8. The apparatus according to claim 7, characterized in that, The device further includes: An acquisition module is used to acquire the device type of the intermediate device; The second determining module is used to determine that the intermediate device includes a CPU when the device type is a first specified type.
9. The apparatus according to claim 7, characterized in that, The device further includes: An initialization module is used to initialize the intermediate device after the BIOS boot file stored in the memory is moved to the CPU's memory via the bus, when the device type of the intermediate device is a second specified type. The initialization of the intermediate device of the second specified type includes an address update operation on the memory.
10. The apparatus according to claim 6, characterized in that, When the execution region is the memory, the apparatus further includes: The copy module is used to copy the entry function code, the BIOS migration code file, and the exception output code from the memory to the memory. The execution module is specifically used for: The entry function code is executed in the memory to call and run the BIOS migration code file; The device further includes an output module, used to output exception information based on the exception output code when an error occurs during operation.
11. An electronic device, characterized in that, include: Central Processing Unit (CPU); The BIOS boot file storage is connected to the CPU via a bus. as well as Program memory stores programs that, when executed by the CPU, cause the CPU to perform the following operations: In response to a system startup command, the execution region of the BIOS migration code file is determined based on the CPU's storage structure type; the storage structure type is used to characterize whether the CPU supports cached access to the bus space of the bus. The BIOS migration code file is executed in the execution area to move the BIOS boot file stored in the BIOS boot file memory to the CPU's memory via the bus; The BIOS of the electronic device is started in the CPU's memory based on the BIOS boot file; Wherein, if the storage structure type indicates that the CPU supports cached access to the bus space of the bus, the cache is determined as the execution region; if the storage structure type indicates that the CPU does not support cached access to the bus space of the bus, the CPU's memory is determined as the execution region. When the execution region is the cache, for the cache access mechanism, if the instruction does not exist in the cache, a portion of the instruction is fetched from the memory and executed. Correspondingly, the remaining instruction portions are written into the cache so that the cache can be directly accessed for execution later.
12. A readable storage medium, characterized in that, When the instructions in the storage medium are executed by the processor of the electronic device, the electronic device is able to perform the method as described in any one of claims 1-5.
Citation Information
Patent Citations
System initialization method and device and electronic equipment
CN114546507A