Process for improving the thickness of epitaxial Si-nodules and crowns on a silicon wafer
By optimizing steps such as silicon wafer cutting, chamfering, grinding, acid etching, and polishing, and combining these with chemical vapor deposition to form polycrystalline silicon and silicon dioxide films, the problems of Si-Nodule and Crown in the thick epitaxy process of heavily doped silicon wafers were solved, thus improving the epitaxial quality.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-10-31
- Publication Date
- 2026-04-07
AI Technical Summary
In existing technologies, during the thick epitaxial process of heavily doped silicon wafers, Si-Nodule and Crown problems are prone to occur at the back edge of the silicon wafer, affecting the epitaxial quality.
By improving the steps of silicon wafer cutting, chamfering, grinding, acid etching, and polishing, the edge structure of the silicon wafer is optimized. Combined with chemical vapor deposition to form polycrystalline silicon film and silicon dioxide film, self-doping is prevented, and edge parameters are adjusted to reduce crown formation.
It effectively improves the problems of Si-Nodule and Crown in the thick epitaxy process of silicon wafers, is easy to operate and has significant effects, and improves the epitaxial quality.
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Figure CN115732312B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of silicon wafer production and processing, and particularly relates to a process method for improving Si-Nodule and Crown of thick epitaxial silicon wafer. BACKGROUND
[0002] For heavily doped silicon wafers, the back surface of the silicon wafer needs to be treated, generally growing a polysilicon film or a silicon dioxide film on the back surface, or a combination of the two, the purpose being to prevent self-doping of the heavily doped silicon wafer in the silicon epitaxial process. Si-Nodule is a silicon nodule particle, and Crown is an edge rising object.
[0003] For a process of growing thick epitaxial layers (epitaxial thickness > 65 μm), improper edge treatment can affect the edge quality after epitaxy. Currently, two problems occur in the process of thick epitaxial processing of a heavily doped antimony product: 1. Si-Nodule appears on the back surface edge; and 2. Crown occurs on the back surface edge. SUMMARY
[0004] The present application mainly solves the problems in the prior art, and provides a process method for improving Si-Nodule and Crown of thick epitaxial silicon wafer, which has the characteristics of simple operation and good effect. The problems of Si-Nodule and Crown caused by the thick epitaxial growth of the silicon wafer are solved.
[0005] The above technical problems of the present application are mainly solved by the following technical scheme:
[0006] A process method for improving Si-Nodule and Crown of thick epitaxial silicon wafer, comprising the following operation steps:
[0007] First step: wire cutting, the wafer thickness is 835 μm, and a TOYO450E wire cutting machine is used for cutting.
[0008] Second step: first chamfering, the edge of the silicon wafer is processed into a circular arc shape (R-Type) through first chamfering; the mechanical strength of the edge surface of the silicon wafer is increased, a first chamfering device WBM-2200A is used, and a resin grinding wheel is used to process the outer periphery.
[0009] Third step: grinding, the grinding removal amount is 65 μm, the target thickness after grinding is 770 μm, a grinding device 24BNS is used, the grinding auxiliary material is composed of grinding powder F0-1000#, a suspension, an anti-rust agent and a defoaming agent, and the silicon wafer is ground on both sides through rotation of the lower fixed disc and rotation of the carrier.
[0010] Fourth step: second chamfering, the second chamfering determines the edge profile of the silicon wafer, and the edge profile of the silicon wafer has an influence on the Crown after epitaxy.
[0011] Step 5: The acid etching solution used is HF, HNO3, and HAC (acetic acid). The acid etching removes 30μm of silicon wafer, resulting in a wafer thickness of 740μm after etching.
[0012] Step 6: Intermediate inspection. Visual inspection of the front and back of the silicon wafer is carried out manually under fluorescent lamps and spotlights to check for defects on the surface of the silicon wafer.
[0013] Step 7: First, perform edge polishing, then Poly (15000 Å thickness), then LTO (4800 Å thickness), then remove the edge LTO by etching, and finally perform front-side polishing. After polishing, the back side and edge film structures are different, and the different film structures affect the occurrence of epitaxial Si-Nodule.
[0014] Step 8: Polishing removes 15μm of material, resulting in a final thickness of 725μm.
[0015] Step 9: Cleaning, including dewaxing and final cleaning. First, dewaxing is performed to remove wax residue from the back of the silicon wafer; then, final cleaning is performed using SC1 solution to remove contaminants from the surface of the silicon wafer.
[0016] As a preferred method, wire cutting is performed using φ0.12 steel wire and mortar, with the cutting done through positive crystal orientation slices, deviating by ±0.7 in the X direction and ±0.7 in the Y direction.
[0017] Preferably, the silicon wafer edge profile is of the T-type type, with T-type parameters including A1, A2, R1, R2, and BC. Due to the different epitaxial growth rates of the front and edge surfaces, the beveled surface of the A1 edge, which connects to the front surface, is prone to forming a crown at the junction of the front and A1 surfaces when transitioning from the front surface to the A1 surface. By adjusting the secondary chamfering processing parameters and increasing the A1 value from 670μm to 760μm, the area of the beveled edge is increased, thus improving the edge crown.
[0018] As preferred options, both Poly and LTO are surface treatment processes for silicon wafers. They involve growing a polycrystalline silicon film or a SiO2 film on the back side of the silicon wafer through chemical vapor deposition. Their purpose is to prevent self-doping of heavily doped silicon wafers during silicon epitaxy. Poly film is a polycrystalline silicon film with a long film thickness of 15,000 Å, while LTO film is a SiO2 film with a long film thickness of 4,800 Å. Long Poly film has a polycrystalline silicon film of the same thickness on both the front and back sides of the silicon wafer, while long LTO film has a SiO2 film only on the back side of the silicon wafer. The purpose of the etching method to remove the edge is to use HF to etch away the SiO2 film at the edge of the back side, because edge polishing cannot remove the edge SiO2 film.
[0019] As a preferred option, the eighth polishing step is processed using the Nachi-Fujikoshi fully automatic polishing line, which uses single-sided polishing with wax applied to the back and is processed through 5 consecutive polishing steps: coarse polishing → coarse polishing → coarse polishing → medium polishing → fine polishing.
[0020] The present invention can achieve the following effects:
[0021] This invention provides a process method for improving Si-Nodule and Crown formation in thick epitaxial growth of silicon wafers. Compared with existing technologies, it features simple operation and good results. It solves the problem of Si-Nodule and Crown formation caused during thick epitaxial growth of silicon wafers. Attached Figure Description
[0022] Figure 1 This is a schematic diagram of the structure of the present invention. Detailed Implementation
[0023] The technical solution of the invention will be further described in detail below through embodiments and in conjunction with the accompanying drawings.
[0024] Example: Figure 1 As shown, a process for improving thick silicon wafer epitaxial Si-Nodule and Crown includes the following steps:
[0025] Step 1: Wire EDM, with a slice thickness of 835μm, using a TOYO450E wire EDM machine. During wire EDM, φ0.12 steel wire and slurry are used for cutting, passing through the positive crystal orientation slice, with deviations of ±0.7 in both the X and Y directions.
[0026] Step 2: First chamfering, which processes the edge of the silicon wafer into an arc shape (R-Type) through a first chamfering.
[0027] Step 3: Grinding, grinding removal amount 65μm, target thickness after grinding 770μm, grinding equipment 24BNS, grinding auxiliary materials consist of grinding powder F0-1000#, suspension, rust inhibitor and defoamer. Grinding is performed on both sides of the silicon wafer by rotating the lower platen and the carrier.
[0028] Step 4: Secondary chamfering. The secondary chamfering determines the edge profile of the silicon wafer, which in turn affects the outer crown.
[0029] The silicon wafer edge profile is T-type, with T-type parameters A1, A2, R1, R2, and BC. Due to the different epitaxial growth rates of the front and edge surfaces, the beveled surface of A1, which connects to the front surface, is prone to forming a crown at the junction of the front and A1 surfaces when transitioning from the front to the A1 surface. By adjusting the secondary chamfering processing parameters and increasing the A1 value from 670μm to 760μm, the area of the beveled edge is increased, thus improving the edge crown.
[0030] Step 5: The acid etching solution used is HF, HNO3, and HAC (acetic acid). The acid etching removes 30μm of silicon wafer, resulting in a wafer thickness of 740μm after etching.
[0031] Poly and LTO are both surface treatment processes for silicon wafers. They involve growing polycrystalline silicon or SiO2 films on the back side of the silicon wafer through chemical vapor deposition. Their purpose is to prevent self-doping of heavily doped silicon wafers during silicon epitaxy. Poly films are polycrystalline silicon films with a long film thickness of 15,000 Å, while LTO films are SiO2 films with a long film thickness of 4,800 Å. Long Poly films have polycrystalline silicon films of the same thickness on both the front and back sides of the silicon wafer, while long LTO films have SiO2 films only on the back side of the silicon wafer. The purpose of the etching method to remove the edge is to use HF to etch away the SiO2 film at the back edge, because edge polishing cannot remove the edge SiO2 film.
[0032] Step 6: Intermediate inspection. Visual inspection of the front and back of the silicon wafer is carried out manually under fluorescent lamps and spotlights to check for defects on the surface of the silicon wafer.
[0033] Step 7: First, perform edge polishing, then Poly (15000 Å thickness), then LTO (4800 Å thickness), then remove the edge LTO by etching, and finally perform front-side polishing. After polishing, the back side and edge film structures are different, and the different film structures affect the occurrence of epitaxial Si-Nodule.
[0034] Step 8: Polishing removes 15μm, resulting in a thickness of 725μm after polishing; polishing is performed using the Nachi-Fujikoshi fully automatic polishing line, employing single-sided polishing with wax applied to the back, and undergoing a 5-step polishing process: coarse polishing → coarse polishing → coarse polishing → medium polishing → fine polishing.
[0035] Step 9: Cleaning, including dewaxing and final cleaning. First, dewaxing is performed to remove wax residue from the back of the silicon wafer; then, final cleaning is performed using SC1 solution to remove contaminants from the surface of the silicon wafer.
[0036] In summary, this improved process for thick epitaxial silicon wafers, characterized by its simplicity and effectiveness, solves the problems of Si-Nodule and Crown formation caused during thick epitaxial growth.
[0037] The above description is only a specific embodiment of the present invention, but the structural features of the present invention are not limited thereto. Any changes or modifications made by those skilled in the art within the scope of the present invention are covered by the patent scope of the present invention.
Claims
1. A process method for improving thick epitaxial silicon junction particles and edge protrusions on silicon wafers, characterized in that... The following steps are included: Step 1: Wire cutting, with a slice thickness of 835μm, is performed using a wire cutting machine; Step 2: First chamfering, which processes the edge of the silicon wafer into an arc shape through a single chamfering process; Step 3: Grinding. The grinding removal amount is 65μm, and the target thickness after grinding is 770μm. The grinding auxiliary material consists of grinding powder, suspension, rust inhibitor and defoamer. The grinding is carried out by rotating the lower platen and the carrier to grind the silicon wafer on both sides. Step 4: Secondary chamfering. The secondary chamfering determines the edge profile of the silicon wafer, which in turn affects the edge protrusions after epitaxy. The silicon wafer edge profile is T-type, with T-type parameters A1, A2, R1, R2, and BC. By adjusting the secondary chamfering processing parameters, A1 is increased from 670μm to 760μm. Increasing the A1 value increases the area of the beveled edge connected to the front side, thus improving edge protrusion. Step 5: The acid etching solution used is HF, HNO3, and HAC. The acid etching removes 30μm of material, and the silicon wafer thickness after etching is 740μm. Step 6: Intermediate inspection. Visual inspection of the front and back of the silicon wafer is carried out manually under fluorescent lamps and spotlights to check for defects on the surface of the silicon wafer. Step 7: First, perform edge polishing. Then, grow a polycrystalline silicon film of the same thickness on both the front and back sides of the silicon wafer by chemical vapor deposition. The thickness of the polycrystalline silicon film is 15000 Å. Then, grow a silicon dioxide film only on the back side of the silicon wafer by chemical vapor deposition. The thickness of the silicon dioxide film is 4800 Å. Then, remove the edge silicon dioxide film by etching. Finally, polish the front side. After polishing, the back side and edge film structures are different. The different film structures affect the formation of epitaxial silicon nodule particles. Step 8: Polishing removes 15μm of material, resulting in a post-polishing thickness of 725μm; Step 9: Cleaning, including dewaxing and final cleaning. First, dewaxing is performed to remove wax residue from the back of the silicon wafer; then, final cleaning is performed using SC1 solution to remove contaminants from the surface of the silicon wafer.
2. The process method for improving thick epitaxial silicon junction particles and edge protrusions in silicon wafers according to claim 1, characterized in that: During wire EDM, φ0.12 steel wire and mortar are used for cutting. The cutting is performed by cutting through positive crystal direction slices, with deviations of ±0.7 in the X direction and ±0.7 in the Y direction.
3. The process method for improving thick epitaxial silicon junction particles and edge protrusions in silicon wafers according to claim 1, characterized in that: The purpose of the etching method to remove the edge is to use HF to etch away the silicon dioxide film on the back edge, because edge polishing cannot remove the edge silicon dioxide film.
4. The process method for improving thick epitaxial silicon junction particles and edge protrusions in silicon wafers according to claim 1, characterized in that: The eighth step, polishing, is processed using the Nachi-Fujikoshi fully automatic polishing line. It employs single-sided polishing with wax applied to the back and is carried out through a five-step polishing process: coarse polishing → coarse polishing → coarse polishing → medium polishing → fine polishing.
Citation Information
Patent Citations
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