Circuit board, manufacturing method thereof and electronic device

Abstract

The present application provides a circuit board, a manufacturing method thereof and an electronic device. The circuit board includes a first dielectric material, a second dielectric material, a third dielectric material, a first external circuit layer, a second external circuit layer, a plurality of conductive structures and a via structure. The dielectric constants of the first, second and third dielectric materials are different. The first and second external circuit layers are respectively disposed on the first and third dielectric materials. The via structure at least penetrates the first and second dielectric materials and is electrically connected to the first and second external circuit layers to define a signal path. The conductive structures are electrically connected to each other and surround the first, second and third dielectric materials. The conductive structures are electrically connected to the first and second external circuit layers to define a ground path surrounding the signal path. The circuit board of the present application has a good signal loop and can have better signal integrity.

Description

TECHNICAL FIELD

[0001] The present application relates to a substrate structure and a manufacturing method thereof, and more particularly to a circuit board and a manufacturing method thereof and an electronic device using the circuit board. BACKGROUND

[0002] In the prior art circuit board, the design of coaxial via requires one or more insulating layers between the inner conductor layer and the outer conductor layer for blocking, wherein the insulating layer is formed by the lamination of the additional layer. Therefore, impedance mismatch occurs at both ends of the coaxial via, and a gap of electromagnetic interference (EMI) shielding occurs, thereby affecting the high frequency signal integrity. In addition, in the design of the coaxial via, the two ends of the signal path are respectively connected to the two ends of the ground path, which are located on different planes, and noise interference cannot be reduced. SUMMARY

[0003] The present application is directed to a circuit board having a good signal loop, which can have better signal integrity.

[0004] The present application is also directed to a manufacturing method of a circuit board for manufacturing the above-mentioned circuit board.

[0005] According to an embodiment of the present application, the circuit board includes a first dielectric material, a second dielectric material, a third dielectric material, a first outer line layer, a second outer line layer, a plurality of conductive structures, and a via structure. The second dielectric material is located between the first dielectric material and the third dielectric material, and the dielectric constant of the first dielectric material is different from the dielectric constant of the second dielectric material and the dielectric constant of the third dielectric material. The first outer line layer is disposed on the first dielectric material. The second outer line layer is disposed on the third dielectric material. The via structure at least penetrates the first dielectric material and the second dielectric material, and is electrically connected to the first outer line layer and the second outer line layer to define a signal path. The conductive structures are electrically connected to each other and surround the first dielectric material, the second dielectric material, and the third dielectric material. The conductive structures are electrically connected to the first outer line layer and the second outer line layer to define a ground path. The ground path surrounds the signal path.

[0006] In the circuit board according to the embodiment of the present application, the above-mentioned conductive structure includes a plurality of first conductive pillars, a plurality of second conductive pillars, a first line layer, a second line layer, and a conductive connection layer. The first conductive pillars surround the first dielectric material, and the second conductive pillars surround the third dielectric material. The conductive connection layer connects the first line layer and the second line layer and surrounds the second dielectric material.

[0007] In the circuit board according to the embodiment of the present application, the first external circuit layer includes a first signal line and a first ground line. The second external circuit layer includes a second signal line and a second ground line. The first signal line, the via structure, and the second signal line define a signal path. The first ground line, the first conductive post, the first circuit layer, the conductive connection layer, the second circuit layer, the second conductive post, and the second ground line define a ground path.

[0008] In the circuit board according to the embodiment of the present application, the first external circuit layer includes a first signal line and a first ground line. The second external circuit layer includes a second signal line and a second ground line. The first signal line, the via structure, and the second signal line define a signal path. The first ground line, the first conductive post, the first circuit layer, the conductive connection layer, the second circuit layer, the second conductive post, and the second ground line define a ground path.

[0009] In the circuit board according to the embodiment of the present application, the via structure includes a via hole and a conductive material layer. The via hole penetrates the first dielectric material, the second dielectric material, and the third dielectric material. The conductive material layer covers the inner wall of the via hole and electrically connects the first external circuit layer and the second external circuit layer.

[0010] In the circuit board according to the embodiment of the present application, the via structure further includes a dielectric layer filling the via hole. The upper surface and the lower surface of the dielectric layer are respectively flush with the top surface of the first external circuit layer and the bottom surface of the second external circuit layer.

[0011] In the circuit board according to the embodiment of the present application, the via structure further includes a dielectric layer filling the via hole. The first external circuit layer and the second external circuit layer respectively cover the upper surface and the lower surface of the dielectric layer.

[0012] In the circuit board according to the embodiment of the present application, the dielectric constant of the first substrate and the dielectric constant of the third substrate are respectively higher than 3.6, and the dielectric loss of the first substrate and the dielectric loss of the third substrate are respectively lower than 0.02.

[0013] In the circuit board according to the embodiment of the present application, the conductive structure includes a plurality of first conductive pillars, a plurality of second conductive pillars, a first line layer, a second line layer, a third line layer, and a conductive connection layer. The first conductive pillars surround the first dielectric material, and the second conductive pillars surround the third dielectric material. The second line layer is between the first line layer and the third line layer, and the conductive connection layer connects the first line layer, the second line layer, and the third line layer and surrounds the second dielectric material.

[0014] In the circuit board according to the embodiment of the present application, the circuit board further includes a first substrate and a second substrate. The first substrate includes a first base, a first dielectric material, and a first conductive pillar. The first dielectric material and the first conductive pillar pass through the first base, and the first conductive pillar is between the first base and the first dielectric material. The second substrate includes a second base, a third base, a second dielectric material, a third dielectric material, a first line layer, a second line layer, a third line layer, a conductive connection layer, a second conductive pillar, and an opening. The second base has a first surface and a second surface opposite to each other. The first line layer and the second line layer are on the first surface and the second surface, respectively. The third base and the third dielectric material are on the second surface of the second base. The third line layer is on the third base and the third dielectric material. The second conductive pillar electrically connects the second line layer and the third line layer. The opening passes through the second base and the third dielectric material. The conductive connection layer covers an inner wall of the opening and electrically connects the first line layer, the second line layer, and the third line layer. The second dielectric material fills the opening.

[0015] In the circuit board according to the embodiment of the present application, the first external line layer includes a first signal line and a first ground line. The second external line layer includes a second signal line and a second ground line. The first signal line, the via structure, and the second signal line define a signal path. The first ground line, the first conductive pillar, the first line layer, the conductive connection layer, and the second ground line define a ground path.

[0016] In the circuit board according to the embodiment of the present application, the via structure includes a via hole and a conductive material layer. The via hole passes through the first dielectric material and the second dielectric material. The conductive material layer covers an inner wall of the via hole and electrically connects the first external line layer and the second external line layer.

[0017] In the circuit board according to the embodiment of the present application, the via structure further includes a dielectric layer filling the via hole. The dielectric layer has an upper surface and a lower surface opposite to each other, which are flush with a top surface of the first external line layer and a bottom surface of the second external line layer, respectively.

[0018] In the circuit board according to the embodiment of the present application, the dielectric layer has a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.

[0019] In the circuit board according to the embodiment of the present application, the via structure further includes a dielectric layer filling the via. The first external circuit layer and the second external circuit layer respectively cover upper and lower surfaces of the dielectric layer opposite to each other.

[0020] In the circuit board according to the embodiment of the present application, the dielectric layer has a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.

[0021] In the circuit board according to the embodiment of the present application, the conductive structure includes a plurality of first conductive pillars, a plurality of vias, a first circuit layer, a second circuit layer, a third circuit layer, and a conductive connection layer. The first conductive pillars surround the first dielectric material, and the vias penetrate the third dielectric material. The second circuit layer is between the first circuit layer and the third circuit layer. The conductive connection layer connects the first circuit layer, the second circuit layer, and the third circuit layer and surrounds the second dielectric material.

[0022] In the circuit board according to the embodiment of the present application, the circuit board further includes a first substrate and a second substrate. The first substrate includes a first base, a first dielectric material, and a first conductive pillar. The first dielectric material and the first conductive pillar penetrate the first base, and the first conductive pillar is between the first base and the first dielectric material. The second substrate includes a second base, a second dielectric material, a third dielectric material, a first circuit layer, a second circuit layer, a third circuit layer, a conductive connection layer, a via, and an opening. The second base has a first surface and a second surface opposite to each other. The first circuit layer and the second circuit layer are on the first surface and the second surface, respectively. The third dielectric material is on the second surface of the second base. The third circuit layer is on the third dielectric material. The via electrically connects the second circuit layer and the third circuit layer. The opening penetrates the second base and the third dielectric material. The conductive connection layer covers an inner wall of the opening and electrically connects the first circuit layer, the second circuit layer, and the third circuit layer. The second dielectric material fills the opening.

[0023] In the circuit board according to the embodiment of the present application, the first external circuit layer includes a first signal circuit and a first ground circuit. The second external circuit layer includes a second signal circuit and a second ground circuit. The first signal circuit, the via structure, and the second signal circuit define a signal path. The first ground circuit, the first conductive pillar, the first circuit layer, the conductive connection layer, and the second ground circuit define a ground path.

[0024] In the circuit board according to the embodiment of the present application, the via structure includes a via and a conductive material layer. The via penetrates the first dielectric material and the second dielectric material. The conductive material layer covers an inner wall of the via and electrically connects the first external circuit layer and the second external circuit layer.

[0025] In the circuit board according to the embodiment of the present application, the via structure further comprises a dielectric layer filling the through hole. The upper and lower surfaces of the dielectric layer are flush with the top surface of the first external circuit layer and the bottom surface of the second external circuit layer, respectively.

[0026] In the circuit board according to the embodiment of the present application, the via structure further comprises a dielectric layer filling the through hole. The first and second external circuit layers cover the upper and lower surfaces of the dielectric layer, respectively.

[0027] In the circuit board according to the embodiment of the present application, the dielectric loss of the first and third dielectric materials is greater than 0 and less than 0.006, and the dielectric loss of the second dielectric material is greater than 0 and less than 0.008.

[0028] According to the embodiment of the present application, a method for manufacturing a circuit board comprises the following steps. A plurality of conductive structures are formed to surround a first dielectric material, a second dielectric material and a third dielectric material. The first, second and third dielectric materials are laminated. The second dielectric material is between the first and third dielectric materials, and the dielectric constant of the first dielectric material is different from the dielectric constant of the second dielectric material and the dielectric constant of the third dielectric material. The conductive structures are electrically connected to each other. A via structure is formed to at least pass through the first and second dielectric materials. A first external circuit layer and a second external circuit layer are formed on the first and third dielectric materials, respectively. The first and second external circuit layers and the via structure are electrically connected to define a signal path. The conductive structures electrically connect the first and second external circuit layers to define a ground path, wherein the ground path surrounds the signal path.

[0029] In the method for manufacturing a circuit board according to the embodiment of the present application, the conductive structures comprise a plurality of first conductive pillars, a plurality of second conductive pillars, a first circuit layer, a second circuit layer and a conductive connection layer. The first conductive pillars surround the first dielectric material, and the second conductive pillars surround the third dielectric material. The conductive connection layer connects the first and second circuit layers and surrounds the second dielectric material.

[0030] In the method of fabricating a circuit board according to embodiments of the present application, the step of forming a conductive structure to surround the first dielectric material, the second dielectric material, and the third dielectric material includes providing a first substrate. The first substrate includes a first base, the first dielectric material, and a first conductive post. The first dielectric material and the first conductive post penetrate the first base, and the first conductive post is between the first base and the first dielectric material. A second substrate is provided. The second substrate includes a second base, the second dielectric material, a first routing layer, a second routing layer, and a conductive connection layer. The second base has a first surface and a second surface opposite to each other, and an opening penetrating the second base. The first routing layer and the second routing layer are on the first surface and the second surface, respectively. The conductive connection layer covers an inner wall of the opening and electrically connects the first routing layer and the second routing layer. The second dielectric material fills the opening. A third substrate is provided. The third substrate includes a third base, the third dielectric material, and a second conductive post. The third dielectric material and the second conductive post penetrate the third base, and the second conductive post is between the third base and the third dielectric material.

[0031] In the method of fabricating a circuit board according to embodiments of the present application, the step of forming a via structure to at least penetrate the first dielectric material and the second dielectric material includes forming a via to penetrate the first dielectric material, the second dielectric material, and the third dielectric material. A conductive material layer is formed to cover an inner wall of the via.

[0032] In the method of fabricating a circuit board according to embodiments of the present application, the step of forming the first external routing layer and the second external routing layer on the first dielectric material and the third dielectric material, respectively, includes pressing the first dielectric material, the second dielectric material, and the third dielectric material at the same time as pressing the first metal layer and the second metal layer on the first substrate and the third substrate, respectively. The conductive material layer also extends to cover the first metal layer and the second metal layer when the conductive material layer is formed. The conductive material layer, the first metal layer, and the second metal layer are patterned to form the first external routing layer and the second external routing layer.

[0033] In the method of fabricating a circuit board according to embodiments of the present application, the method further includes filling a dielectric layer in the via after the conductive material layer is formed and before the conductive material layer, the first metal layer, and the second metal layer are patterned. The dielectric layer fills the via, and upper and lower surfaces of the dielectric layer opposite to each other are cut flush with top and bottom surfaces of the conductive material layer, respectively.

[0034] In the method of fabricating a circuit board according to the embodiment of the present application, the method of fabricating a circuit board further comprises: forming a cap layer on the conductive material layer after filling the dielectric layer in the via, and before patterning the conductive material layer, the first metal layer and the second metal layer. The cap layer covers the upper and lower surfaces of the conductive material layer and the dielectric layer. The cap layer, the conductive material layer, the first metal layer and the second metal layer are patterned to form the first external circuit layer and the second external circuit layer.

[0035] In the method of fabricating a circuit board according to the embodiment of the present application, the conductive structure comprises a plurality of first conductive pillars, a plurality of second conductive pillars, a first circuit layer, a second circuit layer, a third circuit layer and a conductive connection layer. The first conductive pillars surround the first dielectric material, and the second conductive pillars surround the third dielectric material. The second circuit layer is between the first circuit layer and the third circuit layer. The conductive connection layer connects the first circuit layer, the second circuit layer and the third circuit layer and surrounds the second dielectric material.

[0036] In the method of fabricating a circuit board according to the embodiment of the present application, the step of forming the conductive structure to surround the first dielectric material, the second dielectric material and the third dielectric material comprises: forming a first substrate. The first substrate comprises a first base, the first dielectric material and the first conductive pillars. The first dielectric material and the first conductive pillars pass through the first base, and the first conductive pillars are between the first base and the first dielectric material. A second substrate is provided. The second substrate comprises a second base, a third base, the second dielectric material, the third dielectric material, the first circuit layer, the second circuit layer, the third circuit layer, the conductive connection layer, the second conductive pillars and an opening. The second base has a first surface and a second surface opposite to each other. The first circuit layer and the second circuit layer are on the first surface and the second surface, respectively. The third base and the third dielectric material are on the second surface of the second base, and the third circuit layer is on the third base and the third dielectric material. The second conductive pillars electrically connect the second circuit layer and the third circuit layer. The opening passes through the second base and the third dielectric material. The conductive connection layer covers the inner wall of the opening and electrically connects the first circuit layer, the second circuit layer and the third circuit layer. The second dielectric material fills the opening.

[0037] In the method of fabricating a circuit board according to the embodiment of the present application, the step of forming the via structure to at least pass through the first dielectric material and the second dielectric material comprises: forming a via to pass through the first dielectric material and the second dielectric material. A conductive material layer is formed to cover the inner wall of the via.

[0038] In the method of fabricating a circuit board according to embodiments of the present application, the steps of forming the first external circuit layer and the second external circuit layer on the first dielectric material and the third dielectric material respectively include: simultaneously laminating the metal layer on the first substrate when laminating the first dielectric material, the second dielectric material and the third dielectric material. When forming the conductive material layer, the conductive material layer also extends and covers on the metal layer and the third circuit layer. The conductive material layer and the metal layer are patterned to form the first external circuit layer and the second external circuit layer.

[0039] In the method of fabricating a circuit board according to embodiments of the present application, the method of fabricating a circuit board further includes: after forming the conductive material layer and before patterning the conductive material layer and the metal layer, filling a dielectric layer in the via. The dielectric layer fills the via, and the upper surface and the lower surface of the dielectric layer are respectively flush with the top surface and the bottom surface of the conductive material layer.

[0040] In the method of fabricating a circuit board according to embodiments of the present application, the method of fabricating a circuit board further includes: after filling the dielectric layer in the via and before patterning the conductive material layer and the metal layer, forming a cap layer on the conductive material layer. The cap layer covers the upper surface and the lower surface of the conductive material layer and the dielectric layer. The cap layer, the conductive material layer and the metal layer are patterned to form the first external circuit layer and the second external circuit layer.

[0041] In the method of fabricating a circuit board according to embodiments of the present application, the conductive structure includes a plurality of first conductive pillars, a plurality of vias, a first circuit layer, a second circuit layer, a third circuit layer and a conductive connection layer. The first conductive pillars surround the first dielectric material, and the vias penetrate the third dielectric material. The second circuit layer is between the first circuit layer and the third circuit layer. The conductive connection layer connects the first circuit layer, the second circuit layer and the third circuit layer and surrounds the second dielectric material.

[0042] In the method of fabricating a circuit board according to embodiments of the present application, the step of forming a conductive structure to surround the first dielectric material, the second dielectric material and the third dielectric material includes forming a first substrate. The first substrate includes a first base, the first dielectric material and a first conductive pillar. The first dielectric material and the first conductive pillar penetrate the first base, and the first conductive pillar is between the first base and the first dielectric material. A second substrate is formed. The second substrate includes a second base, the second dielectric material, the third dielectric material, a first routing layer, a second routing layer, a third routing layer, a conductive connection layer, a via and an opening. The second base has a first surface and a second surface opposite to each other. The first routing layer and the second routing layer are on the first surface and the second surface respectively. The third dielectric material is on the second surface of the second base, and the third routing layer is on the third dielectric material. The via electrically connects the second routing layer and the third routing layer. The opening penetrates the second base and the third dielectric material. The conductive connection layer covers the inner wall of the opening and electrically connects the first routing layer, the second routing layer and the third routing layer. The second dielectric material fills the opening.

[0043] In the method of fabricating a circuit board according to embodiments of the present application, the step of forming a via structure to at least penetrate the first dielectric material and the second dielectric material includes forming a via to penetrate the first dielectric material and the second dielectric material. A conductive material layer is formed to cover the inner wall of the via.

[0044] In the method of fabricating a circuit board according to embodiments of the present application, the step of forming the first external routing layer and the second external routing layer on the first dielectric material and the third dielectric material respectively includes pressing the first dielectric material, the second dielectric material and the third dielectric material at the same time as pressing a metal layer on the first substrate. When the conductive material layer is formed, the conductive material layer also extends to cover the metal layer and the third routing layer. The conductive material layer and the metal layer are patterned to form the first external routing layer and the second external routing layer.

[0045] In the method of fabricating a circuit board according to embodiments of the present application, the method of fabricating a circuit board further includes, after the conductive material layer is formed and before the conductive material layer and the metal layer are patterned, filling a dielectric layer in the via. The dielectric layer fills the via, and the upper surface and the lower surface of the dielectric layer are flush with the top surface and the bottom surface of the conductive material layer respectively.

[0046] In the method of fabricating a circuit board according to embodiments of the present application, the method of fabricating a circuit board further includes, after the dielectric layer is filled in the via and before the conductive material layer and the metal layer are patterned, forming a cap layer on the conductive material layer. The cap layer covers the conductive material layer and the upper surface and the lower surface of the dielectric layer. The cap layer, the conductive material layer and the metal layer are patterned to form the first external routing layer and the second external routing layer.

[0047] According to an embodiment of the present application, an electronic device includes a circuit board and an electronic component. The circuit board includes a first dielectric material, a second dielectric material, a third dielectric material, a first external circuit layer, a second external circuit layer, a plurality of conductive structures, and a via structure. The second dielectric material is between the first dielectric material and the third dielectric material, and a dielectric constant of the first dielectric material is different from a dielectric constant of the second dielectric material and a dielectric constant of the third dielectric material. The first external circuit layer is disposed on the first dielectric material. The second external circuit layer is disposed on the third dielectric material. The via structure at least penetrates the first dielectric material and the second dielectric material and is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path. The conductive structures are electrically connected to each other and surround the first dielectric material, the second dielectric material, and the third dielectric material. The conductive structures electrically connect the first external circuit layer and the second external circuit layer to define a ground path. The ground path surrounds the signal path. The electronic component is electrically connected to the circuit board.

[0048] Based on the above, in the design of the circuit board of the present application, the via structure is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path, and the conductive structures are electrically connected to each other and electrically connect the first external circuit layer and the second external circuit layer to define a ground path, wherein the ground path surrounds the signal path. In this way, a good high-frequency high-speed signal loop can be formed, and in subsequent applications of integrated circuits and antennas, the same plane signal interference problem can be solved, signal energy loss can be reduced, and noise interference can be reduced, thereby improving signal transmission reliability. In addition, the via structure of the present application at least penetrates the first dielectric material and the second dielectric material, that is, different dielectric constant dielectric materials are arranged around the conductive via structure, which can improve signal transmission rate and reduce signal transmission loss. BRIEF DESCRIPTION OF DRAWINGS

[0049] Figures 1A-1E is a cross-sectional schematic view of a manufacturing method of a circuit board according to an embodiment of the present application;

[0050] Figure 1F is a top view schematic view of the circuit board of Figure 1E

[0051] Figures 2A-2B is a cross-sectional schematic view of a manufacturing method of another circuit board according to another embodiment of the present application;

[0052] Figures 3A-3B is a cross-sectional schematic view of a manufacturing method of another circuit board according to another embodiment of the present application;

[0053] Figures 4A-4K is a cross-sectional schematic view of a manufacturing method of another circuit board according to another embodiment of the present application;​

[0054] Figures 5A-5B is a cross-sectional schematic view of a partial step of a manufacturing method of another circuit board according to another embodiment of the present invention;

[0055] Figures 6A-6B is a cross-sectional schematic view of a partial step of a manufacturing method of another circuit board according to another embodiment of the present invention;

[0056] Figures 7A-7L is a cross-sectional schematic view of a manufacturing method of another circuit board according to another embodiment of the present invention;

[0057] Figures 8A-8B is a cross-sectional schematic view of a partial step of a manufacturing method of another circuit board according to another embodiment of the present invention;

[0058] Figures 9A-9B is a cross-sectional schematic view of a partial step of a manufacturing method of another circuit board according to another embodiment of the present invention;

[0059] Figures 10A-10C is a cross-sectional schematic view of a manufacturing method of another circuit board according to another embodiment of the present invention.

[0060] BRIEF DESCRIPTION OF DRAWINGS

[0061] 10a, 10b, 10c: electronic device

[0062] 100a, 100b, 100c, 200a, 200b, 200c, 300a, 300b, 300c: circuit board

[0063] 110: first metal layer

[0064] 110a, 110b, 110c, 210a, 210b, 210c, 310a, 310b, 310c: first external wiring layer

[0065] 115, 215, 315: first signal wiring

[0066] 117, 217, 317: first ground wiring

[0067] 120, 220, 320: first base material

[0068] 122, 222, 322: first base

[0069] 124, 224, 324: first conductive pillar

[0070] 126, 226, 326: first dielectric material

[0071] 130, 230, 330: second substrate;

[0072] 131, S3, S7: first surface;

[0073] 132, 231, 331: second base;

[0074] 133, S4, S8: second surface;

[0075] 134, 232, 332: first circuit layer;

[0076] 135, 237, 337: second dielectric material;

[0077] 136, 234, 334: second circuit layer;

[0078] 138, 235, 335: conductive connection layer;

[0079] 139, H, H’: opening;

[0080] 140: third substrate;

[0081] 142, 233: third base;

[0082] 144, 238: second conductive pillar;

[0083] 146, 239, 333: third dielectric material;

[0084] 150: second metal layer;

[0085] 150a, 150b, 150c, 250a, 250b, 250c, 350a, 350b, 350c: second external circuit layer;

[0086] 155, 255, 355: second signal line;

[0087] 157, 257, 35: second ground line;

[0088] 160a, 240a, 240b, 340a, 340b: via structure;

[0089] 162, 242, 342: through-hole;

[0090] 163, 164, 243, 244, 343, 344: conductive material layer;

[0091] 166, 246, 346: dielectric layer;

[0092] 170, 260, 360: cap layer;

[0093] 236, 336: third circuit layer;

[0094] 338: via hole;

[0095] 400: electronic component;

[0096] 410: contact pad;

[0097] 500: connecting member;

[0098] F1, F3, F5: upper surface;

[0099] F2, F4, F6: lower surface;

[0100] L11, L21, L31: signal path;

[0101] L12, L22, L32: ground path;

[0102] M1, M2, M3, M4, M5, M6, 210, 310: metal layer;

[0103] S1, S5, S9: top surface;

[0104] S2, S6, S10: bottom surface;

[0105] T: through hole. DETAILED DESCRIPTION

[0106] Reference will now be made in detail to the exemplary embodiments of the present application, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.

[0107] Figures 1A-1E is a cross-sectional schematic view of a manufacturing method of a circuit board according to an embodiment of the present application. Figure 1F is a top view schematic view of the circuit board of Figure 1E . Regarding the manufacturing method of the circuit board of the present embodiment, first, please refer to Figure 1A, a first metal layer 110, a first substrate 120, a second substrate 130, a third substrate 140 and a second metal layer 150 are provided. The first substrate 120 includes a first base 122, a first conductive pillar 124 and a first dielectric material 126. The first dielectric material 126 and the first conductive pillar 124 are through the first base 122, and the first conductive pillar 124 is between the first base 122 and the first dielectric material 126, wherein the first conductive pillar 124 surrounds the first dielectric material 126. The step of providing the first substrate 120 includes first providing the first base 122, wherein the first base 122 is in a B-stage state at this time, that is, has not yet been completely cured. The material of the first base 122 is, for example, epoxy, PTFE, PPE, PI, BT, PN, hydrocarbon, but is not limited thereto. Then, a release film can be attached to opposite sides of the first base 122, wherein the material of the release film is, for example, PET. Then, the first base 122 is routed to form a through hole. Then, the first dielectric material 126 is filled in the through hole, wherein the opposite sides of the first dielectric material 126 are respectively aligned with the release films at this time. Then, the first dielectric material 126 is drilled to form a through hole, wherein the drilling process is, for example, laser drilling or mechanical drilling or punching, but is not limited thereto. Finally, the conductive adhesive is filled in the through hole by printing or injection to form the first conductive pillar 124 surrounding the first dielectric material 126. Then, the release films attached to the opposite sides of the first base 122 are removed, so that the opposite surfaces of the first conductive pillar 124 and the first dielectric material 126 respectively protrude from the opposite surfaces of the first base 122, and the fabrication of the first substrate 120 is completed.

[0108] Furthermore, the second substrate 130 includes a second base 132, a second dielectric material 135, a first circuit layer 134, a second circuit layer 136, and a conductive connecting layer 138. The second base 132 has a first surface 131 and a second surface 133 opposite to each other, and an opening 139 penetrating through the second base 132. The first circuit layer 134 and the second circuit layer 136 are respectively located on the first surface 131 and the second surface 133. The conductive connecting layer 138 covers the inner wall of the opening 139 and electrically connects the first circuit layer 134 and the second circuit layer 136. The second dielectric material 135 fills the opening 139, and the conductive connecting layer 138 surrounds the second dielectric material 135. The third substrate 140 includes a third base 142, a second conductive pillar 144, and a third dielectric material 146. The third dielectric material 146 and the second conductive pillar 144 penetrate through the third base 142, and the second conductive pillar 144 is located between the third base 142 and the third dielectric material 146, wherein the second conductive pillar 144 surrounds the third dielectric material 146. Here, the manufacturing method of the third substrate 140 is the same as that of the first substrate 120, please refer to the manufacturing method of the first substrate 120 described above, which will not be repeated here. It should be noted that the first conductive pillar 124, the second conductive pillar 144, the first circuit layer 134, the second circuit layer 136, and the conductive connecting layer 138 described above can be regarded as a plurality of conductive structures, and thus a plurality of conductive structures surrounding the first dielectric material 126, the second dielectric material 135, and the third dielectric material 146 have been formed. Here, the first metal layer 110, the first substrate 120, the second substrate 130, the third substrate 140, and the second metal layer 150 can be regarded as a composite PCB, wherein the first metal layer 110 and the second metal layer 150 are, for example, copper foil layers, but are not limited thereto.

[0109] Next, please refer to Figure 1BThe first metal layer 110, the first substrate 120, the second substrate 130, the third substrate 140 and the second metal layer 150 are then subjected to a thermal compression process. As a result of the thermal compression process, the first base 122 of the first substrate 120 and the third base 142 of the third substrate 140 are converted from a B-stage state to a C-stage state, i.e. a fully cured state, so that the first metal layer 110, the second substrate 130 and the second metal layer 150 are attached to the first substrate 120 and the third substrate 140. At this point, the second dielectric material 135 is located between the first dielectric material 126 and the third dielectric material 146. Preferably, the dielectric constant of the first dielectric material 126 is different from the dielectric constant of the second dielectric material 135 and the dielectric constant of the third dielectric material 146. The conductive structures, i.e. the first conductive pillars 124, the first routing layer 134, the conductive connection layer 138, the second routing layer 136 and the second conductive pillars 144, are electrically connected to each other and to the first metal layer 110 and the second metal layer 150.

[0110] Further, in the present embodiment, the first base 122 and the third base 142 can be made of a general dielectric material, wherein the dielectric constant of the first base 122 and the dielectric constant of the third base 142 are each higher than 3.6, and the dielectric loss (Df) of the first base 122 and the dielectric loss of the third base 142 are each lower than 0.02, thereby providing proper impedance matching. Moreover, the dielectric constant of the first dielectric material 126 and the dielectric constant of the third dielectric material 146 are each preferably lower than 3.2, and the dielectric loss (Df) of the first dielectric material 126 and the dielectric loss of the third dielectric material 146 are each greater than 0 and lower than 0.006, thereby providing proper insulation and impedance matching, and reducing dielectric loss. In addition, the dielectric constant of the second dielectric material 135 is lower than 3.4, and the dielectric loss (Df) of the second dielectric material 135 is greater than 0 and lower than 0.008, thereby providing proper insulation and impedance matching, and reducing dielectric loss. Thus, the step of compressing the first dielectric material 126, the second dielectric material 135 and the third dielectric material 146 is completed.

[0111] Next, referring to Figure 1C , a via hole 162 is formed to pass through the first dielectric material 126, the second dielectric material 135 and the third dielectric material 146. Next, referring to Figure 1D , a conductive material layer 163 is formed to cover the inner wall of the via hole 162, wherein the conductive material layer 163 also extends to cover the first metal layer 110 and the second metal layer 150.

[0112] Subsequently, referring to Figure 1D and Figure 1EThe first external circuit layer 110a is formed on the first substrate 120, the first conductive pillar 124 and the first dielectric material 126, and electrically connects the first conductive pillar 124 and the via structure 160a. The second external circuit layer 150a is formed on the third substrate 140, the second conductive pillar 144 and the third dielectric material 146, and electrically connects the second conductive pillar 144 and the via structure 160a. In particular, the first external circuit layer 110a, the second external circuit layer 150a and the via structure 160a are electrically connected to define a signal path Ll 1. The conductive structure electrically connects the first external circuit layer 110a and the second external circuit layer 150a to define a ground path L12, which surrounds the signal path Ll 1. In this way, the fabrication of the circuit board 100a is completed.

[0113] In structure, please refer to Figure 1E and Figure 1FThe circuit board 100a of the present embodiment includes a first dielectric material 126, a second dielectric material 135, a third dielectric material 146, a first external line layer 110a, a second external line layer 150a, a plurality of conductive structures, and a via structure 160a. The second dielectric material 135 is located between the first dielectric material 126 and the third dielectric material 146, and the dielectric constant of the first dielectric material 126 is different from the dielectric constant of the second dielectric material 135 and the dielectric constant of the third dielectric material 146. The first external line layer 110a is disposed on the first dielectric material 126. The second external line layer 150a is disposed on the third dielectric material 146. The via structure 160a penetrates the first dielectric material 126, the second dielectric material 135, and the third dielectric material 146, and is electrically connected to the first external line layer 110a and the second external line layer 150a to define a signal path Ll 1. The via structure 160a includes a via hole 162 and a conductive material layer 164. The via hole 162 penetrates the first dielectric material 126, the second dielectric material 135, and the third dielectric material 146. The conductive material layer 164 covers the inner wall of the via hole 162 and is electrically connected to the first external line layer 110a and the second external line layer 150a. The conductive structures include a first conductive pillar 124, a second conductive pillar 144, a first line layer 134, a second line layer 136, and a conductive connection layer 138, wherein the conductive structures are electrically connected to each other and surround the first dielectric material 126, the second dielectric material 135, and the third dielectric material 146. The conductive structures are electrically connected to the first external line layer 110a and the second external line layer 150a to define a ground path Ll 2. The ground path Ll 2 surrounds the signal path Ll 1.

[0114] In detail, the circuit board 100a of the present embodiment further comprises a first substrate 120, a second substrate 130 and a third substrate 140. The first substrate 120 comprises a first base 122, a first dielectric material 126 and a first conductive post 124. The first dielectric material 126 and the first conductive post 124 penetrate through the first base 122, and the first conductive post 124 is located between the first base 122 and the first dielectric material 126, wherein the first conductive post 124 surrounds the first dielectric material 126. The second substrate 130 comprises a second base 132, a second dielectric material 135, a first circuit layer 134, a second circuit layer 136 and a conductive connecting layer 138. The second base 132 has a first surface 131 and a second surface 133 opposite to each other, and an opening 139 penetrating through the second base 132. The first circuit layer 134 and the second circuit layer 136 are located on the first surface 131 and the second surface 133 respectively. The conductive connecting layer 138 covers the inner wall of the opening 139 and electrically connects the first circuit layer 134 and the second circuit layer 136. The second dielectric material 135 fills the opening 139, and the conductive connecting layer 138 surrounds the second dielectric material 135. The third substrate 140 comprises a third base 142, a third dielectric material 146 and a second conductive post 144. The third dielectric material 146 and the second conductive post 144 penetrate through the third base 142, and the second conductive post 144 is located between the third base 142 and the third dielectric material 146, wherein the second conductive post 144 surrounds the third dielectric material 146.

[0115] In addition, the first external circuit layer 110a of the present embodiment comprises a first signal line 115 and a first ground line 117. The second external circuit layer 150a comprises a second signal line 155 and a second ground line 157. The first signal line 115, the via structure 160a and the second signal line 155 define a signal path L11. The first ground line 117, the first conductive post 124, the first circuit layer 134, the conductive connecting layer 138, the second circuit layer 136, the second conductive post 144 and the second ground line 157 define a ground path L12. Since the signal path L11 is surrounded and enclosed by the ground path L12, a good high frequency and high speed loop can be formed. In addition, the two sides of the signal path L11 are located on the same plane as the two sides of the ground path L12 respectively, and since the circuit board 100a of the present embodiment has the first conductive post 124 and the second conductive post 144, the shielding gap can be filled up to form a complete shielding, which can effectively reduce the signal energy loss and noise interference, and thus the signal transmission reliability can be improved.

[0116] In short, the signal path L11 defined by the first signal line 115, the via structure 160a, and the second signal line 155 is surrounded by the ground path L12 defined by the first ground line 117, the first conductive post 124, the first circuit layer 134, the conductive connection layer 138, the second circuit layer 136, the second conductive post 144, and the second ground line 157. That is, the signal path L11 capable of transmitting high-frequency high-speed signals such as 5G is surrounded by the ground path L12 with good sealing, thereby forming a good high-frequency high-speed loop, so that the circuit board 100a of the present embodiment can have better signal integrity. Here, the high frequency refers to a frequency greater than 1 GHz; and the high speed refers to a data transmission speed greater than 100 Mbps. Furthermore, it is generally known that high-frequency circuits emphasize the speed and quality of transmitted signals, and the main factors affecting these two are the electrical properties of the transmission material, i.e. the material dielectric constant (Dk) and dielectric loss (Df). By reducing the dielectric constant and dielectric loss of the substrate, signal propagation delay time can be effectively reduced, and signal transmission rate and signal transmission loss can be improved.

[0117] Since the present embodiment only provides the first dielectric material 126, the second dielectric material 135, and the third dielectric material 146 around the via 162, compared with the prior art in which the entire substrate uses this dielectric material, the present embodiment can effectively reduce the amount of dielectric material used, effectively reduce costs, and improve signal transmission rate and reduce signal transmission loss. Furthermore, the first substrate 120, the second substrate 130, and the third substrate 140 provided by the present embodiment are finished circuit boards, while the first metal layer 110 and the second metal layer 150 are semi-finished products, and the first metal layer 110, the first substrate 120, the second substrate 130, the third substrate 140, and the second metal layer 150 are integrated together by pressing. The via structure 160a, the conductive connection layer 138 of the second substrate 130, and the second dielectric material 135 define a coaxial via, wherein the second dielectric material 135 is located between the via structure 160a and the conductive connection layer 138. Compared with the prior art in which the insulation layer is pressed to increase the number of layers to block the internal conductor layer and the external conductor layer of the coaxial via, the manufacturing method of the circuit board 100a of the present embodiment can avoid the problem of impedance mismatch affecting the integrity of high-frequency signals. In addition, since the present embodiment does not use the insulation layer pressing method to increase the number of layers of the circuit board, the via hole design is not used to connect adjacent structure layers. Therefore, in addition to overcoming the energy loss of the via hole, the manufacturing method of the circuit board 100a of the present embodiment can also avoid the problem of poor reliability of the thermal stress of the via hole.

[0118] It must be noted that the following embodiments use the component reference numerals and some content from the foregoing embodiments, with the same reference numerals used to represent the same or similar components, and descriptions of the same technical content omitted. For explanations of the omitted parts, please refer to the foregoing embodiments; these will not be repeated in the following embodiments.

[0119] Figures 2A-2B This is a cross-sectional schematic diagram showing partial steps of another method for manufacturing a circuit board according to another embodiment of the present invention. Please also refer to... Figure 1D as well as Figure 2A The circuit board manufacturing method in this embodiment is similar to the circuit board manufacturing method described above, except that: Figure 1D After the step of forming the conductive material layer 163, please refer to... Figure 2A A plugging process is performed to fill the vias 162 with a dielectric layer 166, wherein the dielectric layer 166 completely fills the vias 162. Preferably, the upper surface F1 and lower surface F2 of the dielectric layer 166 are flush with the top surface S1 and bottom surface S2 of the conductive material layer 163, respectively. If the dielectric layer 166 is higher than the top surface S1 and bottom surface S2 of the conductive material layer 153, the upper surface F1 and lower surface F2 of the dielectric layer 166 can be selectively flush with the top surface S1 and bottom surface S2 of the conductive material layer 163 by grinding, thereby maintaining better flatness. Here, the material of the dielectric layer 166 is, for example, resin, which can be regarded as a plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.

[0120] Afterwards, please refer to the following: Figure 2A and Figure 2B A photolithography process is performed to pattern the conductive material layer 163, the first metal layer 110, and the second metal layer 150, thereby forming the first external circuit layer 110b and the second external circuit layer 150b. The first external circuit layer 110b is located on the first substrate 122 of the first substrate 120 and has a top surface S1, while the second external circuit layer 150b is located on the third substrate 142 of the third substrate 140 and has a bottom surface S2. The upper surface F1 and the lower surface F2 of the dielectric layer 166 are respectively flush with the top surface S1 of the first external circuit layer 110b and the bottom surface S2 of the second external circuit layer 150b. Here, the via structure 160b includes a through hole 162, a conductive material layer 164, and a dielectric layer 166 located within the through hole 162. The fabrication of the circuit board 100b is now complete.

[0121] Figures 3A-3B This is a cross-sectional schematic diagram showing partial steps of another method for manufacturing a circuit board according to another embodiment of the present invention. Please also refer to... Figure 2A as well asFigure 3A The manufacturing method of the circuit board of the present embodiment is similar to the manufacturing method of the circuit board described above, with the difference being that, after the step of filling the dielectric layer 166 into the via hole 162, please refer to Figure 2A The cap layer 170 is formed on the conductive material layer 163. The cap layer 170 covers the conductive material layer 163 and the upper surface F1 and the lower surface F2 of the dielectric layer 166. Here, the material of the cap layer 155 is copper, but is not limited to this. Then, please refer to Figure 3A and Figure 3A The photolithography process is performed to pattern the cap layer 170, the conductive material layer 163, the first metal layer 110 and the second metal layer 150, so as to form the first external circuit layer 110c and the second external circuit layer 150c. The first external circuit layer 110c and the second external circuit layer 150c respectively cover the upper surface F1 and the lower surface F2 of the dielectric layer 166 opposite to each other. At this point, the manufacturing of the circuit board 100c is completed. Figure 3B

[0122] Figures 4A-4K is a cross-sectional schematic view of another manufacturing method of another circuit board according to another embodiment of the present application. Please refer to Figure 1A and Figure 4G The manufacturing method of the circuit board of the present embodiment is similar to the manufacturing method of the circuit board described above, with the difference being that the present embodiment does not have the third substrate 140 described above, and the second substrate 230 is also different from the second substrate 130 described above.

[0123] In detail, please refer to Figure 4A The second substrate 231, the metal layer M1, the second circuit layer 234, the third substrate 233, the second conductive column 238, the third dielectric material 239 and the metal layer M2 are provided. The metal layer M1 and the second circuit layer 234 are respectively located on the opposite sides of the second substrate 231, wherein the metal layer M1 is a copper foil layer, and the second circuit layer 234 exposes part of the surface of the second substrate 231. The third dielectric material 239 penetrates the third substrate 233, and the second conductive column 238 penetrates the third dielectric material 239, wherein the two surfaces of the second conductive column 238 and the third dielectric material 239 opposite to each other protrude from the opposite surfaces of the third substrate 233. The third substrate 233 is located between the second substrate 231 and the metal layer M2, wherein the third substrate 233 at this time is in a B-stage state, that is, has not been completely cured. Here, the manufacturing method of the third substrate 233, the second conductive column 238 and the third dielectric material 239 is the same as the forming method of the third substrate 140 in Figure 1A , which will not be described here.

[0124] Then, please refer to Figure 4B ​The second substrate 231, the third substrate 233 and the metal layer M2 are then subjected to a thermal compression process. As a result of the thermal compression process, the third substrate 233 is transformed from a B-stage state to a C-stage state, i.e. a fully cured state, and the second substrate 231, the second circuit layer 234 and the metal layer M2 are connected to the third substrate 233. At this time, the second circuit layer 234 is electrically connected to the metal layer M2 via the second conductive pillars 238.

[0125] Next, referring to Figure 4C , an opening H is formed to pass through the metal layer Ml, the second substrate 231, the second circuit layer 234, the third substrate 233, the third dielectric material 239 and the metal layer M2. Next, referring to Figure 4D , a metal layer M3 is formed to cover the inner walls of the opening H and the metal layers Ml and M2. Next, referring to Figure 4E , the second dielectric material 237 is filled into the opening H, wherein the two surfaces of the second dielectric material 237 opposite to each other are flush with the metal layer M3. Next, referring to Figure 4E and Figure 4F , the metal layers Ml, M2 and M3 are patterned by a photolithography process to form the first circuit layer 232 on the second substrate 231, the third circuit layer 236 on the third substrate 233 and the conductive connection layer 235 connecting the first circuit layer 232 and the third circuit layer 236. At this time, the second substrate 230 is completed.

[0126] Next, referring to Figure 4G , the metal layer 210, the first substrate 220 and the second substrate 230 are provided. The metal layer 210 is, for example, a copper foil layer, but is not limited thereto. The first substrate 220 includes a first substrate 222, a first dielectric material 226 and a first conductive pillar 224. The first dielectric material 226 and the first conductive pillar 224 pass through the first substrate 222, and the first conductive pillar 224 is located between the first substrate 222 and the first dielectric material 226, wherein the first conductive pillar 224 surrounds the first dielectric material 226. Here, the first substrate 220 is formed in the same manner as the second substrate 230. Figure 1AThe formation method of the first substrate 120 is the same, and will not be described again here. The second substrate 230 includes a second substrate 231, a third substrate 233, a second dielectric material 237, a third dielectric material 239, a first circuit layer 232, a second circuit layer 234, a third circuit layer 236, a conductive connection layer 235, a second conductive pillar 238, and an opening H. The second substrate 231 has a first surface S3 and a second surface S4 that are opposite to each other. The first circuit layer 232 and the second circuit layer 234 are located on the first surface S3 and the second surface S4, respectively, wherein the second circuit layer 234 is located between the first circuit layer 232 and the third circuit layer 236. The third substrate 233 and the third dielectric material 239 are located on the second surface S4 of the second substrate 231, while the third circuit layer 236 is located on the third substrate 233 and the third dielectric material 239. The second conductive pillar 238 electrically connects the second circuit layer 234 and the third circuit layer 236, wherein the second conductive pillar 238 surrounds the third dielectric material 239. An opening H penetrates the second substrate 231 and the third dielectric material 239. A conductive connection layer 235 covers the inner wall of the opening H and electrically connects the first circuit layer 232, the second circuit layer 234, and the third circuit layer 236. The second dielectric material 237 fills the opening H, and the conductive connection layer 235 surrounds the second dielectric material 237. It should be noted that the aforementioned first conductive pillar 224, second conductive pillar 238, first circuit layer 232, second circuit layer 234, third circuit layer 236, and conductive connection layer 235 can be regarded as multiple conductive structures, and thus multiple conductive structures surrounding the first dielectric material 226, second dielectric material 237, and third dielectric material 239 have been formed. Here, the metal layer 210, the first substrate 220, and the second substrate 230 can be regarded as a composite printed circuit board.

[0127] Next, please refer to Figure 4H A hot-pressing process is performed to press the metal layer 210, the first substrate 220, and the second substrate 230 together. Because a hot-pressing process is used, the first substrate 222 of the first substrate 220 will change from the original stage B state to the stage C state, that is, it will be in a fully cured state, so that the metal layer 210 and the second substrate 230 are connected to the first substrate 220.

[0128] Next, please refer to Figure 4I This forms a through-hole 242 to penetrate the metal layer 210, the first dielectric material 226, and the second dielectric material 237. Next, please refer to... Figure 4J A conductive material layer 243 is formed to cover the inner wall of the through hole 242, wherein the conductive material layer 243 also extends to cover the metal layer 210 and the third circuit layer 236.

[0129] Afterwards, please refer to the following: Figure 4J and Figure 4KThe first external circuit layer 210a is formed on the first substrate 220, and the second external circuit layer 250a is formed on the second substrate 230. The first external circuit layer 210a includes a first signal line 215 and a first ground line 217. The second external circuit layer 250a includes a second signal line 255 and a second ground line 257. The first signal line 215, the via structure 240a, and the second signal line 255 define a signal path L21. The first ground line 217, the first conductive post 224, the first circuit layer 232, the conductive connection layer 235, and the second ground line 257 define a ground path L22, which surrounds the signal path L21. Thus, the fabrication of the circuit board 200a is completed.

[0130] In structure, please refer to Figure 1E and Figure 4KThe circuit board 200a of the present embodiment is similar to the circuit board 100a described above, except that the circuit board 200a does not have the third substrate 140 described above, and the via 242 of the via structure 240a penetrates the first dielectric material 226 of the first substrate 220 and the second dielectric material 237 of the second substrate 230, and the conductive material layer 244 of the via structure 240a covers the inner wall of the via 242 and electrically connects the first external circuit layer 210a and the second external circuit layer 250a. In detail, the circuit board 200a includes the first external circuit layer 210a, the first substrate 220, the second substrate 230, the via structure 240a, and the second external circuit layer 250a. The first substrate 220 includes a first base 222, a first dielectric material 226, and a first conductive pillar 224. The first dielectric material 226 and the first conductive pillar 224 penetrate the first base 222, and the first conductive pillar 224 is between the first base 222 and the first dielectric material 226, wherein the first conductive pillar 222 surrounds the first dielectric material 226. The second substrate 230 includes a second base 231, a third base 233, a second dielectric material 237, a third dielectric material 239, a first circuit layer 232, a second circuit layer 234, a third circuit layer 236, a conductive connection layer 235, a second conductive pillar 238, and an opening H. The second base 231 has a first surface S3 and a second surface S4 opposite to each other. The first circuit layer 232 and the second circuit layer 234 are on the first surface S3 and the second surface S4, respectively. The third base 233 and the third dielectric material 239 are on the second surface S4 of the second base 231. The third circuit layer 236 is on the third base 233 and the third dielectric material 239, and the second circuit layer 234 is between the first circuit layer 232 and the third circuit layer 236. The second conductive pillar 238 electrically connects the second circuit layer 234 and the third circuit layer 236, wherein the second conductive pillar 238 surrounds the third dielectric material 239. The opening H penetrates the second base 231 and the third dielectric material 239. The conductive connection layer 235 covers the inner wall of the opening H and electrically connects the first circuit layer 232, the second circuit layer 234, and the third circuit layer 236. The second dielectric material 237 fills the opening H, and the conductive connection layer 235 surrounds the second dielectric material 237. Here, the conductive structure includes the first conductive pillar 222, the second conductive pillar 238, the first circuit layer 232, the second circuit layer 234, the third circuit layer 236, and the conductive connection layer 235.

[0131] In brief, the signal path L21 defined by the first signal line 215, the via structure 240a, and the second signal line 255 is surrounded by the ground path L22 defined by the first ground line 217, the first conductive post 224, the first line layer 232, the conductive connection layer 235, and the second ground line 257. That is, the signal path L21 capable of transmitting high frequency high speed signals such as 5G is surrounded by the ground path L22 with good closure, thereby forming a good high frequency high speed loop, and the circuit board 200a of the present embodiment can have better signal integrity. In addition, the via structure 240a, the conductive connection layer 235 of the second substrate 230, and the second dielectric material 237 define a coaxial via, wherein the second dielectric material 237 is located between the via structure 240a and the conductive connection layer 235. Compared with the prior art method of pressing the insulating layer to block the internal conductor layer and the external conductor layer of the coaxial via, the manufacturing method of the circuit board 200a of the present embodiment can avoid the problem of impedance mismatch affecting the integrity of high frequency signals.

[0132] Figures 5A-5B is a cross-sectional view of a partial step of another manufacturing method of another circuit board according to another embodiment of the present application. Please refer to Figure 4J and Figure 5A The manufacturing method of the circuit board of the present embodiment is similar to the above-mentioned manufacturing method of the circuit board, and the difference between the two is that after the step of forming the conductive material layer 243 in 4J, please refer to Figure 5A , a plugging process is performed to fill the dielectric layer 246 in the through hole 242, wherein the dielectric layer 246 fills the through hole 242. Preferably, the upper surface F3 and the lower surface F4 of the dielectric layer 246 are respectively cut flush with the top surface S5 and the bottom surface S6 of the conductive material layer 243. If the dielectric layer 246 is higher than the top surface S5 and the bottom surface S6 of the conductive material layer 243, the upper surface F3 and the lower surface F4 of the dielectric layer 246 can be optionally cut flush with the top surface S5 and the bottom surface S6 of the conductive material layer 243 by grinding. Here, the material of the dielectric layer 246, such as resin, can be considered as a plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.

[0133] After that, please refer to Figure 5A and Figure 5B, a lithography process is performed to pattern the conductive material layer 243 and the metal layer 210, thereby forming a first external circuit layer 210b and a second external circuit layer 250b. The first external circuit layer 210b is on the first substrate 220 and has a top surface S5, and the second external circuit layer 250b is on the third circuit layer 236 of the second substrate 230 and has a bottom surface S6. The upper surface F3 and the lower surface F4 of the dielectric layer 246 are flush with the top surface S5 of the first external circuit layer 210b and the bottom surface S6 of the second external circuit layer 250b, respectively. Here, the via structure 240b includes the via hole 242, the conductive material layer 244, and the dielectric layer 246 in the via hole 242. Thus, the fabrication of the circuit board 200b is completed.

[0134] Figures 6A-6B is a cross-sectional view of a partial step of another method of fabricating a circuit board according to another embodiment of the present application. Please refer to Figure 5A and Figure 6A The method of fabricating a circuit board according to the present embodiment is similar to the method of fabricating a circuit board described above, except that Figure 5A after the step of filling the dielectric layer 246 in the via hole 242, please refer to Figure 6A a cap layer 260 is formed on the conductive material layer 243. The cap layer 260 covers the conductive material layer 243 and the upper surface F3 and the lower surface F4 of the dielectric layer 246. Here, the material of the cap layer 260 is copper, but is not limited to copper. Then, please refer to Figure 6A and Figure 6B a lithography process is performed to pattern the cap layer 260, the conductive material layer 243, and the metal layer 210, thereby forming a first external circuit layer 210c and a second external circuit layer 250c. The first external circuit layer 210c and the second external circuit layer 250c cover the upper surface F3 and the lower surface F4 of the dielectric layer 246, respectively. Thus, the fabrication of the circuit board 200c is completed.

[0135] Figures 7A-7L is a cross-sectional view of a method of fabricating a circuit board according to another embodiment of the present application. Please refer to Figure 1A and Figure 7H The method of fabricating a circuit board according to the present embodiment is similar to the method of fabricating a circuit board described above, except that the present embodiment does not have the third substrate 140 described above, and the second substrate 330 is different from the second substrate 130 described above.

[0136] In detail, please refer to Figure 7A, a second substrate 331, a metal layer M4, a second circuit layer 334, a third dielectric material 333, and a metal layer M5 are provided. The metal layer M4 and the second circuit layer 334 are respectively located on opposite sides of the second substrate 331, wherein the second circuit layer 334 exposes a portion of the surface of the second substrate 331. The metal layer M5 is disposed on the third dielectric material 333 and completely covers one side surface of the third dielectric material 333. The third dielectric material 333 is located between the second substrate 331 and the metal layer M5, wherein the third dielectric material 333 is in a B-stage state at this time, that is, has not yet completely cured. Next, please refer to Figure 7B , a heat pressing process is performed to press the second substrate 331 and the third dielectric material 333. Since the heat pressing process is used, the third dielectric material 333 at this time is changed from the original B-stage state to a C-stage state, that is, a completely cured state, so that the second substrate 331, the second circuit layer 334, and the metal layer M5 are connected to the third dielectric material 333.

[0137] Next, please refer to Figure 7C , an opening H' is formed to penetrate the metal layer M4, the second substrate 331, the second circuit layer 334, the third dielectric material 333, and the metal layer M5. Next, please refer to Figure 7D , a via hole T is formed to penetrate the metal layer M5 and the third dielectric material 333 to expose a portion of the second circuit layer 334. Next, please refer to Figure 7E , a metal layer M6 is formed to cover the inner wall of the opening H', the metal layer M4, and the metal layer M5, and fill the via hole T. Next, please refer to Figure 7F , a second dielectric material 337 is filled in the opening H', wherein the two opposite surfaces of the second dielectric material 337 are respectively flush with the metal layer M6. Next, please refer to Figure 7F and Figure 7G , by means of a photolithography process, the metal layers M4, M5, and M6 are patterned to form a first circuit layer 332 on the second substrate 331, a third circuit layer 336 on the third dielectric material 333, a conductive connection layer 335 connecting the first circuit layer 332 and the third circuit layer 336, and a via hole 338 connecting the second circuit layer 334 and the third circuit layer 336. Thus, the fabrication of the second substrate 330 is completed.

[0138] Next, please refer to Figure 7H, the metal layer 310, the first substrate 320 and the second substrate 330 are provided. The first substrate 320 includes a first base 322, a first dielectric material 326 and a first conductive post 324. The first dielectric material 326 and the first conductive post 324 penetrate through the first base 322, and the first conductive post 324 is between the first base 322 and the first dielectric material 326, wherein the first conductive post 324 surrounds the first dielectric material 326. Here, the first substrate 320 is formed in the same manner as the first substrate 120 in Figure 1A , the metal layer 310, the first substrate 320 and the second substrate 330 are provided. The first substrate 320 includes a first base 322, a first dielectric material 326 and a first conductive post 324. The first dielectric material 326 and the first conductive post 324 penetrate through the first base 322, and the first conductive post 324 is between the first base 322 and the first dielectric material 326, wherein the first conductive post 324 surrounds the first dielectric material 326. Here, the first substrate 320 is formed in the same manner as the first substrate 120 in

[0139] Next, referring to Figure 7I , a hot-pressing procedure is performed to press the metal layer 310, the first substrate 320 and the second substrate 330. Since the hot-pressing procedure is used, the first base 322 of the first substrate 320 is changed from the B-stage state to the C-stage state, i.e. the fully cured state, so that the metal layer 310 and the second substrate 330 are connected to the first substrate 320.

[0140] Next, referring to Figure 7J , the via 242 is formed to penetrate through the metal layer 310, the first dielectric material 326 and the second dielectric material 337. Next, referring toFigure 7K A conductive material layer 343 is formed to cover the inner wall of the via 342, wherein the conductive material layer 343 also extends to cover the metal layer 310 and the third line layer 336.

[0141] Thereafter, referring to Figure 7K and Figure 7L , the conductive material layer 343 and the metal layer 310 are patterned to form a first external line layer 310a on the first substrate 320 and a second external line layer 350a on the second substrate 330, and a via structure 340a extending through the first dielectric material 326 and the second dielectric material 337. The first external line layer 310a is formed on the first base 322, the first conductive post 324 and the first dielectric material 326 of the first substrate 320, and electrically connects the first conductive post 324 and the via structure 340a. The second external line layer 350a is formed on the third line layer 336 of the second substrate 330, and electrically connects the third line layer 336 and the via structure 340a. In particular, the first external line layer 310a includes a first signal line 315 and a first ground line 317. The second external line layer 350a includes a second signal line 355 and a second ground line 357. The first signal line 315, the via structure 340a and the second signal line 355 define a signal path L31. The first ground line 317, the first conductive post 324, the first line layer 332, the conductive connection layer 335 and the second ground line 357 define a ground path L32, which surrounds the signal path L31. Thus, the fabrication of the circuit board 300a is completed.

[0142] Structurally, referring to Figure 1E and Figure 7LThe circuit board 300a of the present embodiment is similar to the circuit board 100a described above, except that in the present embodiment, the circuit board 300a does not have the third substrate 140 described above, and the via hole structure 340a has a via hole 342 that penetrates the first dielectric material 326 of the first substrate 320 and the second dielectric material 337 of the second substrate 330, and the conductive material layer 344 of the via hole structure 340a covers the inner wall of the via hole 342 and electrically connects the first external circuit layer 310a and the second external circuit layer 350a. In detail, the circuit board 300a includes the first external circuit layer 310a, the first substrate 320, the second substrate 330, the via hole structure 340a, and the second external circuit layer 350a. The first substrate 320 includes a first base 322, a first dielectric material 326, and a first conductive pillar 324. The first dielectric material 326 and the first conductive pillar 324 penetrate the first base 322, and the first conductive pillar 324 is located between the first base 322 and the first dielectric material 326, wherein the first conductive pillar 324 surrounds the first dielectric material 326. The second substrate 330 includes a second base 331, a second dielectric material 337, a third dielectric material 333, a first circuit layer 332, a second circuit layer 334, a third circuit layer 336, a conductive connection layer 335, a via hole 338, and an opening H'. The second base 331 has a first surface S7 and a second surface S8 opposite to each other. The first circuit layer 332 and the second circuit layer 334 are located on the first surface S7 and the second surface S8, respectively. The second circuit layer 334 is located between the first circuit layer 332 and the third circuit layer 336. The third dielectric material 333 is located on the second surface S8 of the second base 331. The third circuit layer 336 is located on the third dielectric material 333. The via hole 338 penetrates the third dielectric material 333 and electrically connects the second circuit layer 334 and the third circuit layer 336. The opening H' penetrates the second base 331 and the third dielectric material 333. The conductive connection layer 335 covers the inner wall of the opening H' and electrically connects the first circuit layer 332, the second circuit layer 334, and the third circuit layer 336. The second dielectric material 337 fills the opening H', and the conductive connection layer 335 surrounds the second dielectric material 337. Here, the conductive structure includes the first conductive pillar 324, the via hole 338, the first circuit layer 332, the second circuit layer 334, the third circuit layer 336, and the conductive connection layer 335.

[0143] In brief, the signal path L31 defined by the first signal line 315, the via structure 340a, and the second signal line 355 is surrounded by the ground path L32 defined by the first ground line 317, the first conductive post 324, the first line layer 332, the conductive connection layer 335, and the second ground line 357. That is, the signal path L31 capable of transmitting high frequency and high speed signals such as 5G is surrounded by the ground path L32 with good closure, thereby forming a good high frequency and high speed loop, and the circuit board 300a of the present embodiment can have better signal integrity. In addition, the via structure 340a, the conductive connection layer 335 and the second dielectric material 337 of the second substrate 330 define a coaxial via, wherein the second dielectric material 337 is located between the via structure 340a and the conductive connection layer 335. Compared with the prior art method of pressing the insulating layer to block the internal conductor layer and the external conductor layer of the coaxial via, the manufacturing method of the circuit board 300a of the present embodiment can avoid the problem of impedance mismatch affecting the integrity of high frequency signals.

[0144] Figures 8A-8B is a cross-sectional view of a partial step of another manufacturing method of another circuit board according to another embodiment of the present application. Please refer to Figure 7K and Figure 8A The manufacturing method of the circuit board of the present embodiment is similar to the above-mentioned manufacturing method of the circuit board, and the difference between the two is that: after the step of forming the conductive material layer 343 in 7K, please refer to Figure 8A , a plugging process is performed to fill the dielectric layer 346 in the through hole 342, wherein the dielectric layer 346 fills the through hole 342. Preferably, the upper surface F5 and the lower surface F6 of the dielectric layer 346 are respectively flush with the top surface S9 and the bottom surface S10 of the conductive material layer 343. If the dielectric layer 346 is higher than the top surface S9 and the bottom surface S10 of the conductive material layer 343, the upper surface F5 and the lower surface F6 of the dielectric layer 346 can be optionally ground to be flush with the top surface S9 and the bottom surface S10 of the conductive material layer 343. Here, the material of the dielectric layer 346, such as resin, can be considered as a plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05, thereby providing insulation and appropriate impedance matching.

[0145] After that, please refer to Figure 8A and Figure 8BA photolithography process is performed to pattern the conductive material layer 343 and the metal layer 310, forming a first external circuit layer 310b and a second external circuit layer 350b. The first external circuit layer 310b is located on the first substrate 322 of the first substrate 320 and has a top surface S9, while the second external circuit layer 350b is located on the third circuit layer 336 of the second substrate 330 and has a bottom surface S10. The upper surface F5 and the lower surface F6 of the dielectric layer 346 are respectively flush with the top surface S9 of the first external circuit layer 310b and the bottom surface S10 of the second external circuit layer 350b. Here, the via structure 340b includes a through hole 342, a conductive material layer 344, and a dielectric layer 346 located within the through hole 342. At this point, the fabrication of the circuit board 300b is complete.

[0146] Figures 9A-9B This is a cross-sectional schematic diagram showing partial steps of another method for manufacturing a circuit board according to another embodiment of the present invention. Please also refer to... Figure 8A as well as Figure 9A The circuit board manufacturing method in this embodiment is similar to the circuit board manufacturing method described above, except that: Figure 8A After filling the via 342 with dielectric layer 346, please refer to... Figure 9A A capping layer 360 is formed on the conductive material layer 343. The capping layer 360 covers the upper surface F5 and lower surface F6 of the conductive material layer 343 and the dielectric layer 346. Here, the material of the capping layer 360 may be, for example, copper, but is not limited thereto. Please refer to the following: Figure 9A and Figure 9B A photolithography process is performed to pattern the cover layer 360, the conductive material layer 343, and the metal layer 310, thereby forming the first external circuit layer 310c and the second external circuit layer 350c. The first external circuit layer 310c and the second external circuit layer 350c respectively cover the upper surface F5 and the lower surface F6 of the dielectric layer 346, which are opposite each other. At this point, the fabrication of the circuit board 300c is complete.

[0147] Figures 10A-10C This is a cross-sectional schematic diagram of various electronic devices according to multiple embodiments of the present invention. Please refer to [the diagram first]. Figure 10A In this embodiment, the electronic device 10a includes, for example, the above-described... Figure 3BThe electronic device 10a of this embodiment includes a circuit board 100c and an electronic component 400, wherein the electronic component 400 is electrically connected to the circuit board 100c and includes a plurality of pads 410. Furthermore, the electronic device 10a of this embodiment also includes a plurality of connectors 500 disposed between the second external circuit layer 150c of the circuit board 100c and the pads 410 of the electronic component 400, wherein the electronic component 400 is electrically connected to the circuit board 100c via the connectors 500. Here, the connectors 500 are, for example, solder balls, but are not limited thereto. In application, an antenna structure can be provided on the other side of the circuit board 100c opposite to the electronic component 400, and the antenna structure is electrically connected to the first external circuit layer 110c of the circuit board 100c. In the application of integrated circuits and antennas, the circuit board 100c of this embodiment can solve the problem of signal interference in the same plane, reduce signal energy loss and noise interference, thereby improving signal transmission reliability.

[0148] Next, please refer to Figure 10B In this embodiment, the electronic device 10b includes, for example, the above-mentioned... Figure 6B The electronic device 10b of this embodiment includes a circuit board 200c and an electronic component 400, wherein the electronic component 400 is electrically connected to the circuit board 200c and includes a plurality of pads 410. Furthermore, the electronic device 10b of this embodiment also includes a plurality of connectors 500 disposed between the second external circuit layer 250c of the circuit board 200c and the pads 410 of the electronic component 400, wherein the electronic component 400 is electrically connected to the circuit board 200c via the connectors 500. Here, the connectors 500 are, for example, solder balls, but are not limited thereto. In application, an antenna structure can be provided on the other side of the circuit board 200c opposite to the electronic component 400, and the antenna structure is electrically connected to the first external circuit layer 210c of the circuit board 200c. In the application of integrated circuits and antennas, the circuit board 200c of this embodiment can solve the problem of signal interference in the same plane, reduce signal energy loss and noise interference, thereby improving signal transmission reliability.

[0149] Finally, please refer to Figure 10C In this embodiment, the electronic device 10c includes, for example, the above-mentioned... Figure 9BThe electronic device 10c further includes a plurality of connecting members 500 disposed between the second external circuit layer 350c of the circuit board 300c and the pads 410 of the electronic component 400, wherein the electronic component 400 is electrically connected to the circuit board 300c through the connecting members 500. Here, the connecting members 500 are, for example, solder balls, but are not limited thereto. In application, an antenna structure can be disposed on the other side of the circuit board 300c relative to the electronic component 400, and the antenna structure is electrically connected to the first external circuit layer 310c of the circuit board 300c. In the application of integrated circuits and antennas, the circuit board 300c of the present embodiment can solve the problem of signal interference in the same plane, reduce signal energy loss and noise interference, and thus improve signal transmission reliability.

[0150] In summary, in the design of the circuit board of the present application, the via structure is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path, and the conductive structures are electrically connected to each other and to the first external circuit layer and the second external circuit layer to define a ground path, wherein the ground path surrounds the signal path. In this way, a good high-frequency high-speed signal loop can be formed, and in subsequent applications of integrated circuits and antennas, the problem of signal interference in the same plane can also be solved, signal energy loss can be reduced, and noise interference can be reduced, thereby improving signal transmission reliability. In addition, the via structure of the present application at least penetrates the first dielectric material and the second dielectric material, that is, the dielectric materials with different dielectric constants are disposed around the conductive via structure, which can improve signal transmission rate and reduce signal transmission loss.

[0151] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can modify the technical solutions described in the above embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A circuit board, characterized in that, include: The structure comprises a first dielectric material, a second dielectric material, a third dielectric material, a first external circuit layer, a second external circuit layer, multiple conductive structures, and via structures, wherein... The second dielectric material is located between the first dielectric material and the third dielectric material, and the dielectric constant of the first dielectric material is different from the dielectric constant of the second dielectric material and the dielectric constant of the third dielectric material; The first external circuit layer is disposed on the first dielectric material; The second external circuit layer is disposed on the third dielectric material; The via structure penetrates at least through the first dielectric material and the second dielectric material, and is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path; as well as The plurality of conductive structures are electrically connected to each other and surround the first dielectric material, the second dielectric material and the third dielectric material. The plurality of conductive structures are electrically connected to the first external circuit layer and the second external circuit layer to define a ground path, wherein the ground path surrounds the signal path.

2. The circuit board according to claim 1, characterized in that, The plurality of conductive structures include a plurality of first conductive pillars, a plurality of second conductive pillars, a first circuit layer, a second circuit layer, and a conductive connection layer. The plurality of first conductive pillars surround the first dielectric material, the plurality of second conductive pillars surround the third dielectric material, and the conductive connection layer connects the first circuit layer and the second circuit layer and surrounds the second dielectric material.

3. The circuit board according to claim 2, characterized in that, Also includes: The first substrate includes a first base, a first dielectric material, and a plurality of first conductive pillars, wherein the first dielectric material and the plurality of first conductive pillars penetrate the first base, and the plurality of first conductive pillars are located between the first base and the first dielectric material. The second substrate includes a second base, a second dielectric material, a first circuit layer, a second circuit layer, and a conductive connection layer. The second base has a first surface and a second surface opposite to each other and an opening. The opening penetrates the second base. The first circuit layer and the second circuit layer are located on the first surface and the second surface, respectively. The conductive connection layer covers the inner wall of the opening and electrically connects the first circuit layer and the second circuit layer. The second dielectric material fills the opening. as well as The third substrate includes a third base, the third dielectric material, and the plurality of second conductive pillars, wherein the third dielectric material and the plurality of second conductive pillars penetrate the third base, and the plurality of second conductive pillars are located between the third base and the third dielectric material.

4. The circuit board according to claim 3, characterized in that, The first external circuit layer includes a first signal line and a first ground line, while the second external circuit layer includes a second signal line and a second ground line. The first signal line, the via structure, and the second signal line define the signal path, and the first ground line, the plurality of first conductive pillars, the first circuit layer, the conductive connection layer, the second circuit layer, the plurality of second conductive pillars, and the second ground line define the ground path.

5. The circuit board according to claim 3, characterized in that, The via structure includes a through-hole and a conductive material layer. The through-hole penetrates the first dielectric material, the second dielectric material, and the third dielectric material, while the conductive material layer covers the inner wall of the through-hole and electrically connects the first external circuit layer and the second external circuit layer.

6. The circuit board according to claim 5, characterized in that, The via structure further includes a dielectric layer that fills the via, and the upper and lower surfaces of the dielectric layer are respectively flush with the top surface of the first external circuit layer and the bottom surface of the second external circuit layer.

7. The circuit board according to claim 5, characterized in that, The via structure further includes a dielectric layer that fills the via, and the first external circuit layer and the second external circuit layer respectively cover the upper and lower surfaces of the dielectric layer that are opposite to each other.

8. The circuit board according to claim 3, characterized in that, The dielectric constant of the first substrate and the dielectric constant of the third substrate are both higher than 3.6, while the dielectric loss of the first substrate and the dielectric loss of the third substrate are both lower than 0.

02.

9. The circuit board according to claim 1, characterized in that, The plurality of conductive structures include a plurality of first conductive pillars, a plurality of second conductive pillars, a first circuit layer, a second circuit layer, a third circuit layer, and a conductive connection layer. The plurality of first conductive pillars surround the first dielectric material, the plurality of second conductive pillars surround the third dielectric material, the second circuit layer is located between the first circuit layer and the third circuit layer, and the conductive connection layer connects the first circuit layer, the second circuit layer, and the third circuit layer and surrounds the second dielectric material.

10. The circuit board according to claim 9, characterized in that, Also includes: The first substrate includes a first base, a first dielectric material, and a plurality of first conductive pillars, wherein the first dielectric material and the plurality of first conductive pillars penetrate the first base, and the plurality of first conductive pillars are located between the first base and the first dielectric material. as well as The second substrate includes a second base, a third base, a second dielectric material, a third dielectric material, a first circuit layer, a second circuit layer, a third circuit layer, a conductive connection layer, a plurality of second conductive pillars, and an opening. The second base has a first surface and a second surface opposite to each other. The first circuit layer and the second circuit layer are respectively located on the first surface and the second surface. The third base and the third dielectric material are located on the second surface of the second base, and the third circuit layer is located on the third base and the third dielectric material. The plurality of second conductive pillars are electrically connected to the second circuit layer and the third circuit layer. The opening penetrates through the second base and the third dielectric material. The conductive connection layer covers the inner wall of the opening and is electrically connected to the first circuit layer, the second circuit layer, and the third circuit layer. The second dielectric material fills the opening.

11. The circuit board according to claim 10, characterized in that, The first external circuit layer includes a first signal line and a first ground line, while the second external circuit layer includes a second signal line and a second ground line. The first signal line, the via structure, and the second signal line define the signal path, and the first ground line, the plurality of first conductive pillars, the first circuit layer, the conductive connection layer, and the second ground line define the ground path.

12. The circuit board according to claim 10, characterized in that, The via structure includes a through-hole and a conductive material layer. The through-hole penetrates the first dielectric material and the second dielectric material, while the conductive material layer covers the inner wall of the through-hole and electrically connects the first external circuit layer and the second external circuit layer.

13. The circuit board according to claim 12, characterized in that, The via structure further includes a dielectric layer that fills the via, and the upper and lower surfaces of the dielectric layer are respectively flush with the top surface of the first external circuit layer and the bottom surface of the second external circuit layer.

14. The circuit board according to claim 13, characterized in that, The dielectric constant of the dielectric layer is higher than 3.6, and the dielectric loss of the dielectric layer is lower than 0.

05.

15. The circuit board according to claim 12, characterized in that, The via structure further includes a dielectric layer that fills the via, and the first external circuit layer and the second external circuit layer respectively cover the upper and lower surfaces of the dielectric layer that are opposite to each other.

16. The circuit board according to claim 15, characterized in that, The dielectric constant of the dielectric layer is higher than 3.6, and the dielectric loss of the dielectric layer is lower than 0.

05.

17. The circuit board according to claim 1, characterized in that, The plurality of conductive structures include a plurality of first conductive pillars, a plurality of vias, a first circuit layer, a second circuit layer, a third circuit layer, and a conductive connection layer. The plurality of first conductive pillars surround the first dielectric material, the plurality of vias penetrate the third dielectric material, the second circuit layer is located between the first circuit layer and the third circuit layer, and the conductive connection layer connects the first circuit layer, the second circuit layer, and the third circuit layer and surrounds the second dielectric material.

18. The circuit board according to claim 17, characterized in that, Also includes: The first substrate includes a first base, a first dielectric material, and a plurality of first conductive pillars, wherein the first dielectric material and the plurality of first conductive pillars penetrate the first base, and the plurality of first conductive pillars are located between the first base and the first dielectric material. as well as The second substrate includes a second base, a second dielectric material, a third dielectric material, a first circuit layer, a second circuit layer, a third circuit layer, a conductive connection layer, a plurality of vias, and an opening. The second base has a first surface and a second surface opposite to each other. The first circuit layer and the second circuit layer are respectively located on the first surface and the second surface. The third dielectric material is located on the second surface of the second base, and the third circuit layer is located on the third dielectric material. The plurality of vias electrically connect the second circuit layer and the third circuit layer. The opening penetrates the second base and the third dielectric material. The conductive connection layer covers the inner wall of the opening and is electrically connected to the first circuit layer, the second circuit layer, and the third circuit layer. The second dielectric material fills the opening.

19. The circuit board according to claim 18, characterized in that, The first external circuit layer includes a first signal line and a first ground line, while the second external circuit layer includes a second signal line and a second ground line. The first signal line, the via structure, and the second signal line define the signal path, and the first ground line, the plurality of first conductive pillars, the first circuit layer, the conductive connection layer, and the second ground line define the ground path.

20. The circuit board according to claim 18, characterized in that, The via structure includes a through-hole and a conductive material layer. The through-hole penetrates the first dielectric material and the second dielectric material, while the conductive material layer covers the inner wall of the through-hole and electrically connects the first external circuit layer and the second external circuit layer.

21. The circuit board according to claim 20, characterized in that, The via structure further includes a dielectric layer that fills the via, and the upper and lower surfaces of the dielectric layer are respectively flush with the top surface of the first external circuit layer and the bottom surface of the second external circuit layer.

22. The circuit board according to claim 20, characterized in that, The via structure further includes a dielectric layer that fills the via, and the first external circuit layer and the second external circuit layer respectively cover the upper and lower surfaces of the dielectric layer that are opposite to each other.

23. The circuit board according to claim 1, characterized in that, The dielectric constants of the first dielectric material and the third dielectric material are both less than 3.2, and the dielectric losses of the first dielectric material and the third dielectric material are both greater than 0 and less than 0.006, respectively. The dielectric constant of the second dielectric material is less than 3.4, and the dielectric loss of the second dielectric material is both greater than 0 and less than 0.

008.

24. A method for manufacturing a circuit board, characterized in that, include: Multiple conductive structures are formed around the first dielectric material, the second dielectric material, and the third dielectric material; The first dielectric material, the second dielectric material, and the third dielectric material are pressed together, wherein the second dielectric material is located between the first dielectric material and the third dielectric material, and the dielectric constant of the first dielectric material is different from the dielectric constant of the second dielectric material and the dielectric constant of the third dielectric material, and the plurality of conductive structures are electrically connected to each other. A via structure is formed to penetrate at least the first dielectric material and the second dielectric material; as well as A first external circuit layer and a second external circuit layer are formed on the first dielectric material and the third dielectric material, respectively. The first external circuit layer, the second external circuit layer and the via structure are electrically connected to define a signal path. A plurality of conductive structures are electrically connected to the first external circuit layer and the second external circuit layer to define a ground path, wherein the ground path surrounds the signal path.

25. The method for manufacturing a circuit board according to claim 24, characterized in that, The plurality of conductive structures include a plurality of first conductive pillars, a plurality of second conductive pillars, a first circuit layer, a second circuit layer, and a conductive connection layer. The plurality of first conductive pillars surround the first dielectric material, the plurality of second conductive pillars surround the third dielectric material, and the conductive connection layer connects the first circuit layer and the second circuit layer and surrounds the second dielectric material.

26. The method for manufacturing a circuit board according to claim 25, characterized in that, The step of forming the plurality of conductive structures around the first dielectric material, the second dielectric material, and the third dielectric material includes: A first substrate is provided, the first substrate including a first base, a first dielectric material and the plurality of first conductive pillars, the first dielectric material and the plurality of first conductive pillars penetrating the first base, and the plurality of first conductive pillars being located between the first base and the first dielectric material; A second substrate is provided, the second substrate comprising a second base, a second dielectric material, a first circuit layer, a second circuit layer, and a conductive connection layer. The second base has a first surface and a second surface opposite to each other and an opening penetrating the second base. The first circuit layer and the second circuit layer are respectively located on the first surface and the second surface. The conductive connection layer covers the inner wall of the opening and electrically connects the first circuit layer and the second circuit layer, while the second dielectric material fills the opening. A third substrate is provided, the third substrate including a third base, the third dielectric material and the plurality of second conductive pillars, the third dielectric material and the plurality of second conductive pillars penetrating the third base, and the plurality of second conductive pillars being located between the third base and the third dielectric material.

27. The method for manufacturing a circuit board according to claim 26, characterized in that, The step of forming the via structure to at least penetrate the first dielectric material and the second dielectric material includes: Forming a through-hole to penetrate the first dielectric material, the second dielectric material, and the third dielectric material; and A conductive material layer is formed to cover the inner wall of the through hole.

28. The method for manufacturing a circuit board according to claim 27, characterized in that, The steps of forming the first external circuit layer and the second external circuit layer on the first dielectric material and the third dielectric material, respectively, include: When pressing the first dielectric material, the second dielectric material and the third dielectric material together, the first metal layer and the second metal layer are simultaneously pressed onto the first substrate and the third substrate respectively. When forming the conductive material layer, the conductive material layer further extends and covers the first metal layer and the second metal layer; and The conductive material layer, the first metal layer, and the second metal layer are patterned to form the first external circuit layer and the second external circuit layer.

29. The method for manufacturing a circuit board according to claim 28, characterized in that, Also includes: After the conductive material layer is formed, and before the conductive material layer, the first metal layer and the second metal layer are patterned, a dielectric layer is filled in the via, the dielectric layer fills the via, and the upper and lower surfaces of the dielectric layer are respectively flush with the top and bottom surfaces of the conductive material layer.

30. The method for manufacturing a circuit board according to claim 29, characterized in that, Also includes: After filling the dielectric layer into the via and before patterning the conductive material layer, the first metal layer and the second metal layer, a capping layer is formed on the conductive material layer, wherein the capping layer covers the upper surface and the lower surface of the conductive material layer and the dielectric layer; as well as The cover layer, the conductive material layer, the first metal layer, and the second metal layer are patterned to form the first external circuit layer and the second external circuit layer.

31. The method for manufacturing a circuit board according to claim 24, characterized in that, The plurality of conductive structures include a plurality of first conductive pillars, a plurality of second conductive pillars, a first circuit layer, a second circuit layer, a third circuit layer, and a conductive connection layer. The plurality of first conductive pillars surround the first dielectric material, the plurality of second conductive pillars surround the third dielectric material, the second circuit layer is located between the first circuit layer and the third circuit layer, and the conductive connection layer connects the first circuit layer, the second circuit layer, and the third circuit layer and surrounds the second dielectric material.

32. The method for manufacturing a circuit board according to claim 31, characterized in that, The step of forming the plurality of conductive structures around the first dielectric material, the second dielectric material, and the third dielectric material includes: A first substrate is formed, the first substrate including a first base, a first dielectric material, and the plurality of first conductive pillars, the first dielectric material and the plurality of first conductive pillars penetrating the first base, and the plurality of first conductive pillars being located between the first base and the first dielectric material; and A second substrate is provided, the second substrate including a second base, a third base, a second dielectric material, a third dielectric material, a first circuit layer, a second circuit layer, a third circuit layer, a conductive connection layer, a plurality of second conductive pillars, and an opening. The second base has a first surface and a second surface opposite to each other. The first circuit layer and the second circuit layer are respectively located on the first surface and the second surface. The third base and the third dielectric material are located on the second surface of the second base, and the third circuit layer is located on the third base and the third dielectric material. The plurality of second conductive pillars are electrically connected to the second circuit layer and the third circuit layer. The opening penetrates the second base and the third dielectric material. The conductive connection layer covers the inner wall of the opening and is electrically connected to the first circuit layer, the second circuit layer, and the third circuit layer, and the second dielectric material fills the opening.

33. The method for manufacturing a circuit board according to claim 32, characterized in that, The step of forming the via structure to at least penetrate the first dielectric material and the second dielectric material includes: Forming a through-hole to penetrate the first dielectric material and the second dielectric material; and A conductive material layer is formed to cover the inner wall of the through hole.

34. The method for manufacturing a circuit board according to claim 33, characterized in that, The steps of forming the first external circuit layer and the second external circuit layer on the first dielectric material and the third dielectric material, respectively, include: When pressing the first dielectric material, the second dielectric material and the third dielectric material together, a metal layer is simultaneously pressed onto the first substrate. When forming the conductive material layer, the conductive material layer further extends and covers the metal layer and the third circuit layer; and The conductive material layer and the metal layer are patterned to form the first external circuit layer and the second external circuit layer.

35. The method for manufacturing a circuit board according to claim 34, characterized in that, Also includes: After the conductive material layer is formed, and before the conductive material layer and the metal layer are patterned, a dielectric layer is filled into the via, the dielectric layer fills the via, and the upper and lower surfaces of the dielectric layer are respectively flush with the top and bottom surfaces of the conductive material layer.

36. The method for manufacturing a circuit board according to claim 35, characterized in that, Also includes: After filling the dielectric layer into the via and before patterning the conductive material layer and the metal layer, a capping layer is formed on the conductive material layer, wherein the capping layer covers the upper and lower surfaces of the conductive material layer and the dielectric layer; as well as The cover layer, the conductive material layer, and the metal layer are patterned to form the first external circuit layer and the second external circuit layer.

37. The method for manufacturing a circuit board according to claim 24, characterized in that, The plurality of conductive structures include a plurality of first conductive pillars, a plurality of vias, a first circuit layer, a second circuit layer, a third circuit layer, and a conductive connection layer. The plurality of first conductive pillars surround the first dielectric material, the plurality of vias penetrate the third dielectric material, the second circuit layer is located between the first circuit layer and the third circuit layer, and the conductive connection layer connects the first circuit layer, the second circuit layer, and the third circuit layer and surrounds the second dielectric material.

38. The method for manufacturing a circuit board according to claim 37, characterized in that, The step of forming the plurality of conductive structures around the first dielectric material, the second dielectric material, and the third dielectric material includes: A first substrate is formed, the first substrate including a first base, a first dielectric material, and the plurality of first conductive pillars, the first dielectric material and the plurality of first conductive pillars penetrating the first base, and the plurality of first conductive pillars being located between the first base and the first dielectric material; and A second substrate is formed, comprising a second base, a second dielectric material, a third dielectric material, a first circuit layer, a second circuit layer, a third circuit layer, a conductive connection layer, a plurality of vias, and an opening. The second base has a first surface and a second surface opposite to each other. The first circuit layer and the second circuit layer are respectively located on the first surface and the second surface. The third dielectric material is located on the second surface of the second base, and the third circuit layer is located on the third dielectric material. The plurality of vias electrically connect the second circuit layer and the third circuit layer. The opening penetrates the second base and the third dielectric material. The conductive connection layer covers the inner wall of the opening and is electrically connected to the first circuit layer, the second circuit layer, and the third circuit layer. The second dielectric material fills the opening.

39. The method for manufacturing a circuit board according to claim 38, characterized in that, The step of forming the via structure to at least penetrate the first dielectric material and the second dielectric material includes: Forming a through-hole to penetrate the first dielectric material and the second dielectric material; and A conductive material layer is formed to cover the inner wall of the through hole.

40. The method for manufacturing a circuit board according to claim 39, characterized in that, The steps of forming the first external circuit layer and the second external circuit layer on the first dielectric material and the third dielectric material, respectively, include: When pressing the first dielectric material, the second dielectric material and the third dielectric material together, a metal layer is simultaneously pressed onto the first substrate. When forming the conductive material layer, the conductive material layer further extends and covers the metal layer and the third circuit layer; and The conductive material layer and the metal layer are patterned to form the first external circuit layer and the second external circuit layer.

41. The method for manufacturing a circuit board according to claim 40, characterized in that, Also includes: After the conductive material layer is formed, and before the conductive material layer and the metal layer are patterned, a dielectric layer is filled into the via, the dielectric layer fills the via, and the upper and lower surfaces of the dielectric layer are respectively flush with the top and bottom surfaces of the conductive material layer.

42. The method for manufacturing a circuit board according to claim 41, characterized in that, Also includes: After filling the dielectric layer into the via and before patterning the conductive material layer and the metal layer, a capping layer is formed on the conductive material layer, wherein the capping layer covers the upper and lower surfaces of the conductive material layer and the dielectric layer; as well as The cover layer, the conductive material layer, and the metal layer are patterned to form the first external circuit layer and the second external circuit layer.

43. A circuit board, characterized in that, include: The circuit board includes a first dielectric material, a second dielectric material, a third dielectric material, a first external circuit layer, a second external circuit layer, multiple conductive structures, and via structures, wherein... The second dielectric material is located between the first dielectric material and the third dielectric material, and the dielectric constant of the first dielectric material is different from the dielectric constant of the second dielectric material and the dielectric constant of the third dielectric material; The first external circuit layer is disposed on the first dielectric material; The second external circuit layer is disposed on the third dielectric material; The via structure penetrates at least through the first dielectric material and the second dielectric material, and is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path; as well as The plurality of conductive structures are electrically connected to each other and surround the first dielectric material, the second dielectric material and the third dielectric material. The plurality of conductive structures are electrically connected to the first external circuit layer and the second external circuit layer to define a ground path, wherein the ground path surrounds the signal path. as well as Electronic components are electrically connected to the circuit board.

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