Light emitting diode epitaxial wafer and preparation method thereof, and light emitting diode

By using an N-type GaP layer and a mismatch buffer layer in a quaternary AlGaInP red light reverse polarity epitaxial structure, the interface problem caused by GaAs was solved, the crystal quality and light extraction efficiency were improved, and a high-efficiency light-emitting diode epitaxial wafer was realized.

CN115799427BActive Publication Date: 2026-02-10JIANGXI ZHAO CHI SEMICON CO LTD
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Patent Information

Application Number
CN202211455159.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-21
Publication Date
2026-02-10
Estimated Expiration
2042-11-21

AI Technical Summary

Technical Problem

In the existing quaternary AlGaInP red light reverse polar epitaxial structure, GaAs, as the N-type ohmic contact layer, leads to high requirements for interface treatment, is prone to forming arsenic-phosphorus complexes, affects crystal quality, and absorbs light, resulting in low light extraction efficiency.

Method used

Using an N-type GaP layer as the ohmic contact layer, and through the design of a mismatch buffer layer and a current spreading layer, lattice mismatch is reduced, crystal quality and light transmittance are improved, including GaInP, AlGaInP and other stacked structures.

Benefits of technology

It effectively avoids the formation of arsenic-phosphorus complexes, improves crystal quality and luminescence efficiency, and enhances light extraction efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention discloses a light-emitting diode (LED) epitaxial wafer and its fabrication method, and the LED itself, relating to the field of semiconductor optoelectronic devices. The LED epitaxial wafer includes a GaAs substrate and, sequentially stacked on the GaAs substrate, a buffer layer, a cutoff layer, an N-type ohmic contact layer, an N-type roughening layer, an N-type confinement layer, a multiple quantum well layer, a P-type confinement layer, and a P-type ohmic contact layer; wherein the cutoff layer is a GaInP layer with a doping concentration of 4 × 10⁻⁶. 18 -6×10 18 cm ‑3 The thickness is 150-200 nm; the N-type ohmic contact layer is an N-type GaP layer with a doping concentration of 4 × 10⁻⁶. 18 -6×10 18 cm ‑3 The thickness is 60-120 nm. Implementing this invention can effectively improve the luminous efficiency of light-emitting diodes.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor optoelectronic devices, and more particularly to a light-emitting diode epitaxial wafer and its fabrication method, and a red LED. Background Technology

[0002] Quaternary AlGaInP is a semiconductor material with a wide bandgap and direct transition, and it has been widely used in the fabrication of various optoelectronic devices. Because this material can emit light across the red to yellow-green wavelength range of the visible spectrum, high-brightness visible light-emitting diodes (LEDs) made from it have attracted widespread attention. Quaternary AlGaInP high-brightness LEDs are widely used in outdoor displays, traffic lights, automotive lights, indicators, and many other applications.

[0003] In the quaternary AlGaInP red-light reverse polarity epitaxial structure, GaAs, due to its low bandgap and ease of doping, can form good ohmic contacts and is often used to fabricate the N-type ohmic contact layer. However, in the entire epitaxial structure, apart from N-type GaAs which is an arsenide, the rest are phosphides. The process of switching from phosphide to arsenide and vice versa requires high-level interface treatment. Poor treatment can easily lead to the formation of arsenic-phosphide complexes at the interface, affecting crystal quality. Moreover, GaAs, as an N-type ohmic contact layer, has a small bandgap and will absorb the light emitted by the AlGaInP material, resulting in low light extraction efficiency of the red LED. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide an epitaxial wafer for a light-emitting diode and a method for preparing the same, which can improve the light extraction efficiency of the epitaxial wafer and thus improve the luminous efficiency of the light-emitting diode.

[0005] Another technical problem that this invention aims to solve is to provide a light-emitting diode with high luminous efficiency.

[0006] To address the aforementioned problems, this invention discloses a light-emitting diode epitaxial wafer, comprising a GaAs substrate and a buffer layer, a cutoff layer, an N-type ohmic contact layer, an N-type roughening layer, an N-type confinement layer, a multiple quantum well layer, a P-type confinement layer, and a P-type ohmic contact layer sequentially stacked on the GaAs substrate.

[0007] The cutoff layer is a GaInP layer with a doping concentration of 4 × 10⁻⁶. 18 -6×10 18 cm -3 The thickness is 150-200nm;

[0008] The N-type ohmic contact layer is an N-type GaP layer with a doping concentration of 4 × 10⁻⁶. 18 -6×10 18 cm -3The thickness is 60-120nm.

[0009] As an improvement to the above technical solution, a first mismatch buffer layer is provided between the stop layer and the N-type ohmic contact layer. The first mismatch buffer layer is a GaInP layer with a doping concentration of 4×10⁻⁶. 18 -6×10 18 cm -3 The thickness is 40-60nm;

[0010] The content of In component in the first mismatch buffer layer is less than the content of In component in the cutoff layer.

[0011] As an improvement to the above technical solution, a second mismatch buffer layer is provided between the N-type ohmic contact layer and the N-type roughening layer. The second mismatch buffer layer is an AlGaInP layer with a doping concentration of 1×10⁻⁶. 18 -1.5×10 18 cm -3 The thickness is 40-60nm;

[0012] The content of In component in the second mismatch buffer layer is greater than the content of In component in the N-type roughening layer.

[0013] As an improvement to the above technical solution, a third mismatch buffer layer and a P-type current spreading layer are sequentially stacked between the P-type confinement layer and the P-type ohmic contact layer. The third mismatch buffer layer is an AlGaInP layer with a doping concentration of 2×10⁻⁶. 18 -6×10 18 cm -3 The thickness is 40-60nm;

[0014] The P-type current spreading layer is a GaP layer with a doping concentration of 3 × 10⁻⁶. 18 -5×10 18 cm -3 The thickness is 1000-1500nm.

[0015] As an improvement to the above technical solution, an N-type current spreading layer is provided between the N-type roughening layer and the N-type confinement layer;

[0016] The N-type current spreading layer is (Al) x Ga 1-x ) y In 1-y The P-layer has x = 0.3-0.5 and y = 0.4-0.6, and the N-type current spreading layer has a doping concentration of 1×10⁻⁶. 18 -1.5×10 18 cm -3 The thickness is 1000-1500nm.

[0017] Accordingly, the present invention also discloses a method for preparing a light-emitting diode epitaxial wafer, which includes:

[0018] A GaAs substrate is provided, on which a buffer layer, a stop layer, an N-type ohmic contact layer, an N-type roughening layer, an N-type confinement layer, a multiple quantum well layer, a P-type confinement layer, and a P-type ohmic contact layer are grown;

[0019] The cutoff layer is a GaInP layer with a doping concentration of 4 × 10⁻⁶. 18 -6×10 18 cm -3 The thickness is 150-200nm;

[0020] The N-type ohmic contact layer is an N-type GaP layer with a doping concentration of 4 × 10⁻⁶. 18 -6×10 18 cm -3 The thickness is 60-120nm.

[0021] As an improvement to the above technical solution, the growth temperature of the stop layer is 650-700℃, the growth pressure is 30-100mbar; during growth, the TMGa flow rate is 26-30sccm, the PH3 flow rate is 900-1100sccm, and the TMIn flow rate is 900-1100sccm.

[0022] The growth temperature of the N-type ohmic contact layer is 760-780℃, and the growth pressure is 30-100mbar. During growth, the TMGa flow rate is 60-100sccm, and the PH3 flow rate is 400-600sccm.

[0023] As an improvement to the above technical solution, a first mismatch buffer layer is provided between the cutoff layer and the N-type ohmic contact layer, a second mismatch buffer layer is provided between the N-type ohmic contact layer and the N-type roughening layer, and a third mismatch buffer layer and a P-type current spreading layer are stacked sequentially between the P-type limiting layer and the P-type ohmic contact layer.

[0024] As an improvement to the above technical solution, the growth temperature of the first mismatch buffer layer is 650-700℃, the growth pressure is 30-100mbar, and during growth, the TMGa flow rate is 26-30sccm, the PH3 flow rate is 900-1100sccm, and the TMIn flow rate is 450-550sccm.

[0025] The growth temperature of the second mismatch buffer layer is 740-760℃, and the growth pressure is 30-100mbar. During growth, the flow rate of TMAl is 100-120sccm, the flow rate of TMGa is 6-10sccm, the flow rate of TMIn is 450-550sccm, and the flow rate of PH3 is 900-1100sccm.

[0026] The growth temperature of the third mismatch buffer layer is 710-730℃, and the growth pressure is 30-100mbar. During growth, the flow rate of TMAl is 50-70sccm, the flow rate of TMGa is 16-20sccm, the flow rate of TMIn is 450-550sccm, and the flow rate of PH3 is 900-1100sccm.

[0027] The growth temperature of the P-type current-spreading layer is 710-730℃, the growth pressure is 30-100mbar, the TMAl flow rate is 50-70sccm, the TMGa flow rate is 16-20sccm, the TMIn flow rate is 900-1100sccm, and the PH3 flow rate is 900-1100sccm.

[0028] Accordingly, the present invention also discloses a light-emitting diode, which includes the above-mentioned light-emitting diode epitaxial wafer.

[0029] Implementing this invention has the following beneficial effects:

[0030] The light-emitting diode epitaxial wafer of this invention uses an N-type GaP layer as the N-type ohmic contact layer, which can effectively avoid the formation of arsenic-phosphorus complexes (such as InGaAsP) at the interface during the switching process of arsenides and phosphides, thereby improving crystal quality and thus improving luminous efficiency. In addition, GaP has good light transmittance and will not absorb the light emitted by AlGaInP materials, which can further improve luminous efficiency. Attached Figure Description

[0031] Figure 1 This is a schematic diagram of the structure of a light-emitting diode epitaxial wafer in one embodiment of the present invention;

[0032] Figure 2 This is a schematic diagram of the structure of the light-emitting diode epitaxial wafer in another embodiment of the present invention;

[0033] Figure 3 This is a schematic diagram of the structure of the epitaxial wafer of a light-emitting diode in another embodiment of the present invention;

[0034] Figure 4 This is a schematic diagram of the structure of the epitaxial wafer of a light-emitting diode in another embodiment of the present invention;

[0035] Figure 5 This is a schematic diagram of the structure of the epitaxial wafer of a light-emitting diode in another embodiment of the present invention;

[0036] Figure 6 This is a flowchart of the method for preparing an epitaxial wafer of a light-emitting diode in one embodiment of the present invention. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be described in further detail below.

[0038] In traditional quaternary AlGaInP red-light reverse polarity epitaxial structures, GaAs is often used as the N-type ohmic contact layer. However, in the entire epitaxial structure, apart from N-type GaAs which is an arsenide, the rest are phosphides. The process of switching from phosphide to arsenide and vice versa requires high-precision interface treatment. Poor treatment can easily lead to the formation of arsenic-phosphide complexes at the interface, affecting crystal quality. Furthermore, GaAs, as the N-type ohmic contact layer, has a small band gap and absorbs light emitted by the AlGaInP material, resulting in low light extraction efficiency for red LEDs. Therefore, this invention provides a light-emitting diode epitaxial wafer (see reference...). Figure 1 The structure comprises a GaAs substrate 1 and, sequentially stacked on the GaAs substrate 1, a buffer layer 2, a stop layer 3, an N-type ohmic contact layer 4, an N-type roughening layer 5, an N-type confinement layer 6, a multiple quantum well layer 7, a P-type confinement layer 8, and a P-type ohmic contact layer 9; wherein, the N-type ohmic contact layer 4 is an N-type GaP layer, and its doping element is Si, but not limited to Si. The doping concentration of the N-type ohmic contact layer 4 is 4 × 10⁻⁶. 18 -6×10 18 cm -3 The thickness is 60-120 nm. The N-type GaP layer can effectively avoid the formation of arsenic-phosphorus complexes (such as InGaAsP) at the interface during the switching process of arsenides and phosphides, thereby improving crystal quality and luminous efficiency. In addition, GaP has good light transmittance and will not absorb the light emitted by AlGaInP materials, which can further improve luminous efficiency.

[0039] The cutoff layer 3 is a GaInP layer. The doping element of the cutoff layer 3 is Si, but not limited to Si; the doping concentration of the cutoff layer 3 is 4 × 10⁻⁶. 18 -6×10 18 cm -3 The thickness is 150-200 nm. Due to the large lattice mismatch between the N-type GaP and the GaAs substrate 1, a dielectric layer is introduced to reduce the lattice mismatch.

[0040] Further reference Figure 2In one embodiment of the present invention, a first mismatch buffer layer 10 is further provided between the stop layer 3 and the N-type ohmic contact layer 4. The first mismatch buffer layer 10 is a GaInP layer, and its doping element is Si, but it is not limited thereto. The doping concentration of the first mismatch buffer layer 10 is 4 × 10⁻⁶. 18 -6×10 18 cm -3 The thickness is 40-60 nm; and the In content in the first mismatch buffer layer 10 is less than the In content in the stop layer 3. Based on this setting, GaP lattice mismatch can be further reduced, ensuring crystal quality.

[0041] Among them, reference Figure 3 In one embodiment of the present invention, a second mismatch buffer layer 11 is further provided between the N-type ohmic contact layer 4 and the N-type roughening layer 5. The second mismatch buffer layer 11 is an AlGaInP layer, and its doping element is Si, but is not limited thereto. The doping concentration of the second mismatch buffer layer 11 is 1×10⁻⁶. 18 -1.5×10 18 cm -3 The thickness is 40-60 nm, and the In content in the second mismatch buffer layer 11 is greater than the In content in the N-type roughening layer 5. The second mismatch buffer layer 11 can reduce the lattice mismatch between the N-type ohmic contact layer 4 and the N-type roughening layer 5.

[0042] Among them, reference Figure 4 In one embodiment of the present invention, a third mismatch buffer layer 12 and a P-type current spreading layer 13 are sequentially stacked between the P-type confinement layer 8 and the P-type ohmic contact layer 9. The third mismatch buffer layer 12 is an AlGaInP layer, and its doping element is Mg, but is not limited thereto. The doping concentration of the third mismatch buffer layer 12 is 2 × 10⁻⁶. 18 -6×10 18 cm -3 The thickness is 40-60 nm; the third mismatch buffer layer 12 can reduce the lattice mismatch between the P-type confinement layer 8 and the P-type ohmic contact layer 9. The P-type current spreading layer 13 is a GaP layer, and its doping element is Mg with a doping concentration of 3×10⁻⁶. 18 -5×10 18 cm -3 The thickness is 1000-1500nm.

[0043] Among them, reference Figure 5 In one embodiment of the present invention, an N-type current spreading layer 14 is provided between the N-type roughening layer 5 and the N-type confinement layer 6; the N-type current spreading layer 14 is (Al) x Ga 1-x ) y In 1-yThe P-layer has x = 0.3-0.5 and y = 0.4-0.6. The N-type current extension layer 14 is doped with Si, but is not limited to Si; its doping concentration is 1×10⁻⁶. 18 -1.5×10 18 cm -3 The thickness is 1000-1500nm.

[0044] Buffer layer 2 is a GaAs layer, but is not limited to it. The thickness of buffer layer 2 is 100-300 nm, preferably 150 nm. The doping element of buffer layer 2 is Si, but is not limited to it. The doping concentration of buffer layer 2 is 4 × 10⁻⁶. 18 -8×10 18 cm -3 Preferably 6×10 18 cm -3 .

[0045] Among them, the N-type coarsening layer 5 is (Al α Ga 1-α ) β In 1-β The P-layer has an α content of 0.5-0.8 and a β content of 0.4-0.6. A higher Al content is chosen because it results in smaller surface particles, closer pore spacing, and a greater number of pores, creating an uneven surface that improves light emission and luminous efficiency. However, excessively high Al content leads to a wider bandgap, which can cause a voltage increase. The N-type roughening layer 5 is doped with Si, but is not limited to Si; its doping concentration is 1×10⁻⁶. 18 -1.5×10 18 cm -3 The thickness is 900-1000nm.

[0046] The N-type confinement layer 6 is an AlInP layer with a thickness of 300-350 nm, preferably 320 nm. The doping element of the N-type confinement layer 6 is Si, but not limited to Si; its doping concentration is 1 × 10⁻⁶. 18 -1.5×10 18 cm -3 The preferred value is 1.2 × 10⁻⁶. 18 cm -3 .

[0047] The multi-quantum-well layer 7 comprises multiple alternating AlGaInP well layers and AlGaInP barrier layers grown 10-20 times. The thickness of a single AlGaInP well layer is 5-5.5 nm, and the thickness of a single AlGaInP barrier layer is 6-6.5 nm.

[0048] The p-type confinement layer 8 is an AlInP layer with a thickness of 350-400 nm, preferably 380 nm. The doping element of the p-type confinement layer 8 is Mg, but not limited to this. Its doping concentration is 1 × 10⁻⁶. 18 -1.5×10 18 cm -3 The preferred value is 1.2 × 10⁻⁶. 18 cm -3 .

[0049] Among them, the P-type ohmic contact layer 9 is a GaP layer, and it is doped with C with a doping concentration of 5.0 × 10⁻⁶. 19 -9.0×10 19 cm -3 Preferably 7.0×10 19 cm -3 The thickness of the P-type contact layer 9 is 80-120 nm, preferably 100 nm.

[0050] Accordingly, refer to Figure 6 The present invention also discloses a method for preparing a light-emitting diode epitaxial wafer, which includes the following steps:

[0051] S100: Provides GaAs substrate;

[0052] S200: A buffer layer, a stop layer, an N-type ohmic contact layer, an N-type roughening layer, an N-type confinement layer, a multiple quantum well layer, a P-type confinement layer, and a P-type ohmic contact layer are grown on a GaAs substrate.

[0053] Specifically, S200 includes the following steps:

[0054] S201: A buffer layer is grown on a GaAs substrate;

[0055] Specifically, MOCVD can be used to grow the buffer layer (GaAs layer), with a growth pressure of 30-100 mbar, preferably 50 mbar; a growth temperature of 650-700℃, preferably 680℃; and during growth, the TMGa flow rate is 60-100 sccm, preferably 80 sccm; and the AsH3 flow rate is 300-500 sccm, preferably 400 sccm.

[0056] S202: Grow a stop layer on the buffer layer;

[0057] Specifically, an MOCVD growth cutoff layer can be used; the growth pressure is 30-100 mbar, preferably 50 mbar; the growth temperature is 650-700℃, preferably 680℃. During growth, the TMGa flow rate is 26-30 sccm, preferably 28 sccm; the PH3 flow rate is 900-1100 sccm, preferably 1000 sccm; and the TMIn flow rate is 900-1100 sccm, preferably 1000 sccm.

[0058] Preferably, in one embodiment of the present invention, the following step S203 is included.

[0059] S203: Grow the first mismatch buffer layer on the stop layer;

[0060] Specifically, the first mismatch buffer layer can be grown using MOCVD; the growth pressure is 30-100 mbar, preferably 50 mbar; the growth temperature is 650-700℃, preferably 680℃. During growth, the TMGa flow rate is 26-30 sccm, preferably 28 sccm; the PH3 flow rate is 900-1100 sccm, preferably 1000 sccm; and the TMIn flow rate is 450-550 sccm, preferably 500 sccm.

[0061] S204: An N-type ohmic contact layer is grown on the first mismatch buffer layer;

[0062] Specifically, an N-type ohmic contact layer can be grown using MOCVD; the growth pressure is 30-100 mbar, preferably 50 mbar; the growth temperature is 760-780℃, preferably 770℃; the TMGa flow rate is 60-100 sccm, preferably 80 sccm; and the PH3 flow rate is 400-600 sccm, preferably 500 sccm. Higher growth temperature and lower growth rate can improve GaP quality.

[0063] Preferably, in one embodiment of the present invention, the following step S205 is included.

[0064] S205: A second mismatch buffer layer is grown on the N-type ohmic contact layer;

[0065] Specifically, the second mismatch buffer layer can be grown using MOCVD; the growth pressure is 30-100 mbar, preferably 50 mbar; the growth temperature is 740-760℃, preferably 750℃; the TMAl flow rate is 100-120 sccm, preferably 110 sccm; the TMGa flow rate is 6-10 sccm, preferably 8 sccm; the TMIn flow rate is 450-550 sccm, preferably 500 sccm; and the PH3 flow rate is 900-1100 sccm, preferably 1000 sccm.

[0066] S206: An N-type coarsening layer is grown on the second mismatch buffer layer.

[0067] Specifically, an N-type roughened layer can be grown using MOCVD. The growth pressure of the N-type roughened layer is 30-100 mbar, preferably 50 mbar; the growth temperature is 740-760℃, preferably 750℃. During growth, the flow rate of TMAl is 100-120 sccm, preferably 110 sccm; the flow rate of TMGa is 6-10 sccm, preferably 8 sccm; the flow rate of TMIn is 900-1100 sccm, preferably 1000 sccm; and the flow rate of PH3 is 900-1100 sccm, preferably 1000 sccm.

[0068] Preferably, in one embodiment of the present invention, the following step S207 is included.

[0069] S207: An N-type current-spreading layer is grown on an N-type roughened layer.

[0070] Specifically, an N-type current-spreading layer can be grown using MOCVD. The growth pressure of the N-type current-spreading layer is 30-100 mbar, preferably 50 mbar; the growth temperature is 710-730℃, preferably 720℃. During growth, the flow rate of TMAl is 50-70 sccm, preferably 60 sccm; the flow rate of TMGa is 16-20 sccm, preferably 18 sccm; the flow rate of TMIn is 900-1100 sccm, preferably 1000 sccm; and the flow rate of PH3 is 900-1100 sccm, preferably 1000 sccm.

[0071] S208: An N-type confinement layer is grown on an N-type current spread layer;

[0072] Specifically, the N-type confinement layer can be grown using MOCVD. The growth pressure of the N-type confinement layer is 30-100 mbar, preferably 50 mbar; the growth temperature is 710-730℃, preferably 720℃. During growth, the flow rate of TMAl is 170-190 sccm, preferably 180 sccm; the flow rate of TMIn is 900-1100 sccm, preferably 1000 sccm; and the flow rate of PH3 is 900-1100 sccm, preferably 1000 sccm.

[0073] S209: Growth of multiple quantum well layers on N-type confinement layers;

[0074] The AlGaInP well layer and AlGaInP barrier layer can be periodically grown using MOCVD until a multi-quantum well layer is obtained. Specifically, the growth pressure of the AlGaInP well layer is 30-100 mbar, preferably 50 mbar; the growth temperature is 710-730℃, preferably 720℃. During growth, the TMAl flow rate is 10-20 sccm, preferably 15 sccm; the TMGa flow rate is 15-25 sccm, preferably 20 sccm; the TMIn flow rate is 900-1100 sccm, preferably 1000 sccm; and the PH3 flow rate is 900-1100 sccm, preferably 1000 sccm. The growth pressure of the AlGaInP barrier layer is 30-100 mbar, preferably 50 mbar; and the growth temperature is 710-730℃, preferably 720℃. During AlGaInP barrier layer growth, the flow rate of TMAl is 110-130 sccm, preferably 120 sccm; the flow rate of TMGa is 5-15 sccm, preferably 10 sccm; the flow rate of TMIn is 900-1100 sccm, preferably 1000 sccm; and the flow rate of PH3 is 900-1100 sccm.

[0075] S210: Growing a P-type confinement layer on a multi-quantum-well layer.

[0076] Specifically, MOCVD can be used to grow the P-type confinement layer. The growth pressure of the P-type confinement layer is 30-100 mbar, preferably 50 mbar; the growth temperature is 710-730℃, preferably 720℃. During growth, the flow rate of TMAl is 170-190 sccm, preferably 180 sccm; the flow rate of TMIn is 900-1100 sccm, preferably 1000 sccm; and the flow rate of PH3 is 900-1100 sccm, preferably 1000 sccm.

[0077] Preferably, in one embodiment of the present invention, the steps S211 and S212 are included.

[0078] S211: A third mismatch buffer layer is grown on the P-type confinement layer.

[0079] Specifically, a third mismatch buffer layer can be grown using MOCVD; the growth pressure is 30-100 mbar, preferably 50 mbar; the growth temperature is 710-730℃, preferably 720℃; the TMAl flow rate is 50-70 sccm, preferably 60 sccm; the TMGa flow rate is 16-20 sccm, preferably 18 sccm; the TMIn flow rate is 450-550 sccm, preferably 500 sccm; and the PH3 flow rate is 900-1100 sccm, preferably 1000 sccm.

[0080] S212: A P-type current spread layer is grown on the third mismatch buffer layer.

[0081] Specifically, a P-type current-spreading layer can be grown using MOCVD. The growth pressure of the P-type current-spreading layer is 30-100 mbar, preferably 50 mbar; the growth temperature is 740-760℃, preferably 750℃. During growth, the TMGa flow rate is 300-400 sccm, preferably 350 sccm, and the PH3 flow rate is 200-400 sccm, preferably 350 sccm.

[0082] Step S213: Grow a P-type ohmic contact layer on the P-type current extension layer.

[0083] Specifically, a P-type ohmic contact layer can be grown using MOCVD; the growth pressure is 30-100 mbar, preferably 50 mbar; the growth temperature is 660-700℃, preferably 680℃; the TMGa flow rate is 250-350 sccm, preferably 300 sccm; and the PH3 flow rate is 200-400 sccm, preferably 300 sccm.

[0084] The present invention will be further described below with reference to specific embodiments:

[0085] Example 1

[0086] This embodiment provides a light-emitting diode epitaxial wafer, referenced... Figure 1 It includes a GaAs substrate 1 and a buffer layer 2, a stop layer 3, an N-type ohmic contact layer 4, an N-type roughening layer 5, an N-type confinement layer 6, a multiple quantum well layer 7, a P-type confinement layer 8 and a P-type ohmic contact layer 9 sequentially stacked on the GaAs substrate 1.

[0087] Buffer layer 2 is a GaAs layer with a thickness of 100-300 nm, doped with Si at a concentration of 6 × 10⁻⁶. 18 cm -3 The third cutoff layer is a GaInP layer, doped with Si at a concentration of 5 × 10⁻⁶. 18 cm -3 The thickness is 180 nm. The N-type ohmic contact layer 4 is an N-type GaP layer, doped with Si at a concentration of 5 × 10⁻⁶. 18 cm -3 The thickness is 90 nm. The N-type roughening layer 5 is (Al) α Ga 1-α ) β In 1-β The P-layer has α = 0.65 and β = 0.5. The N-type roughening layer 5 is doped with Si at a concentration of 1.2 × 10⁻⁶. 18 cm -3The thickness is 950 nm. The N-type confinement layer 6 is an AlInP layer with a thickness of 320 nm. The dopant element of the N-type confinement layer 6 is Si, with a doping concentration of 1.2 × 10⁻⁶. 18 cm -3 The multi-quantum-well layer 7 comprises multiple alternating AlGaInP well layers and AlGaInP barrier layers grown 15 times. The thickness of a single AlGaInP well layer is 5.3 nm, and the thickness of a single AlGaInP barrier layer is 6.2 nm. The p-type confinement layer is an AlInP layer with a thickness of 380 nm. The p-type confinement layer 8 is doped with Mg at a concentration of 1.2 × 10⁻⁶. 18 cm -3 The p-type ohmic contact layer 9 is a GaP layer, doped with C, with a doping concentration of 7.0 × 10⁻⁶. 19 cm -3 The thickness is 100nm.

[0088] The method for preparing the epitaxial wafer in this embodiment includes the following steps:

[0089] (1) Provide a GaAs substrate;

[0090] (2) A buffer layer is grown on a GaAs substrate;

[0091] Specifically, MOCVD was used to grow the buffer layer (GaAs layer) at a growth pressure of 50 mbar and a growth temperature of 680℃. During growth, the TMGa flow rate was 80 sccm and the AsH3 flow rate was 400 sccm.

[0092] (3) Grow a stop layer on the buffer layer;

[0093] Specifically, the cutoff layer was grown using MOCVD; the growth pressure was 50 mbar; and the growth temperature was 680℃. During growth, the flow rate of TMGa was 28 sccm; the flow rate of PH3 was 1000 sccm; and the flow rate of TMIn was 1000 sccm.

[0094] (4) An N-type ohmic contact layer is grown on the stop layer;

[0095] Specifically, an N-type ohmic contact layer was grown using MOCVD; the growth pressure was 50 mbar; the growth temperature was 770℃; the TMGa flow rate was 80 sccm; and the PH3 flow rate was 500 sccm.

[0096] (5) An N-type roughened layer is grown on the N-type ohmic contact layer.

[0097] Specifically, an N-type roughened layer was grown using MOCVD. The growth pressure of the N-type roughened layer was 50 mbar; the growth temperature was 750℃. During growth, the flow rates were 110 sccm for TMAl, 8 sccm for TMGa, 1000 sccm for TMIn, and 1000 sccm for PH3.

[0098] (6) An N-type confinement layer is grown on the N-type coarsening layer;

[0099] Specifically, an N-type confinement layer was grown using MOCVD. The growth pressure for the N-type confinement layer was 50 mbar, and the growth temperature was 720℃. During growth, the flow rates of TMAl, TMIn, and PH3 were 180 sccm, 1000 sccm, and 1000 sccm, respectively.

[0100] (7) Grow a multi-quantum-well layer on an N-type confinement layer;

[0101] The AlGaInP well layer and AlGaInP barrier layer were periodically grown using MOCVD until a multi-quantum-well layer was obtained. Specifically, the growth pressure of the AlGaInP well layer was 50 mbar, and the growth temperature was 720℃. During growth, the flow rates were: TMAl 15 sccm; TMGa 20 sccm; TMIn 1000 sccm; and PH3 1000 sccm. The growth pressure of the AlGaInP barrier layer was 50 mbar, and the growth temperature was 720℃. During growth, the flow rates were: TMAl 120 sccm; TMGa 10 sccm; TMIn 1000 sccm; and PH3 1000 sccm.

[0102] (8) Grow a P-type confinement layer on a multi-quantum well layer.

[0103] Specifically, a p-type confinement layer was grown using MOCVD. The growth pressure for the p-type confinement layer was 50 mbar; the growth temperature was 720℃. During growth, the flow rates of TMAl, TMIn, and PH3 were 180 sccm, 1000 sccm, and 1000 sccm, respectively.

[0104] (9) Grow a P-type ohmic contact layer in a P-type confinement layer.

[0105] Specifically, a P-type ohmic contact layer was grown using MOCVD; the growth pressure was 50 mbar; the growth temperature was 680℃; the TMGa flow rate was 300 sccm; and the PH3 flow rate was 300 sccm. Testing showed that the luminous efficiency of the LED epitaxial wafer in this embodiment was 1.6% higher than that of a conventional red LED epitaxial wafer.

[0106] Example 2

[0107] This embodiment provides a light-emitting diode epitaxial wafer, referenced... Figure 5 It includes a GaAs substrate 1 and a buffer layer 2, a cutoff layer 3, a first mismatch buffer layer 10, an N-type ohmic contact layer 4, a second mismatch buffer layer 11, an N-type roughening layer 5, an N-type current spreading layer 14, an N-type confinement layer 6, a multiple quantum well layer 7, a P-type confinement layer 8, a third mismatch buffer layer 12, a P-type current spreading layer 13, and a P-type ohmic contact layer 9, which are sequentially stacked on the GaAs substrate 1.

[0108] Buffer layer 2 is a GaAs layer with a thickness of 100-300 nm, doped with Si at a concentration of 6 × 10⁻⁶. 18 cm -3 The third cutoff layer is a GaInP layer, doped with Si at a concentration of 5 × 10⁻⁶. 18 cm -3 The thickness is 180 nm. The first mismatch buffer layer 10 is a GaInP layer, and its doping element is Si, with a doping concentration of 5 × 10⁻⁶. 18 cm -3 The thickness is 50 nm; and the In content in the first mismatch buffer layer 10 is less than the In content in the stop layer 3. The N-type ohmic contact layer 4 is an N-type GaP layer, and its doping element is Si with a doping concentration of 5 × 10⁻⁶. 18 cm -3 The thickness is 90 nm. The second mismatch buffer layer 11 is an AlGaInP layer, doped with Si at a concentration of 1.2 × 10⁻⁶. 18 cm -3 The thickness is 50 nm; and the In content in the second mismatch buffer layer 11 is greater than the In content in the N-type roughening layer 5. The N-type roughening layer 5 is (Al α Ga 1-α ) β In 1-β The P-layer has α = 0.65 and β = 0.5. The N-type roughening layer 5 is doped with Si at a concentration of 1.2 × 10⁻⁶. 18 cm -3 The thickness is 950 nm. The N-type current spreading layer 14 is (Al) x Ga 1-x ) y In 1-y The P-layer has x = 0.4 and y = 0.5. The N-type current extension layer 14 is doped with Si with a doping concentration of 1.2 × 10⁻⁶. 18 cm -3 The thickness is 1200 nm. The N-type confinement layer 6 is an AlInP layer with a thickness of 320 nm, doped with Si at a concentration of 1.2 × 10⁻⁶. 18 cm -3The multi-quantum-well layer 7 comprises multiple alternating AlGaInP well layers and AlGaInP barrier layers grown 15 times. The thickness of a single AlGaInP well layer is 5.3 nm, and the thickness of a single AlGaInP barrier layer is 6.2 nm. The p-type confinement layer is an AlInP layer with a thickness of 380 nm, doped with Mg at a doping concentration of 1.2 × 10⁻⁶. 18 cm -3 The third mismatch buffer layer 12 is an AlGaInP layer, doped with Mg at a concentration of 4 × 10⁻⁶. 18 cm -3 The thickness is 50 nm. The P-type current spreading layer 13 is a GaP layer, and its doping element is Mg with a doping concentration of 4 × 10⁻⁶. 18 cm -3 The thickness is 1300 nm. The p-type ohmic contact layer 9 is a GaP layer, doped with C, with a doping concentration of 7.0 × 10⁻⁶. 19 cm -3 The thickness is 100nm.

[0109] The method for preparing the epitaxial wafer in this embodiment includes the following steps:

[0110] (1) Provide a GaAs substrate;

[0111] (2) A buffer layer is grown on a GaAs substrate;

[0112] Specifically, MOCVD was used to grow the buffer layer (GaAs layer) at a growth pressure of 50 mbar and a growth temperature of 680℃. During growth, the TMGa flow rate was 80 sccm and the AsH3 flow rate was 400 sccm.

[0113] (3) Grow a stop layer on the buffer layer;

[0114] Specifically, the cutoff layer was grown using MOCVD; the growth pressure was 50 mbar; and the growth temperature was 680℃. During growth, the flow rate of TMGa was 28 sccm; the flow rate of PH3 was 1000 sccm; and the flow rate of TMIn was 1000 sccm.

[0115] (4) Grow the first mismatch buffer layer on the cutoff layer;

[0116] Specifically, the first mismatch buffer layer was grown using MOCVD at a pressure of 50 mbar and a temperature of 680°C. During growth, the flow rate of TMGa was 28 sccm, the flow rate of PH3 was 1000 sccm, and the flow rate of TMIn was 500 sccm.

[0117] (5) An N-type ohmic contact layer is grown on the first mismatch buffer layer;

[0118] Specifically, an N-type ohmic contact layer was grown using MOCVD; the growth pressure was 50 mbar; the growth temperature was 770℃; the TMGa flow rate was 80 sccm; and the PH3 flow rate was 500 sccm.

[0119] (6) A second mismatch buffer layer is grown on the N-type ohmic contact layer;

[0120] Specifically, the second mismatch buffer layer was grown using MOCVD; the growth pressure was 50 mbar; the growth temperature was 750℃; the flow rate of TMAl was 110 sccm; the flow rate of TMGa was 8 sccm; the flow rate of TMIn was 500 sccm; and the flow rate of PH3 was 1000 sccm.

[0121] (7) An N-type coarsening layer is grown on the second mismatch buffer layer.

[0122] Specifically, an N-type roughened layer was grown using MOCVD. The growth pressure of the N-type roughened layer was 50 mbar; the growth temperature was 750℃. During growth, the flow rates were 110 sccm for TMAl, 8 sccm for TMGa, 1000 sccm for TMIn, and 1000 sccm for PH3.

[0123] (8) An N-type current spread layer is grown on the N-type roughened layer.

[0124] Specifically, an N-type current-spreading layer was grown using MOCVD. The growth pressure of the N-type current-spreading layer was 50 mbar; the growth temperature was 720℃. During growth, the flow rate of TMAl was 60 sccm; the flow rate of TMGa was 18 sccm; the flow rate of TMIn was 1000 sccm; and the flow rate of PH3 was 1000 sccm.

[0125] (9) Grow an N-type confinement layer on the N-type current spread layer;

[0126] Specifically, an N-type confinement layer was grown using MOCVD. The growth pressure for the N-type confinement layer was 50 mbar, and the growth temperature was 720℃. During growth, the flow rates of TMAl, TMIn, and PH3 were 180 sccm, 1000 sccm, and 1000 sccm, respectively.

[0127] (10) Growth of multiple quantum well layers on N-type confinement layers;

[0128] The AlGaInP well layer and AlGaInP barrier layer were periodically grown using MOCVD until a multi-quantum-well layer was obtained. Specifically, the growth pressure of the AlGaInP well layer was 50 mbar, and the growth temperature was 720℃. During growth, the flow rates were: TMAl 15 sccm; TMGa 20 sccm; TMIn 1000 sccm; and PH3 1000 sccm. The growth pressure of the AlGaInP barrier layer was 50 mbar, and the growth temperature was 720℃. During growth, the flow rates were: TMAl 120 sccm; TMGa 10 sccm; TMIn 1000 sccm; and PH3 1000 sccm.

[0129] (11) Grow a P-type confinement layer on a multi-quantum well layer.

[0130] Specifically, a p-type confinement layer was grown using MOCVD. The growth pressure for the p-type confinement layer was 50 mbar; the growth temperature was 720℃. During growth, the flow rates of TMAl, TMIn, and PH3 were 180 sccm, 1000 sccm, and 1000 sccm, respectively.

[0131] (12) A third mismatch buffer layer is grown on the P-type confinement layer.

[0132] Specifically, the third mismatch buffer layer was grown using MOCVD; the growth pressure was 50 mbar; the growth temperature was 720℃; the flow rate of TMAl was 60 sccm; the flow rate of TMGa was 18 sccm; the flow rate of TMIn was 500 sccm; and the flow rate of PH3 was 1000 sccm.

[0133] (13) A P-type current spread layer is grown on the third mismatch buffer layer.

[0134] Specifically, a P-type current-extended layer was grown using MOCVD; the growth pressure was 50 mbar; and the growth temperature was 750℃. During growth, the TMGa flow rate was 350 sccm, and the PH3 flow rate was 350 sccm.

[0135] (14) Grow a P-type ohmic contact layer on the P-type current extension layer.

[0136] Specifically, a P-type ohmic contact layer was grown using MOCVD; the growth pressure was 50 mbar; the growth temperature was 680℃; the TMGa flow rate was 300 sccm; and the PH3 flow rate was 300 sccm. Testing showed that the luminous efficiency of the LED epitaxial wafer in this embodiment was 2.5% higher than that of a conventional red LED epitaxial wafer.

[0137] The above description is a preferred embodiment of the invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of the invention, and these improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A light-emitting diode epitaxial wafer, characterized in that, It includes a GaAs substrate and a buffer layer, a stop layer, an N-type ohmic contact layer, an N-type roughening layer, an N-type confinement layer, a multiple quantum well layer, a P-type confinement layer, and a P-type ohmic contact layer sequentially stacked on the GaAs substrate; The buffer layer is a GaAs layer; the stop layer is a GaInP layer with a doping concentration of 4 × 10⁻⁶. 18 -6×10 18 cm -3 The thickness is 150-200 nm; the N-type ohmic contact layer is an N-type GaP layer with a doping concentration of 4 × 10⁻⁶. 18 -6×10 18 cm -3 The thickness is 60-120nm; The N-type coarsening layer is (Al) α Ga 1-α ) β In 1-β The P-layer is an AlInP layer, the N-type confinement layer is a Si layer, the P-type confinement layer is an AlInP layer, and the P-type confinement layer is a Mg layer; the P-type ohmic contact layer is a GaP layer, and the P-type confinement layer is a C layer. A first mismatch buffer layer is provided between the stop layer and the N-type ohmic contact layer. The first mismatch buffer layer is a GaInP layer, and the content of In component in the first mismatch buffer layer is less than the content of In component in the stop layer. A second mismatch buffer layer is provided between the N-type ohmic contact layer and the N-type roughening layer. The second mismatch buffer layer is an AlGaInP layer, and the content of In component in the second mismatch buffer layer is less than the content of In component in the N-type roughening layer.

2. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The doping concentration of the first mismatch buffer layer is 4×10 18 -6×10 18 cm -3 The thickness is 40-60nm.

3. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The doping concentration of the second mismatch buffer layer is 1×10 18 -1.5×10 18 cm -3 The thickness is 40-60nm.

4. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, A third mismatch buffer layer and a P-type current spreading layer are sequentially stacked between the P-type confinement layer and the P-type ohmic contact layer. The third mismatch buffer layer is an AlGaInP layer with a doping concentration of 2×10⁻⁶. 18 -6×10 18 cm -3 The thickness is 40-60nm; The P-type current spreading layer is a GaP layer with a doping concentration of 3 × 10⁻⁶. 18 -5×10 18 cm -3 The thickness is 1000-1500nm.

5. The light-emitting diode epitaxial wafer as described in any one of claims 1 to 4, characterized in that, An N-type current spreading layer is provided between the N-type roughening layer and the N-type confinement layer; The N-type current spreading layer is (Al) x Ga 1-x ) y In 1-y The P-layer has x = 0.3-0.5 and y = 0.4-0.6, and the N-type current spreading layer has a doping concentration of 1×10⁻⁶. 18 -1.5×10 18 cm -3 The thickness is 1000-1500nm.

6. A method for fabricating a light-emitting diode epitaxial wafer, used to fabricate a light-emitting diode epitaxial wafer as described in any one of claims 1 to 5, characterized in that, include: A GaAs substrate is provided, on which a buffer layer, a stop layer, an N-type ohmic contact layer, an N-type roughening layer, an N-type confinement layer, a multiple quantum well layer, a P-type confinement layer, and a P-type ohmic contact layer are grown; The cutoff layer is a GaInP layer with a doping concentration of 4 × 10⁻⁶. 18 -6×10 18 cm -3 The thickness is 150-200nm; The N-type ohmic contact layer is an N-type GaP layer with a doping concentration of 4 × 10⁻⁶. 18 -6×10 18 cm -3 The thickness is 60-120nm.

7. The method for fabricating a light-emitting diode epitaxial wafer as described in claim 6, characterized in that, The growth temperature of the stop layer is 650-700℃, and the growth pressure is 30-100mbar. During growth, the flow rate of TMGa is 26-30sccm, the flow rate of PH3 is 900-1100sccm, and the flow rate of TMIn is 900-1100sccm. The growth temperature of the N-type ohmic contact layer is 760-780℃, and the growth pressure is 30-100mbar. During growth, the TMGa flow rate is 60-100sccm, and the PH3 flow rate is 400-600sccm.

8. The method for fabricating a light-emitting diode epitaxial wafer as described in claim 6, characterized in that, A first mismatch buffer layer is provided between the cutoff layer and the N-type ohmic contact layer, a second mismatch buffer layer is provided between the N-type ohmic contact layer and the N-type roughening layer, and a third mismatch buffer layer and a P-type current spreading layer are stacked sequentially between the P-type limiting layer and the P-type ohmic contact layer.

9. The method for fabricating a light-emitting diode epitaxial wafer as described in claim 8, characterized in that, The growth temperature of the first mismatch buffer layer is 650-700℃, and the growth pressure is 30-100mbar. During growth, the flow rate of TMGa is 26-30sccm, the flow rate of PH3 is 900-1100sccm, and the flow rate of TMIn is 450-550sccm. The growth temperature of the second mismatch buffer layer is 740-760℃, and the growth pressure is 30-100mbar. During growth, the flow rate of TMAl is 100-120sccm, the flow rate of TMGa is 6-10sccm, the flow rate of TMIn is 450-550sccm, and the flow rate of PH3 is 900-1100sccm. The growth temperature of the third mismatch buffer layer is 710-730℃, and the growth pressure is 30-100mbar. During growth, the flow rate of TMAl is 50-70sccm, the flow rate of TMGa is 16-20sccm, the flow rate of TMIn is 450-550sccm, and the flow rate of PH3 is 900-1100sccm. The growth temperature of the P-type current-spreading layer is 740-760℃, and the growth pressure is 30-100mbar; the TMGa flow rate is 300-400sccm, and the PH3 flow rate is 200-400sccm.

10. A light-emitting diode, characterized in that, Includes the light-emitting diode epitaxial wafer as described in any one of claims 1 to 5.

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