A dynamic high voltage signal transmission switch circuit suitable for thin gate oxide process

Abstract

The application discloses a dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process, which comprises a symmetric double NMOS tube switch, a floating power rail generation module and a LevelShift level conversion module; the symmetric double NMOS tube switch comprises two N-type transistors, the gate and the source of the two N-type transistors are connected respectively, and the drain of the two N-type transistors is used as an input end of a high-voltage signal; the floating power rail generation module is connected to the source of the two N-type transistors in the symmetric double NMOS tube switch and is used for generating a floating power rail by tracking the amplitude of the dynamic high-voltage signal; the LevelShift level conversion module is connected to the floating power rail generation module and the gate of the two N-type transistors in the symmetric double NMOS tube switch and is used for converting a digital control signal corresponding to an input low power rail 0V-5V into an analog control signal corresponding to the floating power rail so as to control the conduction and the turn-off of the symmetric double NMOS tube switch. The application ensures that the thin gate oxide layer MOS tube switch is in a safe voltage-withstanding range when transmitting the dynamic high-voltage signal.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of integrated circuit design, and particularly relates to a dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process. BACKGROUND

[0002] Switches are needed in almost all mixed signal chips, and there are many implementation methods, such as transmission gates, single-tube switches, and combination logic switches.

[0003] Whether the switch is turned on or not is controlled by a digital logic signal at the gate of the switch tube. In a low-voltage circuit, as long as the amplitude of the digital logic signal reaches the swing of the power rail to meet the gate-source voltage resistance requirement in the low-voltage process. However, some high-voltage processes are still thin gate oxide layer processes, and there are no symmetric logic MOS tubes with thick gate oxide layers. The process feature is that the MOS tube source and drain can withstand high voltage, and the gate-source port still has low voltage resistance. When transmitting a high-voltage signal, a fixed high-voltage control signal is usually generated by using a level shift circuit to control whether the switch tube is turned on or not in the case of a determined signal amplitude.

[0004] However, when the high-voltage signal has a large swing change, such a circuit structure will still cause the switch tube to break down and damage the transistor, which makes it impossible to meet the requirements of building a dynamic high-voltage signal transmission switch when designing a high-voltage circuit for such MOS tubes and high-voltage switch design schemes. SUMMARY

[0005] In order to solve the above problems in the prior art, the present application provides a dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process. The technical problem to be solved by the present application is solved by the following technical scheme:

[0006] The embodiment of the present application provides a dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process, comprising: a symmetric double NMOS tube switch, a LevelShift level conversion module and a floating power rail generation module, wherein,

[0007] The symmetric double NMOS tube switch comprises two N-type transistors, the gates and sources of the two N-type transistors are connected respectively, and the drains of the two N-type transistors are respectively used as input ends of a dynamic high-voltage signal;

[0008] The floating power rail generation module is connected to the sources of the two N-type transistors in the symmetric double NMOS tube switch, and is used to track the amplitude of the dynamic high-voltage signal to generate a floating power rail;

[0009] The LevelShift level conversion module is connected with the floating power rail generation module and the gates of the two N-type transistors in the symmetric dual NMOS switch, and is used for converting the input digital control signal corresponding to the low power rail 0V-5V into an analog control signal corresponding to the floating power rail, so as to control the on and off of the symmetric dual NMOS switch.

[0010] In an embodiment of the present application, the symmetric dual NMOS switch further comprises a diode D connected between the gates and the sources of the two N-type transistors.

[0011] In an embodiment of the present application, the floating power rail generation module comprises an operational amplifier A1, a current source S, an N-type transistor N1, an N-type transistor N2, and a floating power rail voltage output circuit, wherein,

[0012] The non-inverting input end of the operational amplifier A is connected with the symmetric dual NMOS switch, the inverting input end of the operational amplifier A is connected with the drain of the N-type transistor N2, the floating power rail voltage output circuit, and the first output end of the floating power rail generation module, the output end of the operational amplifier A is connected with the floating power rail voltage output circuit and the second output end of the floating power rail generation module, the source of the N-type transistor N2 and the source of the N-type transistor N1 are connected with a power supply HVEE, the gate of the N-type transistor N2 is connected with the gate of the N-type transistor N1, the drain of the N-type transistor N1, and the output end of the current source S, and the input end of the current source S is connected with a power supply HVDD.

[0013] In an embodiment of the present application, the floating power rail voltage output circuit comprises n N-type transistors N3, and n is an integer greater than 0; the sources and the drains of the n N-type transistors N3 are connected in series, and the gate of each N-type transistor N3 is connected with the drain thereof; wherein the drain of the first N-type transistor N3 is further connected with the second output end of the floating power rail generation module, and the source of the last N-type transistor N3 is further connected with the first output end of the floating power rail generation module.

[0014] In an embodiment of the present application, the value of n is determined by the maximum breakdown voltage supported between the gate and the source of the two N-type transistors in the symmetric dual NMOS switch.

[0015] In an embodiment of the present application, the LevelShift level conversion module comprises a LevelShift step-down level conversion module, which is used for converting the input digital control signal corresponding to the low power rail 0V-5V into an analog control signal corresponding to the floating power rail through step-down conversion.

[0016] In one embodiment of the present application, the LevelShift level conversion module comprises a LevelShift step-up level conversion module, which is configured to convert an input digital control signal corresponding to a low power rail 0V-5V into an analog control signal corresponding to the floating power rail through step-up conversion.

[0017] In one embodiment of the present application, the LevelShift level conversion module comprises a LevelShift step-up level conversion module and a LevelShift step-down level conversion module, wherein,

[0018] The LevelShift step-down level conversion module is configured to convert an input digital control signal corresponding to a low power rail 0V-5V into an analog control signal corresponding to the system lowest negative power rail through step-down conversion.

[0019] The LevelShift step-up level conversion module is configured to convert the analog control signal corresponding to the system lowest negative power rail into an analog control signal corresponding to the floating power rail through step-up conversion.

[0020] In one embodiment of the present application, the LevelShift step-down level conversion module comprises N-type transistors M11-M26, wherein,

[0021] The source of the N-type transistor M11, the source of the N-type transistor M12 is connected to VDD, the gate of the N-type transistor M11 is connected to the first input end of the LevelShift voltage reduction level conversion module, the gate of the N-type transistor M12 is connected to the first input end of the LevelShift voltage reduction level conversion module, the drain of the N-type transistor M11 is connected to the drain of the N-type transistor M13, the drain of the N-type transistor M12 is connected to the drain of the N-type transistor M14, the gate of the N-type transistor M13, the gate of the N-type transistor M14, the source of the N-type transistor M15, the source of the N-type transistor M16, the source of the N-type transistor M19, the source of the N-type transistor M20, the source of the N-type transistor M23, the source of the N-type transistor M24 is connected to HVEE+m, the source of the N-type transistor M13 is connected to the drain of the N-type transistor M15, the drain of the N-type transistor M17, the gate of the N-type transistor M19, the gate of the N-type transistor M21, the gate of the N-type transistor M16, the gate of the N-type transistor M18, the source of the N-type transistor M14 is connected to the gate of the N-type transistor M15, the gate of the N-type transistor M17, the drain of the N-type transistor M16, the drain of the N-type transistor M18, the gate of the N-type transistor M23, the gate of the N-type transistor M25, the source of the N-type transistor M17, the source of the N-type transistor M18, the source of the N-type transistor M21, the source of the N-type transistor M22, the source of the N-type transistor M25, the source of the N-type transistor M26 is connected to HVEE, the drain of the N-type transistor M19 is connected to the drain of the N-type transistor M21, the gate of the N-type transistor M20, the gate of the N-type transistor M22, the drain of the N-type transistor M20 is connected to the drain of the N-type transistor M22, the first output end of the LevelShift voltage reduction level conversion module, the drain of the N-type transistor M23 is connected to the drain of the N-type transistor M25, the gate of the N-type transistor M24, the gate of the N-type transistor M26, the drain of the N-type transistor M24 is connected to the drain of the N-type transistor M26, the second output end of the LevelShift voltage reduction level conversion module; wherein m represents the maximum breakdown voltage supported between the gate and the source of the two N-type transistors in the symmetric double NMOS tube switch.

[0022] In an embodiment of the present application, the LevelShift voltage reduction level conversion module comprises N-type transistors N11-N26, wherein,

[0023] The source of the N-type transistor N11, the source of the N-type transistor N12 is connected with HVEE, the gate of the N-type transistor N11 is connected with the first input end of the LevelShift voltage level conversion module, the gate of the N-type transistor N12 is connected with the second input end of the LevelShift voltage level conversion module, the drain of the N-type transistor N11 is connected with the drain of the N-type transistor N13, the drain of the N-type transistor N12 is connected with the drain of the N-type transistor N14, the gate of the N-type transistor N13, the gate of the N-type transistor N14, the source of the N-type transistor N15, the source of the N-type transistor N16, the source of the N-type transistor N19, the source of the N-type transistor N20, the source of the N-type transistor N23, the source of the N-type transistor N24 is connected with VX, the source of the N-type transistor N13 is connected with the drain of the N-type transistor N15, the drain of the N-type transistor N17, the gate of the N-type transistor N19, the gate of the N-type transistor N21, the gate of the N-type transistor N16, the gate of the N-type transistor N18, the source of the N-type transistor N14 is connected with the gate of the N-type transistor N15, the gate of the N-type transistor N17, the drain of the N-type transistor N16, the drain of the N-type transistor N18, the gate of the N-type transistor N23, the gate of the N-type transistor N25, the source of the N-type transistor N17, the source of the N-type transistor N18, the source of the N-type transistor N21, the source of the N-type transistor N22, the source of the N-type transistor N25, the source of the N-type transistor N26 is connected with VX+m, the drain of the N-type transistor N19 is connected with the drain of the N-type transistor N21, the gate of the N-type transistor N20, the gate of the N-type transistor N22, the drain of the N-type transistor N20 is connected with the drain of the N-type transistor N22, the first output end of the LevelShift voltage level conversion module, the drain of the N-type transistor N23 is connected with the drain of the N-type transistor N25, the gate of the N-type transistor N24, the gate of the N-type transistor N26, the drain of the N-type transistor N24 is connected with the drain of the N-type transistor N26, the second output end of the LevelShift voltage level conversion module; wherein, m represents the maximum breakdown voltage supported between the gate and the source of two N-type transistors in the symmetrical double NMOS tube switch.

[0024] The beneficial effects of the present application are:

[0025] The application provides a dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process. The application provides a dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process, which adopts a symmetric double NMOS tube switch structure, a floating power rail generation module generates a floating power rail based on the amplitude of a dynamic high-voltage signal at the source of the two NMOS tubes, a LevelShift level conversion module is used to convert a digital control signal corresponding to a low power rail into an analog control signal corresponding to the floating power rail, and the analog control signal is connected to the gate of the two NMOS tubes to control the conduction and turn-off of the symmetric double NMOS tube switch. It can be seen that the amplitude of the high-voltage signal at the source of the symmetric NMOS tube switch is detected to generate a floating power rail, which is used to the LevelShift level conversion module and is fed back to the gate of the symmetric double NMOS tube switch, forming a loop to ensure that the thin gate oxide layer MOS tube switch is in a safe voltage range when transmitting a dynamic high-voltage signal, the control logic is effective and accurate, and the problem that the gate-source voltage of the MOS tube is low in the thin gate oxide layer process and cannot be used to build a logic switch in the dynamic high-voltage signal transmission path is solved innovatively, the process limitation is reduced at the circuit design level, the difficulty of high-voltage circuit design under the thin gate oxide layer process is reduced to the greatest extent, and a new circuit structure and design idea are provided for high-voltage circuit design.

[0026] The application will be further described in detail below with reference to the drawings and examples. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 is a structural schematic diagram of a dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process provided by the application;

[0028] Figure 2 is a specific circuit structure schematic diagram of a floating power rail generation module provided by the application;

[0029] Figure 3 is a structural schematic diagram of a LevelShift level conversion module provided by the application;

[0030] Figure 4 is a structural schematic diagram of another LevelShift level conversion module provided by the application;

[0031] Figure 5 is a structural schematic diagram of still another LevelShift level conversion module provided by the application;

[0032] Figure 6 is a specific circuit structure schematic diagram of a LevelShift step-down level conversion module provided by the application;

[0033] Figure 7is a specific circuit structure schematic diagram of a LevelShift voltage level conversion module provided by an embodiment of the present application.

[0034] Figure 8 is a structure schematic diagram of another dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process provided by an embodiment of the present application. DETAILED DESCRIPTION

[0035] The present application will be further described in detail below in combination with specific embodiments, but the embodiments of the present application are not limited thereto.

[0036] In order to realize the safe transmission of the dynamic high-voltage signal, please refer to Figure 1 An embodiment of the present application provides a dynamic high-voltage signal transmission switch circuit suitable for a thin gate oxide layer process, which comprises a symmetric double NMOS switch, a LevelShift voltage level conversion module and a floating power rail generation module, wherein,

[0037] The symmetric double NMOS switch comprises two N-type transistors, the gates and the sources of the two N-type transistors are respectively connected, and the drains of the two N-type transistors are respectively used as input ends of the dynamic high-voltage signal; the floating power rail generation module is connected to the drains of the two N-type transistors in the symmetric double NMOS switch, and is used for generating a floating power rail by tracking the amplitude of the dynamic high-voltage signal; and the LevelShift voltage level conversion module is connected to the floating power rail generation module and the gates of the two N-type transistors in the symmetric double NMOS switch, and is used for converting an input digital control signal corresponding to a low power rail 0V-5V into an analog control signal corresponding to the floating power rail, so as to control the turn-on and turn-off of the symmetric double NMOS switch.

[0038] The embodiment of the present application proposes to adopt a symmetric double NMOS tube structure, a floating power rail generation module generates a floating power rail based on the amplitude of a dynamic high voltage signal at the source of the two NMOS tubes, and then a LevelShift level conversion module is used to convert a digital control signal corresponding to a low power rail 0V-5V into an analog control signal corresponding to the floating power rail, and is connected to the gate of the symmetric double NMOS tube switch to control the conduction and turn-off of the symmetric double NMOS tube switch. It can be seen that this form of generating a floating power rail by detecting the amplitude of the high voltage signal at the source of the symmetric NMOS tube switch acts on the LevelShift level conversion module and is fed back to the gate of the symmetric double NMOS tube switch, forming a loop to ensure that the thin gate oxide MOS tube switch is in a safe voltage withstand range when transmitting a dynamic high voltage signal, the control logic is effective and accurate, and the problem of low gate-source voltage withstand of the MOS tube in the thin gate oxide process and the inability to build a logic switch in the dynamic high voltage signal transmission path is solved innovatively, the process limitation is reduced at the circuit design level, the difficulty of high voltage circuit design under the thin gate oxide process is reduced to the greatest extent, and a new circuit structure and design idea are provided for high voltage circuit design.

[0039] Next, the circuit design of each part is introduced in detail.

[0040] Please refer to Figure 1 In the embodiment of the present application, the symmetric double MOS tube switch as the transmission control structure of the dynamic high voltage signal in the circuit plays a switching role, and specifically the symmetric double NMOS tube switch includes an N-type transistor M1 and an N-type transistor M2, the gate of the N-type transistor M1 is connected with the gate of the N-type transistor M2 and the LevelShift level conversion module, the source of the N-type transistor M1 is connected with the source of the N-type transistor M2 and the floating power rail generation module, and the drains of the N-type transistor M1 and the N-type transistor M2 are respectively used as input ends of the high voltage signal. It can be seen that the symmetric double NMOS tube switch proposed in the embodiment of the present application supports bidirectional transmission of the dynamic high voltage signal. Due to the limitation of the thin gate oxide process, the transmission gate structure parallel switch and the single tube switch cannot meet the voltage withstand requirement of the transistor when transmitting the bidirectional dynamic high voltage signal, and the symmetric double NMOS tube switch proposed in the embodiment of the present application can realize bidirectional transmission of the dynamic high voltage signals VA and VB under a group of control logic signals through source interconnection.

[0041] Please refer to Figure 2 In the embodiment of the present application, the floating power rail generation module includes an operational amplifier A1, a current source S, an N-type transistor N1, an N-type transistor N2, and a floating power rail voltage output circuit, wherein,

[0042] The noninverting input end of the operational amplifier A is connected with the symmetrical double NMOS switch, the inverting input end of the operational amplifier A is connected with the drain of the N-type transistor N2, the first output end of the floating power rail voltage output circuit and the floating power rail generation module, the output end of the operational amplifier A is connected with the floating power rail voltage output circuit and the second output end of the floating power rail generation module, the source of the N-type transistor N2 and the source of the N-type transistor N1 are connected with the power supply HVEE (the lowest negative voltage of the system power rail, such as-35V), the gate of the N-type transistor N2 is connected with the gate of the N-type transistor N1, the drain of the N-type transistor N1 and the output end of the current source S, and the input end of the current source S is connected with the power supply HVDD (the highest positive voltage of the system power rail, such as 35V). In the embodiment of the application, the floating power rail voltage output circuit comprises n N-type transistors N3, and n is an integer greater than 0; the source and the drain of the n N-type transistors N3 are connected in series, and the gate of each N-type transistor N3 is connected with the drain thereof; wherein the drain of the first N-type transistor N3 is further connected with the second output end of the floating power rail generation module, and the source of the last N-type transistor N3 is further connected with the first output end of the floating power rail generation module.

[0043] The n N-type transistors N3 in the floating power rail voltage output circuit play a role in clamping the voltage VX at the source of the symmetrical double NMOS switch to generate the floating power rail VX~VX+m corresponding to VX. In the embodiment of the application, the value of n is determined by the maximum breakdown voltage m supported between the gate and the source of the two N-type transistors in the symmetrical double NMOS switch, that is, the voltage resistance requirement between the gate and the source of the two N-type transistors, such as m=5V, which is illustrated in the subsequent figures and examples.

[0044] For the LevelShift level conversion module, the embodiment of the application provides three optional schemes, which are as follows:

[0045] Please refer to Figure 3 The first optional scheme provided by the embodiment of the application is that the LevelShift level conversion module comprises a LevelShift down level conversion module, Figure 3 which is denoted as Level-Shift-down in the figure, and the LevelShift down level conversion module is used for converting the input digital control signal corresponding to the low power rail 0V~5V into an analog control signal corresponding to the floating power rail through voltage reduction.

[0046] Please refer to Figure 4 The second optional scheme provided by the embodiment of the application is that the LevelShift level conversion module comprises a LevelShift up level conversion module, Figure 4The LevelShift-up module is used for converting the input digital control signal corresponding to the low power rail 0V-5V into an analog control signal corresponding to the floating power rail through voltage conversion.

[0047] Please refer to Figure 5 The third optional solution provided by the embodiment of the present application is that the LevelShift module includes a LevelShift-down module and a LevelShift-up module, wherein,

[0048] The LevelShift-down module is used for converting the input digital control signal corresponding to the low power rail 0V-5V into an analog control signal corresponding to the lowest negative power rail of the system through voltage conversion; and the LevelShift-up module is used for converting the analog control signal corresponding to the lowest negative power rail of the system into an analog control signal corresponding to the floating power rail through voltage conversion. For example, if the lowest negative voltage HVEE of the system power rail is-35V, the corresponding analog control signal is HVEE-HVEE+5, i.e.,-35V--30V.

[0049] The above three optional solutions of the LevelShift module are determined according to the highest and lowest voltages of the system power rail in the actual scene.

[0050] For example, if the highest and lowest voltages of the system power rail are both positive voltages, for example, 15V-35V, the input digital control signal corresponding to the low power rail 0V-5V is shown in the figure, VDD is 5V, GND is 0V, and the high voltage signal to be transmitted is 20V, i.e., VX is 20V, then the LevelShift module only needs the LevelShift-up module to convert the digital control signal corresponding to the low power rail 0V-5V into an analog control signal corresponding to the floating power rail 20V-25V through voltage conversion, i.e., the VC power rail is 20V-25V, so as to ensure that the voltage difference between the gate voltage VC and the source voltage VX is within the 5V voltage resistance range.

[0051] For example, if the highest and lowest voltages of the system power rail are both negative voltages, for example, -30V--15V, the input digital control signal corresponding to the low power rail 0V-5V is shown in the figure, and the high voltage signal to be transmitted is-20V, i.e., VX is-20V, then the LevelShift module only needs the LevelShift-down module to convert the digital control signal corresponding to the low power rail 0V-5V into an analog control signal corresponding to the floating power rail-20V--15V through voltage conversion, i.e., the VC power rail is-20V--15V, so as to ensure that the voltage difference between the gate voltage VC and the source voltage VX is within the 5V voltage resistance range.

[0052] For example, the highest voltage of the system power supply rail is the positive power supply voltage, the lowest voltage is the negative power supply voltage, the input low power supply rail 0V-5V corresponds to the digital control signal, and the dynamic high voltage signal is any high voltage signal in the range of-35V-35V. The positive value and negative value appear together, for example, the dynamic high voltage signal is 20V. The low power supply rail 0-5V corresponding digital control signal needs to be converted into the analog control signal corresponding to the floating power supply rail 20V-25V. In this process, the dynamic high voltage signal changes to-20V. The low power supply rail 0-5V corresponding digital control signal needs to be converted into the analog control signal corresponding to the floating power supply rail-20V--15V. In this case, if only one LevelShift voltage reduction level conversion module or LevelShift voltage increase level conversion module is designed, it cannot cope with the cross amplitude of the input high voltage signal appearing positive value and negative value. In view of this, the low power supply rail 0-5V corresponding digital control signal in the embodiment of the application is first reduced to the analog control signal HVEE-HVEE+5 corresponding to the system lowest negative power supply rail, and then boosted to ensure that all analog control signals corresponding to the floating power supply rail are traversed. Still taking the above input dynamic high voltage signal as an example, when the dynamic high voltage signal is 20V, the analog control signal HVEE-HVEE+5 based on the system lowest negative power supply rail is generated first, for example, the-35V--30V analog control signal corresponding to HVEE=-35V, and then the-35V--30V analog control signal is boosted to the analog control signal corresponding to the floating power supply rail 20V-25V. When the dynamic high voltage signal is-20V, it is still reduced to the-35V--30V analog control signal first, and then the-35V--30V analog control signal is boosted to the analog control signal corresponding to the floating power supply rail-20V--15V.

[0053] It can be seen that the above three schemes have their own advantages. The first and second schemes can quickly cope with the situation that the voltage domain contained in the high voltage power supply rail in the circuit is all positive or all negative, but they cannot cope with the situation that the high voltage power supply rail contains voltage domains that are no longer all positive or negative, and the high power voltage is positive and the low power voltage is negative. The third scheme can cope with the situation that the above dynamic high voltage signal simultaneously appears greater than 0V or less than 0V, but it means that it needs to be reduced to the analog control signal HVEE-HVEE+5 corresponding to the system lowest negative power supply rail every time, which is slightly worse than the first and second schemes in terms of switching response speed.

[0054] Please refer to Figure 6 In the embodiment of the application, the LevelShift voltage reduction level conversion module includes N-type transistors M11-M26, wherein,

[0055] The sources of N-type transistors M11 and M12 are connected to VDD. The gate of N-type transistor M11 is connected to the first input terminal of the LevelShift buck level converter module. The gate of N-type transistor M1 is also connected to the first input terminal of the LevelShift buck level converter module. The drain of N-type transistor M11 is connected to the drain of N-type transistor M13. The drain of N-type transistor M12 is connected to the drain of N-type transistor M14. The gates of N-type transistors M13 and M14 are connected to the first input terminal of the LevelShift buck level converter module. The gate of N-type transistor M14, the source of N-type transistor M15, the source of N-type transistor M16, the source of N-type transistor M19, the source of N-type transistor M20, the source of N-type transistor M23, and the source of N-type transistor M24 are connected to HVEE+m. The source of N-type transistor M13 is connected to the drain of N-type transistor M15, the drain of N-type transistor M17, the gate of N-type transistor M19, the gate of N-type transistor M21, the gate of N-type transistor M16, and the gate of N-type transistor M18. The gate of N-type transistor M14 is connected to the drain of N-type transistor M15, the drain of N-type transistor M17, the gate of N-type transistor M19, the gate of N-type transistor M21, the gate of N-type transistor M16, and the gate of N-type transistor M18. The source of N-type transistor M15 is connected to the gate of N-type transistor M17, the drain of N-type transistor M16, the drain of N-type transistor M18, the gate of N-type transistor M23, and the gate of N-type transistor M25. The source of N-type transistor M17, the source of N-type transistor M18, the source of N-type transistor M21, the source of N-type transistor M22, the source of N-type transistor M25, and the source of N-type transistor M26 are connected to HVEE. The drain of N-type transistor M19 is connected to the drain of N-type transistor M21. The gates of N-type transistor M20 and M22 are connected. The drain of N-type transistor M20 is connected to the drain of N-type transistor M22 and the first output terminal of the LevelShift buck level conversion module. The drain of N-type transistor M23 is connected to the drain of N-type transistor M25, the gate of N-type transistor M24, and the gate of N-type transistor M26. The drain of N-type transistor M24 is connected to the drain of N-type transistor M26 and the second output terminal of the LevelShift buck level conversion module.

[0056] It can be seen that the gate of the N-type transistor M13 and the N-type transistor M14 in the LevelShift step-down level conversion module is connected with HVEE+m for isolating the signal of the high-voltage domain and the low-voltage domain to protect the low-voltage MOSFET. HVEE~HVEE+m is an analog control signal corresponding to the lowest negative power supply rail of the system, and the voltage difference is m V. In the conversion stage of the first input end VD of the LevelShift step-down level conversion module from GND to VDD, the N-type transistor M11 is turned off, the N-type transistor M12 is turned on, the drain of the N-type transistor M14 is pulled up to VDD, the second output end VD1_inv of the LevelShift step-down level conversion module is pulled up to HVEE+m, and the first output end VD1 of the LevelShift step-down level conversion module is pulled down to HVEE. Similarly, in the conversion stage of the first input end VD of the LevelShift step-down level conversion module from VDD to GND, the N-type transistor M11 is turned on, the N-type transistor M12 is turned off, the drain of the N-type transistor M13 is pulled up to VDD, the first output end VD1 of the LevelShift step-down level conversion module is flipped to HVEE+m, and the second output end VD1_inv of the LevelShift step-down level conversion module is flipped to HVEE. In this process, the pull-up capability of the N-type transistor M14 is greater than the pull-down capability of the N-type transistor M18, the pull-up capability of the N-type transistor M13 is greater than the pull-down capability of the N-type transistor M17, and the node voltage is flipped correctly. The transmission delay of the LevelShift step-down level conversion module is mainly determined by the discharging speed of the drain node of the N-type transistor M17 and the N-type transistor M18, and the back-to-back inverter structure composed of the N-type transistor M15~M18 has a positive feedback effect, which accelerates the signal flipping speed. At the same time, the existence of the N-type transistor M15 and the N-type transistor M16 in the LevelShift step-down level conversion module can realize high dv / dt (voltage change speed with time) anti-interference capability, only dynamic loss exists in the flipping process, and no static loss exists after the inversion is completed.

[0057] See Figure 7 In the LevelShift step-up level conversion module in the embodiment of the application, the N-type transistor N11~the N-type transistor N26 are connected in series, the gate of the N-type transistor N11 is connected with the first input end VD of the LevelShift step-up level conversion module, the drain of the N-type transistor N11 is connected with the first output end VD1 of the LevelShift step-up level conversion module, the drain of the N-type transistor N12 is connected with the second output end VD1_inv of the LevelShift step-up level conversion module, the drain of the N-type transistor N13 is connected with the first input end VD of the LevelShift step-up level conversion module, the drain of the N-type transistor N14 is connected with the first output end VD1 of the LevelShift step-up level conversion module, the drain of the N-type transistor N15 is connected with the second output end VD1_inv of the LevelShift step-up level conversion module, the drain of the N-type transistor N16 is connected with the first input end VD of the LevelShift step-up level conversion module, the drain of the N-type transistor N17 is connected with the first output end VD1 of the LevelShift step-up level conversion module, the drain of the N-type transistor N18 is connected with the second output end VD1_inv of the LevelShift step-up level conversion module, the gate of the N-type transistor N19 is connected with the first input end VD of the LevelShift step-up level conversion module, the gate of the N-type transistor N20 is connected with the first output end VD1 of the LevelShift step-up level conversion module, the gate of the N-type transistor N21 is connected with the second output end VD1_inv of the LevelShift step-up level conversion module, the gate of the N-type transistor N22 is connected with the first input end VD of the LevelShift step-up level conversion module, the gate of the N-type transistor N23 is connected with the first output end VD1 of the LevelShift step-up level conversion module, the gate of the N-type transistor N24 is connected with the second output end VD1_inv of the LevelShift step-up level conversion module, the gate of the N-type transistor N25 is connected with the first input end VD of the LevelShift step-up level conversion module, and the gate of the N-type transistor N26 is connected with the first output end VD1 of the LevelShift step-up level conversion module.

[0058] The source of the N-type transistor N11 and the source of the N-type transistor N12 are connected to HVEE, the gate of the N-type transistor N11 is connected to the first input terminal of the LevelShift voltage level conversion module, the gate of the N-type transistor N12 is connected to the second input terminal of the LevelShift voltage level conversion module, the drain of the N-type transistor N11 is connected to the drain of the N-type transistor N13, the drain of the N-type transistor N12 is connected to the drain of the N-type transistor N14, the gate of the N-type transistor N13, the gate of the N-type transistor N14, the source of the N-type transistor N15, the source of the N-type transistor N16, the source of the N-type transistor N19, the source of the N-type transistor N20, the source of the N-type transistor N23, and the source of the N-type transistor N24 are connected to VX, the source of the N-type transistor N13 is connected to the drain of the N-type transistor N15, the drain of the N-type transistor N17, the gate of the N-type transistor N19, the gate of the N-type transistor N21, the gate of the N-type transistor N16, and the gate of the N-type transistor N18, the source of the N-type transistor N14 is connected to the gate of the N-type transistor N15, the gate of the N-type transistor N17, the drain of the N-type transistor N16, the drain of the N-type transistor N18, the gate of the N-type transistor N23, and the gate of the N-type transistor N25, the source of the N-type transistor N17, the source of the N-type transistor N18, the source of the N-type transistor N21, the source of the N-type transistor N22, the source of the N-type transistor N25, and the source of the N-type transistor N26 are connected to VX+m, the drain of the N-type transistor N19 is connected to the drain of the N-type transistor N21, the gate of the N-type transistor N20, and the gate of the N-type transistor N22, the drain of the N-type transistor N20 is connected to the drain of the N-type transistor N22 and the first output terminal of the LevelShift voltage level conversion module, the drain of the N-type transistor N23 is connected to the drain of the N-type transistor N25, the gate of the N-type transistor N24, and the gate of the N-type transistor N26, the drain of the N-type transistor N24 is connected to the drain of the N-type transistor N26 and the second output terminal of the LevelShift voltage level conversion module.

[0059] Here, the LevelShift boost level conversion module is similar to the LevelShift buck level conversion module. In the conversion stage of the first input end VD1 of the LevelShift boost level conversion module from HVEE+m to HVEE, the N-type transistor N11 is turned off, the N-type transistor N12 is turned on, the drain of the N-type transistor M14 is pulled down to HVEE, the second output end VC_inv of the LevelShift boost level conversion module is pulled down to VX, the first output end VC of the LevelShift boost level conversion module is pulled up to VX+m, VX~VX+m is a high-voltage floating power rail caused by an internal bootstrap circuit, is generated by a floating power rail generation module, and the voltage difference is m V. Similarly, in the conversion stage of the first input end VD1 of the LevelShift boost level conversion module from HVEE to HVEE+m, the N-type transistor N11 is turned on, the N-type transistor N12 is turned off, the drain of the N-type transistor N13 is pulled down to HVEE, the first output end VC of the LevelShift boost level conversion module is flipped to VX, and the second output end VC_inv of the LevelShift boost level conversion module is flipped to VX+5. In this process, the pull-down capability of the N-type transistor N14 is greater than the pull-up capability of the N-type transistor N18, the pull-down capability of the N-type transistor N13 is greater than the pull-up capability of the N-type transistor N17, and the node voltage is flipped correctly. The discharge speed of the drain node of the N-type transistor N17 and the N-type transistor N18 in the LevelShift boost level conversion module is determined by the pull-up current of the N-type transistor N17 and the N-type transistor N18, respectively. The back-to-back inverter structure composed of the N-type transistors N15-N18 has a positive feedback effect, which accelerates the signal flipping speed. At the same time, the existence of the N-type transistor N15 and the N-type transistor N16 in the LevelShift boost level conversion module can realize higher dv / dt anti-interference capability, only dynamic loss exists in the flipping process, and no static loss exists after the flipping is completed.

[0060] Further, please refer to Figure 8The symmetric double NMOS switch in the embodiment of the present application further comprises a diode D connected between the gate and the source of the two N-type transistors. The dynamic high-voltage signal transmission switch circuit in the embodiment of the present application has dynamic and static double transistor anti-breakdown and protection functions. The dynamic protection is reflected in that, by sampling the source and generating a high-voltage control logic signal based on the sampling, the gate control potential of the symmetric NMOS switch can follow the real-time change of the high-voltage signal, so as to ensure that the symmetric NMOS switch will not be at the risk of breakdown; the static protection is realized by using the diode D, and is used to prevent the symmetric NMOS switch from being broken down due to errors of the floating power rail generation module and the LevelShift level conversion module. The diode is connected between the source and the gate of the symmetric NMOS switch, and plays a protection role. When the potential difference between the gate potential VC and the source potential VX of the symmetric NMOS switch exceeds the breakdown voltage of the thin gate oxide layer process NMOS, the diode between the nodes is turned on, so as to prevent the gate oxide layer from being broken down and damaged.

[0061] The dynamic high-voltage signal transmission switch circuit suitable for the thin gate oxide layer process provided by the present application can support large-swing dynamic high-voltage signal transmission in the range of the minimum analog control signal HVEE-HVEE+5 (negative power supply voltage HVEE) corresponding to the minimum system negative power rail to the maximum analog control signal HVDD-10V-HVDD-5V (positive power supply voltage HVDD-5V) corresponding to the maximum system positive power rail, such as the digital control signal corresponding to the input low power rail 0V-5V. The control signal is first converted to the analog control signal HVEE-HVEE+5 corresponding to the minimum system negative power rail by the LevelShift step-down level conversion module, and then converted to the analog control signal corresponding to the floating power rail VX-VX+5, that is, the switch control signal of the dynamic high-voltage signal transmission across the positive and negative power voltage domains can be realized. The high-gain operational amplifier A of the floating power rail generation module and the fast flipping capability of the LevelShift level conversion module can ensure that the high-voltage analog control signal (VX-VX+5) of the symmetric NMOS switch can respond quickly to the large-swing dynamic high-voltage signal, reduce the influence of the symmetric NMOS switch on the transmission high signal, and ensure the normal work of the main circuit.

[0062] It should be noted that the power rail mentioned in the embodiment of the present application includes the minimum power voltage and the maximum power voltage, such as the low power rail 0V-5V, which means that the minimum voltage corresponding to this low power rail is 0V and the maximum voltage is 5V, and other power rails are similar.

[0063] In the description of the application, it should be understood that the terms "first", "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the application, the meaning of "a plurality of" is two or more, unless otherwise specifically limited.

[0064] Although the application is described herein in conjunction with various embodiments, those skilled in the art, by referring to the description and drawings, can understand and implement other changes of the disclosed embodiments in the implementation of the claimed application. In the description, the word "comprising" does not exclude other components or steps, and "one" or "an" does not exclude a plurality. Some measures are described in mutually different embodiments, but this does not mean that these measures cannot be combined to produce good results.

[0065] The above is a further detailed description of the application in conjunction with specific preferred embodiments, and cannot be considered as limiting the specific implementation of the application to these descriptions. For those skilled in the art, without departing from the concept of the application, a number of simple deductions or substitutions can be made, which should be considered as falling within the protection scope of the application.

Claims

1. A dynamic high voltage signal transmission switch circuit suitable for thin gate oxide process, characterized in that, The method comprises a symmetric double NMOS switch, a LevelShift level conversion module and a floating power rail generation module, wherein, The symmetric double NMOS switch comprises two N-type transistors, the gates and the sources of the two N-type transistors are connected respectively, and the drains of the two N-type transistors are respectively used as input ends of a dynamic high voltage signal. The floating power rail generation module is connected to the sources of the two N-type transistors in the symmetric double NMOS switch, and is used for tracking the amplitude of the dynamic high voltage signal to generate a floating power rail. The LevelShift level conversion module is connected to the floating power rail generation module and the gates of the two N-type transistors in the symmetric double NMOS switch, and is used for converting an input digital control signal corresponding to a low power rail 0V-5V into an analog control signal corresponding to the floating power rail, so as to control the conduction and the shutdown of the symmetric double NMOS switch. The floating power rail generation module comprises an operational amplifier A1, a current source S, an N-type transistor N1, an N-type transistor N2 and a floating power rail voltage output circuit, wherein the non-inverting input end of the operational amplifier A is connected to the symmetric double NMOS switch, the inverting input end of the operational amplifier A is connected to the drain of the N-type transistor N2, the floating power rail voltage output circuit and the first output end of the floating power rail generation module, the output end of the operational amplifier A is connected to the floating power rail voltage output circuit and the second output end of the floating power rail generation module, the source of the N-type transistor N2 and the source of the N-type transistor N1 are connected to a power supply HVEE, the gate of the N-type transistor N2 is connected to the gate of the N-type transistor N1, the drain of the N-type transistor N1 and the output end of the current source S, and the input end of the current source S is connected to a power supply HVDD.

2. The dynamic high voltage signal transmission switch circuit suitable for thin gate oxide process according to claim 1, wherein, The symmetric double NMOS switch further comprises a diode D connected between the gates and the sources of the two N-type transistors.

3. The dynamic high voltage signal transmission switch circuit suitable for thin gate oxide process according to claim 1, wherein, The floating power rail voltage output circuit comprises n an N-type transistor N3, n is an integer greater than 0; n The source and the drain of each N-type transistor N3 are connected in series, and the gate of each N-type transistor N3 is connected with the drain thereof; wherein the drain of the first N-type transistor N3 is further connected with the second output end of the floating power rail generation module, and the source of the last N-type transistor N3 is further connected with the first output end of the floating power rail generation module.

4. The dynamic high voltage signal transmission switch circuit suitable for thin gate oxide process according to claim 3, wherein, n The value of Vmax is determined by the maximum breakdown voltage supported between the gate and source of the two N-type transistors in the symmetric dual NMOS switch.

5. The dynamic high voltage signal transmission switch circuit suitable for thin gate oxide process according to claim 1, wherein, The LevelShift level conversion module comprises a LevelShift step-down level conversion module, which is used for converting an input digital control signal corresponding to a low power rail 0V-5V into an analog control signal corresponding to the floating power rail through step-down conversion.

6. The dynamic high voltage signal transmission switch circuit suitable for thin gate oxide process according to claim 1, wherein, The LevelShift level conversion module comprises a LevelShift step-up level conversion module, which is used for converting an input digital control signal corresponding to a low power rail 0V-5V into an analog control signal corresponding to the floating power rail through step-up conversion.

7. The dynamic high voltage signal transmission switch circuit suitable for thin gate oxide process according to claim 5, wherein, The LevelShift level conversion module comprises a LevelShift step-down level conversion module and a LevelShift step-up level conversion module, wherein, The LevelShift step-down level conversion module converts an input digital control signal corresponding to a low power rail 0V-5V into an analog control signal corresponding to a system lowest negative power rail through step-down conversion. The LevelShift boost level conversion module is configured to convert an analog control signal corresponding to the system lowest negative power supply rail into an analog control signal corresponding to the floating power supply rail through boost conversion.

8. The dynamic high voltage signal transmission switch circuit suitable for thin gate oxide process according to claim 5 or 7, wherein, The LevelShift boost level conversion module includes N-type transistors M11 to N-type transistors M26. The source of the N-type transistor M11, the source of the N-type transistor M12 is connected to VDD, the gate of the N-type transistor M11 is connected to the first input end of the LevelShift voltage level conversion module, the gate of the N-type transistor M12 is connected to the first input end of the LevelShift voltage level conversion module, the drain of the N-type transistor M11 is connected to the drain of the N-type transistor M13, the drain of the N-type transistor M12 is connected to the drain of the N-type transistor M14, the gate of the N-type transistor M13, the gate of the N-type transistor M14, the source of the N-type transistor M15, the source of the N-type transistor M16, the source of the N-type transistor M19, the source of the N-type transistor M20, the source of the N-type transistor M23, the source of the N-type transistor M24 is connected to HVEE m The source of the N-type transistor M13 is connected to the drain of the N-type transistor M15, the drain of the N-type transistor M17, the gate of the N-type transistor M19, the gate of the N-type transistor M21, the gate of the N-type transistor M16, the gate of the N-type transistor M18, the source of the N-type transistor M14 is connected to the gate of the N-type transistor M15, the gate of the N-type transistor M17, the drain of the N-type transistor M16, the drain of the N-type transistor M18, the gate of the N-type transistor M23, the gate of the N-type transistor M25, the source of the N-type transistor M17, the source of the N-type transistor M18, the source of the N-type transistor M21, the source of the N-type transistor M22, the source of the N-type transistor M25, the source of the N-type transistor M26 is connected to HVEE, the drain of the N-type transistor M19 is connected to the drain of the N-type transistor M21, the gate of the N-type transistor M20, the gate of the N-type transistor M22, the drain of the N-type transistor M20 is connected to the drain of the N-type transistor M22, the first output end of the LevelShift voltage level conversion module, the drain of the N-type transistor M23 is connected to the drain of the N-type transistor M25, the gate of the N-type transistor M24, the gate of the N-type transistor M26, the drain of the N-type transistor M24 is connected to the drain of the N-type transistor M26, the second output end of the LevelShift voltage level conversion module; wherein, m represents the maximum breakdown voltage supported between the gate and the source of the two N-type transistors in the symmetric double NMOS tube switch.

9. The dynamic high voltage signal transmission switch circuit suitable for thin gate oxide process according to claim 6 or 7, characterized in that, The LevelShift boost level conversion module includes N-type transistors N11 to N-type transistors N26. The LevelShift boost level conversion module includes N-type transistors N11 to N-type transistors N26. The source of the N-type transistor N11, the source of the N-type transistor N12 is connected to HVEE, the gate of the N-type transistor N11 is connected to the first input end of the LevelShift voltage level conversion module, the gate of the N-type transistor N12 is connected to the second input end of the LevelShift voltage level conversion module, the drain of the N-type transistor N11 is connected to the drain of the N-type transistor N13, the drain of the N-type transistor N12 is connected to the drain of the N-type transistor N14, the gate of the N-type transistor N13, the gate of the N-type transistor N14, the source of the N-type transistor N15, the source of the N-type transistor N16, the source of the N-type transistor N19, the source of the N-type transistor N20, the source of the N-type transistor N23, the source of the N-type transistor N24 is connected to VX, the source of the N-type transistor N13 is connected to the drain of the N-type transistor N15, the drain of the N-type transistor N17, the gate of the N-type transistor N19, the gate of the N-type transistor N21, the gate of the N-type transistor N16, the gate of the N-type transistor N18, the source of the N-type transistor N14 is connected to the gate of the N-type transistor N15, the gate of the N-type transistor N17, the drain of the N-type transistor N16, the drain of the N-type transistor N18, the gate of the N-type transistor N23, the gate of the N-type transistor N25, the source of the N-type transistor N17, the source of the N-type transistor N18, the source of the N-type transistor N21, the source of the N-type transistor N22, the source of the N-type transistor N25, the source of the N-type transistor N26 is connected to VX m The drain of the N-type transistor N19 is connected to the drain of the N-type transistor N21, the gate of the N-type transistor N20, the gate of the N-type transistor N22, the drain of the N-type transistor N20 is connected to the drain of the N-type transistor N22, the first output end of the LevelShift voltage level conversion module, the drain of the N-type transistor N23 is connected to the drain of the N-type transistor N25, the gate of the N-type transistor N24, the gate of the N-type transistor N26, the drain of the N-type transistor N24 is connected to the drain of the N-type transistor N26, the second output end of the LevelShift voltage level conversion module; wherein, m It represents the maximum breakdown voltage supported between the gate and the source of the two N-type transistors in the symmetric double NMOS tube switch.

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