FPGA-based LVDS high-speed data switch
By using an FPGA-based LVDS high-speed data switch, the problem of existing LVDS signals being unable to achieve multi-master and multi-slave and dynamic routing was solved, enabling flexible interconnection and communication between multiple devices, reducing design and manufacturing costs, and improving operating efficiency.
Patent Information
- Application Number
- CN202211656105.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-22
- Publication Date
- 2026-04-17
- Estimated Expiration
- 2042-12-22
AI Technical Summary
Existing LVDS signals cannot achieve multi-master multi-slave, dynamic routing configuration, or high-speed flexible interconnection and communication between multiple devices, and cannot be applied to mesh or star topologies.
Design an FPGA-based LVDS high-speed data switch, including a port configuration module, a routing configuration module, a data buffer module, a data transceiver module, a clock generation module, and a management interface module. It realizes multi-master and multi-slave parallel communication functions, supports dynamic data routing and flexible port combinations, and adapts to different serial encoding formats and data rates.
It enables flexible data routing for multi-point communication, reduces the complexity and cost of hardware and software design for high-speed LVDS data exchange between multiple chips on the board, improves operating efficiency, and is suitable for high-speed LVDS interconnection communication between multiple devices.