Display panel and method of manufacturing the same

Abstract

A display panel and a method of manufacturing the same are disclosed. The display panel includes a substrate, a pixel pad layer over the substrate, and a contact stack over the substrate and electrically connected to the pixel pad layer. The contact stack includes a first metal layer, a second metal layer over the first metal layer, and a first interlayer insulating layer between the first metal layer and the second metal layer. The first interlayer insulating layer includes a first top portion covering an edge of a top surface of the first metal layer. The second metal layer is electrically connected to the top surface of the first metal layer exposed by the first interlayer insulating layer. A sidewall of the first interlayer insulating layer is recessed from a sidewall of the substrate by a first distance greater than 0.

Description

Technical Field

[0001] This invention relates to display panels and methods of manufacturing the same, and particularly to the peripheral circuit area of ​​the display panel. Background Technology

[0002] By splicing multiple display panels to form the display area in a display device, the image quality can be improved, and the device's functionality can be easier to maintain. To simultaneously provide electronic signals to multiple display panels, they can be electrically connected to each other. However, the multi-layered structure of display panels can be damaged during the cutting and manufacturing process, making accurate splicing between panels difficult and affecting the image quality. Therefore, avoiding these defects in display panels to improve the functionality of display devices is one of the problems to be solved in the field of display devices. Summary of the Invention

[0003] According to some embodiments of the present invention, a display panel includes a substrate, a pixel pad layer located above the substrate, and a contact stack located above the substrate and electrically connected to the pixel pad layer. The contact stack includes a first metal layer, a second metal layer located above the first metal layer, and a first interlayer insulating layer located between the first and second metal layers. The first interlayer insulating layer includes a first top portion covering an edge of the top surface of the first metal layer. The second metal layer is electrically connected to the top surface of the first metal layer exposed by the first interlayer insulating layer. The sidewalls of the first interlayer insulating layer are recessed from the sidewalls of the substrate by a first distance greater than zero.

[0004] In some embodiments, the first distance by which the sidewall of the first interlayer insulating layer is recessed from the sidewall of the substrate is between 0.1 micrometers and 1 micrometer.

[0005] In some embodiments, the second distance between the sidewall of the second metal layer and the sidewall of the substrate is between 20 micrometers and 200 micrometers.

[0006] In some embodiments, the first interlayer insulation layer includes a side portion covering the sidewall of the first metal layer, and the second metal layer covers the side portion of the first interlayer insulation layer.

[0007] In some embodiments, the top surface of the first metal layer and the bottom surface of the second metal layer sandwich the first top portion of the first interlayer insulating layer.

[0008] In some embodiments, the first interlayer insulating layer includes a first opening that exposes the top surface of the first metal layer, and the second metal layer extends through the first opening to contact the top surface of the first metal layer.

[0009] In some embodiments, the contact stack further includes a third metal layer located between the first interlayer insulating layer and the second metal layer, and a second interlayer insulating layer located between the third metal layer and the second metal layer, wherein the second interlayer insulating layer includes a second top portion covering the edge of the top surface of the third metal layer.

[0010] In some embodiments, the sidewall of the second interlayer insulation layer is recessed from the sidewall of the first interlayer insulation layer by a third distance greater than 0.

[0011] In some embodiments, the third distance by which the sidewall of the second interlayer insulation layer is recessed from the sidewall of the first interlayer insulation layer is between 0.1 micrometers and 1 micrometer.

[0012] In some embodiments, the first interlayer insulation layer includes a first side portion covering the sidewall of the first metal layer, the third metal layer covers the first side portion of the first interlayer insulation layer, the second interlayer insulation layer includes a second side portion covering the sidewall of the third metal layer, and the second metal layer covers the second side portion of the second interlayer insulation layer.

[0013] In some embodiments, the contact stack further includes a metal underlayer located beneath the first metal layer and a dielectric layer located between the metal underlayer and the first metal layer, wherein the dielectric layer includes a second opening exposing the top surface of the metal underlayer, and the first metal layer extends through the second opening to contact the metal underlayer.

[0014] In some embodiments, the sidewalls of the dielectric layer are flush with the sidewalls of the substrate.

[0015] In some embodiments, the contact stack is located in the peripheral circuit area of ​​the display panel.

[0016] In some embodiments, the display panel further includes a transparent conductive layer continuously covering the pixel pad layer and the contact stack.

[0017] In some embodiments, the sidewalls of the transparent conductive layer and the sidewalls of the substrate are located on different planes.

[0018] According to some embodiments of the present invention, a method of manufacturing a display panel includes the following steps: forming a first metal layer over a substrate; forming a first interlayer insulating layer over the first metal layer, wherein the first interlayer insulating layer includes a top portion covering an edge of the top surface of the first metal layer and a side portion covering a sidewall of the first metal layer, and the sidewall of the first interlayer insulating layer is recessed from the sidewall of the substrate by a first distance greater than 0; forming a second metal layer over the first interlayer insulating layer and the first metal layer, wherein the second metal layer passes through the first interlayer insulating layer and is electrically connected to the first metal layer to form a contact stack.

[0019] In some embodiments, after forming the contact stack, the substrate is further cut along a predetermined cleavage path, wherein the sidewall of the first interlayer insulating layer is located between the sidewall of the first metal layer and the predetermined cleavage path.

[0020] In some embodiments, the second distance between the sidewall of the first interlayer insulation layer and the predetermined cut is between 0.1 micrometers and 1 micrometer.

[0021] In some embodiments, the third distance between the sidewall of the second metal layer and the predetermined cut path is between 20 micrometers and 200 micrometers.

[0022] In some embodiments, forming the first interlayer insulating layer includes forming a first insulating layer conformally covering the first metal layer over the first metal layer, wherein the sidewalls of the first insulating layer are flush with the sidewalls of the substrate. The first insulating layer is patterned to form the first interlayer insulating layer, wherein the first interlayer insulating layer includes a first opening exposing the top surface of the first metal layer, and the sidewalls of the patterned first interlayer insulating layer are recessed from the sidewalls of the substrate by a first distance. Attached Figure Description

[0023] The various aspects of the invention can be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, according to standard industrial methods, the various features are not drawn to scale. In practice, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion.

[0024] Figure 1A A partial top view of the display panel is shown for a comparative example of the present invention;

[0025] Figure 1B A comparative example of the present invention is illustrated. Figure 1A A cross-sectional view of the display panel along line A-A';

[0026] Figure 2A A cross-sectional view of a display panel is shown for one embodiment of the present invention;

[0027] Figure 2B for Figure 2A A magnified view of a portion of the display panel;

[0028] Figure 3 A cross-sectional view of the display panel is shown for another embodiment of the present invention;

[0029] Figures 4A to 4H Cross-sectional views of the display panel at various stages of the manufacturing process are shown for some embodiments of the present invention.

[0030] Symbol Explanation

[0031] 10, 20, 30: Display panel

[0032] 10a: Pixel area

[0033] 10b: Peripheral Circuit Area

[0034] 100,100': Contact stack

[0035] 110:Substrate

[0036] 120: Buffer layer

[0037] 130: Insulation layer

[0038] 140: Dielectric layer

[0039] 140p: Opening

[0040] 150, 152, 154, 156, 158: Metal layers

[0041] 160, 160': Interlayer insulation layer

[0042] 162: First interlayer insulation layer

[0043] 162a, 164a, 166a: Top portion

[0044] 162b, 164b, 166b: Side portion

[0045] 162p: Opening

[0046] 164: Second interlayer insulation layer

[0047] 164p: Opening

[0048] 166: Third interlayer insulation layer

[0049] 170: Transparent conductive layer

[0050] 200: Pixel Padding Layer

[0051] 210a, 210b, 210c: Planarization layers

[0052] 300: Pre-ordered cutting channel

[0053] A-A': line

[0054] D1, D2, D3, D4, D5: Distance Detailed Implementation

[0055] To achieve the different features of the mentioned subject matter, the following disclosure provides many different embodiments or examples. Specific examples of components, configurations, etc., are described below to simplify the invention. Of course, these are merely examples and not limiting. For example, in the following description, forming a first feature on or over a second feature can include embodiments where the first and second features are formed in direct contact, and can also include embodiments where an additional feature is formed between the first and second features such that the first and second features do not need to be in direct contact. Additionally, reference numerals and / or letters may be repeated in various examples. This repetition is for simplicity and clarity and does not in itself imply a relationship between the various embodiments and / or configurations discussed.

[0056] Furthermore, this document may use spatial relative terms such as "below," "under," "lower," "above," "upper," etc., to facilitate the description of the relationship between one element or feature and another element or feature as shown in the figure. In addition to the orientations shown in the figure, spatial relative terms are intended to include different orientations of the device in use or operation. The device may be oriented in other ways (rotated 90 degrees or in other directions), and the spatial relative descriptive symbols used herein may be interpreted accordingly.

[0057] It should be understood that although the terms "first," "second," "third," etc., may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, and / or parts should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, the "first element" discussed below may be referred to as the second element without departing from the teachings of this document.

[0058] refer to Figure 1A and Figure 1B , Figure 1A A partial top view of the display panel 10, used as a comparative example, is shown. Figure 1B Then the display panel 10 is drawn along Figure 1A A cross-sectional view of line A-A' in the diagram. The display panel 10 includes a pixel area 10a and a peripheral circuit area 10b adjacent to the pixel area 10a.

[0059] Specifically, pixel region 10a includes a pixel pad layer 200 beneath the pixel units. Peripheral circuit region 10b includes a contact stack 100 with a multi-layer structure. The contact stack 100 is electrically connected to the pixel pad layer 200, allowing electronic signals to be provided to multiple pixel units in pixel region 10a via the contact stack 100 and the pixel pad layer 200, thereby enabling the display panel 10 to display an image. To clearly illustrate the corresponding positions of the contact stack 100 and the pixel pad layer 200, Figure 1Aand Figure 1B The display panel 10 shown may omit some components, such as pixel units on the pixel pad layer 200.

[0060] More specifically, the display panel 10 includes a substrate 110, a buffer layer 120, an insulating layer 130, and a dielectric layer 140 extending across a pixel region 10a and a peripheral circuit region 10b. The substrate 110, buffer layer 120, insulating layer 130, and dielectric layer 140 collectively serve as a carrier component, allowing a pixel pad layer 200 and a contact stack 100 to be formed over the same side (e.g., the front surface) of the substrate 110. Multiple planarization layers may also be included between the pixel pad layer 200 and the carrier component, such that the pixel pad layer 200 and the contact stack 100 are located on different horizontal planes, for example... Figure 1B Planarization layers 210a, 210b, and 210c are shown.

[0061] The contact stack 100 includes a multilayer structure formed by metal layers 150 to 158 and an interlayer insulating layer 160. The metal layers 150 to 158 at different levels in the contact stack 100 can be electrically connected to different components, thereby allowing for flexible configuration of the display panel 10 layout. For example, the topmost metal layer 158 can be located at the same level as the pixel pad layer 200 and electrically connected to it, while the bottommost metal layer (or metal underlayer) can be electrically connected to driving circuitry located on the opposite side of the substrate 110 (e.g., the back surface relative to the front surface). The interlayer insulating layer 160 intervenes between the metal layers 152 to 158 to isolate and protect portions of the metal layers 152 to 158. The interlayer insulating layer 160 may extend further between the planarization layers 210a and 210c below the pixel pad layer 200, such that the interlayer insulating layer 160 spans the pixel region 10a and the peripheral circuit region 10b to form a more robust structure of the display panel 10. In some embodiments, the display panel 10 may further include a transparent conductive layer 170 spanning the pixel region 10a and the peripheral circuit region 10b, and the transparent conductive layer 170 continuously covers the pixel pad layer 200, the contact stack 100, and the extended interlayer insulating layer 160.

[0062] like Figure 1BAs shown, the interlayer insulating layer 160 of the display panel 10 extends to the edge of the display panel 10, such that the sidewall of the interlayer insulating layer 160 is coplanar with the sidewall of the substrate 110. In other words, when the substrate 110 is cut to form the display panel 10, the substrate 110 and the interlayer insulating layer 160 are cut together to form a sidewall where the interlayer insulating layer 160 is flush with the substrate 110. However, during the cutting process, the interlayer insulating layer 160 may develop cracks or breakage at the cut. Since the interlayer insulating layer 160 in the contact stack 100 intervenes between the metal layers 152 and 158, cracks or breakage in the interlayer insulating layer 160 may extend to the metal layers 152 and 158, causing damage to the contact stack 100 and affecting the transmission of electronic signals in the display panel 10.

[0063] This invention provides a display panel and its manufacturing method to solve the problem of edge damage in display panels. The display panel of this invention includes a substrate, a pixel pad layer located above the substrate, and a stack of contacts electrically connected to the pixel pad layer. The contact stack comprises a multilayer structure formed by a first metal layer, a second metal layer above the first metal layer, and a first interlayer insulating layer between the first and second metal layers. Because the sidewalls of the first interlayer insulating layer are recessed from the sidewalls of the substrate by a distance greater than 0 after the substrate is cut to form the display panel, the first interlayer insulating layer is protected from the cutting process during substrate cutting, thus preventing cracks or damage to the first interlayer insulating layer. Therefore, the contact stack of this invention maintains an intact structure, thereby preventing damage to the peripheral circuit areas of the display panel and improving the yield of the display panel.

[0064] According to some embodiments of the present invention, Figure 2A A cross-sectional view of the display panel 20 is shown. Figure 2B Then draw Figure 2A A partially enlarged view of the contact stack 100' of the display panel 20. The display panel 20 is similar to... Figure 1B The display panel 10 in the display panel 20 differs from the contact stack 100 in the display panel 10, except that the structure of the contact stack 100' in the display panel 20 is different. Therefore, the details of the contact stack 100' in the display panel 20 will be described in detail below, while the other components of the display panel 20 that are similar to those in the display panel 10 will not be specifically described here.

[0065] refer to Figure 2A and Figure 2B The contact stack 100' comprises a multilayer structure formed by metal layers 150, 152, 154, 156, and 158 arranged from bottom to top, and the metal layers 150 to 158 in the contact stack 100' are electrically connected to each other. The metal layers 150 to 158 may include a metallic material suitable for electrodes, such as copper. Figure 2A and Figure 2B In the illustrated embodiment, the contact stack 100' includes five metal layers, but the number of metal layers in the contact stack 100' may depend on the design of the display panel, and in other embodiments, the contact stack 100' may include more or fewer than five metal layers.

[0066] The dielectric layer 140 is located between the bottom metal layers 150 and 152, so the dielectric layer 140 and the insulating layer 130 can jointly protect the metal layer 150, which serves as the bottom metal layer. Specifically, the dielectric layer 140 covers the edge of the top surface of the metal layer 150 and the sidewalls of the metal layer 150, such that the dielectric layer 140 is sandwiched between the top surface of the metal layer 150 and the bottom surface of the metal layer 152.

[0067] An interlayer insulating layer 160' above the dielectric layer 140 intersects between metal layers 152 and 158, such that the interlayer insulating layer 160' includes a first interlayer insulating layer 162 located between metal layers 152 and 154, a second interlayer insulating layer 164 located between metal layers 154 and 156, and a third interlayer insulating layer 166 located between metal layers 156 and 158. Specifically, the first interlayer insulating layer 162 includes a top portion 162a covering the edge of the top surface of the metal layer 152 and a side portion 162b covering the sidewall of the metal layer 152, wherein the top portion 162a is sandwiched between the top surface of the metal layer 152 and the bottom surface of the metal layer 154. Similarly, the second interlayer insulation layer 164 includes a top portion 164a covering the edge of the top surface of the metal layer 154 and a side portion 164b covering the sidewalls of the metal layer 154, and the third interlayer insulation layer 166 includes a top portion 166a covering the edge of the top surface of the metal layer 156 and a side portion 166b covering the sidewalls of the metal layer 156. The topmost metal layer 158 is located above the third interlayer insulation layer 166, such that the top portion 166a is sandwiched between the top surface of the metal layer 156 and the bottom surface of the metal layer 158.

[0068] like Figure 2B As shown, the sidewall of the first interlayer insulating layer 162 in the interlayer insulating layer 160' is closest to the edge of the substrate 110, but the sidewall of the first interlayer insulating layer 162 is not coplanar with the sidewall of the substrate 110. Specifically, the sidewall of the first interlayer insulating layer 162 is recessed from the sidewall of the substrate 110 by a first distance D1, where the first distance D1 is greater than 0. In this document, the first distance D1 is defined as the distance between the orthographic projection of the sidewall of the first interlayer insulating layer 162 onto the substrate 110 and the sidewall of the substrate 110. In other words, the entire interlayer insulating layer 160' is recessed from the sidewall of the substrate 110 by a distance greater than 0, thus moving the interlayer insulating layer 160' away from the sidewall formed by cutting the substrate 110.

[0069] Because there is a gap between the interlayer insulating layer 160' and the substrate 110, the interlayer insulating layer 160' can be avoided during the cutting and manufacturing process of the substrate 110, thereby preventing cracks or damage to the interlayer insulating layer 160'. Therefore, the interlayer insulating layer 160', which maintains the structural integrity, can protect the metal layers 152 to 158 in the contact stack 100' and prevent cracks extending to the metal layers 152 to 158 from damaging the contact stack 100'. In addition, the interlayer insulating layer 160', which is free from cracks, can maintain the integrity of the peripheral circuit area 10b of the display panel 20, allowing multiple display panels 20 to be directly spliced ​​together in the peripheral circuit area 10b to achieve a frameless splicing panel display device. This splicing method can maximize the display area of ​​the display device and reduce material waste and manufacturing costs. In other examples, the interlayer insulating layer 160' maintains the integrity of the peripheral circuit region 10b, allowing the contact stack 100' to be electrically connected to the drive circuit on the other side of the substrate 110 via the edge of the peripheral circuit region 10b.

[0070] In some embodiments, the first distance D1 by which the sidewall of the first interlayer insulating layer 162 is recessed from the sidewall of the substrate 110 can be greater than 0.1 micrometers, thereby ensuring the structural integrity of the interlayer insulating layer 160'. For example, the first distance D1 can be between 0.1 micrometers and 100 micrometers. If the first distance D1 is less than 0.1 micrometers, the sidewall of the first interlayer insulating layer 162 may be too close to the sidewall of the substrate 110, causing the first interlayer insulating layer 162 to crack due to external force during the cutting and fabrication process of the substrate 110. If the first distance D1 is greater than 100 micrometers, the distance between the sidewall of the first interlayer insulating layer 162 and the sidewall of the substrate 110 may be too far, causing the display panel 20 to form too many non-functional edge areas, thereby affecting the splicing between multiple display panels 20 or unnecessarily increasing costs.

[0071] In some embodiments, the sidewalls of the second interlayer insulating layer 164 and the third interlayer insulating layer 166 above the first interlayer insulating layer 162 can be further recessed from the sidewall of the first interlayer insulating layer 162, thereby ensuring the structural integrity of the interlayer insulating layer 160'. For example, as Figure 2BAs shown, the sidewall of the second interlayer insulating layer 164 can be recessed from the sidewall of the underlying first interlayer insulating layer 162 by a second distance D2 greater than 0. The sidewall of the third interlayer insulating layer 166 can be recessed from the sidewall of the underlying second interlayer insulating layer 164 by a third distance D3 greater than 0. In this document, the second distance D2 is defined as the distance between the orthographic projections of the sidewall of the second interlayer insulating layer 164 and the sidewall of the first interlayer insulating layer 162 onto the substrate 110, and the third distance D3 is defined as the distance between the orthographic projections of the sidewall of the third interlayer insulating layer 166 and the sidewall of the second interlayer insulating layer 164 onto the substrate 110.

[0072] In other words, the sidewalls of the first interlayer insulating layer 162, the second interlayer insulating layer 164, and the third interlayer insulating layer 166, which are close to the sidewalls of the substrate 110, can gradually move away from the edge of the substrate 110, thereby forming an interlayer insulating layer 160' with a stepped structure. Since the second interlayer insulating layer 164 and the third interlayer insulating layer 166 are farther away from the sidewalls of the substrate 110 than the first interlayer insulating layer 162, the overall sidewalls of the interlayer insulating layer 160' have a spacing of not less than a first distance D1 between them and the sidewalls of the substrate 110. In some examples, the second distance D2 and the third distance D3 can be between 0.1 micrometers and 1 micrometer. In some embodiments where the interlayer insulating layer 160' has a stepped structure, the top of the sidewall of the second interlayer insulating layer 164 or the third interlayer insulating layer 166 may be further away from the sidewall of the substrate 110 than the bottom of the sidewall, thereby forming a sidewall of the second interlayer insulating layer 164 or the third interlayer insulating layer 166 that is inclined toward the metal layer (e.g., metal layer 158) in the multilayer structure.

[0073] In some embodiments, the topmost metal layer 158 is located above the interlayer insulating layer 160', and the sidewall of the topmost metal layer 158 may be the metal layer sidewall closest to the edge of the substrate 110 in the contact stack 100'. The sidewall of the metal layer 158 closest to the edge of the substrate 110 may have an appropriate fourth distance D4 between it and the sidewall of the substrate 110, thereby ensuring the structural integrity of the metal layers in the contact stack 100'. For example, the fourth distance D4 may be between 20 micrometers and 200 micrometers. If the fourth distance D4 is less than 20 micrometers, the sidewall of the metal layer 158 may be too close to the sidewall of the substrate 110, making the interlayer insulating layer 160' between the sidewall of the metal layer 158 and the sidewall of the substrate 110 insufficient to protect the metal layer 158 during the substrate 110 cutting and fabrication process. If the fourth distance D4 is greater than 200 micrometers, the distance between the sidewall of the metal layer 158 and the sidewall of the substrate 110 may be too far, causing the display panel 20 to form too many non-functional edge areas, thereby affecting the splicing between multiple display panels 20 or unnecessarily increasing costs.

[0074] In some embodiments, the plurality of sublayers in the interlayer insulating layer 160' and the plurality of metal layers in the contact stack 100' can form an interleaved multilayer structure, such that the interlayer insulating layer 160' and the metal layers form a robust structure that protects each other. For example, such as Figure 2B As shown, the top portion 162a of the first interlayer insulating layer 162 covers the edge of the top surface of the metal layer 152, and the side portion 162b of the first interlayer insulating layer 162 covers the sidewall of the metal layer 152. A metal layer 154 on the first interlayer insulating layer 162 continuously covers the top portion 162a and the side portion 162b of the first interlayer insulating layer 162, thereby forming a metal layer 154 with a bent shape. Similarly, the top portion 164a and the side portion 164b of the second interlayer insulating layer 164 respectively cover the edge of the top surface of the metal layer 154 and the sidewall, and a metal layer 156 on the second interlayer insulating layer 164 continuously covers the top portion 164a and the side portion 164b. The top portion 166a and the side portion 166b of the third interlayer insulating layer 166 respectively cover the top surface edge and sidewall of the metal layer 156, and the metal layer 158 on the third interlayer insulating layer 166 continuously covers the top portion 166a and the side portion 166b. In some examples where the interlayer insulating layer 160' and the metal layer are arranged alternately, the metal layers 152 to 158 may have inclined sidewalls, such that the side portions 162b to 166b of the first interlayer insulating layer 162 to the third interlayer insulating layer 166 also have conformal inclined sidewalls.

[0075] In some embodiments, the first interlayer insulating layer 162 may include an opening exposing the top surface of the metal layer 152, such that the first interlayer insulating layer 162 covers the edge of the top surface of the metal layer 152 and exposes the center of the top surface of the metal layer 152. For example... Figure 2B As shown, a metal layer 154 above metal layer 152 can extend through an opening in the first interlayer insulating layer 162 to contact the top surface of metal layer 152, thereby forming a conductive path between metal layers 152 and 154. Similarly, the second interlayer insulating layer 164 may include an opening exposing the top surface of metal layer 154, and a metal layer 156 above metal layer 154 extends through the opening in the second interlayer insulating layer 164 to contact the top surface of metal layer 154. The third interlayer insulating layer 166 may include an opening exposing the top surface of metal layer 156, and a metal layer 158 above metal layer 156 extends through the opening in the third interlayer insulating layer 166 to contact the top surface of metal layer 156. Therefore, the multiple metal layers of the contact stack 100' can form conductive paths through vertical vias in the contact stack 100', reducing the patterning difficulty of the contact stack 100'.

[0076] In some embodiments, the dielectric layer 140 may include an opening exposing the top surface of the metal layer 150, such that the dielectric layer 140 covers the edge of the top surface of the metal layer 150 and exposes the center of the top surface of the dielectric layer 140. For example... Figure 2B As shown, the metal layer 152 above the metal layer 150 can extend through the opening of the dielectric layer 140 to contact the top surface of the metal layer 150, thereby forming a conductive path between the metal layers 150 and 152. Therefore, the metal bottom layer (i.e., metal layer 150) of the contact stack 100' and the multiple metal layers above it can form a conductive path through vertical vias in the contact stack 100'. In some examples, because the metal layer 150 is farther from the sidewalls of the substrate 110 than the other metal layers, the sidewalls of the dielectric layer 140 can be flush with the sidewalls of the substrate 110 without affecting the multiple metal layers in the contact stack 100'.

[0077] In some embodiments, the first interlayer insulating layer 162, the second interlayer insulating layer 164, and the third interlayer insulating layer 166 may comprise the same material, such that there is no obvious interface within the interlayer insulating layer 160'. For example, the first interlayer insulating layer 162, the second interlayer insulating layer 164, and the third interlayer insulating layer 166 may comprise silicon nitride, silicon oxide, silicon oxynitride, or the like. In some embodiments, the dielectric layer 140 and the interlayer insulating layer 160' may comprise different materials to form an interface between the dielectric layer 140 and the interlayer insulating layer 160', but the invention is not limited thereto. For example, the interlayer insulating layer 160' may comprise silicon nitride, and the dielectric layer 140 may comprise silicon oxide.

[0078] In some embodiments, such as Figure 2B As shown, the sidewalls of the transparent conductive layer 170 above the metal layer 158 can be recessed from the sidewalls of the substrate 110 by a certain distance, so that the sidewalls of the transparent conductive layer 170 and the sidewalls of the substrate 110 are located on different planes. In some other embodiments, the sidewalls of the transparent conductive layer 170 can be flush with the sidewalls of the substrate 110. Figure 3 A cross-sectional view of a display panel 30 is shown according to an embodiment of the present invention. Figure 3 As shown, the display panel 30 is similar to Figure 2A The display panel 20 is in the display panel 30, but the transparent conductive layer 170 on the contact stack 100' of the display panel 30 extends to the plane where the sidewall of the substrate 110 is located, so that the sidewall of the transparent conductive layer 170 is coplanar with the sidewall of the substrate 110.

[0079] According to some embodiments of the present invention, Figures 4A to 4H Cross-sectional views of the display panel at various stages of the manufacturing process are shown. Figures 4A to 4H Reference Figure 2AThe display panel 20 of the present invention is illustrated and described herein; however, those skilled in the art should understand that the manufacturing process of the display panel of the present invention is not limited to manufacturing the display panel 20. Figures 4A to 4H Additional steps may be added before, during, and / or after the manufacturing process illustrated, and Figures 4A to 4H The steps shown may be deleted or replaced by other steps.

[0080] refer to Figure 4A A bottom metal layer 150 is formed above the substrate 110. Specifically, a blanket metal material layer is formed above the substrate 110, and the metal material layer is patterned to form the metal layer 150. The sidewalls of the patterned metal layer 150 are not only away from the sidewalls of the substrate 110, but also away from the predetermined cut lines 300 of the substrate 110. After forming the metal layer 150, a dielectric material layer can be formed on the metal layer 150, and the dielectric material layer is patterned to form a dielectric layer 140. Figure 4A As shown, the dielectric layer 140 includes an opening 140p, which exposes the top surface of the metal layer 150. In some embodiments, a buffer layer 120 and an insulating layer 130 may be formed on the substrate 110 before the metal layer 150 is formed, so that components above the substrate 110 can adhere better to the substrate 110 or be freed from the influence of components on the back side of the substrate 110.

[0081] refer to Figure 4B A metal layer 152 is formed over the substrate 110, such that the metal layer 152 is located on and electrically connected to the metal layer 150. Specifically, a blanket-coated metal material layer is formed on the metal layer 150 and the dielectric layer 140, wherein the metal material layer fills the opening 140p of the dielectric layer 140 and contacts the top surface of the metal layer 150. Next, the metal material layer is patterned to form the metal layer 152, wherein the sidewalls of the patterned metal layer 152 are not only away from the sidewalls of the substrate 110, but also away from the predetermined cut 300 of the substrate 110. In some embodiments, the patterned metal layer 152 may have inclined sidewalls, such that the top of the sidewall of the metal layer 152 is further away from the predetermined cut 300 of the substrate 110 than the bottom of the sidewall.

[0082] refer to Figure 4CA first interlayer insulating layer 162 is formed over the metal layer 152, wherein the first interlayer insulating layer 162 includes a top portion covering the edge of the top surface of the metal layer 152 and a side portion covering the sidewalls of the metal layer 152. Specifically, a blanket insulating layer is formed on the metal layer 152 such that the insulating layer conformally covers the top surface and sidewalls of the metal layer 152, and the sidewalls of the insulating layer are flush with the sidewalls of the substrate 110. Next, the insulating layer is patterned to form a first interlayer insulating layer 162 including an opening 162p, such that the top surface of the metal layer 152 is exposed through the opening 162p.

[0083] The sidewalls of the patterned first interlayer insulating layer 162 are recessed inward from the sidewalls of the substrate 110 by a certain distance, resulting in the sidewalls of the first interlayer insulating layer 162 and the sidewalls of the substrate 110 being non-coplanar. Specifically, the sidewalls of the first interlayer insulating layer 162 relative to the edge of the substrate 110 are recessed inward by a fifth distance D5 greater than 0 from the sidewalls of the substrate 110, such that the sidewalls of the first interlayer insulating layer 162 are away from the sidewalls of the substrate 110. More specifically, a predetermined cleavage 300 of the substrate 110 is located between the sidewalls of the first interlayer insulating layer 162 and the sidewalls of the substrate 110, such that there is a first distance D1 between the sidewalls of the first interlayer insulating layer 162 and the predetermined cleavage 300. In some embodiments, the first distance D1 may be between 0.1 micrometers and 1 micrometer. It is worth noting that the first interlayer insulation layer 162 covers the sidewall of the metal layer 152, so the sidewall of the first interlayer insulation layer 162 is located between the sidewall of the metal layer 152 and the predetermined cutting channel 300.

[0084] refer to Figure 4D A metal layer 154 is formed over the first interlayer insulating layer 162 and the metal layer 152, such that the metal layer 154 is located on and electrically connected to the metal layer 152. Specifically, a blanket-coated metal material layer is formed on the metal layer 152 and the first interlayer insulating layer 162, wherein the metal material layer fills the opening 162p of the first interlayer insulating layer 162 and contacts the top surface of the metal layer 152. Next, the metal material layer is patterned to form the metal layer 154, wherein the sidewalls of the patterned metal layer 154 are not only away from the sidewalls of the substrate 110, but also away from the predetermined dicing 300 of the substrate 110. Figure 4D As shown, the patterned metal layer 154 can cover the top and side portions of the first interlayer insulating layer 162, giving the metal layer 154 a bent shape. In other words, the width of the top surface of the metal layer 154 can be greater than the width of the top surface of the metal layer 152, but the sidewalls of the first interlayer insulating layer 162 are still located between the sidewalls of the metal layer 154 and the predetermined cut 300 of the substrate 110.

[0085] refer to Figure 4EA second interlayer insulating layer 164 is formed above the metal layer 154, wherein the second interlayer insulating layer 164 includes a top portion covering the edge of the top surface of the metal layer 154 and a side portion covering the sidewalls of the metal layer 154. Specifically, a blanket insulating layer is formed on the metal layer 154 such that the insulating layer conformally covers the top surface and sidewalls of the metal layer 154, and the sidewalls of the insulating layer are flush with the sidewalls of the substrate 110. Next, the insulating layer is patterned to form a second interlayer insulating layer 164 including an opening 164p, such that the top surface of the metal layer 154 is exposed through the opening 164p. The sidewalls of the patterned second interlayer insulating layer 164 are recessed from the sidewalls of the substrate 110 by a certain distance, causing the sidewalls of the second interlayer insulating layer 164 to be away from the predetermined cut 300 of the substrate 110. More specifically, the sidewall of the second interlayer insulation layer 164 can be recessed from the sidewall of the first interlayer insulation layer 162 by a distance greater than 0, such that the sidewall of the first interlayer insulation layer 162 is located between the sidewall of the second interlayer insulation layer 164 and the predetermined cutting channel 300.

[0086] refer to Figure 4F ,repeat Figures 4D to 4E The steps shown continue until a multilayer structure with a sufficient number of metal layers and interlayer insulating layers is formed, with the metal layers located on top of the multilayer structure. For example, such as... Figure 4F As shown, a metal layer 156 is formed over the second interlayer insulating layer 164 and the metal layer 154, such that the metal layer 156 is located on the metal layer 154 and electrically connected to the metal layer 154 through an opening 164p in the second interlayer insulating layer 164. Next, a third interlayer insulating layer 166 is formed over the metal layer 156, wherein the third interlayer insulating layer 166 includes a top portion covering the edge of the top surface of the metal layer 156 and a side portion covering the sidewall of the metal layer 156. Next, a metal layer 158 is formed over the third interlayer insulating layer 166 and the metal layer 156, such that the metal layer 158 is located on the metal layer 156 and electrically connected to the metal layer 156 through an opening in the third interlayer insulating layer 166. The first interlayer insulating layer 162, the second interlayer insulating layer 164, and the third interlayer insulating layer 166 collectively form an interlayer insulating layer 160'. Metal layers 150, 152, 154, 156, 158 and interlayer insulating layers 160' arranged alternately with the multiple metal layers collectively form a contact stack 100'.

[0087] The width of the top surface of metal layer 156 can be greater than the width of the top surface of metal layer 154, and the width of the top surface of metal layer 158 can be greater than the width of the top surface of metal layer 156. However, the sidewall of the first interlayer insulating layer 162 is still located between the sidewall of metal layer 158 and the predetermined cleavage 300 of substrate 110, such that the sidewall of metal layer 158 is away from the predetermined cleavage 300. For example, there may be a fourth distance D4 between the sidewall of metal layer 158 and the predetermined cleavage 300, where the fourth distance D4 is between 20 micrometers and 200 micrometers. The sidewall of the third interlayer insulating layer 166 can be recessed from the sidewall of the second interlayer insulating layer 164 by a distance greater than 0, such that the sidewall of the second interlayer insulating layer 164 is located between the sidewall of the third interlayer insulating layer 166 and the predetermined cleavage 300.

[0088] refer to Figure 4G A transparent conductive layer 170 is formed over the metal layer 158, such that the transparent conductive layer 170 covers the metal layer 158 and the interlayer insulating layer 160'. The transparent conductive layer 170 may include a suitable material composition such that the transparent conductive layer 170 conformally covers the interlayer insulating layer 160' and the metal layer 158 above the interlayer insulating layer 160', thereby forming a more robust contact stack 100'. For example, the transparent conductive layer 170 may include indium tin oxide (ITO). In some embodiments, the transparent conductive layer 170 may be patterned such that the sidewalls of the transparent conductive layer 170 are spaced from a predetermined cleavage 300 of the substrate 110, and the predetermined cleavage 300 is located between the sidewalls of the transparent conductive layer 170 and the sidewalls of the substrate 110. In some other embodiments, the sidewalls of the transparent conductive layer 170 may be coplanar with the predetermined cleavage 300 of the substrate 110.

[0089] refer to Figure 4H The substrate 110 is cut along a predetermined cutting path 300 to form the display panel 20. In the substrate 110 cutting process, the substrate 110, buffer layer 120, insulating layer 130, and dielectric layer 140 undergo a cutting process together, such that the substrate 110, buffer layer 120, insulating layer 130, and dielectric layer 140 have coplanar sidewalls. Figure 4H As shown, since the sidewalls of the interlayer insulating layer 160' are far from the predetermined cutting path 300, the interlayer insulating layer 160' can be spared from cutting during the cutting process, thereby avoiding cracks or damage in the interlayer insulating layer 160'. Therefore, the interlayer insulating layer 160' can maintain the integrity of the contact stack 100' after cutting the substrate 110, thereby reducing damage to the peripheral circuit area of ​​the display panel 20 and improving the yield of the display panel 20.

[0090] According to the above embodiments of the present invention, the display panel manufactured by the manufacturing method of the present invention includes a pixel pad layer located in the pixel area of ​​the substrate and a contact stack in the peripheral circuit area of ​​the substrate, wherein the contact stack includes a multilayer structure formed by multiple metal layers and an interlayer insulating layer. The interlayer insulating layer is located between a first metal layer and a second metal layer among the multiple metal layers, wherein the interlayer insulating layer includes a top portion covering the edge of the top surface of the first metal layer, and the second metal layer is electrically connected to the top surface of the first metal layer exposed by the interlayer insulating layer. Since the sidewalls of the interlayer insulating layer are recessed from the sidewalls of the substrate by a distance greater than 0, the interlayer insulating layer will not be cut along with the substrate during the substrate cutting process, thereby avoiding the generation of cracks or damage caused by cutting in the interlayer insulating layer. Therefore, the interlayer insulating layer away from the sidewalls of the substrate can improve the structural integrity of the contact stack, thereby maintaining the functionality of the peripheral circuit area of ​​the display panel and realizing a display panel that can be spliced ​​without borders.

[0091] The foregoing outlines features of some embodiments to enable those skilled in the art to better understand the ideas of the invention. Those skilled in the art should understand that they can readily use the invention as a basis for designing or modifying other manufacturing processes and structures to achieve the same purpose and / or achieve the same advantages as the embodiments described herein. Those skilled in the art should also understand that such equivalent constructions do not depart from the spirit and scope of the invention, and that various changes, substitutions, and modifications can be made without departing from the spirit and scope of the invention.

Claims

1. A display panel, comprising: substrate; A pixel pad layer is located above the substrate; and A contact stack is located above the substrate and electrically connected to the pixel pad layer, wherein the contact stack includes: First metal layer; A second metal layer is located above the first metal layer; and The first interlayer insulating layer is located between the first metal layer and the second metal layer. The first interlayer insulation layer includes a first top portion that covers the edge of the top surface of the first metal layer. The second metal layer is electrically connected to the top surface of the first metal layer exposed by the first interlayer insulating layer, and The sidewall of the first interlayer insulating layer is recessed from the sidewall of the substrate by a first distance greater than 0. The contact stack further includes: A third metal layer is located between the first interlayer insulating layer and the second metal layer; and A second interlayer insulating layer is located between the third metal layer and the second metal layer, wherein the second interlayer insulating layer includes a second top portion covering an edge of a top surface of the third metal layer. The sidewall of the second interlayer insulation layer is recessed from the sidewall of the first interlayer insulation layer by a third distance greater than 0.

2. The display panel of claim 1, wherein the first distance by which the sidewall of the first interlayer insulating layer is recessed from the sidewall of the substrate is between 0.1 micrometers and 1 micrometer.

3. The display panel of claim 1, wherein the second distance between the sidewall of the second metal layer and the sidewall of the substrate is between 20 micrometers and 200 micrometers.

4. The display panel of claim 1, wherein the first interlayer insulating layer includes a side portion covering the sidewall of the first metal layer, and the second metal layer covers the side portion of the first interlayer insulating layer.

5. The display panel of claim 1, wherein the top surface of the first metal layer and the bottom surface of the second metal layer sandwich the first top portion of the first interlayer insulating layer.

6. The display panel of claim 1, wherein the first interlayer insulating layer includes a first opening exposing the top surface of the first metal layer, and the second metal layer extends through the first opening to contact the top surface of the first metal layer.

7. The display panel of claim 1, wherein the third distance by which the sidewall of the second interlayer insulating layer is recessed from the sidewall of the first interlayer insulating layer is between 0.1 micrometers and 1 micrometer.

8. The display panel of claim 1, wherein the first interlayer insulating layer includes a first side portion covering the sidewall of the first metal layer, the third metal layer covers the first side portion of the first interlayer insulating layer, the second interlayer insulating layer includes a second side portion covering the sidewall of the third metal layer, and the second metal layer covers the second side portion of the second interlayer insulating layer.

9. The display panel of claim 1, wherein the contact stack further comprises: The metal substrate is located below the first metal layer; and A dielectric layer is located between the metal substrate and the first metal layer, wherein the dielectric layer includes a second opening that exposes a top surface of the metal substrate, and the first metal layer extends through the second opening to contact the metal substrate.

10. The display panel of claim 9, wherein the sidewall of the dielectric layer is flush with the sidewall of the substrate.

11. The display panel of claim 1, wherein the contact stack is located in the peripheral circuit area of ​​the display panel.

12. The display panel of claim 1, further comprising a transparent conductive layer continuously covering the pixel pad layer and the contact stack.

13. The display panel of claim 12, wherein the sidewall of the transparent conductive layer and the sidewall of the substrate are located on different planes.

14. A method for manufacturing a display panel, comprising: A first metal layer is formed on top of the substrate; A first interlayer insulating layer is formed above the first metal layer, wherein the first interlayer insulating layer includes a top portion covering the edge of the top surface of the first metal layer and a side portion covering the sidewall of the first metal layer, and the sidewall of the first interlayer insulating layer is recessed from the sidewall of the substrate by a first distance greater than 0. and A second metal layer is formed above the first interlayer insulating layer and the first metal layer, wherein the second metal layer passes through the first interlayer insulating layer and is electrically connected to the first metal layer to form a contact stack. The formation of this contact stack further includes: A third metal layer is formed between the first interlayer insulating layer and the second metal layer; and A second interlayer insulating layer is formed between the third metal layer and the second metal layer, wherein the second interlayer insulating layer includes a second top portion covering an edge of a top surface of the third metal layer. The sidewall of the second interlayer insulation layer is recessed from the sidewall of the first interlayer insulation layer by a third distance greater than 0.

15. The method of claim 14, wherein the third distance by which the sidewall of the second interlayer insulation layer is recessed from the sidewall of the first interlayer insulation layer is between 0.1 micrometers and 1 micrometer.

16. The method of claim 14, wherein the first interlayer insulation layer includes a first side portion covering the sidewall of the first metal layer, the third metal layer covers the first side portion of the first interlayer insulation layer, the second interlayer insulation layer includes a second side portion covering the sidewall of the third metal layer, and the second metal layer covers the second side portion of the second interlayer insulation layer.

17. The method of claim 14, wherein after forming the contact stack, it further comprises: The substrate is cut along a predetermined slit, wherein the sidewall of the first interlayer insulating layer is located between the sidewall of the first metal layer and the predetermined slit.

18. The method of claim 17, wherein the second distance between the sidewall of the first interlayer insulation layer and the predetermined cut is between 0.1 micrometers and 1 micrometer.

19. The method of claim 17, wherein the third distance between the sidewall of the second metal layer and the predetermined cut is between 20 micrometers and 200 micrometers.

20. The method of claim 14, wherein forming the first interlayer insulating layer comprises: A first insulating layer is formed above the first metal layer, conformally covering the first metal layer, wherein the sidewall of the first insulating layer is flush with the sidewall of the substrate; and The first insulating layer is patterned to form the first interlayer insulating layer, wherein the first interlayer insulating layer includes a first opening that exposes the top surface of the first metal layer, and the sidewall of the patterned first interlayer insulating layer is recessed by a first distance from the sidewall of the substrate.

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