Signal amplitude control system and angle encoder

Abstract

The present invention provides a signal amplitude control system and an angle encoder. The system includes: a signal amplitude control system including a signal amplitude control circuit and a controller electrically connected to the signal amplitude control circuit; the signal amplitude control circuit is used to obtain a target voltage at the current moment based on an input sine and cosine signal at the current moment; and the controller is used to obtain the amplitude of the sine and cosine signal at the current moment based on the target voltage at the current moment and the conversion relationship between the target voltage at the current moment and the amplitude of the sine and cosine signal at the current moment, and to regulate the amplitude of the sine and cosine signal at the next moment. The signal amplitude control system and angle encoder provided by the present invention can obtain the amplitude of the sine and cosine signal in real time without relying on a DSP digital circuit, thereby regulating the amplitude of the sine and cosine signal in a simpler, more efficient, more accurate, and lower power consumption manner, and has greater universality.

Description

Technical Field

[0001] The present invention relates to the technical field of control circuits, and in particular to a signal amplitude control system and an angle encoder. Background Art

[0002] Angle encoders can measure the position of an object, such as its motion angle. Their basic principle is to use a sensor to generate sine and cosine signals, which are then amplified by an amplifier. The amplified sine and cosine signals are sampled through analog-to-digital conversion, and then the angle is calculated using a digital signal processing (DSP) circuit.

[0003] In the actual application of angle encoders, the amplitude of the sine and cosine signals generated by the sensor is affected by many factors, such as the installation position of the sensor, changes in ambient temperature, etc., which can affect the amplitude of the sine and cosine signals generated by the sensor.

[0004] In the prior art, the amplitude of the sine and cosine signals generated by the sensor can be controlled by adjusting the amplifier gain. However, this adjustment relies on calculations in the DSP digital circuit. This means that it is difficult to control the amplitude of the sine and cosine signals without relying on the DSP digital circuit. This limitation is significant. Summary of the Invention

[0005] The present invention provides a signal amplitude control system and an angle encoder, which are used to solve the defects in the prior art that it is difficult to control the amplitude of sine and cosine signals without relying on DSP digital circuits, and the amplitude control of sine and cosine signals is very limited. The present invention realizes the amplitude control of sine and cosine signals without relying on DSP digital circuits, and reduces the limitations of controlling the amplitude of sine and cosine signals.

[0006] The present invention provides a signal amplitude control system, comprising:

[0007] The signal amplitude control circuit is used to obtain a target voltage at a current moment based on the input sine and cosine signals at a current moment, wherein the target voltage at a current moment has a conversion relationship with the amplitude of the sine and cosine signals at a current moment;

[0008] The controller is electrically connected to the signal amplitude control circuit, and is used to obtain the amplitude of the sine and cosine signals at the current moment based on the target voltage at the current moment and the conversion relationship, and then adjust the amplitude of the sine and cosine signals at the next moment based on the amplitude of the sine and cosine signals at the current moment and the preset amplitude range.

[0009] According to a signal amplitude control system provided by the present invention, the signal amplitude control circuit includes: a sine and cosine sampling module, a sine and cosine square current generating module, a DC bias current generating module and a DC bias current removing module;

[0010] The input end of the sine-cosine sampling module is the input end of the signal amplitude control circuit; the output end of the sine-cosine sampling module is connected to the input end of the sine-cosine square current generating module; the output end of the sine-cosine square current generating module and the output end of the DC bias current generating module are connected to the input end of the DC bias current removal module; the output end of the DC bias current removal module is the output end of the signal amplitude control circuit;

[0011] The sine-cosine sampling module is used to convert the input sine-cosine signal at the current moment into a first current signal at the current moment and a second current signal at the current moment, and then input the first current signal at the current moment and the second current signal at the current moment into the sine-cosine square current generating module;

[0012] The sine-cosine square current generating module is used to convert the input first current signal and the input second current signal at the current moment into the sine-cosine square current at the current moment through a square operation, and input the sine-cosine square current at the current moment into the DC offset removing module;

[0013] The DC bias current generating module is used to generate a target bias current and input the target bias current into the DC bias current removing module;

[0014] The DC bias current removal module is configured to obtain the target voltage at the current moment based on the inputted sine and cosine square currents at the current moment and the target bias current.

[0015] According to a signal amplitude control system provided by the present invention, the sine-cosine sampling module includes: a first sine-cosine sampling submodule and a first switching circuit; the first switching circuit is configured to, when the current moment is not within a first target time period, select an input end of the sine-cosine sampling module and a first input end of the first sine-cosine sampling submodule, and select an input end of the sine-cosine sampling module and a second input end of the first sine-cosine sampling submodule;

[0016] The first sine-cosine sampling submodule includes a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a resistor R1, a resistor R2, an operational amplifier OP1, an operational amplifier OP2, an N-type MOS transistor MN1, an N-type MOS transistor MN2, a P-type MOS transistor MP1, and a P-type MOS transistor MP1;

[0017] The first input terminal of the first sine-cosine sampling submodule is connected to the output terminal of the operational amplifier OP1 through the resistor R1;

[0018] The positive input terminal of the operational amplifier OP1 is connected to a DC bias voltage, and the negative input terminal of the operational amplifier OP1 is connected to the output terminal of the operational amplifier OP1;

[0019] The positive power supply terminal of the operational amplifier OP1 is connected to the gate and drain of the P-type MOS transistor MP1, and the negative power supply terminal of the operational amplifier OP1 is connected to the gate and drain of the N-type MOS transistor MN1;

[0020] The gate and source of the P-type MOS transistor MP1 are connected via a capacitor C1;

[0021] The gate and source of the N-type MOS transistor MN1 are connected via a capacitor C2;

[0022] The source of the N-type MOS transistor MN1 is grounded;

[0023] The second input terminal of the first sine-cosine sampling submodule is connected to the output terminal of the operational amplifier OP2 through the resistor R2;

[0024] The positive input terminal of the operational amplifier OP2 is connected to a DC bias voltage, and the negative input terminal of the operational amplifier OP2 is connected to the output terminal of the operational amplifier OP2;

[0025] The positive power supply terminal of the operational amplifier OP2 is connected to the gate and drain of the P-type MOS transistor MP2, and the negative power supply terminal of the operational amplifier OP2 is connected to the gate and drain of the N-type MOS transistor MN2;

[0026] The gate and source of the P-type MOS transistor MP2 are connected via a capacitor C3;

[0027] The gate and source of the N-type MOS transistor MN2 are connected via a capacitor C4;

[0028] The source of the N-type MOS transistor MN2 is grounded;

[0029] The output end of the operational amplifier OP1 and the output end of the operational amplifier OP2 are output ends of the sine-cosine sampling module.

[0030] According to a signal amplitude control system provided by the present invention, the sine-cosine square current generating module includes: a sine-cosine square current generating submodule and a second switching circuit;

[0031] When the current moment is within the second target time period, the second switching circuit is used to enable the input end of the sine-cosine square current generating submodule and the output end of the sine-cosine sampling module, and enable the output end of the sine-cosine square current generating submodule and the input end of the DC bias current removal module;

[0032] The sine-cosine square current generating submodule includes a capacitor C5, a capacitor C6, a P-type MOS transistor MP3, a P-type MOS transistor MP4, a P-type MOS transistor MP5, a P-type MOS transistor MP6, an N-type MOS transistor MN3, an N-type MOS transistor MN4, an N-type MOS transistor MN5, an N-type MOS transistor MN6 and a diode VD1;

[0033] One end of the capacitor C5 is connected to a standard voltage, and the other end of the capacitor C5, the gate of the N-type MOS transistor MN3, the cathode of the diode VD1, the drain of the P-type MOS transistor MP6 and the output end of the sine-cosine square current generating submodule are connected;

[0034] The drain of the N-type MOS transistor MN3, the drain of the P-type MOS transistor MP3, and the gate of the P-type MOS transistor MP4 are connected;

[0035] The source of the P-type MOS transistor MP3 is connected to the source of the P-type MOS transistor MP4;

[0036] The drain of the P-type MOS transistor MP4, the drain of the N-type MOS transistor MN4, the gate of the P-type MOS transistor MP6 and the cathode of the diode VD1 are connected;

[0037] The drain of the N-type MOS transistor MN5, the gate of the N-type MOS transistor MN5, and the gate of the N-type MOS transistor MN6 are connected;

[0038] The source of the N-type MOS transistor MN5 is grounded;

[0039] The source of the P-type MOS transistor MP6, the drain of the P-type MOS transistor MP5, the gate of the P-type MOS transistor MP5 and one end of the capacitor C6 are connected;

[0040] The source of the P-type MOS transistor MP5, the other end of the capacitor C6 and the input end of the sine-cosine square current generating submodule are connected.

[0041] According to a signal amplitude control system provided by the present invention, the sine-cosine sampling module further includes: a second sine-cosine sampling submodule for initializing a DC bias voltage;

[0042] When the current moment is within the first target time period, the first switch circuit is used to select the input end of the sin-cosine sampling module and the first input end of the second sin-cosine sampling submodule, and select the input end of the sin-cosine sampling module and the second input end of the second sin-cosine sampling submodule;

[0043] The second sine-cosine sampling submodule includes a resistor R3, a resistor R4, a resistor R5, a resistor R6, a capacitor C7, a capacitor C8, a capacitor C9, a capacitor C10, a P-type MOS transistor MP7, a P-type MOS transistor MP8, an N-type MOS transistor MN7, an N-type MOS transistor MN8, an operational amplifier OP3, and an operational amplifier OP4;

[0044] The first input terminal of the first sine-cosine sampling submodule is connected to the positive input terminal of the operational amplifier OP3 through the resistor R3, the positive input terminal of the operational amplifier OP3 is connected to a DC bias voltage, and the negative input terminal of the operational amplifier OP3 is connected to the output terminal of the operational amplifier OP3;

[0045] The positive power supply terminal of the operational amplifier OP3 is connected to the gate and drain of the P-type MOS transistor MP7, and the negative power supply terminal of the operational amplifier OP3 is connected to the gate and drain of the N-type MOS transistor MN7;

[0046] The gate and source of the P-type MOS transistor MP7 are connected via a capacitor C7;

[0047] The gate and source of the N-type MOS transistor MN7 are connected via a capacitor C8;

[0048] The source of the N-type MOS transistor MN7 is grounded;

[0049] The second input terminal of the first sine-cosine sampling submodule is connected to the positive input terminal of the operational amplifier OP4 through the resistor R4, the positive input terminal of the operational amplifier OP4 is connected to the DC bias voltage, and the negative input terminal of the operational amplifier OP4 is connected to the output terminal of the operational amplifier OP4;

[0050] The positive power supply terminal of the operational amplifier OP4 is connected to the gate and drain of the P-type MOS transistor MP8, and the negative power supply terminal of the operational amplifier OP4 is connected to the gate and drain of the N-type MOS transistor MN8;

[0051] The gate and source of the P-type MOS transistor MP8 are connected via a capacitor C9;

[0052] The gate and source of the N-type MOS transistor MN8 are connected via a capacitor C10;

[0053] The source of the N-type MOS transistor MN8 is grounded;

[0054] The output end of the operational amplifier OP3, the resistor R5, the resistor R6, and the output end of the operational amplifier OP4 are connected in series.

[0055] According to a signal amplitude control system provided by the present invention, the DC bias current removal module includes: a resistor R7 and a resistor R8;

[0056] The input end of the DC bias current removal module, the output end of the DC bias current removal module, the resistor R7 and one end of the resistor R8 are sequentially connected in series; the other end of the resistor R8 is connected to the reference voltage VBG;

[0057] The target voltage at the current moment is the voltage at the output end of the DC bias current removal module.

[0058] According to a signal amplitude control system provided by the present invention, the DC bias current generating module includes: an operational amplifier OP5, a resistor R9, a capacitor C11 and an N-type MOS transistor MN9;

[0059] The positive input terminal of the operational amplifier OP5 is connected to the reference voltage VBG; the negative input terminal of the operational amplifier OP5, one end of the resistor R9, one end of the capacitor C11, and the source of the N-type MOS transistor MN9 are connected; the output terminal of the operational amplifier OP5, the other end of the capacitor C11, and the gate of the N-type MOS transistor MN9 are connected;

[0060] The other end of the resistor R9 is grounded;

[0061] The drain of the N-type MOS transistor MN9 is the output end of the DC bias current generating module.

[0062] According to a signal amplitude control system provided by the present invention, when the signal amplitude control circuit operates periodically, any working cycle includes multiple time periods; the clock control signal in the signal amplitude control circuit is determined to be a high level or a low level based on the time period in the current working cycle at the current moment.

[0063] According to a signal amplitude control system provided by the present invention, the controller includes:

[0064] a calculation module, configured to obtain the amplitude of the sine and cosine signals at the current moment based on the sine and cosine signals at the current moment and the conversion relationship;

[0065] The control module is electrically connected to the calculation module and is used to obtain the target gain at the next moment based on the amplitude of the sine and cosine signals at the current moment and the preset amplitude range, and then adjust the gain of the programmable gain amplifier based on the target gain at the next moment.

[0066] The present invention further provides a signal amplitude control method based on any of the above signal amplitude control systems, comprising:

[0067] Obtaining the target voltage at the current moment, where the target voltage at the current moment has a conversion relationship with the amplitude of the sine and cosine signals at the current moment;

[0068] Based on the target voltage at the current moment and the conversion relationship, obtaining the amplitude of the sine and cosine signals at the current moment;

[0069] Based on the amplitude of the sine and cosine signals at the current moment and the preset amplitude range, the amplitude of the sine and cosine signals at the next moment is adjusted.

[0070] The present invention also provides an amplitude control device, comprising:

[0071] A voltage acquisition module is used to acquire a target voltage at a current moment, where the target voltage at the current moment has a conversion relationship with the amplitude of the sine and cosine signals at the current moment;

[0072] an amplitude calculation module, configured to obtain the amplitude of the sine and cosine signals at the current moment based on the target voltage at the current moment and the conversion relationship;

[0073] The amplitude control module is used to adjust the amplitude of the sine and cosine signals at the next moment based on the amplitude of the sine and cosine signals at the current moment and the preset amplitude range.

[0074] The present invention also provides an angle encoder, comprising: a signal amplitude control system as described above, and a sensor;

[0075] The sensor is used to generate the sine and cosine signals at the current moment, and input the sine and cosine signals at the current moment into the signal amplitude control system;

[0076] The signal amplitude control system is used to adjust the amplitude of the sine and cosine signals generated by the sensor at the next moment based on the input sine and cosine signals at the current moment.

[0077] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements any of the above-described signal amplitude control methods when executing the program.

[0078] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which implements any of the above-mentioned signal amplitude control methods when executed by a processor.

[0079] The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the signal amplitude control method described above is implemented.

[0080] The present invention provides a signal amplitude control system and an angle encoder, and a signal amplitude control system, comprising a signal amplitude control circuit and a controller. The signal amplitude control circuit can obtain a target voltage at the current moment based on a sinusoidal and cosineal signal input at the current moment. The target voltage at the current moment has a conversion relationship with the amplitude of the sinusoidal and cosineal signal at the current moment. The controller can calculate the amplitude of the sinusoidal and cosineal signal at the current moment based on the target voltage at the current moment and the conversion relationship, and can then control the amplitude of the sinusoidal and cosineal signal at the next moment based on the amplitude of the sinusoidal and cosineal signal at the current moment. The amplitude of the sinusoidal and cosineal signal can be obtained in real time based on an analog circuit without relying on an ADC sampling digital circuit and a DSP digital circuit. Based on the amplitude of the sinusoidal and cosineal signal obtained in real time, the amplitude of the sinusoidal and cosineal signal can be regulated in a simpler, more efficient, more accurate, and lower power consumption manner. The control of the amplitude of the sinusoidal and cosineal signals is more universal and can be more widely applied to various application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0081] In order to more clearly illustrate the technical solutions in the present invention or the prior art, a brief introduction is given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0082] Figure 1 is a block diagram of the signal amplitude control system provided by the present invention;

[0083] Figure 2 It is a block diagram of a signal amplitude control circuit in a signal amplitude control system provided by the present invention;

[0084] Figure 3 This is a circuit diagram of an embodiment of the first sinusoidal sampling submodule in the signal amplitude control system provided by the present invention;

[0085] Figure 4 This is a circuit diagram of an embodiment of a sine-cosine square current generating submodule in a signal amplitude control system provided by the present invention;

[0086] Figure 5This is a circuit diagram of an embodiment of a first sine-cosine square current generating submodule in the signal amplitude control system provided by the present invention;

[0087] Figure 6 This is a circuit diagram of an embodiment of the second sinusoidal sampling submodule in the signal amplitude control system provided by the present invention;

[0088] Figure 7 This is a circuit diagram of an embodiment of a DC bias current removal module in a signal amplitude control system provided by the present invention;

[0089] Figure 8 This is a circuit diagram of an embodiment of a DC bias current generating module in a signal amplitude control system provided by the present invention;

[0090] Figure 9 A waveform diagram of a clock control signal in a signal amplitude control system provided by the present invention;

[0091] Figure 10 is a block diagram of a controller in a signal amplitude control system provided by the present invention;

[0092] Figure 11 1 is a flow chart of the signal amplitude control method provided by the present invention;

[0093] Figure 12 It is a structural schematic diagram of the signal amplitude control device provided by the present invention;

[0094] Figure 13 It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0095] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0096] In the description of the invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they may refer to fixed, detachable, or integral connections; mechanical or electrical connections; direct or indirect connections through an intermediary; and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0097] It should be noted that when adjusting the amplifier gain to control the amplitude of the sensor's sinusoidal and cosine signals, the DSP digital signal circuit performs angle calculations based on the amplified and ADC-sampled sinusoidal and cosine signals. After obtaining the angle calculation results, the amplifier gain is adjusted based on these angle calculation results, thereby controlling the amplitude of the sensor's sinusoidal and cosine signals. However, controlling the amplitude of the sinusoidal and cosine signals using this method relies on ADC sampling and calculations and the DSP digital signal circuit, resulting in significant limitations.

[0098] Amplitude control of the sinusoidal and cosine signals can also be achieved using an A / D converter and a D / A converter. Specifically, the A / D converter converts the analog sinusoidal and cosine signals into digital sinusoidal and cosine signals to be processed, performs low-pass filtering on the sinusoidal and cosine signals to obtain filtered sinusoidal and cosine signals, obtains sinusoidal and cosine frequency-multiplied signals according to a preset frequency multiplication algorithm, and finally, the D / A converter converts the digital sinusoidal and cosine signals into analog sinusoidal and cosine signals, thereby achieving amplitude control and frequency amplification of the sinusoidal and cosine signals. However, controlling the amplitude of the sinusoidal and cosine signals using the above-mentioned method requires reliance on the A / D converter and the D / A converter to achieve amplitude control of the sinusoidal and cosine signals, which has significant limitations in controlling the amplitude of the sinusoidal and cosine signals.

[0099] By suppressing the temperature signal, the impact of ambient temperature changes on the amplitude of the sine and cosine signals can be reduced. This approach specifically involves determining the angle signal corresponding to the current sine and cosine signal based on the relationship between the current sine and cosine signals and the temperature signal, adjusting the voltage value of the amplifier circuit to adjust the sensor based on the angle signal, and outputting the angle signal to the servo controller as feedback data, thereby suppressing the temperature signal. However, this approach does not address the impact of the sensor's installation position on the amplitude of the sine and cosine signals, and still requires reliance on DSP digital circuitry to achieve temperature signal suppression.

[0100] To address this issue, the present invention provides a signal amplitude control system. The signal amplitude control system provided by the present invention can obtain the amplitude of the sine and cosine signals in real time using analog circuits, without relying on ADC sampling digital circuits and DSP digital circuits. Compared to traditional circuits that require ADC sampling circuits and DSP digital signal circuits to achieve sine and cosine signal amplitude control, the signal amplitude control system provided by the present invention adjusts the sine and cosine signal amplitudes using analog circuits, reducing the complexity of devices such as angle sensors and their power consumption, while also providing excellent real-time amplitude adjustment.

[0101] Furthermore, the signal amplitude control system provided by the present invention is relatively independent and adaptable. Therefore, even in different application scenarios, such as different sensor installation locations or changes in ambient temperature, the amplitude of the sine and cosine signals can be regulated based on the signal amplitude control system provided by the present invention, better meeting the needs of the application scenario.

[0102] The signal amplitude control system provided by the present invention can also be used in angle calculation situations without the participation of digital circuits, such as the angle lookup table method, which makes the signal amplitude control system provided by the present invention applicable to many engineering applications.

[0103] Figure 1 This is a block diagram of the signal amplitude control system provided by the present invention. Figure 1 The signal amplitude control system provided by the present invention is described. Figure 1 As shown, the signal amplitude control system 101 includes:

[0104] The signal amplitude control circuit 102 is used to obtain a target voltage at the current moment based on the input sine and cosine signals at the current moment. The target voltage at the current moment has a conversion relationship with the amplitude of the sine and cosine signals at the current moment.

[0105] It should be noted that, in the embodiment of the present invention, V p Indicates the current sine and cosine signals, with V psin Indicates V p The sinusoidal signal is V pcos Indicates V p The cosine signal is expressed as V out Indicates the target voltage at the current moment; r p Indicates the target voltage amplitude at the current moment.

[0106] Specifically, the sine and cosine signal generating device generates V p After that, you can turn V p Input signal amplitude control circuit 102.

[0107] The signal amplitude control circuit 102 in the embodiment of the present invention is an analog circuit. The signal amplitude control circuit 102 can be controlled by V p Perform operational amplification, square operation, etc. to obtain V out .

[0108] Among them, V out and There is a linear relationship between V out , can be obtained by trigonometric function A=[(ASIN) 2 +(ACOS) 2 ], calculate r p .

[0109] It should be noted that the specific structure of the signal amplitude control circuit 102 is not limited in the embodiment of the present invention.

[0110] The controller 103 is electrically connected to the signal amplitude control circuit 102, and is used to obtain the amplitude of the sine and cosine signals at the current moment based on the target voltage and the conversion relationship at the current moment, and then adjust the amplitude of the sine and cosine signals at the next moment based on the amplitude of the sine and cosine signals at the current moment and the preset amplitude range.

[0111] Specifically, the signal amplitude control circuit 102 obtains V out After that, you can turn V out Sent to controller 103.

[0112] The controller 103 receives the V signal sent by the signal amplitude control circuit 102. out Afterwards, you can use V out and V out With r p The conversion relationship between them is calculated to get r p .

[0113] The controller 103 obtains r p Afterwards, we can determine r p Whether it is within the preset amplitude range.

[0114] The controller 103 determines r p If it is not within the preset amplitude range, it can be based on r p The difference between the amplitude of the sine and cosine signals and the threshold value of the preset amplitude interval is used to adjust the amplitude of the sine and cosine signals generated by the sine and cosine signal generating device at the next moment.

[0115] In the embodiment of the present invention, the controller 103 can adjust the amplitude of the next moment's sine and cosine signals generated by the sine and cosine signal generating device in a variety of ways. For example, the controller 103 can adjust the amplitude of the next moment's sine and cosine signals generated by the sine and cosine signal generating device in a variety of ways. p , the parameters of the sine and cosine signal generating device are adjusted, thereby adjusting the amplitude of the sine and cosine signals generated by the sine and cosine signal generating device at the next moment; or, the controller 103 can also r p , the gain of the programmable gain amplifier (PGA) is adjusted, thereby adjusting the amplitude of the next sine and cosine signals generated by the sine and cosine signal generating device. In the embodiment of the present invention, the specific manner in which the controller 103 adjusts the amplitude of the next sine and cosine signals generated by the sine and cosine signal generating device is not limited.

[0116] It should be noted that the preset amplitude range can be determined based on prior knowledge and / or actual conditions. In the embodiment of the present invention, the preset amplitude range is not specifically limited.

[0117] The signal amplitude control system in the embodiment of the present invention includes a signal amplitude control circuit and a controller. The signal amplitude control circuit can obtain a target voltage at the current moment based on the input sinusoidal and cosine signals at the current moment. The target voltage at the current moment has a conversion relationship with the amplitude of the sinusoidal and cosine signals at the current moment. The controller can calculate the amplitude of the sinusoidal and cosine signals at the current moment based on the target voltage at the current moment and the conversion relationship. Then, based on the amplitude of the sinusoidal and cosine signals at the current moment, the controller can control the amplitude of the sinusoidal and cosine signals at the next moment. The controller can obtain the amplitude of the sinusoidal and cosine signals in real time based on an analog circuit without relying on an ADC sampling digital circuit and a DSP digital circuit. Then, based on the amplitude of the sinusoidal and cosine signals obtained in real time, the controller can regulate the amplitude of the sinusoidal and cosine signals in a simpler, more efficient, more accurate, and lower power consumption manner. The controller has a stronger universality in regulating the amplitude of the sinusoidal and cosine signals and is more widely applicable to various application scenarios.

[0118] Figure 2 FIG. 1 is a block diagram of a signal amplitude control circuit in a signal amplitude control system provided by the present invention. Figure 2 As shown, the signal amplitude control circuit 102 includes: a sine and cosine sampling module 201, a sine and cosine square current generating module 202, a DC bias current generating module 203 and a DC bias current removing module 204;

[0119] The input end of the sine-cosine sampling module 201 is the input end of the signal amplitude control circuit 102; the output end of the sine-cosine sampling module 201 is connected to the input end of the sine-cosine square current generating module 202; the output end of the sine-cosine square current generating module 202 and the output end of the DC bias current generating module 203 are connected to the input end of the DC bias current removal module 204; the output end of the DC bias current removal module 204 is the output end of the signal amplitude control circuit 102;

[0120] The sine-cosine sampling module 201 is used to convert the input sine-cosine signal at the current moment into a first current signal at the current moment and a second current signal at the current moment, and then input the first current signal at the current moment and the second current signal at the current moment into the sine-cosine square current generating module 202;

[0121] Specifically, V p After the sine and cosine sampling module 201 is input through the input terminal of the sine and cosine sampling module 201, the sine and cosine sampling module 201 can p V in psinPerform operational amplification to generate the first current signal at the current moment; the sine and cosine sampling module 201 can also perform operational amplification to generate the first current signal at the current moment; p V in pcos Perform operational amplification to generate a second current signal at the current moment.

[0122] In the embodiment of the present invention, I1 can be used to represent the first current signal at the current moment, and I2 can be used to represent the second current signal at the current moment.

[0123] After the sine-cosine sampling module 201 generates I1 and I2 , I1 and I2 may be input to the sine-cosine square current generating module 202 through the output terminal of the sine-cosine sampling module 201 and the input terminal of the sine-cosine square current generating module 202 .

[0124] It should be noted that the sine and cosine sampling module 201 in the embodiment of the present invention is an analog circuit. The specific structure of the sine and cosine sampling module 201 in the embodiment of the present invention is not limited.

[0125] The sine-cosine square current generating module 202 is used to convert the first current signal and the second current signal input at the current moment into the sine-cosine square current at the current moment through a square operation, and then input the sine-cosine square current at the current moment into the DC offset removal module;

[0126] Specifically, after receiving I1 and I2, the sine-cosine square current generating module may generate the sine-cosine square current at the current moment by performing a square operation on I1 and I2.

[0127] In the embodiment of the present invention, I can be used to represent the sine and cosine square current at the current moment.

[0128] After the sine-cosine square circuit generating module generates I, I can be input to the DC offset removal module through the output end of the sine-cosine square circuit generating module and the input end of the DC offset removal module.

[0129] It should be noted that the sine-cosine squared circuit generation module in the embodiment of the present invention is an analog circuit, and the specific structure of the sine-cosine squared circuit generation module in the embodiment of the present invention is not limited.

[0130] The DC bias current generating module 203 is used to generate a target bias current and input the target bias current to the DC bias current removing module 204;

[0131] Specifically, the DC bias current generating module 203 may generate a target bias current based on the reference voltage VBG.

[0132] Among them, in the embodiment of the present invention, I DC Indicates the target bias current.

[0133] The DC bias current generating module 203 generates I DC Afterwards, I DC Input to the DC bias current removal module 204 .

[0134] It should be noted that the DC bias current generating module 203 in the embodiment of the present invention is an analog circuit. The specific structure of the DC bias current generating module 203 in the embodiment of the present invention is not limited.

[0135] The DC bias current removal module 204 is configured to obtain a target voltage at a current moment based on the inputted sine and cosine square currents and the target bias current at a current moment.

[0136] Specifically, the DC bias current removal module 204 receives I and I DC Afterwards, in I DC Under the action of V with a linear relationship out .

[0137] It should be noted that the DC bias current removal module 204 in the embodiment of the present invention is an analog circuit. The specific structure of the DC bias current removal module 204 in the embodiment of the present invention is not limited.

[0138] The signal amplitude control circuit in the embodiment of the present invention can convert the sine and cosine signals at the current moment into the first current signal and the second current signal at the current moment based on the sine and cosine sampling module, can convert the first current signal and the second current signal at the current moment into the sine and cosine square current at the current moment based on the sine and cosine square current generation module, can generate the target bias current based on the DC bias current generation module, can convert the sine and cosine square current and the target bias current at the current moment into the target voltage at the current moment based on the DC bias current removal module, and can obtain the target voltage at the current moment more accurately and efficiently based on the analog circuit.

[0139] Based on the contents of the above embodiments, the sine-cosine sampling module 201 includes: a first sine-cosine sampling submodule 301 and a first switching circuit 302; the first switching circuit 302 is used to select the input end of the sine-cosine sampling module 201 and the first input end of the first sine-cosine sampling submodule 301, and select the input end of the sine-cosine sampling module 201 and the second input end of the first sine-cosine sampling submodule 301 when the current time is not within the first target time period;

[0140] It should be noted that the sine-cosine sampling module 201 in the embodiment of the present invention can directly convert the input V psinand V pcos Converted into I1 and I2, it can also initialize the DC bias voltage in the initial stage of regulating the amplitude of the sine and cosine signals. After completing the initialization of the DC bias voltage, the input V psin and V pcos Convert to I1 and I2.

[0141] By setting the first target period, it is possible to determine whether the DC bias voltage needs to be initialized and to define the duration of the initial stage. The first target period in the embodiment of the present invention is not specifically limited.

[0142] Among them, the starting time of the first target time period can be the starting time of the initial stage of regulating the amplitude of the sine and cosine signals based on the signal amplitude control system 101 provided by the present invention; the ending time of the first target time period can be the moment of the first preset time length after the starting time of the first target time period.

[0143] It should be noted that the first preset duration can be determined based on prior knowledge and / or actual conditions. For example, the first preset duration can be 10ms. The specific value of the preset duration is not limited in the embodiment of the present invention.

[0144] When the current moment is not within the first target time period, it can be explained that the current moment is not in the initial stage of regulating the amplitude of the sine and cosine signals. The first switch circuit 302 can select the input end of the sine and cosine sampling module 201 and the first input end of the first sine and cosine sampling submodule 301, so that the input end of the sine and cosine sampling module 201 is connected to the first input end of the first sine and cosine sampling submodule 301; the first switch circuit 302 can also select the input end of the sine and cosine sampling module 201 and the second input end of the first sine and cosine sampling submodule 301, so that the input end of the sine and cosine sampling module 201 is connected to the second input end of the first sine and cosine sampling submodule 301.

[0145] Figure 3 This is a circuit diagram of an embodiment of the first sinusoidal sampling submodule in the signal amplitude control system provided by the present invention. Figure 3 As shown, the first sine-cosine sampling submodule 301 includes capacitors C1, C2, C3, C4, resistors R1, R2, operational amplifiers OP1, OP2, N-type MOS transistors MN1, MN2, P-type MOS transistors MP1, and P-type MOS transistors MP2;

[0146] The first input terminal of the first sine-cosine sampling submodule 301 is connected to the output terminal of the operational amplifier OP1 through the resistor R1;

[0147] The positive input terminal of the operational amplifier OP1 is connected to a DC bias voltage, and the negative input terminal of the operational amplifier OP1 is connected to the output terminal of the operational amplifier OP1;

[0148] It should be noted that the DC bias voltage in the embodiment of the present invention may be a 2.5V DC bias voltage.

[0149] The positive power supply terminal of the operational amplifier OP1 is connected to the gate and drain of the P-type MOS transistor MP1, and the negative power supply terminal of the operational amplifier OP1 is connected to the gate and drain of the N-type MOS transistor MN1;

[0150] The gate and source of the P-type MOS transistor MP1 are connected via capacitor C1;

[0151] The gate and source of the N-type MOS transistor MN1 are connected via capacitor C2;

[0152] The source of the N-type MOS tube MN1 is grounded;

[0153] The second input terminal of the first sine-cosine sampling submodule 301 is connected to the output terminal of the operational amplifier OP2 through the resistor R2;

[0154] The positive input terminal of the operational amplifier OP2 is connected to a DC bias voltage, and the negative input terminal of the operational amplifier OP2 is connected to the output terminal of the operational amplifier OP2;

[0155] It should be noted that the DC bias voltage in the embodiment of the present invention may be a 2.5V DC bias voltage.

[0156] Specifically, the negative input terminal of the operational amplifier OP2 is connected to the output terminal of the operational amplifier OP2 to form a buffer structure.

[0157] The positive power supply terminal of the operational amplifier OP2 is connected to the gate and drain of the P-type MOS transistor MP2, and the negative power supply terminal of the operational amplifier OP2 is connected to the gate and drain of the N-type MOS transistor MN2;

[0158] The gate and source of the P-type MOS transistor MP2 are connected via capacitor C3;

[0159] The gate and source of the N-type MOS transistor MN2 are connected via a capacitor C4;

[0160] The source of the N-type MOS transistor MN2 is grounded;

[0161] The output end of the operational amplifier OP1 and the output end of the operational amplifier OP2 are output ends of the sine-cosine sampling module 201 .

[0162] Specifically, at V psinThe first sine and cosine sampling submodule 301 is inputted through the first input terminal of the first sine and cosine sampling submodule 301, V pcos When the first sine-cosine sampling submodule 301 is inputted through the second input terminal of the first sine-cosine sampling submodule 301 , the output terminal of the operational amplifier OP1 may output I1 , and the output terminal of the operational amplifier OP2 may output I2 .

[0163] I1 and I2 can be calculated using the following formulas (1) and (2):

[0164]

[0165]

[0166] Among them, I D，MP1 Represents the current output from the drain of the P-type MOS tube MP1; I D，MN1 Indicates the current output from the drain of the N-type MOS tube MN1; I D，MP2 Represents the current output from the drain of the P-type MOS tube MP2; I D，MN2 represents the current output from the drain of the N-type MOS transistor MN2; R1 represents the resistance value of the resistor R1; and R2 represents the resistance value of the resistor R2.

[0167] It should be noted that R1 and R2 are equal.

[0168] Based on the contents of the above embodiments, the sine-cosine square current generating module 202 includes: a sine-cosine square current generating submodule 401 and a second switch circuit 402;

[0169] When the current moment is within the second target time period, the second switch circuit 402 is used to select the input end of the sine-cosine square current generating submodule 401 and the output end of the sine-cosine sampling module 201, and to select the output end of the sine-cosine square current generating submodule 401 and the input end of the DC bias current removing module 204;

[0170] Figure 4 This is a circuit diagram of an embodiment of the sine and cosine square current generating submodule in the signal amplitude control system provided by the present invention. Figure 4 As shown, the sine-cosine square current generating submodule 401 includes a capacitor C5, a capacitor C6, a P-type MOS transistor MP3, a P-type MOS transistor MP4, a P-type MOS transistor MP5, a P-type MOS transistor MP6, an N-type MOS transistor MN3, an N-type MOS transistor MN4, an N-type MOS transistor MN5, an N-type MOS transistor MN6 and a diode VD1;

[0171] One end of the capacitor C5 is connected to the standard voltage, and the other end of the capacitor C5, the gate of the N-type MOS transistor MN3, the cathode of the diode VD1, the drain of the P-type MOS transistor MP6 and the output end of the sine-cosine square current generating submodule 401 are connected;

[0172] The drain of the N-type MOS transistor MN3, the drain of the P-type MOS transistor MP3, and the gate of the P-type MOS transistor MP4 are connected;

[0173] The source of the P-type MOS transistor MP3 is connected to the source of the P-type MOS transistor MP4;

[0174] The drain of the P-type MOS transistor MP4, the drain of the N-type MOS transistor MN4, the gate of the P-type MOS transistor MP6 and the cathode of the diode VD1 are connected;

[0175] The drain of the N-type MOS transistor MN5, the gate of the N-type MOS transistor MN5, and the gate of the N-type MOS transistor MN6 are connected;

[0176] The source of the N-type MOS transistor MN5 and the source of the N-type MOS transistor MN5 are grounded;

[0177] The source of the P-type MOS transistor MP6, the drain of the P-type MOS transistor MP5, the gate of the P-type MOS transistor MP5 and one end of the capacitor C6 are connected;

[0178] The source of the P-type MOS transistor MP5 , the other end of the capacitor C6 , and the input end of the sine-cosine square current generating submodule 401 are connected.

[0179] It should be noted that, in the initial stage of regulating the amplitude of the sine and cosine signals based on the signal amplitude control system 101 provided by the present invention, the sine and cosine square current generating submodule 401 can be used to initialize the current conversion.

[0180] It should be noted that the start time of the second target period may be the end time of the first target period.

[0181] When the current moment is within the second target time period, it can be indicated that the initial stage of regulating the amplitude of the sine and cosine signals has passed at the current moment. The second switch circuit 402 can select the input end of the sine and cosine square current generating submodule 401 and the output end of the sine and cosine sampling module 201, so that the input end of the sine and cosine square current generating submodule 401 is connected to the output end of the sine and cosine sampling module 201; the second switch circuit 402 can also select the output end of the sine and cosine square current generating submodule 401 and the input end of the DC bias current removal module 204, so that the output end of the sine and cosine square current generating submodule 401 is connected to the input end of the DC bias current removal module 204.

[0182] By judging whether the current moment is within the second target time period, it can be determined whether the current moment is in the initial stage of regulating the amplitude of the sine and cosine signals based on the signal amplitude control system 101 provided by the present invention.

[0183] like Figure 4 As shown, when the current moment is not within the second target time period, the second switch circuit 402 does not select the input end of the sine-cosine square current generating submodule 401 and the output end of the sine-cosine sampling module 201, the sine-cosine square current generating submodule 401 is used to initialize the current conversion, the input end of the sine-cosine square current generating submodule 401 has no current input, and the sine-cosine square current generating submodule 401 is used to generate the initialization current I based on the standard voltage X1. D1 .

[0184] It should be noted that the standard voltage V X1 It can be determined based on the voltage of the power supply terminal VDD and the voltage of the diode VD1. When the voltage of the power supply terminal VDD is 5V and the voltage of the diode VD1 is 0.7V, the standard voltage V X1 is 4.3V.

[0185] It should be noted that the P-type MOS transistor MP3, the P-type MOS transistor MP4, the N-type MOS transistor MN3, the N-type MOS transistor MN4 and the N-type MOS transistor MN6 can form an active load differential pair (five-transistor OTA).

[0186] It should be noted that the tail current source of the five-transistor OTA in the embodiment of the present invention is a basic current source.

[0187] like Figure 4 As shown, when the second switch circuit 402 does not select the input end of the sine-cosine square current generating submodule 401 and the output end of the sine-cosine sampling module 201, the initialization current I D1 The initialization current I is outputted through the output terminals of the P-type MOS transistor MP5, the P-type MOS transistor MP6 and the sine-cosine square current generating submodule 401. Since the P-type MOS transistor MP5 and the P-type MOS transistor MP6 both operate in the saturation region, the initialization current I D1 It can be expressed by formula (3):

[0188]

[0189] Among them, V G，MP6 Indicates the gate voltage of the P-type MOS tube MP6; V SG，MP6 Indicates the voltage between the source and gate of the P-type MOS tube MP6; K represents L / u·Cox·W, where L represents the channel length of the P-type MOS, W represents the channel width of the P-type MOS, u represents the carrier mobility, and Cox represents the capacitance of the P-type MOS.

[0190] Figure 5 This is the second structural diagram of the first sine-cosine square current generating submodule in the signal amplitude control system 101 provided by the present invention. Figure 5 As shown, when the current moment is within the second target time period, the second switch circuit 402 selects the input end of the sine-cosine square current generating submodule 401 and the output end of the sine-cosine sampling module 201, and selects the output end of the sine-cosine square current generating submodule 401 and the input end of the DC bias current removal module 204, and I1 and I2 can be input into the sine-cosine square current generating submodule 401 through the input end of the sine-cosine square current generating submodule 401.

[0191] The sine-cosine square current generating submodule 401 can convert I1 and I2 into I by square operation. out .

[0192] When the second switch circuit 402 switches on the input of the sine-cosine square current generating submodule 401 and the output of the sine-cosine sampling module 201, and switches on the output of the sine-cosine square current generating submodule 401 and the input of the DC bias current removing module 204, due to the holding of the capacitor C5, V G，MP6 The voltage value remains unchanged. Assume that the current flowing through the P-type MOS tube MP5 is I out , we can get formula (4):

[0193]

[0194] Formula (5) can be obtained from formula (3) and formula (4):

[0195]

[0196] Similarly, we can get formula (5):

[0197]

[0198] It should be noted that, in the embodiment of the present invention, I includes I out +I1 and I out +I2.

[0199] Based on the contents of the above embodiments, the sine-cosine sampling module 201 further includes: a second sine-cosine sampling submodule 601;

[0200] The second sine-cosine sampling submodule 601 is used to initialize the DC bias voltage;

[0201] When the current moment is within the first target time period, the first switch circuit 302 is used to select the input end of the sin-cosine sampling module 201 and the first input end of the second sin-cosine sampling submodule 601, and to select the input end of the sin-cosine sampling module 201 and the second input end of the second sin-cosine sampling submodule 601;

[0202] It should be noted that the sine and cosine sampling module 201 in the embodiment of the present invention can initialize the DC bias voltage in the initial stage of regulating the amplitude of the sine and cosine signals based on the signal amplitude control system 101 provided by the present invention.

[0203] The second sine-cosine sampling submodule 601 in the sine-cosine sampling module 201 can be used to initialize the DC bias voltage, and the first sine-cosine sampling submodule 301 in the sine-cosine sampling module 201 can be used to set V psin and V pcos Convert to I1 and I2.

[0204] In the embodiment of the present invention, whether the current moment is in the initial stage of regulating the amplitude of the sine and cosine signals may be determined based on whether the current moment is within the first target time period.

[0205] When the current moment is within the first target time period, it can be explained that the current moment is in the initial stage of regulating the amplitude of the sine and cosine signals. The first switch circuit 302 can select the input end of the sine and cosine sampling module 201 and the first input end of the second sine and cosine sampling submodule 601, so that the input end of the sine and cosine sampling module 201 is connected to the first input end of the second sine and cosine sampling submodule 601; the first switch circuit 302 can also select the input end of the sine and cosine sampling module 201 and the second input end of the second sine and cosine sampling submodule 601, so that the input end of the sine and cosine sampling module 201 is connected to the second input end of the second sine and cosine sampling submodule 601, so that V p Input the second sine-cosine sampling submodule 601 .

[0206] Figure 6 This is a circuit diagram of an embodiment of the second sinusoidal sampling submodule in the signal amplitude control system provided by the present invention. Figure 6 As shown, the second sine-cosine sampling submodule 601 includes a resistor R3, a resistor R4, a resistor R5, a resistor R6, a capacitor C7, a capacitor C8, a capacitor C9, a capacitor C10, a P-type MOS transistor MP7, a P-type MOS transistor MP8, an N-type MOS transistor MN7, an N-type MOS transistor MN8, an operational amplifier OP3, and an operational amplifier OP4;

[0207] Specifically, when the first switch circuit switches on the second sine-cosine sampling submodule 601, V psinThe second sine-cosine sampling submodule 601 can be input through the first input terminal of the second sine-cosine sampling submodule 601; V pcos The second sine-cosine sampling submodule 601 may be input through a second input terminal of the second sine-cosine sampling submodule 601 .

[0208] The first input terminal of the first sine-cosine sampling submodule 301 is connected to the positive input terminal of the operational amplifier OP3 through the resistor R3, the positive input terminal of the operational amplifier OP3 is connected to the DC bias voltage, and the negative input terminal of the operational amplifier OP3 is connected to the output terminal of the operational amplifier OP3;

[0209] It should be noted that the DC bias voltage in the embodiment of the present invention may be a 2.5V DC bias voltage.

[0210] Specifically, the negative input terminal of the operational amplifier OP3 is connected to the output terminal of the operational amplifier OP3 to form a buffer structure.

[0211] The positive power supply terminal of the operational amplifier OP3 is connected to the gate and drain of the P-type MOS transistor MP7, and the negative power supply terminal of the operational amplifier OP3 is connected to the gate and drain of the N-type MOS transistor MN7;

[0212] The gate and source of the P-type MOS transistor MP7 are connected via a capacitor C7;

[0213] The gate and source of the N-type MOS transistor MN7 are connected via a capacitor C8;

[0214] The source of the N-type MOS tube MN7 is grounded;

[0215] The second input terminal of the first sine-cosine sampling submodule 301 is connected to the positive input terminal of the operational amplifier OP4 through the resistor R4. The positive input terminal of the operational amplifier OP4 is connected to the DC bias voltage. The negative input terminal of the operational amplifier OP4 is connected to the output terminal of the operational amplifier OP4.

[0216] It should be noted that the DC bias voltage in the embodiment of the present invention may be a 2.5V DC bias voltage.

[0217] Specifically, the negative input terminal of the operational amplifier OP4 is connected to the output terminal of the operational amplifier OP4 to form a buffer structure.

[0218] The positive power supply terminal of the operational amplifier OP4 is connected to the gate and drain of the P-type MOS transistor MP8, and the negative power supply terminal of the operational amplifier OP4 is connected to the gate and drain of the N-type MOS transistor MN8;

[0219] The gate and source of the P-type MOS transistor MP8 are connected via capacitor C9;

[0220] The gate and source of the N-type MOS transistor MN8 are connected via a capacitor C10;

[0221] The source of the N-type MOS tube MN8 is grounded;

[0222] The output terminal of the operational amplifier OP3, the resistor R5, the resistor R6, and the output terminal of the operational amplifier OP4 are connected in series.

[0223] Figure 7 FIG. 1 is a circuit diagram of an embodiment of a DC bias current removal module in a signal amplitude control system provided by the present invention. Figure 7 As shown, based on the contents of the above embodiments, the DC bias current removal module 204 includes: a resistor R7 and a resistor R8;

[0224] The input end of the DC bias current removal module 204, the output end of the DC bias current removal module 204, the resistor R7 and one end of the resistor R8 are connected in series in sequence; the other end of the resistor R8 is connected to the reference voltage VBG;

[0225] The target voltage at the current moment is the voltage at the output terminal of the DC bias current removal module 204 .

[0226] It should be noted that, in the embodiment of the present invention, the reference voltage VBG connected to the other end of the resistor R8 is 2.5V.

[0227] I DC After I and V are input into the DC bias current removal module 204 through the input terminal, V out It can be calculated based on the following formula:

[0228] V out =2.5+R7·(I DC -I) (7)

[0229] Here, R7 represents the resistance value of the resistor R7 or the resistor R8.

[0230] Figure 8 FIG. 1 is a circuit diagram of an embodiment of a DC bias current generating module in a signal amplitude control system provided by the present invention. Figure 8 As shown, based on the contents of the above embodiments, the DC bias current generating module 203 includes: an operational amplifier OP5, a resistor R9, a capacitor C11 and an N-type MOS transistor MN9;

[0231] The positive input terminal of the operational amplifier OP5 is connected to the reference voltage VBG. The negative input terminal of the operational amplifier OP5, one end of the resistor R9, one end of the capacitor C11, and the source of the N-type MOS transistor MN9 are connected. The output terminal of the operational amplifier OP5, the other end of the capacitor C11, and the gate of the N-type MOS transistor MN9 are connected.

[0232] The other end of resistor R9 is grounded;

[0233] The drain of the N-type MOS transistor MN9 is the output end of the DC bias current generating module 203 .

[0234] Specifically, the output terminal of the DC bias current generating module 203 can output I DC .

[0235] I DC It can be calculated by formula (8):

[0236] I DC =V VBG / R9 (8)

[0237] Wherein, R9 represents the resistance value of resistor R9; V VBG Indicates the voltage value of the reference voltage VBG.

[0238] Based on formula (7) and formula (8), we can get:

[0239]

[0240] Based on the above embodiments, when the signal amplitude control circuit 102 operates periodically, each operating cycle includes multiple time periods. The clock control signal in the signal amplitude control circuit 102 is determined to be high or low based on the current time period in the current operating cycle. The level of the signal amplitude control circuit 102 is determined based on the clock control information, allowing the acquisition and retention of current signals to be completed within the same circuit architecture.

[0241] Figure 9 The waveform diagram of the clock control signal in the signal amplitude control system provided by the present invention. Figure 9 As shown, when the signal amplitude control circuit 102 operates periodically, any working period may include a first period T1 , a second period T2 , a third period T3 and a fourth period T4 .

[0242] At the current moment in the first time period T1 of the current working cycle, the clock control signal clk1 in the signal amplitude control circuit 102 is at a high level, and the clock control signals clk2, clk3 and clk4 in the signal amplitude control circuit 102 are at a low level GND;

[0243] At the current moment in the second time period T2 of the current working cycle, the clock control signal clk2 in the signal amplitude control circuit 102 is at a high level, and the clock control signals clk1 , clk3 and clk4 in the signal amplitude control circuit 102 are at a low level GND;

[0244] At the current moment in the third period T3 of the current working cycle, the clock control signal clk3 in the signal amplitude control circuit 102 is at a high level, and the clock control signals clk2 , clk1 and clk4 in the signal amplitude control circuit 102 are at a low level GND.

[0245] At the current moment in the fourth period T1 of the current working cycle, the clock control signal clk4 in the signal amplitude control circuit 102 is at a high level, and the clock control signals clk2 , clk3 and clk1 in the signal amplitude control circuit 102 are at a low level GND.

[0246] It should be noted that, when the clock control signal clk3 in the signal amplitude control system 101 is at a high level, the operational amplifier OP1 and the operational amplifier OP2 are both connected to a 2.5V bias voltage, and the operational amplifier OP1 and the operational amplifier OP2 both form a buffer structure. At this time, no current flows through the resistors R5 and R6 in the second sine-cosine sampling submodule 601, the capacitor C7 maintains the voltage between the gate and source of the P-type MOS transistor MP7, the capacitor C8 maintains the voltage between the gate and source of the N-type MOS transistor MN7, the capacitor C9 maintains the voltage between the gate and source of the P-type MOS transistor MP6, and the capacitor C10 maintains the voltage between the gate and source of the N-type MOS transistor MN8.

[0247] In the case of the clock control signal clk1 in the signal amplitude control system 101, sin and cos sampling is performed;

[0248] In the case of the clock control signal clk2 in the signal amplitude control system 101 , current holding is performed.

[0249] Figure 10 : is a block diagram of a controller in a signal amplitude control system provided by the present invention. As an optional embodiment, Figure 10 As shown, the controller 103 includes: a calculation module 1001 and a control module 1002;

[0250] The calculation module 1001 is used to obtain the amplitude of the sine and cosine signals at the current moment based on the sine and cosine signals at the current moment and the conversion relationship;

[0251] Specifically, the calculation module 1001 in the controller 103 can calculate the value of V out and V out With r p The conversion relationship between them is calculated to get r p .

[0252] The control module 1002 is configured to obtain a target gain at a next moment based on the amplitude of the sine and cosine signals at the current moment and a preset amplitude range, and then adjust the gain of the programmable gain amplifier based on the target gain at the next moment.

[0253] Specifically, the control module 1002 in the controller 103 can obtain r p The difference between the threshold value and the preset amplitude range can be used to obtain the target gain at the next moment through numerical calculation based on the above difference.

[0254] After the control module 1002 obtains the target gain at the next moment, it can adjust the gain of the PGA based on the target gain at the next moment, and then by adjusting the gain of the PGA, the amplitude of the sine and cosine signals generated by the sine and cosine signal generating device at the next moment can be adjusted.

[0255] Figure 11 This is a flow chart of the signal amplitude control method provided by the present invention. Figure 11 The signal amplitude control method of the present invention is described. The signal amplitude control method provided by the present invention is implemented based on the above-mentioned signal amplitude control system 101. Figure 11 As shown, the method includes: step 1101, obtaining a target voltage at a current moment, where the target voltage at the current moment has a conversion relationship with the amplitude of the sine and cosine signals at the current moment;

[0256] Step 1102: Based on the current target voltage and the conversion relationship, obtain the amplitude of the sine and cosine signals at the current moment;

[0257] Step 1103: Based on the amplitude of the sine and cosine signals at the current moment and the preset amplitude range, adjust the amplitude of the sine and cosine signals at the next moment.

[0258] It should be noted that the specific execution steps of the signal amplitude control method provided by the present invention can be found in the contents of the above embodiments, and will not be described in detail in the embodiments of the present invention.

[0259] The embodiment of the present invention obtains the target voltage at the current moment based on the sin-cosine signal at the current moment. After the above-mentioned target voltage at the current moment and the amplitude of the sin-cosine signal at the current moment have a conversion relationship, the amplitude of the sin-cosine signal at the current moment is calculated based on the above-mentioned target voltage at the current moment and the above-mentioned conversion relationship. Then, based on the amplitude of the sin-cosine signal at the current moment, the amplitude of the sin-cosine signal at the next moment can be controlled. Without relying on the ADC sampling digital circuit and the DSP digital circuit, the amplitude of the sin-cosine signal can be obtained in real time based on the analog circuit. Then, based on the amplitude of the sin-cosine signal obtained in real time, the amplitude of the sin-cosine signal can be regulated in a simpler, more efficient, more accurate and lower power consumption manner. The regulation of the amplitude of the sin-cosine signal is more universal and can be more widely applicable to various application scenarios.

[0260] Figure 12 This is a schematic diagram of the structure of the signal amplitude control device provided by the present invention. Figure 12 The signal amplitude control device provided by the present invention is described. The signal amplitude control device described below and the signal amplitude control method provided by the present invention described above can be referred to in correspondence with each other. Figure 12 As shown, the device includes: a voltage acquisition module 1201 , an amplitude calculation module 1202 and an amplitude control module 1203 .

[0261] The voltage acquisition module 1201 is used to acquire the target voltage at the current moment. The target voltage at the current moment has a conversion relationship with the amplitude of the sine and cosine signals at the current moment.

[0262] Amplitude calculation module 1202, used to obtain the amplitude of the sine and cosine signals at the current moment based on the target voltage at the current moment and the conversion relationship;

[0263] The amplitude control module 1203 is used to adjust the amplitude of the sine and cosine signals at the next moment based on the amplitude of the sine and cosine signals at the current moment and the preset amplitude range.

[0264] Specifically, the voltage acquisition module 1201 , the amplitude calculation module 1202 and the amplitude control module 1203 are electrically connected.

[0265] The signal amplitude control device in the embodiment of the present invention obtains the target voltage at the current moment based on the sin-cosine signal at the current moment. After the above-mentioned target voltage at the current moment and the amplitude of the sin-cosine signal at the current moment have a conversion relationship, the amplitude of the sin-cosine signal at the current moment is calculated based on the above-mentioned target voltage at the current moment and the above-mentioned conversion relationship. Then, based on the amplitude of the sin-cosine signal at the current moment, the amplitude of the sin-cosine signal at the next moment can be controlled. Without relying on the ADC sampling digital circuit and the DSP digital circuit, the amplitude of the sin-cosine signal can be obtained in real time based on the analog circuit. Then, based on the amplitude of the sin-cosine signal obtained in real time, the amplitude of the sin-cosine signal can be regulated in a simpler, more efficient, more accurate and lower power consumption manner. The regulation of the amplitude of the sin-cosine signal is more universal and can be more widely applicable to various application scenarios.

[0266] Based on the contents of the above embodiments, an angle encoder includes: the signal amplitude control system 101 as described above, and a sensor;

[0267] The sensor is used to generate the current sine and cosine signals and input the current sine and cosine signals to the signal amplitude control system 101;

[0268] The signal amplitude control system 101 is used to adjust the amplitude of the sine and cosine signals generated by the sensor at the next moment based on the input sine and cosine signals at the current moment.

[0269] Specifically, the present invention also provides an angle encoder, which includes the signal amplitude control system 101 and a sensor. The angle encoder can obtain the amplitude of the sine and cosine signals in real time based on the signal amplitude control system 101 without relying on the ADC sampling digital circuit and the DSP digital circuit. Then, based on the amplitude of the sine and cosine signals obtained in real time, the amplitude of the sine and cosine signals generated by the sensor can be regulated in a simpler, more efficient, more accurate and lower power consumption manner.

[0270] It should be noted that the specific process of the angle encoder regulating the amplitude of the sine and cosine signals generated by the sensor based on the signal amplitude control system 101 can be found in the above embodiments and will not be repeated in the embodiments of the present invention.

[0271] Optionally, the angle encoder may further include a programmable gain amplifier.

[0272] Accordingly, the signal amplitude control system 101 can control the gain of the programmable gain amplifier to achieve regulation of the amplitude of the sine and cosine signals generated by the sensor.

[0273] The angle encoder in the embodiment of the present invention includes a signal amplitude control system 101 and a sensor. The signal amplitude control system 101 obtains a target voltage at the current moment based on the sinus and cosine signals at the current moment. After the target voltage at the current moment and the amplitude of the sinus and cosine signals at the current moment have a conversion relationship, the amplitude of the sinus and cosine signals at the current moment is calculated based on the target voltage at the current moment and the conversion relationship. Based on the amplitude of the sinus and cosine signals at the current moment, the amplitude of the sinus and cosine signals generated by the sensor at the next moment can be controlled. The amplitude of the sinus and cosine signals can be obtained in real time based on an analog circuit without relying on an ADC sampling digital circuit and a DSP digital circuit. Based on the amplitude of the sinus and cosine signals obtained in real time, the amplitude of the sinus and cosine signals can be regulated in a simpler, more efficient, more accurate and lower power consumption manner. The amplitude regulation of the sinus and cosine signals is more universal and can be more widely applicable to various application scenarios.

[0274] Figure 13 An example of a physical structure diagram of an electronic device is shown below. Figure 13 As shown, the electronic device may include: a processor 1310, a communication interface 1320, a memory 1330, and a communication bus 1340, wherein the processor 1310, the communication interface 1320, and the memory 1330 communicate with each other via the communication bus 1340. The processor 1310 may call logic instructions in the memory 1330 to execute a signal amplitude control method, which includes: obtaining a target voltage at a current moment, where the target voltage at a current moment has a conversion relationship with the amplitude of the sine and cosine signals at a current moment; obtaining the amplitude of the sine and cosine signals at a current moment based on the target voltage at a current moment and the conversion relationship; and regulating the amplitude of the sine and cosine signals at a next moment based on the amplitude of the sine and cosine signals at a current moment and a preset amplitude range.

[0275] In addition, the logic instructions in the above-mentioned memory 1330 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when sold or used as an independent product. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0276] On the other hand, the present invention also provides a computer program product, which includes a computer program, which can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the signal amplitude control method provided by the above methods, which includes: obtaining the target voltage at the current moment, the target voltage at the current moment and the amplitude of the sine and cosine signals at the current moment have a conversion relationship; based on the target voltage at the current moment and the conversion relationship, obtaining the amplitude of the sine and cosine signals at the current moment; based on the amplitude of the sine and cosine signals at the current moment and a preset amplitude range, regulating the amplitude of the sine and cosine signals at the next moment.

[0277] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, it is implemented to execute the signal amplitude control method provided by the above-mentioned methods, the method including: obtaining the target voltage at the current moment, the target voltage at the current moment and the amplitude of the sine and cosine signals at the current moment having a conversion relationship; obtaining the amplitude of the sine and cosine signals at the current moment based on the target voltage at the current moment and the conversion relationship; and regulating the amplitude of the sine and cosine signals at the next moment based on the amplitude of the sine and cosine signals at the current moment and a preset amplitude range.

[0278] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., they may be located in one location or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of the present embodiment. Persons of ordinary skill in the art will be able to understand and implement the present invention without inventive effort.

[0279] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, or of course, by hardware. Based on this understanding, the essence of the above technical solution or the part that contributes to the existing technology can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or certain parts of the embodiments.

[0280] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A signal amplitude control system, characterized in that: include: a signal amplitude control circuit, configured to obtain a target voltage at a current moment based on an inputted sine and cosine signal at a current moment, wherein the target voltage at a current moment has a conversion relationship with the amplitude of the sine and cosine signal at a current moment; a controller, electrically connected to the signal amplitude control circuit, configured to obtain the amplitude of the sine and cosine signals at the current moment based on the target voltage at the current moment and the conversion relationship, and further adjust the amplitude of the sine and cosine signals at the next moment based on the amplitude of the sine and cosine signals at the current moment and a preset amplitude range; The signal amplitude control circuit includes: a sine and cosine sampling module, a sine and cosine square current generating module, a DC bias current generating module and a DC bias current removing module; The input end of the sine-cosine sampling module is the input end of the signal amplitude control circuit; the output end of the sine-cosine sampling module is connected to the input end of the sine-cosine square current generating module; the output end of the sine-cosine square current generating module and the output end of the DC bias current generating module are connected to the input end of the DC bias current removal module; the output end of the DC bias current removal module is the output end of the signal amplitude control circuit; The sine-cosine sampling module is used to convert the input sine-cosine signal at the current moment into a first current signal at the current moment and a second current signal at the current moment, and then input the first current signal at the current moment and the second current signal at the current moment into the sine-cosine square current generating module; The sine-cosine square current generating module is used to convert the input first current signal and the input second current signal at the current moment into the sine-cosine square current at the current moment through a square operation, and input the sine-cosine square current at the current moment into the DC bias current removing module; The DC bias current generating module is used to generate a target bias current and input the target bias current into the DC bias current removing module; The DC bias current removal module is configured to obtain the target voltage at the current moment based on the inputted sine and cosine square currents at the current moment and the target bias current.

2. The signal amplitude control system according to claim 1, characterized in that: The sine-cosine sampling module includes: a first sine-cosine sampling submodule and a first switching circuit; the first switching circuit is configured to, when the current moment is not within a first target time period, gate the input end of the sine-cosine sampling module with the first input end of the first sine-cosine sampling submodule, and gate the input end of the sine-cosine sampling module with the second input end of the first sine-cosine sampling submodule; The first sine-cosine sampling submodule includes a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a resistor R1, a resistor R2, an operational amplifier OP1, an operational amplifier OP2, an N-type MOS transistor MN1, an N-type MOS transistor MN2, a P-type MOS transistor MP1, and a P-type MOS transistor MP1; The first input terminal of the first sine-cosine sampling submodule is connected to the output terminal of the operational amplifier OP1 through the resistor R1; The positive input terminal of the operational amplifier OP1 is connected to a DC bias voltage, and the negative input terminal of the operational amplifier OP1 is connected to the output terminal of the operational amplifier OP1; The positive power supply terminal of the operational amplifier OP1 is connected to the gate and drain of the P-type MOS transistor MP1, and the negative power supply terminal of the operational amplifier OP1 is connected to the gate and drain of the N-type MOS transistor MN1; The gate and source of the P-type MOS transistor MP1 are connected via a capacitor C1; The gate and source of the N-type MOS transistor MN1 are connected via a capacitor C2; The source of the N-type MOS transistor MN1 is grounded; The second input terminal of the first sine-cosine sampling submodule is connected to the output terminal of the operational amplifier OP2 through the resistor R2; The positive input terminal of the operational amplifier OP2 is connected to a DC bias voltage, and the negative input terminal of the operational amplifier OP2 is connected to the output terminal of the operational amplifier OP2; The positive power supply terminal of the operational amplifier OP2 is connected to the gate and drain of the P-type MOS transistor MP2, and the negative power supply terminal of the operational amplifier OP2 is connected to the gate and drain of the N-type MOS transistor MN2; The gate and source of the P-type MOS transistor MP2 are connected via a capacitor C3; The gate and source of the N-type MOS transistor MN2 are connected via a capacitor C4; The source of the N-type MOS transistor MN2 is grounded; The output end of the operational amplifier OP1 and the output end of the operational amplifier OP2 are output ends of the sine-cosine sampling module.

3. The signal amplitude control system according to claim 1, characterized in that: The sine-cosine square current generating module includes: a sine-cosine square current generating submodule and a second switching circuit; When the current moment is within the second target time period, the second switching circuit is used to enable the input end of the sine-cosine square current generating submodule and the output end of the sine-cosine sampling module, and enable the output end of the sine-cosine square current generating submodule and the input end of the DC bias current removal module; The sine-cosine square current generating submodule includes a capacitor C5, a capacitor C6, a P-type MOS transistor MP3, a P-type MOS transistor MP4, a P-type MOS transistor MP5, a P-type MOS transistor MP6, an N-type MOS transistor MN3, an N-type MOS transistor MN4, an N-type MOS transistor MN5, an N-type MOS transistor MN6 and a diode VD1; One end of the capacitor C5 is connected to a standard voltage, and the other end of the capacitor C5, the gate of the N-type MOS transistor MN3, the cathode of the diode VD1, the drain of the P-type MOS transistor MP6 and the output end of the sine-cosine square current generating submodule are connected; The drain of the N-type MOS transistor MN3, the drain of the P-type MOS transistor MP3, and the gate of the P-type MOS transistor MP4 are connected; The source of the P-type MOS transistor MP3 is connected to the source of the P-type MOS transistor MP4; The drain of the P-type MOS transistor MP4, the drain of the N-type MOS transistor MN4, the gate of the P-type MOS transistor MP6 and the cathode of the diode VD1 are connected; The drain of the N-type MOS transistor MN5, the gate of the N-type MOS transistor MN5, and the gate of the N-type MOS transistor MN6 are connected; The source of the N-type MOS transistor MN5 is grounded; The source of the P-type MOS transistor MP6, the drain of the P-type MOS transistor MP5, the gate of the P-type MOS transistor MP5 and one end of the capacitor C6 are connected; The source of the P-type MOS transistor MP5, the other end of the capacitor C6 and the input end of the sine-cosine square current generating submodule are connected.

4. The signal amplitude control system according to claim 2, characterized in that: The sine-cosine sampling module further includes: a second sine-cosine sampling submodule for initializing a DC bias voltage; When the current moment is within the first target time period, the first switch circuit is used to select the input end of the sin-cosine sampling module and the first input end of the second sin-cosine sampling submodule, and select the input end of the sin-cosine sampling module and the second input end of the second sin-cosine sampling submodule; The second sine-cosine sampling submodule includes a resistor R3, a resistor R4, a resistor R5, a resistor R6, a capacitor C7, a capacitor C8, a capacitor C9, a capacitor C10, a P-type MOS transistor MP7, a P-type MOS transistor MP8, an N-type MOS transistor MN7, an N-type MOS transistor MN8, an operational amplifier OP3, and an operational amplifier OP4; The first input terminal of the first sine-cosine sampling submodule is connected to the positive input terminal of the operational amplifier OP3 through the resistor R3, the positive input terminal of the operational amplifier OP3 is connected to a DC bias voltage, and the negative input terminal of the operational amplifier OP3 is connected to the output terminal of the operational amplifier OP3; The positive power supply terminal of the operational amplifier OP3 is connected to the gate and drain of the P-type MOS transistor MP7, and the negative power supply terminal of the operational amplifier OP3 is connected to the gate and drain of the N-type MOS transistor MN7; The gate and source of the P-type MOS transistor MP7 are connected via a capacitor C7; The gate and source of the N-type MOS transistor MN7 are connected via a capacitor C8; The source of the N-type MOS transistor MN7 is grounded; The second input terminal of the first sine-cosine sampling submodule is connected to the positive input terminal of the operational amplifier OP4 through the resistor R4, the positive input terminal of the operational amplifier OP4 is connected to the DC bias voltage, and the negative input terminal of the operational amplifier OP4 is connected to the output terminal of the operational amplifier OP4; The positive power supply terminal of the operational amplifier OP4 is connected to the gate and drain of the P-type MOS transistor MP8, and the negative power supply terminal of the operational amplifier OP4 is connected to the gate and drain of the N-type MOS transistor MN8; The gate and source of the P-type MOS transistor MP8 are connected via a capacitor C9; The gate and source of the N-type MOS transistor MN8 are connected via a capacitor C10; The source of the N-type MOS transistor MN8 is grounded; The output end of the operational amplifier OP3, the resistor R5, the resistor R6, and the output end of the operational amplifier OP4 are connected in series.

5. The signal amplitude control system according to claim 1, characterized in that: The DC bias current removal module includes: a resistor R7 and a resistor R8; The input end of the DC bias current removal module, the output end of the DC bias current removal module, the resistor R7 and one end of the resistor R8 are sequentially connected in series; the other end of the resistor R8 is connected to the reference voltage VBG; The target voltage at the current moment is the voltage at the output end of the DC bias current removal module.

6. The signal amplitude control system according to claim 1, characterized in that: The DC bias current generating module includes: an operational amplifier OP5, a resistor R9, a capacitor C11 and an N-type MOS transistor MN9; The positive input terminal of the operational amplifier OP5 is connected to the reference voltage VBG; the negative input terminal of the operational amplifier OP5, one end of the resistor R9, one end of the capacitor C11, and the source of the N-type MOS transistor MN9 are connected; the output terminal of the operational amplifier OP5, the other end of the capacitor C11, and the gate of the N-type MOS transistor MN9 are connected; The other end of the resistor R9 is grounded; The drain of the N-type MOS transistor MN9 is the output end of the DC bias current generating module.

7. The signal amplitude control system according to any one of claims 1 to 6, characterized in that: When the signal amplitude control circuit operates periodically, any working cycle includes multiple time periods; the clock control signal in the signal amplitude control circuit is determined to be high level or low level based on the time period in the current working cycle at the current moment.

8. The signal amplitude control system according to claim 1, characterized in that: The controller includes: a calculation module, configured to obtain the amplitude of the sine and cosine signals at the current moment based on the sine and cosine signals at the current moment and the conversion relationship; The control module is electrically connected to the calculation module and is used to obtain the target gain at the next moment based on the amplitude of the sine and cosine signals at the current moment and the preset amplitude range, and then adjust the gain of the programmable gain amplifier based on the target gain at the next moment.

9. An angle encoder, characterized in that: include: The signal amplitude control system and sensor according to any one of claims 1 to 8; The sensor is used to generate the sine and cosine signals at the current moment, and input the sine and cosine signals at the current moment into the signal amplitude control system; The signal amplitude control system is used to adjust the amplitude of the sine and cosine signals generated by the sensor at the next moment based on the input sine and cosine signals at the current moment.

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