Methods, apparatuses, and media related to process parameters

Abstract

Example embodiments according to the present disclosure provide methods, apparatuses, and media related to process parameters. The method includes obtaining a test pattern and a reference process window for the test pattern. The reference process window indicates a range of one or more process parameters. The method also includes determining, based on the reference process window, a first simulated pattern formed by photolithography with the test pattern. The method also includes determining a first imaging cost related to at least forming the first simulated pattern. The method also includes determining, based on the first imaging cost, a target set of process parameters. In this way, process parameters for a new process node can be efficiently determined, thereby advantageously speeding up the development process for the new process node.

Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure mainly relate to the field of integrated circuits, and more particularly, to methods, apparatuses and media related to process parameters. BACKGROUND

[0002] A lithography process is one of the important processes that dominate the line width of integrated circuits. In advanced semiconductor process nodes, the process parameters of lithography greatly affect the quality of lithography imaging. In the development of new process nodes, it would be beneficial to determine the process parameters as early as possible. For example, an optical model based on these process parameters can be used for various process node development purposes, for simulating the process nodes of a semiconductor in advance. SUMMARY

[0003] In a first aspect of the present disclosure, a method related to process parameters is provided. In the method, a test pattern and a reference process window for the test pattern are obtained. The reference process window indicates a range of one or more process parameters. The method further includes determining, based on the reference process window, a first simulated pattern formed by lithography using the test pattern. The method further includes determining a first imaging cost related to forming the first simulated pattern. The method further includes determining, based on the first imaging cost, a target set of process parameters. In this way, the target set of process parameters for a new process node can be efficiently determined.

[0004] In a second aspect of the present disclosure, an electronic device is provided. The electronic device includes a processor, and a memory coupled to the processor. The memory has instructions stored therein that, when executed by the processor, cause the electronic device to perform the method according to the first aspect of the present disclosure.

[0005] In a third aspect of the present disclosure, a computer-readable storage medium is provided. The computer-readable storage medium has a computer program stored thereon. The computer program, when executed by a processor, implements the method according to the first aspect of the present disclosure.

[0006] It should be understood that the description in the SUMMARY is not intended to identify key or essential features of embodiments of the present disclosure or to limit the scope of the present disclosure. Other features of the present disclosure will be apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0007] The above and other features, advantages and aspects of embodiments of the present disclosure will become more apparent upon reading the following detailed description in conjunction with the accompanying drawings, in which like references refer to like elements and in which:

[0008] Figure 1 A schematic diagram showing an example environment in which embodiments of the present disclosure can be implemented is shown.

[0009] Figure 2 A flowchart illustrating a method of determining a process parameter according to some embodiments of the present disclosure is shown;

[0010] Figure 3 A flowchart illustrating an example process of determining a first simulation pattern according to some embodiments of the present disclosure is shown;

[0011] Figure 4 A schematic diagram illustrating a plurality of initial process conditions in a process window according to some embodiments of the present disclosure is shown;

[0012] Figure 5 A flowchart illustrating a method of determining a candidate process condition according to some embodiments of the present disclosure is shown; and

[0013] Figure 6 A block diagram of an electronic device in which one or more embodiments of the disclosure can be implemented is shown. DETAILED DESCRIPTION

[0014] Embodiments of the present disclosure will be described below in greater detail with reference to the accompanying drawings. While certain embodiments of the present disclosure are shown in the drawings, it is understood that the present disclosure can be embodied in various forms and should not be interpreted as being limited to the embodiments set forth herein; rather, these embodiments are provided so as to more completely and thoroughly understand the present disclosure. It is understood that the drawings and embodiments of the present disclosure are for exemplary purposes only and are not intended to limit the scope of protection of the present disclosure.

[0015] In the description of embodiments of the present disclosure, the term "includes" and its derivatives, are not intended to be limiting of the respective processes, compositions, or materials, etc., to which they refer, but are intended to cover the respective processes, compositions, or materials, etc., to which they refer, and their equivalents. The term "based on" is intended to be inclusive and not limiting, unless otherwise indicated. The term "one embodiment" or "an embodiment" is intended to be inclusive of the recited embodiment and its equivalents, and does not preclude other embodiments. The term "first," "second," etc. can refer to different or the same objects.

[0016] As briefly mentioned earlier, knowing the process parameter can have a variety of uses. For example, in the early stage of Resolution Enhancement Technology (RET) process, an optical model is generally needed to simulate the illumination process of lithography for RET related testing / development plan. In a conventional approach of generating such an optical model, the optical model is constructed based on a known / provisionally determined light source, a known / provisionally determined photoresist and thin film stack structure, targeting the best focus value and the best exposure dose (also known as the process window center) of an anchor point pattern at a specified exposure dose and focus range.

[0017] Such conventional solutions have some problems. On one hand, in the development of a new process node, there is no available lithography process or the lithography process has not been optimized. This makes it possible that there is a gap between the generated optical model and the optimized lithography process, i.e., the generated optical model can deviate from the optimized lithography process.

[0018] On the other hand, if an optical model under a new process node is desired, it is usually necessary to make a mask according to a layout and perform lithography, and then measure the imaging situation on the photoresist. Next, the process parameters such as exposure dose and focus value are determined according to the measurement results. However, such a process is very time-consuming and complex, which can slow down the development process of the new process node.

[0019] To this end, embodiments of the present disclosure provide a method for determining process parameters to solve or at least partially solve the above problems in conventional methods and / or other potential problems. According to embodiments of the present disclosure, based on a reference process window for a test pattern, a simulation pattern formed by lithography using the test pattern is determined by lithography imaging simulation. Then, based on at least an imaging cost related to forming the simulation pattern, a target process parameter set is determined. The target process parameter set can be used to define one or more optical models for testing and development of a process node.

[0020] In embodiments of the present disclosure, a process parameter of a new process node is determined by lithography imaging simulation with a known process window as a reference. For example, a process parameter of a new process node is determined by simulation with a process window of a neighboring process node as a starting point. In this way, the determination period of the process parameter can be shortened in the development of the new process, and further support for subsequent testing and development can be provided. This can advantageously speed up the development process of the new process node.

[0021] Figure 1 A schematic diagram of an example environment 100 in which embodiments of the present disclosure can be implemented is shown. In the example environment 100, an electronic device 101 inputs a test pattern 102. In Figure 1 In the example, the test pattern 102 includes two rectangles 1021 and 1022 with a predetermined pitch. It should be understood, of course, that this form of the test pattern 102 is only illustrative and is not intended to limit the scope of protection of the present disclosure. In embodiments of the present disclosure, the test pattern 102 can be any pattern of interest or a pattern that is prone to problems in lithography. Hereinafter, the example pattern of Figure 1 It should be understood that example patterns with other patterns or shapes are also similar, and will not be described separately hereinafter.

[0022] The electronic device 101 also obtains a reference process window 103 for the test pattern 102. In this context, the term "process window" defines a range of one or more process parameters. As shown in the schematic diagram, Figure 1 In the schematic diagram shown, the reference process window 103 exemplarily defines a range of two key factors in the process parameters, i.e., focus value (Focus) and exposure dose. It should be appreciated that this is merely exemplary, in embodiments of the present disclosure, the process window can define a range of any suitable process parameter, e.g., mask error enhancement factor (MEEF), image log slope (ILS), etc. Hereinafter, the concept according to the present disclosure will be mainly described with focus value and exposure dose as examples of the process parameters. It should be appreciated that the same applies to cases also including other parameters, which will not be separately elaborated hereinafter. Furthermore, Figure 1 The shape of the reference process window 103 shown in the schematic diagram is merely exemplary, and is not intended to limit the scope of the present disclosure. The reference process window can have any suitable shape (e.g., elliptical), and the scope of the present disclosure is not limited in this respect.

[0023] The electronic device 101 takes the reference process window 103 and the test pattern 102 as inputs, and determines a target process parameter set 105 through lithography imaging simulation. The target process parameter set 105 can include a value or a range of values of one or more process parameters that can satisfy the imaging requirement. For example, the target process parameter set 105 can include a new process window or a portion thereof (such as a number of points within the process window). In some embodiments, the reference process window 103 is for a first semiconductor process, while the target process parameter set 105 is for a second semiconductor process different from the first semiconductor process. For example, the reference process window 103 is a process parameter of a neighboring process node (e.g., a 14nm process node), while the target process parameter set 105 is a process parameter of a new process node (e.g., a 10nm process node).

[0024] In the example environment 100, the electronic device 101 can be any type of device with computing capability, including a terminal device or a server device. The terminal device can be any type of mobile terminal, fixed terminal, or portable terminal including a mobile handset, a desktop computer, a laptop computer, a notebook computer, a netbook computer, a tablet computer, a media computer, a multi-media tablet, a personal communication system (PCS) device, a personal navigation device, a personal digital assistant (PDA), an audio / video player, a digital camera / camcorder, a positioning device, a television receiver, a radio broadcast receiver, an electronic book device, a game device, or any combination thereof, including accessories and peripherals of such devices or any combination thereof. The server device may, for example, include a computing system / server, such as a mainframe, an edge computing node, a computing device in a cloud environment, etc.

[0025] It should be appreciated that the structure and function of the environment 100 are described for illustrative purposes only, and are not intended to imply any limitation of the scope of the present disclosure. The example embodiments according to the present disclosure will be described in detail below with reference to the drawings. Figures 2 to 5

[0026] Figure 2 A flowchart of a method 200 of determining process parameters according to some embodiments of the present disclosure is shown. The method 200 can be performed by the electronic device 101 as shown. It should be appreciated that the method 200 can also include additional blocks not shown and / or can omit some (or all) of the blocks shown, and the scope of the present disclosure is not limited in this regard. Figure 1

[0027] At block 210, the electronic device 101 obtains a test pattern 102 and a reference process window 103 for the test pattern 102. As mentioned previously, the reference process window 103 can be from an initial process node (i.e., a known process node), and indicates a range of one or more process parameters. These process parameters can include, for example, focus value, exposure dose, etc. In some embodiments, the reference process window 101 can be for a first semiconductor process, such as the 14 nm process mentioned previously. According to the method for determining process parameters of the embodiments of the present disclosure, a target process parameter set can be determined from the reference process window 103 and the test pattern 102. Correspondingly, the target process parameter set can be for a second semiconductor process different from the first semiconductor process, such as the 10 nm process mentioned previously. It should be appreciated, of course, that the above examples regarding the first and second semiconductor processes are merely illustrative, and are not intended to limit the scope of the present disclosure. The first and second semiconductor processes can be various suitable processes for semiconductor product production.

[0028] ​​In addition to the test pattern 102 and the reference process window 103, the electronic device 101 can obtain other data for performing the lithography imaging simulation. Such data can include parameters related to the light source (e.g., a light source intensity map), parameters related to the photoresist (e.g., a stack structure, a thickness, etc. of the photoresist). In some embodiments, the electronic device 101 can also obtain auxiliary patterns for assisting the imaging of the test pattern 102. The auxiliary patterns can be, for example, sub-resolution assistant features (SRAFs). Some small patterns are added around sparse patterns in the integrated circuit design layout to make the sparse patterns look like dense patterns from an optical perspective. These small patterns are smaller than the resolution of the lithography machine. When exposed, these patterns only scatter light and do not get transferred to the photoresist, and thus are called sub-resolution assistant features. The electronic device 101 can add the auxiliary patterns to the test pattern 102 according to an auxiliary pattern insertion rule.

[0029] At block 220, the electronic device 101 determines, based on the reference process window 103, a simulated pattern formed by lithography using the test pattern 102, which is also referred to herein as a first simulated pattern. The electronic device 101 can generate the first simulated pattern by the lithography imaging simulation. For example, in the lithography imaging simulation, the electronic device 101 can place the test pattern 102 on a simulated mask. From the simulation, the simulated pattern formed in the photoresist or any plane of interest can thus be determined.

[0030] In some embodiments, the first simulated pattern can be determined from a plurality of candidate patterns. Figure 3 A flowchart of an example process 300 of determining the first simulated pattern according to some embodiments of the present disclosure is shown. The process 300 can be considered as an example implementation of the block 220. As shown, in some embodiments, at block 310, the electronic device 101 can determine, based on the reference process window 103, a plurality of initial process conditions. Each of the initial process conditions is defined by a process parameter within the reference process window 103. Figure 3

[0031] The initial process conditions can be defined by any process parameter or combination of process parameters within the range defined by the reference process window 103. In particular, in some embodiments, the initial process conditions can be uniformly selected or sampled within the range defined by the reference process window 103. As will be understood from the detailed description below, by uniformly selecting the initial process conditions, it is facilitated to quickly determine new process parameters. Figure 4 Examples of the initial process conditions within the reference process window 103 are shown. In the example shown, the reference process window 103 is defined by a range of process parameters, which is shown as a range of dose and focus. The initial process conditions are uniformly selected within the range of the reference process window 103. Figure 4 ​In the illustrated example, 15 initial process conditions 4031 are shown. Each of the initial process conditions 4031 corresponds to a specific combination of focus value and exposure dose value. Specifically, 5 values are uniformly selected within the range of focus values (i.e., depth of focus, DOF), and 3 values are uniformly selected within the range of exposure dose (i.e., exposure latitude, EL). Thus, 15 initial process conditions are determined.

[0032] It should be appreciated that, Figure 4 The number of initial process conditions 4031 and their distribution within the reference process window shown in FIG. 4 is merely exemplary and is not intended to limit the scope of protection of the present disclosure. Depending on the lithography scenario and the lithography process, there can be any other suitable number of initial process conditions 4031. In the following, the concept of the present disclosure will be described mainly with respect to the example of the initial process conditions 4031 shown in FIG. 4. It is also similar for embodiments with other numbers of initial process conditions 4031, which will not be described separately in the following. Figure 4

[0033] Next, at block 320, the electronic device 101 can perform lithography imaging simulation for the plurality of initial process conditions respectively to generate a plurality of candidate patterns. Each of the candidate patterns is formed by the test pattern 102 under a corresponding one of the initial process conditions. These candidate patterns can be simulated to be formed in any height plane of the photoresist or any other plane of interest. In the following, the concept of the present disclosure will be described mainly with respect to the example of the candidate patterns shown in FIG. 5. It is also similar for embodiments with other numbers of candidate patterns, which will not be described separately in the following. Figure 4 In the illustrated example, 15 candidate patterns can be generated based on the 15 initial process conditions 4031.

[0034] At block 330, the electronic device 101 can determine the aforementioned first simulation pattern based on the plurality of candidate patterns. Any suitable criterion can be employed to determine the first simulation pattern from the candidate patterns. The size of the pattern, e.g., critical dimension (CD), is an important indicator of the imaging quality. Thus, in some embodiments, the first simulation pattern can be determined by taking the size of the pattern into account. Specifically, the electronic device 101 can determine, for each of the candidate patterns, the difference between the size associated with the candidate pattern and the target size. If the difference is less than a threshold, the candidate pattern is the first simulation pattern. The threshold can be flexibly set according to different design requirements or margins. For example, the threshold can be within ±8% of the target size. For another example, the threshold can be within ±10% of the target size.

[0035] ​In embodiments of the present disclosure, the dimension associated with the candidate pattern can be a dimension at any location of the pattern, such as a side length of a polygon, a width, a distance between different polygons, etc. In particular, the dimension associated with the candidate pattern can be a CD or a space width (SW) at a measurement location. The target dimension can be a design target or a desired achieved value for the dimension. For example, in the case that the dimension associated with the candidate pattern is a CD, the target dimension can be a design target for an after development inspection (ADI) CD.

[0036] The above reference is made to Figure 3 Examples are described for determining the first simulation pattern according to a dimension associated with the candidate pattern. It should be appreciated that this is merely exemplary, and the first simulation pattern can also be selected from the candidate pattern based on other criteria related to imaging quality (e.g., MEEF, ILS).

[0037] Continuing with reference to Figure 2 At block 230, the electronic device 101 determines an imaging cost related to at least forming the first simulation pattern, which is also referred to as a first imaging cost. In embodiments of the present disclosure, the imaging cost can represent a difference between an imaging quality of the simulation and a desired imaging quality. Generally speaking, the smaller the imaging cost, the better the corresponding process parameters. The imaging cost can be utilized to comprehensively consider the pros and cons of the process parameters. The imaging cost can be represented by a cost function. The cost function is used to evaluate the simulation or optimization results.

[0038] In some embodiments, the first imaging cost can be determined based on a plurality of cost components. The cost components related to forming the first simulated pattern are also referred to as first cost components, which can include one or more cost terms. For example, the first cost components can include a cost term determined based on a dimension associated with the first simulated pattern. The cost term can reflect a difference between the simulated dimension and a target dimension. Alternatively or additionally, the first cost components can include a cost term determined based on a focus center (FC) associated with the first simulated pattern. The cost term can reflect a deviation of a focus center corresponding to the process condition for forming the first simulated pattern from an ideal or predetermined focus center. Alternatively or additionally, the first cost components can include a cost term determined based on a depth of focus (DOF) associated with the first simulated pattern. The cost term can reflect a deviation of the depth of focus for forming the first simulated pattern from an ideal or predetermined depth of focus. The first cost components can include a cost term determined based on an exposure latitude (EL) associated with the first simulated pattern. The cost term can reflect a deviation of the exposure latitude for forming the first simulated pattern from an ideal or predetermined exposure latitude. Alternatively or additionally, the first cost components can include a cost term related to MEEF determined based on the first simulated pattern. The cost term can reflect a difference between the MEEF of the simulation and an ideal or predetermined MEEF. Alternatively or additionally, the first cost components can include a cost term related to ILS determined based on the first simulated pattern. The cost term can reflect a difference between the ILS of the simulation and an ideal or predetermined ILS. Alternatively or additionally, the first cost components can include a cost term related to auxiliary patterns (e.g., SRAF). The cost term can reflect whether the auxiliary patterns are imaged on the photoresist and / or a significant degree of the imaging.

[0039] In some embodiments, the first cost components can be determined by synthesizing the various cost terms described above. For example, the first cost components can be determined by the following equation:

[0040] Anchor CF = f1 (F.C.) + f1 (DOF) + f1 (EL) + f1 (MEEF) + f1 (ILS) + f1 (SARF) (1)

[0041] where Anchor CFrepresents a first cost component, f1represents a cost term, F.C. represents a focus center related to the first simulated pattern, f1(F.C.) represents a cost term related thereto; DOF represents a depth of focus related to the first simulated pattern, f1(DOF) represents a cost term related thereto; EL represents an exposure latitude related to the first simulated pattern, f1(EL) represents a cost term related thereto; MEEF represents a mask error enhancement factor related to the first simulated pattern, f1(MEEF) represents a cost term related thereto; ILS represents an image log slope related to the first simulated pattern, f1(ILS) represents a cost term related thereto; and SARF represents a secondary assist ratio, f1(SARF) represents a cost term related thereto.

[0042] Taking ILS as an example, the cost term related thereto can be calculated by the following formula:

[0043]

[0044] wherein W1represents the first simulated pattern, n is a direction along which the slope is measured, T ILS represents an ideal value or a predetermined value of ILS. It should be understood that the calculation of the cost term related to ILS shown in formula (2) is merely exemplary and is not intended to limit the scope of the present disclosure. In embodiments of the present disclosure, any suitable manner can be employed to calculate the cost term related to ILS. It should also be understood that other cost terms can be calculated in any suitable manner.

[0045] In a conventional scheme, only the focus center at a nominal exposure dose (i.e., the center of DOF) is considered for a single pattern. In such embodiments, by comprehensively considering a plurality of cost terms, the pros and cons of process parameters can be comprehensively considered, which helps to find the target process parameters.

[0046] In some embodiments, in addition to forming the first simulated pattern using the test pattern 102, additional patterns can also be generated by changing the test pattern 102, and the cost components for forming the additional patterns are taken into account when determining the first imaging cost. Specifically, the electronic device 101 can generate additional patterns by changing the test pattern 102. The additional patterns can be obtained by changing certain dimensions in the test pattern 102. For example, the additional patterns can be generated by appropriately increasing or decreasing the pitch of the rectangle 1021 in the example test pattern 102 shown in FIG. 1. Figure 1 Alternatively or additionally, the additional patterns can be generated by appropriately increasing or decreasing the CD of the rectangle 1021.

[0047] Next, the electronic device 101 determines a simulated pattern, also referred to as a third simulated pattern, that is formed by lithography with the additional pattern. It should be understood that the first simulated pattern and the third simulated pattern are formed under the same process conditions. In such embodiments, the electronic device 101 can determine the first imaging cost based on the first cost component described above and a cost component related to the third simulated pattern, also referred to as a second cost component.

[0048] In particular, the electronic device 101 can determine the first imaging cost by combining the first cost component and the second cost component. For example, the first cost component can be determined by one or more cost terms described above.

[0049] Similar to the first cost component, the second cost component can include one or more cost terms. For example, the second cost component can include a cost term determined based on a dimension associated with the third simulated pattern. The cost term can reflect a difference between the simulated dimension and a target dimension. Alternatively or additionally, the second cost component can include a cost term determined based on a DOF associated with the third simulated pattern. The cost term can reflect a deviation of a depth of focus for forming the third simulated pattern from an ideal or predetermined depth of focus. The second cost component can include a cost term determined based on an EL associated with the third simulated pattern. The cost term can reflect a deviation of an exposure latitude for forming the third simulated pattern from an ideal or predetermined exposure latitude. Alternatively or additionally, the second cost component can include a cost term related to a MEEF determined based on the third simulated pattern. The cost term can reflect a difference between the simulated MEEF and an ideal or predetermined MEEF. Alternatively or additionally, the second cost component can include a cost term related to an ILS determined based on the third simulated pattern. The cost term can reflect a difference between the simulated ILS and an ideal or predetermined ILS. Alternatively or additionally, the second cost component can include a cost term related to an auxiliary pattern (e.g., SRAF). The cost term can reflect whether the auxiliary pattern is imaged on the photoresist and / or a significant degree of the imaging.

[0050] In some embodiments, the second cost component can be determined by synthesizing the various cost terms described above. For example, the second cost component can be determined by the following equation:

[0051] Other CF = f2(DOF) + f2(EL) + f2(MEEF) + f2(ILS) + f2(SARF) (3)

[0052] where Other CFrepresents a second cost component, DOF represents a depth of focus associated with the third simulation pattern, f2(DOF) represents a cost term associated therewith; EL represents an exposure latitude associated with the third simulation pattern, f2(EL) represents a cost term associated therewith; MEEF represents a mask error enhancement factor determined based on the third simulation pattern, f2(MEEF) represents a cost term associated therewith; ILS represents an image log slope determined based on the third simulation pattern, f2(ILS) represents a cost term associated therewith; and SARF represents a secondary assist feature, f2(SARF) represents a cost term associated therewith. In the second cost component, the focus center is not considered, as the focus center of the additional pattern is usually different from that of the test pattern, as compared to the first cost component.

[0053] Continuing with ILS as an example, the cost term associated therewith can be calculated by the following equation:

[0054]

[0055] where W2 represents the third simulation pattern, n is a direction along which the slope is measured, T ILS represents an ideal or predetermined value of ILS. It should be understood that the calculation of the cost term associated with ILS as shown in equation (3) is exemplary only, and is not intended to limit the scope of the present disclosure. In embodiments of the present disclosure, the cost term associated with ILS can be calculated in any suitable manner. It should also be understood that the other cost terms can be calculated in any suitable manner.

[0056] The first cost component and the second cost component can be determined in the manner described above. The first cost component and the second cost component can be assigned different weights according to different situations, so as to make the determined first imaging cost more accurate. Specifically, when combining the first cost component and the second cost component into the first imaging cost, the electronic device 101 can assign a first weight and a second weight to the test pattern and the additional pattern, respectively. In some embodiments, the first weight can be greater than the second weight. Next, the electronic device 101 weights the first cost component and the second cost component according to the first weight and the second weight, respectively, to thereby determine the first imaging cost.

[0057] By taking into account the additional pattern, on the one hand, ILS / MEEF can be ensured to be controlled within the optical process window, and on the other hand, imaging at different heights (e.g., along the z-axis) of the photoresist can have the same or similar process window center. For example, imaging at the bottom surface and the top surface of the photoresist has the same or similar process window center.

[0058] Continuing with reference to Figure 2At block 240, the electronic device 101 determines a target process parameter set based on the first imaging cost. The target process parameter set can include one or more process parameters for a new process node. For example, the target process parameter set can include a new process window or a portion thereof (such as a number of points within the process window). The first simulated pattern is formed under a certain process condition. In some embodiments, if the first imaging cost is small enough, e.g., less than a threshold cost, the process parameter corresponding to the process condition under which the first simulated pattern is formed can be determined as a target process parameter in the target process parameter set.

[0059] In some embodiments, the first simulated pattern is formed under an initial process condition, e.g., a reference process condition described in one or more of the initial process conditions 4031. In such embodiments, the target process parameter set can be determined recursively starting from the first imaging cost and the initial process condition. Specifically, the first electronic device 101 can determine at least one candidate process condition based on the first imaging cost and the initial process condition. Then the target process parameter in the target process parameter set is determined based on the at least one candidate process condition. Figure 4

[0060] Figure 5 A flowchart of an example process 500 of determining at least one candidate process condition according to embodiments of the present disclosure is shown. At block 510, the electronic device 101 determines a changed process condition based on the first imaging cost as a reference imaging cost and the initial process condition as a process condition change starting point. In some embodiments, the initial process condition can be changed randomly as the changed process condition.

[0061] In some embodiments, a direction of process condition change can be determined based on the sizes associated with the plurality of candidate patterns mentioned above, and the changed process condition can be determined by changing the initial process condition in the determined direction. As mentioned above, a plurality of candidate patterns formed under a plurality of initial process conditions can be determined through photolithography process simulation. The associated sizes mentioned above are determined for these candidate patterns respectively, and the closer the size is to the target size, the closer the corresponding initial process condition is to a process that is more optimized for the new process node. Then the direction towards such initial process condition can be the direction of process condition change.

[0062] Reference is made to Figure 4 ​For example, assume that the candidate pattern corresponding to the one or more initial process conditions in the lower right corner of the reference process window 103 has a size closer to the target size than the candidate pattern corresponding to the upper left corner of the reference process window 103. In this case, the process condition 4041 can be determined as the changed process condition. Alternatively, the process window can be moved towards the lower right corner of the reference process window 103, and the changed process condition can be selected within the moved process window. In this embodiment, the process condition is changed based on the sizes of the plurality of candidate patterns, which facilitates efficiently locating the process parameters optimized for the new process node.

[0063] Continuing with the process 500, at block 520, the electronic device 101 determines a new simulated pattern formed by the test pattern 102 under the changed process condition through the lithography imaging simulation. For example, the pattern formed on a certain plane of the photoresist can be simulated, which is the same plane as that of the first simulated pattern. At block 530, a new imaging cost related to at least the formation of the new simulated pattern is determined. The determination of the new imaging cost is similar to the determination of the first imaging cost described above, and thus will not be repeated.

[0064] At block 540, it is determined whether the new imaging cost is less than the reference imaging cost. If the new imaging cost is not less than the reference imaging cost, it means that the changed process condition is not optimized compared to the changed process condition. In this case, the process 500 can be ended or can return to block 510 to re-determine the direction of the process condition change.

[0065] If the new imaging cost is less than the reference imaging cost, it means that the changed process condition is optimized compared to the changed process condition. Accordingly, the process 500 proceeds to block 550. At block 550, the electronic device 101 determines the changed process condition as the candidate process condition. Then, at block 560, the electronic device 101 takes the new imaging cost as the reference imaging cost, and takes the changed process condition as the new process condition change starting point to re-determine the changed process condition. By repeatedly performing the steps in blocks 520-560 described above, the process condition with a small imaging cost, e.g., the process condition with the minimum imaging cost, is finally determined iteratively. The process parameters corresponding to these process conditions can be determined as the target process parameters in the target process parameter set.

[0066] For example, a plurality of new imaging costs are determined through the steps shown in block 530 under a plurality of changed process conditions. For example, if it is found by studying the new imaging costs that increasing the focus value and increasing the exposure dose can obtain a smaller imaging cost, and decreasing the focus value and decreasing the exposure dose can obtain a larger determined new imaging cost. According to this rule, the process parameters can be adjusted in the direction of increasing the focus value and increasing the exposure dose in the subsequent iteration, and the target process parameters with the minimum imaging cost are finally obtained.

[0067] In a conventional measurement data based approach, the measurement data comes from the measurement of a single height plane of the photoresist, and cannot reflect the imaging quality on different height planes. Considering only a single photoresist height, it is easy to cause imaging quality and continuity problems, such as photoresist top surface loss, bottom surface residue, etc.

[0068] In some embodiments of the present disclosure, multiple planes of different heights of the photoresist can be considered in determining the target set of process parameters. In particular, the surfaces (e.g., top surface and bottom surface) of the photoresist are places where imaging quality is prone to be problematic. Therefore, in some embodiments, the patterns of the surfaces of the photoresist can be taken into account when determining the target set of process parameters. For example, a cost component related to the patterns formed on the surfaces of the photoresist can be added in the first imaging cost.

[0069] Alternatively or additionally, in some embodiments, it can be checked whether the patterns formed on the surfaces of the photoresist have defects. Specifically, the electronic device 101 can determine, for a given process condition (e.g., each of the candidate process conditions) of the at least one candidate process condition, a simulated pattern (hereinafter referred to as a second simulated pattern) formed on the surfaces of the photoresist by the test pattern 102 under the given process condition. The surfaces of the photoresist can include the top surface and the bottom surface. The electronic device 101 can determine whether the second simulated pattern has defects. Here, the defects can refer to predetermined types of defects prone to occur on the surfaces, such as photoresist lost defects of the photoresist top surface and / or photoresist scum defects of the photoresist bottom surface. The detection of such defects can be performed, for example, by comparing the difference between the shape of the simulated pattern and the shape of the test pattern. If the second simulated pattern does not have such defects, it means that the given process condition is optimized. Accordingly, the process parameters defining the given process condition described above can be determined as the target process parameters. In this way, by extrapolating the defect check to the top surface and the bottom surface of the photoresist, a higher imaging quality and continuity along the photoresist profile can be achieved, thereby preventing photoresist lost defects and photoresist scum defects from occurring in subsequent photolithography processes and thus improving the photolithography quality.

[0070] The above describes the process of determining the target set of process parameters from the reference process window. In this way, the process parameters of the new process node can be efficiently determined. As mentioned above, in some embodiments, the target set of process parameters can include a new process window or at least the center of a new process window. Accordingly, the focus center can be determined. After the focus center is determined, the plane in the photoresist corresponding to the focus center can be determined.

[0071] In the lithography imaging simulation described above, the chemical reaction of photoresist is not considered. Therefore, the process parameters (e.g., focus value center or exposure dose center) determined by this way simulate the process condition when the best aerial image is projected into the photoresist but the latent image has not yet appeared. The plane in the photoresist corresponding to the center of the process window can be considered as an optical quality-oriented image plane, and can be used to establish optical models under different process conditions for different purposes, such as for hot spot detection. This optical quality-oriented image plane can be the same as or different from the metrology-oriented image plane determined by measurement data. In other words, the best image of interest is the imaging after the aerial imaging propagates to the photoresist but before any chemical reaction occurs.

[0072] Figure 6 A block diagram illustrating an electronic device 600 in which one or more embodiments of the disclosure can be implemented is shown. It should be understood that Figure 6 The electronic device 600 shown is merely exemplary and should not be construed as limiting the functionality and scope of the embodiments described herein. Figure 6 The electronic device 600 shown can be used to implement Figure 1 the electronic device 101.

[0073] As Figure 6 shown, the electronic device 600 is in the form of a general electronic device. The components of the electronic device 600 can include, but are not limited to, one or more processors or processing units 610, memory 620, storage 630, one or more communication units 640, one or more input devices 650, and one or more output devices 660. The processing unit 610 can be an actual or virtual processor and is capable of executing various processing according to programs stored in the memory 620. In a multi-processor system, multiple processing units execute computer-executable instructions in parallel to improve the parallel processing capability of the electronic device 600.

[0074] The electronic device 600 typically includes a plurality of computer storage media. Such media can be any available media that is accessible by the electronic device 600 and includes both volatile and nonvolatile media, removable and non-removable media. The memory 620 can be volatile (such as register, cache, RAM), non-volatile (such as ROM, EEPROM, flash memory), or some combination of the two. The storage device 630 can be a removable or non-removable media, and can include machine-readable media, such as flash drives, magnetic disks, or any other media that can be used to store information and / or data (e.g., training data for training) and that can be accessed by the electronic device 600.

[0075] The electronic device 600 can further include additional removable / non-removable, volatile / non-volatile storage media. Although not shown in Figure 6 FIG. 6, a disk drive for reading from or writing to a removable, non- volatile magnetic disk (e.g., a "floppy disk"), and an optical disk drive for reading from or writing to a removable, non-volatile optical disk (e.g., a CD-ROM) can be provided. In such instances, each drive can be connected to the bus (not shown) by one or more data media interfaces. The memory 620 can include a computer program product 625 having one or more program modules configured to carry out the various methods or actions of the various embodiments of the present disclosure.

[0076] The communication unit 640 enables communications with other electronic devices over a communication medium. Additionally, the functionality of the components of the electronic device 600 can be implemented in a single computing cluster or a plurality of computer machines that are capable of communicating with one another over a communication connection. As such, the electronic device 600 can operate in a networked environment using logical connections to one or more other servers, network personal computers (PCs), or another network nodes in the networking environment.

[0077] The input device 650 can be one or more input devices, such as a mouse, a keyboard, a trackball, etc. The output device 660 can be one or more output devices, such as a display, a speaker, a printer, etc. The electronic device 600 can also communicate with one or more external devices (not shown) such as a storage device, a display device, etc. through the communication unit 640, as needed, devices that enable a user to interact with the electronic device 600, or any devices (e.g., a network card, a modem, etc.) that enable the electronic device 600 to communicate with one or more other electronic devices. Such communication can be carried out via an input / output (I / O) interface (not shown).

[0078] According to an example implementation of the present disclosure, a computer readable storage medium is provided having computer executable instructions stored thereon, where the computer executable instructions are executed by a processor to implement the method described above. According to an example implementation of the present disclosure, a computer program product is also provided that is tangibly stored on a non-transitory computer readable medium and includes computer executable instructions, where the computer executable instructions are executed by a processor to implement the method described above.

[0079] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0080] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0081] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0082] The computer program product of the second implementation can include a computer readable storage medium. The computer readable storage medium can include instructions. The instructions can include one or both of: instructions for causing a computer to enable a user equipment device to receive a configuration message from a base station, the configuration message comprising a configuration of a plurality of search space sets for a plurality of downlink control channel candidates; and instructions for causing a computer to enable a user equipment device to monitor the plurality of downlink control channel candidates in accordance with the configuration of the plurality of search space sets.

[0083] Various implementations of the disclosure have been described in detail above. The foregoing description is exemplary and explanatory only, and is not intended to be exhaustive or to limit various implementations of the disclosure to the precise forms disclosed. Many modifications and variations are possible in light of the above teachings without departing from the scope and spirit of the disclosure. It is intended that the scope of the disclosure be limited only by the claims and the equivalents thereof. The use of the terms "including," "containing," "comprising," "having," "in involving," "portions," "elements," "components," "steps," "phases," "processes," "operations," "steps," "stages," "procedures," "methods," "mechanisms," "devices," "systems," "apparatuses," "units," "means," "units," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems," "apparatuses," "units," "means," "devices," "systems

Claims

1. A method relating to process parameters, characterized by, Comprising: obtaining a test pattern and a reference process window for the test pattern, the reference process window indicating a range of one or more process parameters, and the reference process window being used for a first semiconductor process; determining, based on the reference process window, a first simulated pattern formed by lithography using the test pattern; determining a first imaging cost related to at least forming the first simulated pattern; and determining, based on the first imaging cost, a target set of process parameters, the target set of process parameters being used for a second semiconductor process different from the first semiconductor process.

2. The method of claim 1, wherein, Determining, based on the reference process window, a first simulated pattern formed by lithography using the test pattern comprises: determining, based on the reference process window, a plurality of initial process conditions, each initial process condition of the plurality of initial process conditions being defined by a process parameter within the reference process window; performing, for each initial process condition of the plurality of initial process conditions, a lithography imaging simulation to generate a candidate pattern, each candidate pattern being formed by the test pattern under one initial process condition; and determining, based on the plurality of candidate patterns, the first simulated pattern.

3. The method of claim 2, wherein, Determining, based on the plurality of candidate patterns, the first simulated pattern comprises: determining, for each candidate pattern, a difference between a dimension associated with the candidate pattern and a target dimension; and in response to the difference being less than a threshold, determining the candidate pattern as the first simulated pattern.

4. The method according to any one of claims 1 to 3, characterized in that, Determining, based on the first imaging cost, a target set of process parameters comprises: determining, based on the first imaging cost and an initial process condition, at least one candidate process condition, the initial process condition being defined by a process parameter within the reference process window, and the first simulated pattern being formed by the test pattern under the initial process condition; and determining, based on the at least one candidate process condition, a target process parameter of the target set of process parameters.

5. The method of claim 4, wherein, Determining the at least one candidate process condition comprises: S501, taking the first imaging cost as a reference imaging cost, and taking the initial process condition as a process condition change starting point, to determine a changed process condition; repeating steps S502 to S505 to obtain a plurality of candidate process conditions: S502, determining, by a lithography imaging simulation, a new simulated pattern formed by the test pattern under the changed process condition; S503, determining a new imaging cost related to at least forming the new simulated pattern; S504, in response to the new imaging cost being less than the reference imaging cost, determining the changed process condition as a candidate process condition; S505, taking the new imaging cost as the reference imaging cost, and taking the changed process condition as a new process condition change starting point, to re-determine a changed process condition.

6. The method of claim 4, wherein, Determining, based on the at least one candidate process condition, a target process parameter of the target set of process parameters comprises: determining, for a given process condition of the at least one candidate process condition, a second simulated pattern formed by the test pattern on a surface of a photoresist under the given process condition; and In response to the second simulated pattern not having a defect, determining a process parameter defining the given process condition as the target process parameter.

7. The method of claim 1, wherein, Further comprising: generating an additional pattern by changing the test pattern; determining a third simulated pattern formed by lithography using the additional pattern by lithography imaging simulation; and determining a first imaging cost related to at least forming the first simulated pattern comprises: determining a first cost component related to forming the first simulated pattern; determining a second cost component related to forming the third simulated pattern; and combining the first cost component and the second cost component into the first imaging cost.

8. The method of claim 7, wherein, combining the first cost component and the second cost component into the first imaging cost comprises: weighting the first cost component and the second cost component as the first imaging cost according to a first weight for the test pattern and a second weight for the additional pattern, wherein the first weight is greater than the second weight.

9. The method of claim 7, wherein, determining a first cost component related to forming the first simulated pattern comprises determining the first cost component based on at least one of: a size associated with the first simulated pattern, a focus center associated with the first simulated pattern, a focus depth associated with the first simulated pattern, an exposure latitude associated with the first simulated pattern, a mask error enhancement factor determined based on the first simulated pattern, an image log slope determined based on the first simulated pattern, an assist pattern used to assist imaging of the test pattern.

10. The method of claim 7, wherein, determining a second cost component related to forming the third simulated pattern comprises determining the second cost component based on at least one of: a size associated with the third simulated pattern, a focus depth associated with the third simulated pattern, an exposure latitude associated with the third simulated pattern, a mask error enhancement factor determined based on the third simulated pattern, an image log slope determined based on the third simulated pattern, an assist pattern used to assist imaging of the additional pattern.

11. An electronic device, comprising: comprising: at least one processing unit; and at least one memory coupled to the at least one processing unit and storing instructions for execution by the at least one processing unit, the instructions, when executed by the at least one processing unit, cause the electronic device to perform the method according to any one of claims 1-10.

12. A computer readable storage medium having stored thereon a computer program, characterized in that, The computer program is executable by a processor to implement the method according to any one of claims 1-10. The computer program is executable by a processor to implement the method according to any one of claims 1-10.

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