Layout structure and monitoring method for simultaneously monitoring critical dimension and etching roughness

Abstract

The application provides a layout structure for monitoring critical dimension and etching roughness simultaneously, comprising a plurality of measurement layout structures, wherein the first layout structure comprises a plurality of sequentially distributed core shaft patterns, which are used for defining core shaft structures on a first measurement area; the second layout structure comprises a first and a second isolation structure layout, and each of the first and the second isolation structure layout comprises a plurality of sequentially distributed single diffusion isolation patterns; the single diffusion isolation patterns in the first isolation structure layout sequentially cross part or all of the core shaft patterns, and are used for defining forming positions of single diffusion isolation structures on the first measurement area; the single diffusion isolation patterns in the second isolation structure layout are sequentially distributed on a side away from the core shaft patterns, and are used for defining forming positions of single diffusion isolation structures on a second measurement area. The application can be used for monitoring critical dimension of actually cut semiconductor structures and etching roughness of trenches, and cutting path area is saved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a layout structure and monitoring method for simultaneously monitoring critical dimensions and etching roughness. Background Technology

[0002] During the development of the 14nm FinFET (Fin Field-Effect Transistor) process, the following problems exist when dicing semiconductor structures: Because the active region of a FinFET differs from that of previous planar processes, simultaneously monitoring the critical dimensions and etching roughness of the diced layer cannot be achieved using a single strip-shaped critical dimension measurement pattern as in planar processes. Instead, two patterns need to be placed on the dicing chute; one with an underlying semiconductor structure, for example… Figure 1 The layout shown includes multiple mandrel patterns 101 arranged sequentially and single-diffusion barrier patterns 102 located on the mandrel patterns. The layout includes patterns with semiconductor structures to monitor the critical dimensions of the semiconductor structures during actual process fabrication; one underlying layer has no semiconductor structure, for example... Figure 2 The layout shown includes multiple sequentially distributed single-diffusion barrier patterns 103. Patterns without semiconductor structures are similar to those in planar processes and are used to monitor the etching roughness of the trenches. Because semiconductor structures are three-dimensional, taking the single-diffusion barrier structure as an example, if there is a semiconductor structure at the bottom layer, what we see after dicing are spaced-apart, cut semiconductor structures, making it impossible to measure the etching roughness of the trenches.

[0003] To address the aforementioned issues, a novel layout structure and monitoring method for simultaneously monitoring critical dimensions and etching roughness are required. Summary of the Invention

[0004] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a layout structure and monitoring method for simultaneously monitoring critical dimensions and etching roughness, in order to solve the problem in the prior art that because the semiconductor structure is three-dimensional, if there is a semiconductor structure at the bottom layer, what we see after cutting are spaced-out, cut semiconductor structures, making it impossible to measure the etching roughness of the trenches.

[0005] To achieve the above and other related objectives, the present invention provides a layout structure for simultaneously monitoring critical dimensions and etching roughness, comprising:

[0006] The measurement map includes first to third map structures; wherein...

[0007] The first layout structure includes a plurality of sequentially distributed mandrel patterns, which are used to define the mandrel structure on which the first measurement region is formed on the sacrificial layer;

[0008] The second layout structure includes first and second isolation structure layouts, each of which includes multiple sequentially distributed single-diffusion barrier patterns. The single-diffusion barrier patterns in the first isolation structure layout sequentially span part or all of the mandrel pattern, defining the formation position of the single-diffusion barrier structure in the first measurement area. The single-diffusion barrier patterns in the second isolation structure layout are sequentially distributed on the side away from the mandrel pattern, defining the formation position of the single-diffusion barrier structure in the second measurement area.

[0009] The third pattern structure is used to define the photoresist layer covering the second measurement region after the sacrificial layer is removed.

[0010] Preferably, the mandrel patterns are distributed at equal intervals.

[0011] Preferably, both the first and second isolation patterns include multiple stepped and equidistantly distributed single-diffusion isolation patterns, wherein one of the single-diffusion isolation patterns spans all the core patterns, and the lengths of the remaining isolation patterns decrease sequentially on at least one side.

[0012] Preferably, the first and second isolation structure layouts are symmetrical structures.

[0013] Preferably, the measurement pattern further includes a monitoring pad pattern.

[0014] Preferably, the first and second measurement areas are of equal size.

[0015] A method for simultaneously monitoring critical dimensions and etching roughness of a single-diffusion isolation structure includes:

[0016] Step 1: Provide a substrate, form a stack on the substrate, and form a sacrificial layer on the stack;

[0017] Step 2: Form a first photoresist layer on the sacrificial layer, then pattern the first photoresist layer such that the first photoresist layer on the second measurement area is retained, a portion of the first photoresist layer on the first measurement area is opened, exposing the sacrificial layer underneath, etching the exposed sacrificial layer to form the mandrel structure located on the first measurement area, and then removing the remaining first photoresist layer.

[0018] Step 3: Form sidewalls on both sides of the mandrel structure, and then remove the mandrel structure in the first measurement area and the sacrificial layer in the second measurement area;

[0019] Step 4: Form a second photoresist layer covering the first and second measurement areas. Then, use a photomask including the third layout structure to open the second photoresist layer, exposing the sidewalls and the stack below them in the first measurement area. Then, using the sidewalls as a mask, etch the stack in the first measurement area to form the semiconductor structure. Then, remove the second photoresist layer and the sidewalls, exposing the semiconductor structure in the first measurement area and the stack in the second measurement area.

[0020] Step 5: Etch the semiconductor structure in the first measurement region, the stack in the second measurement region and the substrate below it to form a groove, and then fill the groove with an isolation material layer.

[0021] Preferably, the substrate in step one is a silicon substrate.

[0022] Preferably, the stack in step one consists of a first oxide layer, a nitrided layer, and a second oxide layer stacked sequentially from bottom to top.

[0023] Preferably, the material of the sacrificial layer in step one is amorphous silicon.

[0024] Preferably, the sidewall material in step three is silicon dioxide or silicon nitride.

[0025] Preferably, the material of the single-diffusion barrier structure in step five is silicon dioxide.

[0026] Preferably, a monitoring pad structure located on one side of the mandrel structure is also formed on the stacked layer in step three.

[0027] As described above, the layout structure and monitoring method for simultaneously monitoring critical dimensions and etching roughness of the present invention have the following advantages:

[0028] Beneficial effects:

[0029] This invention forms a core pattern in one half of the area and leaves the other half unpatterned. A photomask is then used to protect the unpatterned area, preventing the formation of a semiconductor structure. After a single-diffusion isolation structure process, this method can be used to monitor the critical dimensions of the actual semiconductor structure being cut, as well as to monitor the etching roughness of the trenches, thus saving the area of ​​the cutting path. Attached Figure Description

[0030] Figure 1 The diagram shown is a schematic representation of a monitoring layout with an underlying semiconductor structure, representing existing technology.

[0031] Figure 2 The diagram shows a monitoring layout without a semiconductor structure at the bottom layer, as shown in existing technology.

[0032] Figure 3 The diagram shown is a schematic representation of the layout of this invention.

[0033] Figure 4 The diagram shown is a schematic representation of the monitoring method of the present invention.

[0034] Figure 5 The diagram shown is a schematic diagram of the mandrel formation structure of the present invention;

[0035] Figure 6 The diagram shown illustrates the formation of the semiconductor structure according to the present invention.

[0036] Figure 7 The diagram shown illustrates the formation of a single-diffusion barrier structure in a region without a semiconductor structure at the bottom layer, according to the present invention. Detailed Implementation

[0037] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0038] Please see Figure 3 This invention provides a layout structure for simultaneously monitoring critical dimensions and etching roughness, comprising:

[0039] The survey map includes the first to third map structures; among them,

[0040] The first layout structure includes a plurality of sequentially distributed mandrel patterns 201, which are used to define the mandrel structure formed in the first measurement region A1 on the sacrificial layer;

[0041] In an embodiment of the present invention, the mandrel patterns 201 are distributed at equal intervals in sequence.

[0042] The second layout structure includes first and second isolation structure layouts. Both the first and second isolation structure layouts include multiple sequentially distributed single-diffusion partition patterns. The single-diffusion partition patterns in the first isolation structure layout 202 sequentially span part or all of the mandrel pattern 201, and are used to define the formation position of the single-diffusion partition structure on the first measurement area A1. The single-diffusion partition patterns in the second isolation structure layout 203 are sequentially distributed on the side away from the mandrel pattern 201, and are used to define the formation position of the single-diffusion partition structure on the second measurement area A2.

[0043] In embodiments of the present invention, the first and second isolation structure layouts are symmetrical structures.

[0044] In an embodiment of the present invention, both the first and second isolation patterns include a plurality of single-diffusion isolation patterns that are stepped and equidistantly distributed in sequence, wherein one single-diffusion isolation pattern spans all the core pattern 201, and the lengths of the remaining isolation patterns decrease sequentially on at least one side.

[0045] For example, one of the single diffusion barrier patterns spans all the mandrel patterns 201, and on both sides there are two sets of mandrel patterns 201 with decreasing lengths in a symmetrical manner.

[0046] The third layout structure 204 is used to define the photoresist layer covering the second measurement region A2 after the sacrificial layer is removed.

[0047] In an embodiment of the present invention, the first and second measurement areas are of equal size.

[0048] In embodiments of the present invention, the measurement pattern also includes a monitoring pad pattern.

[0049] Please see Figure 4 The present invention also provides a method for simultaneously monitoring the critical dimensions and etching roughness of a single-diffusion isolation structure corresponding to any of the above-described layout structures, comprising:

[0050] Step 1: Provide a substrate 301, form a stack 302 on the substrate 301, and form a sacrificial layer on the stack 302;

[0051] In an embodiment of the present invention, the substrate 301 in step one is a silicon substrate 301.

[0052] In an embodiment of the present invention, the stack 302 in step one is composed of a first oxide layer, a nitride layer and a second oxide layer stacked sequentially from bottom to top. The materials of the first and second oxide layers are usually silicon dioxide, and the material of the nitride layer is usually silicon nitride.

[0053] In an embodiment of the present invention, the material of the sacrificial layer in step one is amorphous silicon.

[0054] Step 2: A first photoresist layer is formed on the sacrificial layer. Then, the first photoresist layer is patterned, i.e., after exposing the first photoresist layer, the first photoresist layer on the second measurement area A2 is retained through steps such as vertical film preparation, development, and baking. Part of the first photoresist layer on the first measurement area A1 is opened, and the sacrificial layer below the first measurement area A1 is exposed. The exposed sacrificial layer is etched to form a core structure on the first measurement area A1. The etching method is usually dry etching. Since the first photoresist layer is retained on the second measurement area A2, the structure on the second measurement area A2 can be protected from forming a core structure when the sacrificial layer is etched. Then, the remaining first photoresist layer is removed using a stripping process.

[0055] Step 3: Form sidewalls 303 on both sides of the mandrel structure, and then remove the mandrel structure on the first measurement area and the sacrificial layer on the second measurement area;

[0056] In an embodiment of the present invention, the material of the sidewall 303 in step three is silicon dioxide or silicon nitride, and its removal method is usually wet etching.

[0057] In an embodiment of the present invention, please refer to Figure 5 In step three, a monitoring pad structure 304 located on one side of the mandrel structure is also formed on the stack 302.

[0058] Step 4: Form a second photoresist layer covering the first and second measurement areas. Then, use a photomask including the third pattern structure 204 to open the second photoresist layer. After exposing the second photoresist layer, through steps such as vertical film preparation, development, and baking, expose the sidewall 303 and the stacked layer 302 below it in the first measurement area A1. The second photoresist layer on the second measurement area A2 is retained. Then, using the sidewall 303 as a mask, etch the stacked layer 302 in the first measurement area A1 to form a semiconductor structure 305. That is, a semiconductor structure 305 is formed on the first measurement area A1, but no semiconductor structure 305 is formed on the second measurement area A2. Part of the stacked layer 306 is retained on the second measurement area A2. Then, remove the second photoresist layer and the sidewall 303 to expose the semiconductor structure 305 in the first measurement area A1 and the stacked layer 302 in the second measurement area A2.

[0059] Step 5: Etch the semiconductor structure 305 in the first measurement region A1, the stacked layer 306 in the second measurement region A2, and the substrate 301 below it to form a groove, forming as shown in the figure. Figure 7 The structure shown is then filled with an isolation material layer in the groove, and a single diffusion barrier structure is formed in the groove on the substrate 301 through subsequent processes such as polishing.

[0060] In an embodiment of the present invention, the material of the single diffusion barrier structure in step five is silicon dioxide.

[0061] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0062] In summary, this invention forms a core pattern in one half of the area and leaves the other half unpatterned. A photomask is then used to protect the unpatterned area, preventing the formation of a semiconductor structure. After a single-diffusion isolation structure process, this can be used to monitor the critical dimensions of the actual diced semiconductor structure and the etching roughness of the trenches, saving dicing area. Therefore, this invention effectively overcomes the various shortcomings of existing technologies and has high industrial applicability.

[0063] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for simultaneously monitoring critical dimensions and etching roughness of a single-diffusion isolation structure, characterized in that: Step 1: Provide a substrate, form a stack on the substrate, and form a sacrificial layer on the stack; Step 2: A first photoresist layer is formed on the sacrificial layer. Then, the first photoresist layer is patterned using a photomask including a first layout structure, so that the first photoresist layer on the second measurement area is retained, and a portion of the first photoresist layer on the first measurement area is opened, exposing the sacrificial layer underneath. The exposed sacrificial layer is etched to form a mandrel structure located on the first measurement area. Then, the remaining first photoresist layer is removed. Step 3: Form sidewalls on both sides of the mandrel structure, and then remove the mandrel structure in the first measurement area and the sacrificial layer in the second measurement area; Step 4: Form a second photoresist layer covering the first and second measurement areas. Then, use a photomask including a third layout structure to open the second photoresist layer, exposing the sidewalls and the stack below them in the first measurement area. Then, using the sidewalls as a mask, etch the stack in the first measurement area to form a semiconductor structure. Then, remove the second photoresist layer and the sidewalls, exposing the semiconductor structure in the first measurement area and the stack in the second measurement area. Step 5: Using a second pattern structure, etch the semiconductor structure in the first measurement region, the stack in the second measurement region, and the substrate below it to form a groove. The second pattern structure includes first and second isolation structure patterns. Both the first and second isolation structure patterns include multiple sequentially distributed single-diffusion barrier patterns. The single-diffusion barrier patterns in the first isolation structure pattern sequentially span part or all of the core pattern, used to define the formation position of the single-diffusion barrier structure on the first measurement region. The single-diffusion barrier patterns in the second isolation structure pattern are sequentially distributed on the side away from the core pattern, used to define the formation position of the single-diffusion barrier structure on the second measurement region. Then, fill the groove with an isolation material layer.

2. The method for simultaneous monitoring of single diffusion isolation structure critical dimension and etch roughness of claim 1, wherein: The substrate mentioned in step one is a silicon substrate.

3. The method for simultaneous monitoring of single diffusion isolation structure critical dimension and etch roughness of claim 1, wherein: The stacked layers in step one consist of a first oxide layer, a nitrided layer, and a second oxide layer stacked sequentially from bottom to top.

4. The method for simultaneously monitoring critical dimensions and etching roughness of a single-diffusion isolation structure according to claim 1, characterized in that: The material of the sacrificial layer in step one is amorphous silicon.

5. The method for simultaneously monitoring critical dimensions and etching roughness of a single-diffusion isolation structure according to claim 1, characterized in that: The sidewall material in step three is silicon dioxide or silicon nitride.

6. The method for simultaneously monitoring critical dimensions and etching roughness of a single-diffusion isolation structure according to claim 1, characterized in that: The material of the single-diffusion barrier structure in step five is silicon dioxide.

7. The method for simultaneously monitoring critical dimensions and etching roughness of a single-diffusion isolation structure according to claim 1, characterized in that: In step three, a monitoring pad structure located on one side of the mandrel structure is also formed on the stack.

8. A layout structure applied to the method for simultaneously monitoring critical dimensions and etching roughness of a single-diffusion isolation structure as described in any one of claims 1 to 7, characterized in that, include: A measurement map, comprising a first map structure, a second map structure, and a third map structure; wherein... The first layout structure includes a plurality of sequentially distributed mandrel patterns, which are used to define the mandrel structure on which the first measurement region is formed on the sacrificial layer; The second layout structure includes first and second isolation structure layouts, each of which includes multiple sequentially distributed single-diffusion partition patterns. The single-diffusion partition patterns in the first isolation structure layout sequentially span part or all of the mandrel pattern, defining the formation position of the single-diffusion partition structure in the first measurement area. The single-diffusion partition patterns in the second isolation structure layout are sequentially distributed on the side away from the mandrel pattern, defining the formation position of the single-diffusion partition structure in the second measurement area. The third pattern structure is used to define the second photoresist layer covering the second measurement area after the sacrificial layer is removed.

9. The layout structure according to claim 8, characterized in that: The mandrel patterns are distributed at equal intervals in sequence.

10. The layout structure according to claim 8, characterized in that: Both the first and second isolation structure layouts include multiple single-diffusion partition patterns that are arranged in a stepped manner and are distributed at equal intervals. One of the single-diffusion partition patterns spans all the core patterns, and the lengths of the remaining single-diffusion partition patterns decrease sequentially on at least one side.

11. The layout structure according to claim 8, characterized in that: The first and second isolation structure layouts are symmetrical structures.

12. The layout structure according to claim 8, characterized in that: The measurement map also includes a monitoring pad graphic.

13. The layout structure according to claim 8, characterized in that: The first and second measurement areas are of equal size.

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