A hybrid cascade multi-terminal DC transmission line protection method based on voltage traveling wave phase difference

Abstract

The present invention relates to a hybrid cascade multi-terminal DC transmission line protection method based on voltage traveling wave phase difference, comprising: S1: determining the fault identification criteria inside and outside the zone; S12: establishing the fault start criteria; S13: establishing the fault pole selection criteria; S14: determining the protection scheme. The present invention uses the DC voltage change to form the protection start criteria to determine whether the fault occurs, uses the S transform to extract the specific frequency component of the line mode voltage to identify the fault inside and outside the zone, and uses the voltage change of the two poles to select the fault pole to form an overall protection scheme. The protection scheme proposed by the present invention can accurately identify the fault inside and outside the zone and reliably respond to high-resistance grounding faults. In addition, the protection only needs to transmit logic signals to both ends of the line, reducing the requirements for the communication channel. At the same time, the threshold value setting of the protection identification criterion has a clear theoretical basis without relying on a large number of simulation experiments.

Description

Technical Field

[0001] The present invention belongs to the technical field of power system protection and control, and in particular relates to a hybrid cascade multi-terminal direct current transmission line protection method based on voltage traveling wave phase difference. Background Art

[0002] Line commutated converter-based high voltage direct current (LCC-HVDC) transmission has been widely used due to its advantages of large transmission capacity and low power loss. However, it relies on the AC system, and AC system failures can easily cause DC side commutation failures.

[0003] Modular multilevel converters (MMCs), a type of voltage source converter (VSC), can effectively prevent DC commutation failures. Furthermore, MMC-based flexible DC transmission boasts strong controllability, low harmonic content, and power decoupling control, promising applications in renewable energy generation and asynchronous interconnection. A hybrid cascaded DC transmission system is a typical hybrid multi-terminal DC transmission system that combines the advantages of both LCC-HVDC and MMC-HVDC.

[0004] Hybrid cascaded DC transmission uses an LCC converter station on the sending end, and a cascade of LCC and MMC converter stations on the receiving end. This topology provides a more flexible transmission method, improving inverter-side AC system voltage stability and reducing the probability of DC commutation failure. It also enables power supply to multiple load centers, promoting energy consumption.

[0005] The reliability of DC line protection is a prerequisite for the safe operation of DC transmission systems. However, the topology and operation of hybrid multi-terminal HVDC transmission systems differ from those of traditional LCC-HVDC and VSC-HVDC systems, and the line fault characteristics are significantly different. Therefore, the line protection of traditional LCC-HVDC or VSC-HVDC systems may not be suitable for hybrid multi-terminal DC transmission systems. Research on high-performance hybrid multi-terminal DC transmission line protection is urgently needed.

[0006] HVDC line protection can be categorized as single-ended and dual-ended. Traveling wave protection, the primary line protection, distinguishes internal and external faults based on the change value and rate of change of the voltage traveling wave at one end of the line. It operates quickly, but its reliability is affected by transition resistance and noise. Some researchers have proposed single-ended line protection based on the high-frequency wavelet energy of the voltage reverse traveling wave. This approach has strong resistance to transition resistance, but the setting of the protection threshold relies on simulation. Other researchers have identified line faults based on single-ended voltage or current at a specific frequency. This approach is fast, but may not be sensitive enough to high-resistance grounding faults at the end of long lines.

[0007] Two-terminal protection utilizes electrical quantities at both ends of the line to identify faults. Some researchers have proposed a longitudinal protection based on wavelet energy relative entropy, but this approach is computationally intensive and lacks robustness. Others have proposed a protection based on currents at specific frequencies, which offers high selectivity but requires high synchronization of data at both ends of the line. Researchers have also proposed a two-terminal protection based on current mutation characteristics, which eliminates the need for synchronization but suffers from poor transient resistance.

[0008] In hybrid cascaded multi-terminal DC transmission systems, to disperse transmission power and reduce the requirements for MMC transmission capacity, the inverter-side low-voltage valve group often operates in parallel with three MMC converter stations. Consequently, three DC lines connect the high-voltage valve group LCC converter station and the low-voltage valve group MMC converter station. If a fault occurs in any of these three DC lines, accurate identification of the faulty line is essential. However, research on the protection of hybrid cascaded multi-terminal DC transmission lines is currently limited. Summary of the Invention

[0009] The present invention aims to overcome the shortcomings of the prior art by providing a hybrid cascade multi-terminal DC transmission line protection method based on voltage traveling wave phase difference. The method can accurately identify internal and external faults and reliably respond to high-resistance grounding faults. Furthermore, the method only requires the transmission of logic signals to both ends of the line, reducing the requirements for communication channels. The threshold value setting for the protection identification criterion has a clear theoretical basis, eliminating the need for extensive simulation experiments.

[0010] The present invention solves the technical problem by the following technical solutions:

[0011] A hybrid cascade multi-terminal DC transmission line protection method based on voltage traveling wave phase difference, characterized in that the method comprises the following steps:

[0012] S1: Determine the fault identification criteria inside and outside the zone;

[0013] The criterion for identifying faults inside and outside the zone is constructed as follows:

[0014]

[0015] Where S mh and Snh are the fault direction discrimination logic values ​​at the beginning and end of the line, as shown in the following formula:

[0016]

[0017]

[0018] in: To protect the set value;

[0019] and The voltage phase difference on both sides of the current limiting reactor installed at the beginning and end of the DC line is expressed as follows:

[0020]

[0021] Where h = 1, 2, 3, corresponding to DC lines l1 to l3 respectively; time t1 corresponds to the voltage traveling wave amplitude A u The maximum value of (t,f1) indicates the arrival of the fault voltage traveling wave;

[0022] When the absolute value of the voltage phase difference on both sides of the current limiting reactor is less than When the absolute value of the voltage phase difference on both sides of the current limiting reactor is greater than When , it is judged as a reverse fault, and the fault direction judgment logic value is 0;

[0023] S2: Establish fault start criteria;

[0024] During normal operation of a hybrid DC transmission line, the DC voltage is approximately constant. After a fault, the DC voltage suddenly changes. The improved voltage gradient method is used to construct the startup criterion. The improved voltage gradient method can accurately detect the first arrival time of the fault traveling wave, has smoothing and noise elimination capabilities, and can reliably reflect high-resistance grounding faults. The constructed protection startup criterion is as follows:

[0025]

[0026] Where, and are the voltage gradients at the beginning and end of the DC lines l1~l3, as shown in the following formula:

[0027]

[0028]

[0029] Where: u mhp (ki) and u mhp (k+i) are the measuring points m at the beginning of the line hpThe sampling values ​​of the DC voltage at different times before and after the current sampling point;

[0030] u nhp (ki) and u nhp (k+i) are the measuring points n at the end of the line hp The sampling values ​​of the DC voltage at different times before and after the current sampling point;

[0031] h = 1, 2, 3, corresponding to DC lines l1 to l3 respectively;

[0032] The setting value is the starting setting value. The setting value must be greater than the maximum value of the voltage gradient during normal operation and a certain margin should be considered.

[0033] S3: Establish fault selection criteria;

[0034] In a bipolar HVDC transmission system, for a single-pole ground fault, the voltage change of the fault pole is more obvious than that of the non-fault pole. For a bipolar short-circuit fault, the voltage changes of the two poles are similar. The voltage changes of the two poles are used to select the fault pole, as shown in the following formula:

[0035]

[0036] Where: Δu mhp and Δu' mhp The positive and negative DC line head end measuring points m hp The DC voltage fault component at the 1st position; h = 1, 2, 3, corresponding to DC lines l1 to l3 respectively;

[0037] j = 1, 2, ..., J, where J is the number of sampling points within 2 ms;

[0038] To avoid the impact of the DC control system after a fault, and considering that the MMC converter station is generally locked within 5ms after a fault occurs, the data window length is selected as 2ms;

[0039] The fault selection criterion is constructed as follows:

[0040]

[0041] Where Q set1 and Q set2 is the set value. Considering that the coupling coefficient of DC lines on the same pole is generally less than 0.5, Q set1 and Q set2 Set to 1.5 and 0.6 respectively;

[0042] S4: Determine the protection plan;

[0043] The DC voltage change is used to form the protection start-up criterion to determine whether a fault has occurred. The voltage is transformed into a pole mode. The S transformation is used to extract the specific frequency components of the line mode voltage to identify faults inside and outside the zone. The voltage change at both poles is used to select the fault pole to form an overall protection scheme.

[0044] Moreover, when the voltage frequency is greater than 1kHz, there is an obvious difference in the voltage phase difference on both sides of the current-limiting reactor during intra-zone faults and extra-zone faults. Considering that the high-frequency component decays quickly and has a high requirement for the sampling frequency, the frequency of the electrical quantity used in the protection criterion should not be too high, and the electrical quantity with a frequency of f1 = 3kHz is extracted to construct the protection.

[0045] Furthermore, discrete S-transform is used to extract the fault voltage traveling wave of a specific frequency.

[0046] Moreover, when the fault occurs within the zone, for either end of the line, when the frequency is high, the voltage phase difference on both sides of the current limiting reactor is approximately 0°; when the fault occurs outside the zone, for the end near the fault, when the frequency is high, the voltage phase difference on both sides of the current limiting reactor is approximately -90°, while for the end far from the fault, the voltage phase difference on both sides of the current limiting reactor is still approximately 0°, which will reduce the protection setting value. Set to

[0047] The advantages and beneficial effects of the present invention are:

[0048] 1. The protection identification criterion threshold value setting proposed in the present invention has a clear theoretical basis and can accurately identify DC line faults without relying on a large number of simulation experiments.

[0049] 2. The protection method proposed by the present invention has high sensitivity to high-resistance grounding faults and strong reliability.

[0050] 3. The protection method proposed by the present invention only needs to transmit logic signals to both ends of the line, and has low requirements on the communication channel.

[0051] 4. The protection method proposed in the present invention can accurately identify faults inside and outside the zone and reliably respond to high-resistance grounding faults. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 Schematic diagram of the hybrid cascaded multi-terminal DC transmission system structure;

[0053] Figure 2 This is the traveling wave fault analysis diagram of the line head end when the fault occurs within the area;

[0054] Figure 3 is the DC line mode wave impedance Z C1 Impedance-frequency characteristic curve;

[0055] Figure 4It is the equivalent circuit diagram of LCC converter;

[0056] Figure 5 It's Z eq Impedance-frequency characteristic curve;

[0057] Figure 6 This is the traveling wave fault analysis diagram at the end of the line when there is an internal fault;

[0058] Figure 7 It is the equivalent impedance diagram of MMC converter;

[0059] Figure 8 This is a traveling wave fault analysis diagram of line l1 near the fault end when the valve side of the current limiting reactor fails;

[0060] Figure 9 This is a traveling wave fault analysis diagram of the far fault end of line l1 when the valve side of the current limiting reactor fails;

[0061] Figure 10 This is the traveling wave fault analysis diagram of line l1 near the fault end when DC line l2 fails;

[0062] Figure 11 This is the traveling wave fault analysis diagram of the far fault end of line l1 when the DC line l2 fails;

[0063] Figure 12 This is the traveling wave fault analysis diagram of line l1 near the fault end when the busbar fails;

[0064] Figure 13 This is the traveling wave fault analysis diagram of the far fault end of line l1 when the busbar fails;

[0065] Figure 14 It is a flow chart of the protection method;

[0066] Figure 15 It is a DC line structure diagram;

[0067] Figure 16 This is the simulation result diagram when there is a fault in the DC line l1 area;

[0068] Figure 17 This is the simulation result diagram when there is a fault in the DC line l3 area;

[0069] Figure 18 This is the simulation result diagram when the valve side of the current limiting reactor fails;

[0070] Figure 19 This is the simulation result diagram when the DC line l2 fails;

[0071] Figure 20 This is the simulation result diagram when the DC line bus fails. DETAILED DESCRIPTION

[0072] The present invention will be further described in detail below through specific examples. The following examples are only illustrative and not restrictive, and the scope of protection of the present invention cannot be limited thereto.

[0073] Figure 1 The topology of a hybrid cascaded multi-terminal DC transmission system is presented. The sending end of a hybrid DC transmission system is typically located in energy-rich areas and utilizes LCC converters. The receiving end, located in areas with relatively concentrated electricity loads, consists of a cascaded high-voltage valve manifold (LCC) converter station and a low-voltage valve manifold (MMC) converter station. Due to land constraints, the LCC and MMC converter stations are constructed separately at the receiving end of the hybrid DC transmission system. An LCC converter station is constructed on the edge of an economically developed area at the receiving end to convert some DC power into AC power. The LCC and MMC converter stations are then connected via DC lines, allowing the remaining power to be transmitted to all corners of the developed region. Three MMC converter stations are often operated in parallel at the receiving end to distribute transmission power and reduce the transmission capacity requirements of the MMCs. This topology enables power to be fed into multiple load centers and leverages the high utilization and high transmission power of DC corridors.

[0074] like Figure 1 As shown in Figure 1, the sending-end LCC converter station and the receiving-end LCC converter station are connected via DC line l0. The receiving-end LCC converter station is connected to the MMC converter station via DC lines l1 to l3. Current-limiting reactors can suppress the rise of fault current and cooperate with DC circuit breakers to cut off the fault line. Therefore, it is recommended to configure current-limiting reactors at both ends of the DC line. Figure 1 As shown, L dc1 Indicates the current limiting reactor installed at both ends of the DC line l0, L dc Indicates the current limiting reactors installed at both ends of the DC lines l1 to l3. m1 to m6, n1 to n6, m 1p ~m 6p , n 1p ~n 6p = ( ) represents the measurement point. M1 and N1 represent the beginning and end of DC line l1, respectively. F0 to F7 represent fault points. F0 represents a fault on DC line l0, F1 to F3 represent faults on DC lines l1 to l3, respectively. F4 represents a DC bus fault, and F5 to F7 represent faults between the current-limiting reactors installed at the end of DC lines l1 to l3 and the MMC converter station, respectively.

[0075] Hybrid DC transmission system line faults are divided into single-pole grounding faults and double-pole short-circuit faults. Since the characteristics of double-pole short-circuit faults are similar to those of single-pole grounding faults, and due to the symmetry of the positive and negative poles, this paper takes the positive pole single-pole grounding fault as an example for detailed fault analysis. When a single-pole grounding fault occurs in DC line 10 ( Figure 1The sending-end discharge circuit and mechanism are similar to those of conventional LCC-HVDC. Due to the unidirectional conductivity of the thyristors, the energy stored in the receiving-end low-voltage valve group (MMC) submodule cannot feed current to the fault point via the high-voltage valve group (LCC). Conventional line protection applies to DC link 10, and DC link 10 does not require a DC circuit breaker.

[0076] When a single-pole ground fault occurs on DC line L1, L2 or L3 ( Figure 1 F1, F2 or F3 in the figure), the fault discharge mechanism analysis is similar. Here, the fault of DC line l1 is used as an example for explanation. After the F1 fault, not only does the MMC1 submodule capacitor discharge to the fault point, but the high-voltage valve group LCC and the other two parallel converter valves MMC2 and MMC3 will also inject fault current into the fault point. At this time, the rising speed of the fault current is much faster than that of traditional LCC-HVDC or VSC-HVDC. In addition, for faults occurring in DC lines l1, l2 or l3, because one side of the line is an LCC converter and the other side is an MMC converter, the fault analysis is more complicated. Compared with traditional LCC-HVDC and VSC-HVDC, there are significant differences in the line fault characteristics. Traditional LCC-HVDC or VSC-HVDC line protection may not be suitable for DC lines l1, l2 and l3. Therefore, the present invention mainly studies the line protection of DC lines l1, l2 and l3.

[0077] 1. Analysis of faults within the area:

[0078] Take the fault on DC line l1 as an example ( Figure 1 The fault characteristics of the line head end (i.e., F1 in the figure) are analyzed in detail, and the fault traveling wave propagation process is combined (only the initial fault traveling wave is considered, and the subsequent fault traveling wave reflected from the other end of the line is not considered for the time being). Figure 1 M1 side) Fault analysis equivalent diagram, such as Figure 2 As shown (it is stipulated that the direction from the busbar to the DC line is the positive direction of the current wave).

[0079] like Figure 2 As shown in Figure (a), after the DC line l1 fails, the voltage traveling wave propagates from the fault point to the line end. When it reaches the measuring point m1 at the beginning of the line, the fault voltage traveling wave encounters uneven wave impedance and is refracted and reflected. Figure 2 Middle,U m1 (s) and U m1p (s) are measuring points m1 and m 1p Line mode fault voltage component; I m1 (s), I m2 (s) and I m3 (s) are the line-mode fault current traveling waves flowing through DC lines l1, l2 and l3 respectively; Z C1is the DC line mode wave impedance; Z LCC Indicates the equivalent impedance of the LCC branch; U bm (s) is the voltage reverse traveling wave when the initial traveling wave at the fault point is transmitted through the line to the point m1 where the wave impedance is uneven, as shown in formula (1).

[0080] U bm (s)=U f1 (s)×A 1m (s) (1)

[0081] Where U f1 (s) is the fault traveling wave line mode component of the initial voltage at the fault point, as shown in formula (2). d is the rated voltage of the DC line; Z C0 is the ground mode wave impedance of the DC line; R f is the transition resistance. A 1m is the DC line mode transfer function, which can be expressed as formula (3).

[0082]

[0083] A 1m (s)=e -γ1(s)x (3)

[0084] Where γ1(s) is the line mode propagation coefficient of the DC line, x represents the distance between the fault point and the head end of the DC line l1, and the line transfer function includes information such as the attenuation, distortion, and delay of the line to the traveling wave.

[0085] like Figure 2 As shown in (b), after the DC line l1 fails, at the head end of the fault line l1, the voltage U on the side of the current limiting reactor m1 m1 (s) can be expressed as formula (4).

[0086] U m1 (s)=-I m1 (s)×(sL dc +Z eq (s)) (4)

[0087] Among them, I m1 (s) is shown in formula (5).

[0088]

[0089] Where Z eq (s) is the parallel connection of the equivalent impedances of the DC lines l2, l3 and the LCC branch, as shown in Equation (6).

[0090] Z eq (s)=(sL dc +Z C1 ) / / (sLdc +Z C1 ) / / Z LCC (s) (6)

[0091] Current limiting reactor m 1p Side voltage U m1p (s) is shown in formula (7).

[0092] U m1p (s)=-I m1 (s)×Z eq (s) (7)

[0093] DC line mode wave impedance Z C1 As shown in formula (8).

[0094]

[0095] Where r, l, g and c are the line mode resistance, inductance, conductance and capacitance per unit length of the DC line respectively, and ω is the angular frequency. The present invention adopts a frequency-variable parameter DC line model. The specific line parameters and tower structure are shown in Figure 15 , Figure 3 The line mode wave impedance Z is given C1 frequency characteristics.

[0096] Depend on Figure 3 It can be seen that when the frequency is low (f<100Hz), the DC line mode wave impedance Z C1 The amplitude and phase angle change significantly with frequency f; in the high frequency band (f>100Hz), Z C1 The amplitude is basically stable at 245Ω, and the phase angle is basically stable at 0°, that is, when the frequency is high, the line mode wave impedance Z C1 It can be equivalent to a pure resistor.

[0097] In order to explore the relationship between the voltages on both sides of the current limiting reactor, it is necessary to study the equivalent impedance Z shown in formula (6): eq Where Z LCC It represents the equivalent impedance of the LCC branch viewed from the MMC side, which is determined by the equivalent impedance Z of the LCC converter. con , the current limiting reactor L installed on the DC line end of the LCC side dc1 and the DC line wave impedance in series. Under normal conditions, the 12-pulse LCC converter operates in the "4-5" operating condition. When only the initial traveling wave of the fault is analyzed, the converter path is as follows Figure 4 During the non-commutation period, four valves in the upper and lower 6-pulse bridges are turned on, as shown by the red long dashed line; when one of the bridges is commutating, five valves are turned on, as shown by the blue dotted line. Figure 4 Middle Z s Represents the equivalent internal impedance of the AC system, Z Tis the equivalent impedance of the converter transformer, Z acf Indicates the equivalent impedance of the AC filter.

[0098] according to Figure 4 In the circuit shown, the LCC converter equivalent impedance Z con It can be expressed as formula (9).

[0099]

[0100] Where μ is the commutation angle, which is generally less than 30°; π / 6 is a pulsation period of a 12-pulse converter; Z con1 and Z con2 are the equivalent impedances of the LCC converter during the non-commutation period and the commutation period, respectively, as shown in Equations (10) and (11). When the frequency is high (f>1kHz), the equivalent impedance Z of the LCC converter is con It can be equivalent to an inductor.

[0101] Z con1 (s)=4(Z T (s)+Z s (s) / / Z acf (s)) (10)

[0102] Z con2 (s)=3.5(Z T (s)+Z s (s) / / Z acf (s)) (11)

[0103] Figure 5 Given Z eq The inductance L of the current limiting reactor dc The corresponding impedance-frequency characteristic curve (L dc Take 300mH, 200mH, 100mH, 75mH and 50mH respectively). Figure 5 It can be seen that when the frequency is high, Z eq The amplitude increases linearly with the frequency, and the phase is basically stable at 90°, that is, when the frequency is high, Z eq It can be equivalent to an inductor element.

[0104] Referring to the existing DC transmission project, the DC line mode wave impedance Z C1 When the frequency is high, it is generally stable at 200~500Ω. The inductance of the current limiting reactor L dc Generally, it is 50~400mH. When the frequency f is high, 2πfL dc >>Z C1 The present invention will limit the current reactor inductance L dc Assuming 200mH, when the frequency is 3kHz, 2πfL dc≈20×Z C1 In addition, combined with the above inference, when the frequency is high (f>1kHz), the equivalent impedance Z of the LCC converter con It can be equivalent to an inductor, and it can be theoretically deduced that when the frequency is high, Z eq It can be approximated as an inductor.

[0105] Therefore, by observing equations (4) and (7), it can be deduced that when the DC line l1 fails, at the head end of line l1, when the frequency is high, the voltage U m1 Phase lags behind current I m1 About 90°, voltage U m1p Lagging behind current I m1 About 90°, it can be deduced that the voltage phase difference on both sides of the current limiting reactor is approximately 0°, that is, U m1 and U m1p Satisfies formula (12).

[0106]

[0107] Where, and The fault voltage U m1 and U m1p phase.

[0108] Similarly, the line end (i.e. Figure 1 N1 side) traveling wave fault analysis equivalent diagram, such as Figure 6 After a fault occurs on the DC line l1, the initial traveling wave at the fault point propagates toward the line end. When it reaches the measuring point n1 at the end of the line, the fault voltage traveling wave encounters uneven wave impedance and is refracted and reflected. Figure 6 Middle,U n1 (s) and U n1p (s) are measuring points n1 and n 1p Line mode fault voltage traveling wave; I n1 (s) is the line mode fault current traveling wave; Z MMC1 is the equivalent impedance of the converter MMC1; U bn (s) is the voltage reverse traveling wave when the initial traveling wave at the fault point is transmitted through the line to the location n1 where the wave impedance is uneven, as shown in formula (13).

[0109] U bn (s)=U f1 (s)×A 1n (s) (13)

[0110] Where A 1n is the DC line mode transfer function, as shown in formula (14).

[0111]

[0112] Where, l line1 Indicates the total length of line l1.

[0113] like Figure 6 As shown in (b), after the DC line l1 fails, at the end of line l1, the voltage U on the side of the current limiting reactor n1 n1 (s) can be expressed as formula (15).

[0114] U n1 (s)=-I n1 (s)×(sL dc +Z MMC1 (s)+sL dc ) (15)

[0115] Current limiting reactor n 1p Side voltage U n1p (s) is shown in formula (16).

[0116] U n1p (s)=-I n1 (s)×(Z MMC1 (s)+sL dc ) (16)

[0117] When a DC line fault occurs, the fault current flowing through the MMC converter rises rapidly. To avoid overcurrent damage to the MMC, the DC protection must be able to detect the fault in a relatively short time. Therefore, in fault transient analysis and related protection research, only the phase before the MMC is locked out is considered (MMC generally locks out 5ms after the fault occurs). This phase is mainly based on the discharge of the submodule capacitors. During this phase, the MMC converter can be equivalent to an RLC series element, such as Figure 7 As shown. Taking the MMC1 converter as an example, its equivalent impedance Z MMC1 It can be expressed as formula (17).

[0118] Z MMC1 (s)=sL MMC1 +R MMC1 +1 / (sC MMC1 ) (17)

[0119] Where, L MMC1 , R MMC1 and C MMC1 are the equivalent inductance, resistance and capacitance of the MMC1 converter, respectively, as shown in formula (18).

[0120]

[0121] Where, L arm , R arm and Csub are the bridge arm inductance, bridge arm resistance and submodule capacitance respectively; N represents the number of submodules put into use in each phase.

[0122] Referring to the existing MMC-HVDC transmission project, the bridge arm inductance L arm Generally it is 50~300mH, so the equivalent inductance L of MMC is MMC Generally 33.33~200mH; bridge arm resistance R arm It is generally 0.3Ω, so the equivalent resistance of MMC is R MMC Generally, it is 0.2Ω; the number of submodules N is usually 100 to 300, and the submodule capacitance C sub The value is generally 10~20mF, so the equivalent capacitance C of MMC MMC It is generally 0.1 to 0.6 mF. Combining formula (17), it can be deduced that when the frequency f satisfies formula (19), the inductive impedance of the MMC is greater than the capacitive impedance, that is, ωL MMC >1 / (ωC MMC ). The equivalent resistance of MMC is generally small, so it can be deduced that at high frequencies, MMC can be equivalent to an inductor L MMC .

[0123]

[0124] Therefore, when a fault occurs in the DC line l1, at the end of the line l1, when the frequency is high, the voltage U n1 Phase lags behind current I n1 About 90°, voltage U n1p Lagging behind current I n1 About 90°, it can be deduced that the voltage phase difference on both sides of the current limiting reactor is approximately 0°, that is, U n1 and U n1p Satisfies formula (20).

[0125]

[0126] Where, and The fault voltage U n1 and U n1p phase.

[0127] The fault characteristic analysis of the DC line L2 or line L3 is similar to the fault characteristic analysis of the DC line L1, so it will not be described in detail.

[0128] In summary, when a fault occurs in the DC line area, for either end of the line, when the frequency is high, the voltage phase difference on both sides of the current limiting reactor is approximately 0°.

[0129] 2. Out-of-area fault analysis:

[0130] 2.1) Analysis of DC current limiting reactor valve side fault characteristics:

[0131] Take DC line l1 as an example to conduct detailed fault analysis. When a fault occurs between the current limiting reactor at the end of the line and the MMC1 converter station (such as Figure 1 For DC line l1, it is an out-of-zone fault. Figure 8 The DC line l1 near the fault end (i.e. Figure 1 (N1 side) Fault analysis equivalent diagram.

[0132] Figure 8 Middle,U f1 (s) is the line mode component of the initial voltage fault traveling wave at the fault point, as shown in formula (21).

[0133]

[0134] Where Z e1 (s) and Z e0 (s) are as in formula (22) and formula (23) respectively.

[0135] Z e1 (s)=(sL dc +Z C1 ) / / (Z MMC1 (s)+sL dc ) (twenty two)

[0136] Z e0 (s)=(sL dc +Z C0 ) / / (Z MMC1 (s)+sL dc ) (twenty three)

[0137] like Figure 8 (b) When there is an out-of-zone fault, for the DC line l1 near the fault end, the voltage U on the side of the current limiting reactor n1 is n1 (s) is shown in formula (24).

[0138] U n1 (s)=I n1 (s)×Z C1 (twenty four)

[0139] Current limiting reactor n 1p Side voltage U n1p (s) is shown in formula (25).

[0140] U n1p (s)=I n1 (s)×(Z C1 +sL dc) (25)

[0141] From the above inference, when the frequency is high, the DC line mode wave impedance Z C1 It can be equivalent to a pure resistor, and its resistance is much smaller than the impedance value of the current limiting reactor. It can be deduced that when there is an out-of-zone fault, for a certain high-frequency component, the voltage U n1 With current I n1 The phase is the same, the voltage U n1p Leading current I n1 It is about 90°, and it can be deduced that when there is an out-of-zone fault, for the end near the fault, the voltage phase difference on both sides of the current limiting reactor is approximately -90°, that is, U n1 and U n1p Satisfies formula (26).

[0142]

[0143] For the far fault end (i.e. Figure 1 The traveling wave fault analysis is similar to the fault analysis of the fault in the zone. Figure 9 The fault analysis equivalent diagram for this fault scenario is given.

[0144] Similarly, by Figure 9 It can be obtained that, when there is an out-of-zone fault, for the far fault end, the fault voltage U on both sides of the current limiting reactor is m1 (s) and U m1p (s) can be expressed as formula (4) and formula (7) respectively. When the frequency is high, U m1 and U m1p The phases are approximately the same, that is, the phase difference between the two is still approximately 0°, U m1 and U m1p Formula (12) is still satisfied.

[0145] In summary, when a fault occurs outside the valve side of the current limiting reactor, for the line near the fault end, when the frequency is high, the voltage phase difference on both sides of the current limiting reactor is approximately -90°, while for the far fault end, the voltage phase difference on both sides of the current limiting reactor is still approximately 0°.

[0146] 2.2) Analysis of other DC line fault characteristics:

[0147] Taking DC line l1 as an example, we will analyze the fault in detail. Figure 1 For the DC line l1, it is an out-of-zone fault. Figure 10 The DC line l1 near the fault end (i.e. Figure 1 (M1 side) Fault analysis equivalent diagram.

[0148] like Figure 10As shown in (b), when the DC line l2 fails, for the DC line l1 near the fault end, the voltage U on both sides of the current limiting reactor m1 (s) and U m1p (s) can be expressed as Equation (27) and Equation (28) respectively.

[0149] U m1 (s)=I m1 (s)×Z C1 (27)

[0150] U m1p (s)=I m1 (s)×(Z C1 +sL dc ) (28)

[0151] Similarly, it can be deduced that when there is an out-of-zone fault, for the end near the fault, when the frequency is high, the voltage U m1 With current I m1 The phases are approximately the same, and the voltage U m1p Leading current I m1 It is about 90°, and it can be deduced that when there is an out-of-zone fault, for the end near the fault, the voltage phase difference on both sides of the current limiting reactor is approximately -90°, that is, U m1 and U m1p Satisfies formula (29).

[0152]

[0153] For the far fault end (i.e. Figure 1 The traveling wave fault analysis is similar to the fault analysis of the fault in the zone. Figure 11 The equivalent diagram of fault analysis under this fault scenario is given. Similarly, Figure 11 It can be obtained that, when the fault occurs outside the zone, for the far fault end, when the frequency is high, U n1 and U n1p The phases are approximately the same, that is, the phase difference between the two is still approximately 0°, U n1 and U n1p Formula (20) is still satisfied.

[0154] In summary, when a fault occurs on other DC lines, for the non-fault line near the fault end, when the frequency is high, the voltage phase difference on both sides of the current-limiting reactor is approximately -90°, while for the far-fault end, the voltage phase difference on both sides of the current-limiting reactor is still approximately 0°.

[0155] 2.3) Analysis of DC line busbar fault characteristics:

[0156] Taking DC line l1 as an example, we will analyze the fault in detail. Figure 1For DC line l1, it is an out-of-zone fault. Figure 12 The DC line l1 near the fault end (i.e. Figure 1 (M1 side) Fault analysis equivalent diagram.

[0157] like Figure 12 As shown in (b), after the DC bus fault, for the DC line l1 near the fault end, the voltage U on both sides of the current limiting reactor m1 (s) and U m1p (s) are shown in formula (30) and formula (31) respectively.

[0158] U m1 (s)=I m1 (s)×Z C1 (30)

[0159] U m1p (s)=I m1 (s)×(Z C1 +sL dc ) (31)

[0160] Similarly, it can be deduced that when there is an out-of-zone fault, for a certain high-frequency component near the fault end, the voltage U m1 With current I m1 The phases are approximately the same, and the voltage U m1p Leading current I m1 It is about 90°, and it can be deduced that when there is an out-of-zone fault, for the end near the fault, the voltage phase difference on both sides of the current limiting reactor is approximately -90°, that is, U m1 and U m1p Satisfies formula (32).

[0161]

[0162] For the far fault end (i.e. Figure 1 The traveling wave fault analysis is similar to the fault analysis of the fault in the zone. Figure 13 The equivalent diagram of fault analysis under this fault scenario is given. Similarly, Figure 13 It can be obtained that, when the fault occurs outside the zone, for the far fault end, when the frequency is high, U n1 and U n1p The phases are approximately the same, that is, the phase difference between the two is still approximately 0°, U n1 and U n1p Formula (20) is still satisfied.

[0163] In summary, it can be inferred that when a DC bus fault occurs, for the non-fault line near the fault end, when the frequency is high, the voltage phase difference on both sides of the current limiting reactor is approximately -90°, while for the far fault end, the voltage phase difference on both sides of the current limiting reactor is still approximately 0°.

[0164] In summary, when an out-of-zone fault occurs, for the end near the fault, when the frequency is high, the voltage phase difference on both sides of the current limiting reactor is approximately -90°, while for the end far from the fault, the voltage phase difference on both sides of the current limiting reactor is still approximately 0°.

[0165] During an intra-zone fault, at either end of the line, the voltage phase difference across the current-limiting reactor is approximately 0° at high frequencies. Therefore, protection can be implemented based on the voltage phase difference across the current-limiting reactor.

[0166] The protection plan is determined as follows:

[0167] S1. Criteria for identifying faults inside and outside the zone:

[0168] Based on fault characteristic analysis, it can be found that when the voltage frequency is high (e.g., greater than 1kHz), there is a significant difference in the voltage phase difference on both sides of the current-limiting reactor during intra-zone and extra-zone faults, which can be used to construct protection. Considering that high-frequency components decay quickly and require a high sampling frequency, the frequency of the electrical quantity used in the protection criterion should not be too high. Therefore, the present invention extracts electrical quantities with a frequency of f1 = 3kHz to construct protection. Considering the advantages of S transform in signal processing, the present invention uses discrete S transform to extract the fault voltage traveling wave of a specific frequency.

[0169] The S-transform is a time-frequency reversible analysis method developed from the Fourier transform and the continuous wavelet transform. x(kT) (k = 0, 1, 2, …, N-1) is the discrete time series of the continuous signal x(t), where T is the sampling interval and N is the number of sampling points. The discrete Fourier transform of x(kT) is denoted as X[n / NT]. The discrete S-transform of x(kT) is expressed as Equation (33).

[0170]

[0171] Wherein, j is the time sampling point, n is the frequency sampling point, j, n = 0, 1, ..., N-1.

[0172] The result of discrete S-transform of the signal includes amplitude and phase information. S-transform is performed on the fault component of the line mode voltage 2ms before and after the fault. After the voltage is S-transformed, a specific frequency f1 component is obtained, which is recorded as S u (t,f1). S u (t,f1) is a one-dimensional complex vector, whose amplitude is recorded as A u (t,f1), the phase is recorded as The calculation formula for the voltage phase difference on both sides of the current limiting reactor is as follows.

[0173]

[0174] Where, and are the voltage phase differences on both sides of the current limiting reactors installed at the beginning and end of the DC line; h = 1, 2, 3, corresponding to DC lines l1~l3 respectively; time t1 corresponds to A u The maximum value of (t,f1) indicates the arrival of the fault voltage traveling wave.

[0175] The criterion for identifying faults inside and outside the zone is shown in formula (35).

[0176]

[0177] Where S mh and S nh are the fault direction discrimination logic values ​​at the beginning and end of the line, respectively, as shown in Equation (36) and Equation (37). mh and S nh When both are 1, it is judged as an internal fault; when S mh =0 or S nh =0, it is judged as an out-of-zone fault.

[0178]

[0179]

[0180] Where, When the absolute value of the voltage phase difference on both sides of the current limiting reactor is less than When the absolute value of the voltage phase difference on both sides of the current limiting reactor is greater than When , it is judged as a reverse fault, and the fault direction judgment logic value is 0. Considering that in the case of an internal fault, for either end of the line, when the frequency is high, the voltage phase difference on both sides of the current limiting reactor is approximately 0°; in the case of an external fault, for the end near the fault, when the frequency is high, the voltage phase difference on both sides of the current limiting reactor is approximately -90°, while for the end far from the fault, the voltage phase difference on both sides of the current limiting reactor is still approximately 0°, so the setting value is set to Set to

[0181] S2. Establish fault start criteria:

[0182] During normal operation of a hybrid DC transmission system, the DC voltage is approximately constant. After a fault, the DC voltage suddenly changes. Therefore, the improved voltage gradient method can be used to construct the startup criterion. Equations (38) and (39) are the voltage gradients at the beginning and end of DC lines l1 to l3, respectively. The startup criterion is shown in Equation (40).

[0183]

[0184]

[0185]

[0186] Where u mhp (ki) and u mhp (k+i) are the measuring points m at the beginning of the line hp The sampling values ​​of the DC voltage at different times before and after the current sampling point; u nhp (ki) and u nhp (k+i) are the measuring points n at the end of the line hp The sampling values ​​of the DC voltage at different times before and after the current sampling point; h = 1, 2, 3, corresponding to DC lines l1~l3 respectively. The setting value is the starting setting value. The setting value must be greater than the maximum value of the voltage gradient during normal operation and a certain margin should be considered.

[0187] S3. Establish fault selection criteria:

[0188] In a bipolar HVDC transmission system, for a single-pole ground fault, the voltage change at the faulted pole is more significant than that at the non-faulted pole. For a bipolar short-circuit fault, the voltage changes at both poles are similar. Therefore, the voltage changes at both poles can be used to select the faulted pole. The pole selection function Q and the pole selection criterion are described in Equations (41) and (42), respectively.

[0189]

[0190]

[0191] Where Δu mhp and Δu' mhp The positive and negative DC line head end measuring points m hp The DC voltage fault component at the DC line; h = 1, 2, 3, corresponding to DC lines l1 to l3 respectively; j = 1, 2, ..., J, where J is the number of sampling points within 2ms; to avoid the impact of the DC control system after the fault (the control system generally takes 10ms from the start of regulation after the fault occurs to the completion of regulation), and considering that the MMC converter station is generally locked within 5ms after the fault occurs, the data window length selected in the present invention is 2ms. set1 and Q set2 is the set value. Considering that the coupling coefficient of DC lines on the same pole is generally less than 0.5, Q set1 and Q set2 Set them to 1.5 and 0.6 respectively.

[0192] S4. The protection scheme logic is as follows:

[0193] The protection scheme flow chart is as follows Figure 14As shown in Figure 3 . If the DC voltage meets the startup criteria, the protection is activated. The voltage is transformed into a pole mode, and then the specific frequency components of the line mode voltage are extracted using S transformation. Equation (35) is used to identify internal and external faults. Finally, the ratio of the fault components of the two-pole voltage is used to select the fault pole, forming an overall protection scheme.

[0194] Simulation verification:

[0195] Build in PSCAD Figure 1 The hybrid cascade multi-terminal DC transmission system shown in Figure 1 uses an LCC converter station at the sending end and a cascade of an LCC and MMC converter station at the receiving end. The rated DC voltage and transmission power are 800kV and 8000MW, respectively. DC line l0 is 2000km long, and DC lines l1 to l3 are each 200km long. The DC line adopts a frequency-dependent model, and the line structure is as follows: Figure 15 The sampling frequency is 50kHz and the fault occurs at 1.5s.

[0196] Fault simulation within the DC line area:

[0197] Figure 16 The simulation results of a metallic ground fault at the midpoint of DC line l1 are given. Figure 16 (b) with Figure 16 (c) The amplitude, phase, and phase difference of the 3kHz frequency component of the voltage on both sides of the current-limiting reactor at the beginning and end of the line after S transformation.

[0198] like Figure 16 As shown in (a), the voltage gradient at the beginning and end of the DC line l1 after the fault and Both are greater than the set value The starting components at both ends of the line can operate reliably. Figure 16 As shown in (b), the phase of the voltage fault traveling wave on the side of the current limiting reactor m1 at the head end of the line is is 106.81°, current limiting reactor m 1p Side voltage fault traveling wave phase is 104.26°, and the voltage phase difference on both sides of the current limiting reactor at the head end of the line is obtained. 2.55°, less than the set value Similarly, for the end of the line, Figure 16 As shown in (c), the phase of the voltage fault traveling wave on the side of the current limiting reactor n1 is is 107.51°, current limiting reactor n 1p Side voltage fault traveling wave phase is 106.95°, and the voltage phase difference on both sides of the current limiting reactor at the end of the line is obtained. 0.56°, less than the set value That is, after a fault occurs, the voltage phase difference between the current limiting reactors at the beginning and end of the DC line l1 is and Are much smaller than the set value At this time S m1 ·S n1 =1, the protection judges it as an internal fault of DC line l1. Figure 16 (d) It can be seen that the fault component of the positive DC voltage after the fault is Δu m1p The amplitude is much larger than the negative DC voltage fault component Δu' m1p The amplitude of the pole function is calculated to be Q = 6.75, which is greater than the set value Q set1 (Q set1 =1.5), it can be reliably judged as an intra-area fault of the positive DC line l1.

[0199] Figure 17 The midpoint of the DC line l3 passes through the transition resistor R f is the simulation result for 300Ω ground fault. Figure 17 As shown in (a), the voltage gradient at the beginning and end of DC line l3 after the fault and Both are greater than the set value The starting components at both ends of the line can operate reliably. Figure 17 (b) and 17(c), the phase difference of the voltage fault traveling wave on both sides of the current limiting reactor at the line head end The phase difference of the voltage fault traveling wave on both sides of the current limiting reactor at the end of the line is 2.89°. 0.31°, both smaller than the set value At this time S m3 ·S n3 =1, the protection judges it as an internal fault of DC line l3. Figure 17 (d) It can be seen that the fault component of the positive DC voltage after the fault is Δu m3p The amplitude is much larger than the negative DC voltage fault component Δu' m3p The amplitude of the pole function is calculated to be Q = 6.55, which is greater than the set value Q set1 , it can be reliably judged as an intra-area fault of the positive DC line l3.

[0200] DC line fault simulation outside the area:

[0201] When a ground fault occurs between the current-limiting reactor at the end of the DC line l1 and MMC1 (e.g. Figure 1 For the DC line l1, it is an out-of-zone fault. Figure 18 The transition resistance R under this fault scenario is given f This is the simulation for a 50Ω ground.

[0202] like Figure 18 As shown in (a), the voltage gradient at the end of DC line l1 (near the fault end) after the fault Greater than the set value The protection starting element operates reliably. Figure 18 (b) Phase of the voltage fault traveling wave on the side of the current-limiting reactor n1 at the end of the line is 14.21°, n 1p Side voltage fault traveling wave phase The voltage phase difference on both sides of the current limiting reactor is 102.52°. It is -88.31°, and its absolute value is greater than the set value At this time S n1 = 0, the protection is judged as an out-of-zone fault on DC line l1. In this case, it is not necessary to use the voltage phase difference on both sides of the current-limiting reactor at the line head end (far fault end) to determine that this fault is an out-of-zone fault.

[0203] When a fault occurs in the DC line l2 (such as Figure 1 For the DC line l1, it is an out-of-zone fault. Figure 19 Given the DC line l2 midpoint through the transition resistance R f This is the simulation for 100Ω grounding.

[0204] like Figure 19 As shown in (a), the voltage gradient at the first end of DC line l1 (near the fault end) after the fault Greater than the set value The protection starting element operates reliably. Figure 19 (b) Phase of the voltage fault traveling wave on the side of the current-limiting reactor m1 at the head end of the DC line l1 18.36°, m 1p Side voltage fault traveling wave phase The voltage phase difference on both sides of the current limiting reactor is 107.61°. It is -89.25°, and its absolute value is greater than the set value At this time S m1 = 0, the protection is judged as an out-of-zone fault on DC line l1. In this case, it is not necessary to use the voltage phase difference on both sides of the current-limiting reactor at the end of the line (far fault end) to judge this fault as an out-of-zone fault.

[0205] When a fault occurs on the DC busbar (such as Figure 1 For DC line l1, it is an out-of-zone fault. Figure 20 The transition resistance R under this fault scenario is given f This is the simulation for a 50Ω ground.

[0206] like Figure 20 As shown in (a), the voltage gradient at the first end of DC line l1 (near the fault end) after the fault Greater than the set value The protection starting element operates reliably. Figure 20 (b) Phase of the voltage fault traveling wave on the side of the current-limiting reactor m1 at the head end of the DC line l1 15.69°, m 1p Side voltage fault traveling wave phase The voltage phase difference on both sides of the current limiting reactor is 103.81°. It is -88.12°, and its absolute value is greater than the set value At this time S m1 = 0, the protection is judged as an out-of-zone fault on DC line l1. In this case, it is not necessary to use the voltage phase difference on both sides of the current-limiting reactor at the end of the line (far fault end) to judge this fault as an out-of-zone fault.

[0207] The protection method proposed in this invention can accurately identify both internal and external faults and reliably respond to high-resistance ground faults. Furthermore, this protection method only requires the transmission of logic signals to both ends of the line, reducing the requirements for communication channels. Furthermore, the threshold setting for the protection identification criteria has a clear theoretical basis, eliminating the need for extensive simulation experiments.

[0208] Although the embodiments and drawings of the present invention are disclosed for illustrative purposes, those skilled in the art will understand that various substitutions, changes and modifications are possible without departing from the spirit and scope of the present invention and the appended claims. Therefore, the scope of the present invention is not limited to the contents disclosed in the embodiments and drawings.

Claims

1. A hybrid cascade multi-terminal DC transmission line protection method based on voltage traveling wave phase difference, characterized by: The method comprises the following steps: S1: Determine the fault identification criteria inside and outside the zone; The criterion for identifying faults inside and outside the zone is constructed as follows: Where S mh and S nh are the fault direction discrimination logic values ​​at the beginning and end of the line, as shown in the following formula: in: To protect the set value; and The voltage phase difference on both sides of the current limiting reactor installed at the beginning and end of the DC line is expressed as follows: Where h = 1, 2, 3, corresponding to DC lines l1 to l3 respectively; time t1 corresponds to the voltage traveling wave amplitude A u The maximum value of (t,f1) indicates the arrival of the fault voltage traveling wave; When the absolute value of the voltage phase difference on both sides of the current limiting reactor is less than When the absolute value of the voltage phase difference on both sides of the current limiting reactor is greater than When , it is judged as a reverse fault, and the fault direction judgment logic value is 0; S2: Establish fault start criteria; During normal operation of a hybrid DC transmission line, the DC voltage is approximately constant. After a fault, the DC voltage suddenly changes. The improved voltage gradient method is used to construct the startup criterion. The improved voltage gradient method can accurately detect the first arrival time of the fault traveling wave, has smoothing and noise elimination capabilities, and can reliably reflect high-resistance grounding faults. The constructed protection startup criterion is as follows: Where, and are the voltage gradients at the beginning and end of the DC lines l1~l3, as shown in the following formula: Where: u mhp (ki) and u mhp (k+i) are the measuring points m at the beginning of the line hp The sampling values ​​of the DC voltage at different times before and after the current sampling point; u nhp (ki) and u nhp (k+i) are the measuring points n at the end of the line hp The sampling values ​​of the DC voltage at different times before and after the current sampling point; h = 1, 2, 3, corresponding to DC lines l1 to l3 respectively; The setting value is the starting setting value. The setting value must be greater than the maximum value of the voltage gradient during normal operation and a certain margin should be considered. S3: Establish fault selection criteria; In a bipolar HVDC transmission system, for a single-pole ground fault, the voltage change of the fault pole is more obvious than that of the non-fault pole. For a bipolar short-circuit fault, the voltage changes of the two poles are similar. The voltage changes of the two poles are used to select the fault pole, as shown in the following formula: Where: Δu mhp and Δu ’ mhp The positive and negative DC line head end measuring points m hp The DC voltage fault component at the 1st position; h = 1, 2, 3, corresponding to DC lines l1 to l3 respectively; j = 1, 2, ..., J, where J is the number of sampling points within 2 ms; In order to avoid the impact of the DC control system after the fault, and considering that the MMC converter station is locked within 5ms after the fault occurs, the data window length is selected as 2ms; The fault selection criterion is constructed as follows: Where Q set1 and Q set2 is the set value. Considering that the coupling coefficient of the DC lines on the same pole is less than 0.5, Q set1 and Q set2 Set to 1.5 and 0.6 respectively; S4: Determine the protection plan; The DC voltage change is used to form the protection start-up criterion to determine whether a fault has occurred. The voltage is transformed into a pole mode. The S transformation is used to extract the specific frequency components of the line mode voltage to identify faults inside and outside the zone. The voltage change at both poles is used to select the fault pole to form an overall protection scheme.

2. The hybrid cascade multi-terminal DC transmission line protection method based on voltage traveling wave phase difference according to claim 1, characterized in that: When the voltage frequency is greater than 1kHz, there is an obvious difference in the voltage phase difference on both sides of the current-limiting reactor during intra-zone faults and extra-zone faults. Considering that the high-frequency component decays quickly and has a high requirement for the sampling frequency, the frequency of the electrical quantity used in the protection criterion should not be too high. The electrical quantity with a frequency of f1 = 3kHz is extracted to construct the protection.

3. The hybrid cascade multi-terminal DC transmission line protection method based on voltage traveling wave phase difference according to claim 1, characterized in that: The fault voltage traveling wave of a specific frequency is extracted by using discrete S-transform.

4. The hybrid cascade multi-terminal DC transmission line protection method based on voltage traveling wave phase difference according to claim 1, characterized in that: In case of an internal fault, for either end of the line, when the frequency is high, the voltage phase difference on both sides of the current limiting reactor is approximately 0°; in case of an external fault, for the end near the fault, when the frequency is high, the voltage phase difference on both sides of the current limiting reactor is approximately -90°, while for the end far from the fault, the voltage phase difference on both sides of the current limiting reactor is still approximately 0°, which will reduce the protection setting value. Set to

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