Battery protection chip, battery protector and battery module

The coordinated control of MOSFETs in battery protection chips through a target control circuit addresses the inefficiencies and overheating issues in existing designs, improving the battery protection system's performance by reducing Rds(ON) and ensuring synchronized switching.

CN115912558BActive Publication Date: 2025-03-21SHENZHEN ICM MICROELECTRONICS CO LTD
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Patent Information

Application Number
CN202211520276.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-30
Publication Date
2025-03-21
Estimated Expiration
2042-11-30

AI Technical Summary

Technical Problem

Existing battery protection chips have high Rds(ON) values, leading to inefficiencies and potential overheating issues due to the asynchronous control of MOSFETs in parallel configurations, which complicates the simultaneous switching of multiple protection chips.

Method used

The design incorporates a target control circuit with a driver circuit and logic control circuit that ensures synchronized switching of multiple MOSFETs by connecting the target driver circuit to the selection and control pads, allowing for coordinated control of the MOSFETs based on the battery's state, thereby reducing Rds(ON) and preventing overheating.

Benefits of technology

This approach effectively lowers the overall resistance and prevents overheating by ensuring that MOSFETs in the battery protection chip switch in unison, enhancing the efficiency and reliability of the battery protection system.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a battery protection chip, a battery protector and a battery module, comprising a target control loop, a target selection pad and a target control pad; a target drive circuit connected to the target selection pad, the target control pad and the control end of each target switch tube; if the target selection pad is suspended or coupled to the negative electrode of the battery, and the battery protection chip detects a battery abnormality signal, the target drive circuit controls each target switch tube to be turned off; if the target selection pad is coupled to the positive electrode of the battery, each target switch tube is controlled to be turned off according to the target control signal received by the target control pad, when the battery protector comprises at least two battery protection chips connected in parallel, the Rds (ON) in the battery protector is reduced, and at the same time, it is avoided that the target switch tube in one battery protection chip is turned on and the target switch tube in another battery protection chip is turned off, thereby reducing the overall impedance of the battery protector, thereby improving the efficiency of the battery protector.
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Description

Technical Field

[0001] The present invention relates to the technical field of battery protection, and in particular to a battery protection chip, a battery protector and a battery module. Background Art

[0002] In recent years, more and more electronic products use lithium batteries as the main power source due to their advantages such as small size, high energy density, no memory effect, long cycle life and low self-discharge rate. However, under certain conditions, such as overcharging, overdischarging and overcurrent, lithium batteries will cause chemical side reactions inside the battery. When the side reactions intensify, they will seriously affect the performance and service life of lithium batteries, and may cause the internal pressure of lithium batteries to increase rapidly and then explode, leading to safety problems. Therefore, all lithium batteries need a battery protector to effectively monitor the charging and discharging status of lithium batteries, and shut down the charging and discharging circuits under certain conditions to prevent damage to the lithium batteries.

[0003] The existing battery protector includes a battery protection chip, in which a MOSFET is provided. When the battery protection chip detects that the charging and discharging state of the lithium battery is abnormal, the MOSFET is controlled to cut off the charging and discharging circuit to prevent potential safety hazards.

[0004] In the prior art, there is a large Rds(ON) in the battery protection chip. The Rds(ON) is the resistance value between the drain and source of the MOSFET in the battery protection chip when it is turned on, and the unit is ohm. The large Rds(ON) will cause the battery protection chip to heat up seriously, and then the efficiency of the battery protector. In order to reduce the Rds(ON) in the battery protection chip, the prior art generally adopts two battery protection chips in parallel to reduce Rds(ON). However, since the on or off of the MOSFET in each battery protection chip is controlled by the respective battery protection chip separately, and in fact, it is limited by the process or the accuracy of each battery protection chip itself, it is impossible to ensure that the MOSFETs in the two battery protection chips are turned on or off at the same time, so it is easy to turn on the MOSFET in one battery protection chip and turn off the MOSFET in the other battery protection chip, resulting in the Rds(ON) in the battery protection chip is still large, which is not conducive to reducing heat and improving the working efficiency of the battery protector. Summary of the invention

[0005] The embodiments of the present invention provide a battery protection chip, a battery protector and a battery module to solve the problem of low working efficiency of the existing battery protector.

[0006] A battery protection chip includes a target control circuit, a target selection pad and a target control pad;

[0007] The target control loop includes a target drive circuit and at least one target switch tube;

[0008] The target driving circuit is connected to the target selection pad, the target control pad and the control end of each target switch tube;

[0009] If the target selection pad is suspended or coupled to the negative electrode of the battery, and the battery protection chip detects a battery abnormality signal, the target drive circuit controls each of the target switch tubes to turn off;

[0010] If the target selection pad is coupled to the positive electrode of the battery, each of the target switch tubes is controlled to be turned off according to the target control signal received by the target control pad, and the target control signal is a control signal output when an external circuit detects a battery abnormality.

[0011] Furthermore, the battery protection chip also includes a signal detection pad and a battery negative electrode pad;

[0012] The first end of the target switch tube is connected to the signal detection pad; the second end of the target switch tube is connected to the battery negative electrode pad; and the third end of the target switch tube is a control end.

[0013] Furthermore, the battery protection chip also includes a battery positive electrode pad;

[0014] The target control loop also includes a logic control circuit, the input end of the logic control circuit is coupled to the battery positive electrode pad and the signal detection pad of the battery protection chip, and the output end of the logic control circuit is connected to the target drive circuit for detecting the battery abnormality signal and outputting a target control signal.

[0015] Further, the target driving circuit includes a first signal conversion circuit, a second signal conversion circuit, a level shift circuit and a transistor network;

[0016] The first input end of the first signal conversion circuit is connected to the output end of the logic control circuit, the second signal conversion circuit is connected to the target selection pad, and the output end of the first signal conversion circuit is connected to the input end of the level shift circuit, and is used to output a first conversion signal according to the target control signal output by the logic control circuit and the level signal corresponding to the target selection pad;

[0017] The first input end of the second signal conversion circuit is connected to the target selection pad, the second input end of the second signal conversion circuit is connected to the negative electrode pad of the battery, and the output end of the second signal conversion circuit is connected to the first input end of the transistor network, and is used to output a second conversion signal according to the level signal corresponding to the target selection pad;

[0018] The second input terminal of the transistor network is connected to the output terminal of the level shift circuit, and the third input terminal of the transistor network is connected to the target selection pad. The transistor network is used to enter a target operating mode according to the first conversion signal, the second conversion signal and the level signal corresponding to the target selection pad, and output a transistor drive signal to the target control pad under the target operating mode.

[0019] Further, the first signal conversion circuit includes a first inverter and a NOR gate circuit;

[0020] The input end of the first inverter is connected to the output end of the logic control circuit, the output end of the first inverter is connected to the first input end of the NOR gate circuit, the second input end of the NOR gate circuit is connected to the target selection pad, and the output end of the NOR gate circuit is connected to the input end of the level shift circuit.

[0021] Further, the second signal conversion circuit includes a second inverter and a first resistor;

[0022] The first end of the first resistor is connected to the battery negative electrode pad, the second end of the first resistor is connected to the target selection pad and the input end of the second inverter, and the output end of the second inverter is connected to the first input end of the transistor network.

[0023] A battery protector comprises a first chip and a second chip;

[0024] A first control loop is provided on the first chip, the first control loop includes at least one first switch tube, and a control end of each first switch tube is connected to a first control pad on the first chip;

[0025] A second control loop is provided on the second chip, the second control loop includes at least one second switch tube, and a control end of each second switch tube is connected to a second control pad on the second chip;

[0026] The first control pad is connected to the second control pad;

[0027] When the first chip or the second chip detects a battery abnormality signal, the first switch tube and the second switch tube are simultaneously controlled to be turned off.

[0028] Further, the battery protector includes a signal detection pin and a battery negative electrode pin;

[0029] The first end of the first switch tube is connected to the signal detection pin; the second end of the first switch tube is connected to the negative electrode pin of the battery, and the third end of the first switch tube is a control end;

[0030] The first end of the second switch tube is connected to the signal detection pin; the second end of the second switch tube is connected to the negative electrode pin of the battery, and the third end of the second switch tube is a control end;

[0031] When the first chip or the second chip detects a battery abnormality signal, the first switch tube and the second switch tube are simultaneously controlled to be turned off.

[0032] Furthermore, the battery protector further comprises a battery positive electrode pin; the first control loop further comprises a first drive circuit connected to the first control pad, and the second control loop further comprises a second drive circuit connected to the second control pad;

[0033] When the first chip detects a battery abnormality signal, it sends a target control signal to the first drive circuit and controls the first switch tube and the second switch tube to be turned off;

[0034] Alternatively, when the second chip detects a battery abnormality signal, it sends a target control signal to the second drive circuit and controls the first switch tube and the second switch tube to be turned off.

[0035] Furthermore, the battery protector further comprises a battery positive electrode pin and a battery negative electrode pin;

[0036] The first chip is provided with a first selection pad, and the second chip is provided with a second selection pad;

[0037] The first selection pad is floating or connected to the negative pin of the battery, and the second selection pad is connected to the positive pin of the battery, so that when the first chip detects a battery abnormality signal, it sends a target control signal to the first drive circuit to control the first drive circuit to drive the first switch tube and the second switch tube to turn off;

[0038] Alternatively, the first selection pad is connected to the positive pin of the battery, and the second selection pad is floating or connected to the negative pin of the battery, so that when the second chip detects the battery abnormality signal, it sends a target control signal to the second drive circuit to control the first switch tube and the second switch tube of the second drive circuit to be turned off.

[0039] Furthermore, the first control loop also includes an overcharge and overdischarge detection circuit, a logic control circuit and an overcurrent protection circuit;

[0040] The first end of the overcharge and overdischarge detection circuit is connected to the positive electrode pin of the battery, and the second end of the overcharge and overdischarge detection circuit is connected to the logic control circuit, and is used for overcharge and overdischarge detection and outputting an overcharge and overdischarge detection signal;

[0041] The first end of the overcurrent protection circuit is connected to the second end of the first switch tube and the negative electrode pin of the battery, and the second end of the overcurrent protection circuit is connected to the logic control circuit for overcurrent detection and outputting an overcurrent detection signal;

[0042] The logic control circuit is connected to the first driving circuit, and is used to output a target control signal according to the overcharge and overdischarge detection signal and / or the overcurrent detection signal;

[0043] The first driving circuit is connected to the first control pad and the first selection pad, and is configured to output a transistor driving signal to the first control pad according to the target control signal.

[0044] Further, the first driving circuit includes a first signal conversion circuit, a second signal conversion circuit, a level shift circuit and a transistor network;

[0045] The first input end of the first signal conversion circuit is connected to the logic control circuit, the second signal conversion circuit is connected to the first selection pad, and the output end of the first signal conversion circuit is connected to the input end of the level shift circuit, and is used to output a first conversion signal according to the target control signal output by the logic control circuit and the level signal corresponding to the first selection pad;

[0046] The first input end of the second signal conversion circuit is connected to the first selection pad, the second input end of the second signal conversion circuit is connected to the negative pin of the battery, and the output end of the second signal conversion circuit is connected to the first input end of the transistor network, and is used to output a second conversion signal according to the level signal corresponding to the first selection pad;

[0047] The second input terminal of the transistor network is connected to the output terminal of the level shift circuit, and the third input terminal of the transistor network is connected to the first selection pad. The transistor network is used to enter a target operating mode according to the first conversion signal, the second conversion signal and the level signal corresponding to the first selection pad, and output a transistor drive signal to the first control pad under the target operating mode.

[0048] Further, the first signal conversion circuit includes a first inverter and a NOR gate circuit;

[0049] The input end of the first inverter is connected to the logic control circuit, the output end of the first inverter is connected to the first input end of the NOR gate circuit, the second input end of the NOR gate circuit is connected to the first selection pad, and the output end of the NOR gate circuit is connected to the input end of the level shift circuit.

[0050] Further, the second signal conversion circuit includes a second inverter and a first resistor;

[0051] The first end of the first resistor is connected to the negative pin of the battery, the second end of the first resistor is connected to the first selection pad and the input end of the second inverter, and the output end of the second inverter is connected to the first input end of the transistor network.

[0052] Further, the transistor network includes a first transistor, a second transistor, a third transistor, a fourth transistor and a second resistor;

[0053] The gate of the first transistor is connected to the output end of the second conversion signal, the source of the first transistor is connected to the positive pin of the battery, the drain of the first transistor is connected to the first end of the second resistor and the output end of the level shift circuit, the second end of the second resistor is connected to the source of the second transistor, the gate of the second transistor is connected to the first selection pad, and the drain of the second transistor is grounded;

[0054] The gate of the third transistor is connected to the drain of the first transistor, the output end of the level shift circuit and the source of the second transistor, the source of the third transistor is connected to the positive pin of the battery, the drain of the third transistor is connected to the source of the fourth transistor, the gate of the fourth transistor is connected to the second end of the second resistor and the source of the second transistor, and the drain of the fourth transistor is grounded;

[0055] Wherein, a connection node between the drain of the third transistor and the source of the fourth transistor is an output end of the transistor network.

[0056] A battery module comprises a battery and the above-mentioned battery protector.

[0057] The above-mentioned battery protection chip, battery protector and battery module connect the target drive circuit with the target selection pad, the target control pad and the control end of each target switch tube, and ensure that when the target selection pad is suspended or coupled to the negative electrode of the battery and the battery protection chip detects a battery abnormality signal, the target drive circuit controls each target switch tube to be turned off. At the same time, when the target selection pad is coupled to the positive electrode of the battery, each target switch tube is controlled to be turned off according to the target control signal received by the target control pad. The target control signal is a control signal output when the external circuit detects a battery abnormality. Therefore, when the battery protector includes at least two battery protection chips connected in parallel, the Rds(ON) in the battery protector is reduced, thereby reducing the overall impedance of the battery protector, avoiding the battery protector from overheating, and at the same time avoiding the situation where the target switch tube in one battery protection chip is turned on and the target switch tube in another battery protection chip is turned off, so as to reduce the overall impedance of the battery protector, avoid overheating, and thus improve the efficiency of the battery protector. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0059] Figure 1 is a circuit diagram of a battery protection chip in one embodiment of the present invention;

[0060] Figure 2 is another circuit diagram of a battery protection chip in one embodiment of the present invention;

[0061] Figure 3 is a circuit diagram of a battery protector in one embodiment of the present invention;

[0062] Figure 4 is a circuit diagram of a first control loop in one embodiment of the present invention;

[0063] Figure 5 FIG. 4 is a circuit diagram of a first driving circuit in an embodiment of the present invention.

[0064] In the figure: 1. battery protection chip; 101. target control circuit; 1011. target drive circuit; 102. target switch tube; 10. first chip; 11. first control circuit; 111. first drive circuit; 1111. first signal conversion circuit; 1112. second signal conversion circuit; 1113. level shift circuit; 1114. transistor network; 112. overcharge and over-discharge detection circuit; 113. logic control circuit; 114. overcurrent protection circuit; 20. second chip. DETAILED DESCRIPTION

[0065] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0066] It should be understood that the present invention can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, providing these embodiments will make the disclosure thorough and complete and fully convey the scope of the present invention to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.

[0067] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there may be no intervening elements or layers. It should be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below may be represented as a second element, component, region, layer or part.

[0068] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that the spatially relative terms are intended to include different orientations of the device in use and operation in addition to the orientations shown in the figures. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0069] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present invention. When used herein, the singular forms "a", "an" and " / the" are also intended to include plural forms, unless the context clearly indicates another way. It should also be understood that the terms "consisting of" and / or "comprising" when used in this specification determine the presence of features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0070] In order to fully understand the present invention, detailed structures and steps will be presented in the following description to illustrate the technical solutions proposed by the present invention. The preferred embodiments of the present invention are described in detail below, but in addition to these detailed descriptions, the present invention may also have other implementations.

[0071] This embodiment provides a battery protection chip 1, such as Figure 1 and Figure 3 As shown, it is applied in a battery protector, and the battery protector includes multiple pins. Exemplarily, the multiple pins include a signal detection pin VM, a battery negative electrode pin VSS, and a battery positive electrode pin VDD. Optionally, the battery protector may include one battery protection chip 1, or may include at least two battery protection chips 1. It should be noted that when the battery protector includes at least two battery protection chips 1, the at least two battery protection chips 1 are connected in parallel to reduce the Rds(ON) in the battery protector, thereby reducing the overall impedance of the battery protector, avoiding the battery protector from overheating, and thus improving the efficiency of the battery protector.

[0072] This embodiment provides a battery protection chip 1, such as Figure 1As shown, it includes a target control loop 101, a target selection pad sel and a target control pad sw; the target control loop 101 includes a target drive circuit 1011 and at least one target switch tube 102; the target drive circuit 1011 is connected to the target selection pad sel, the target control pad sw and the control end of each target switch tube 102; if the target selection pad sel is suspended or coupled to the negative electrode of the battery, and the battery protection chip 1 detects a battery abnormality signal, the target drive circuit 1011 controls each target switch tube 102 to be turned off; if the target selection pad sel is coupled to the positive electrode of the battery, each target switch tube 102 is controlled to be turned off according to the target control signal received by the target control pad sw, and the target control signal is a control signal output when the external circuit detects a battery abnormality.

[0073] As an example, the battery protection chip 1 internally encapsulates a target control loop 101, which is a loop for controlling the battery to charge or discharge. The battery protection chip 1 also includes a target selection pad sel and a target control pad sw. Exemplarily, the battery can be a lithium battery. The target control loop 101 includes a target drive circuit 1011 and at least one target switch tube 102.

[0074] Specifically, the battery protection chip 1 includes a target selection pad sel, a target control pad sw, a battery positive pad vdd, a battery negative pad vss, and a signal detection pad vm. Exemplarily, when the battery protector includes at least two battery protection chips 1, the battery positive pads vdd of the at least two battery protection chips 1 are connected to the battery positive pin VDD of the battery protector, the battery negative pads vss of the at least two battery protection chips 1 are connected to the battery negative pin VSS of the battery protector, and the signal detection pads vm of the at least two battery protection chips 1 are connected to the signal detection pin VM of the battery protector.

[0075] As an example, the input end of the target driving circuit 1011 is coupled to the battery positive electrode pad vdd and the signal detection pad vm of the battery protection chip 1, the output end of the target driving circuit 1011 is coupled to the control end of each target switch tube 102, the first end of each target switch tube 102 is coupled to the battery negative electrode pad vss, and the second end of each target switch tube 102 is coupled to the signal detection pad vm. Wherein, the target switch tube 102 is a field effect transistor, the first end of the target switch tube 102 is a drain, the second end of the target switch tube 102 is a source, and the third end of the target switch tube 102 is a gate.

[0076] As an example, the battery protector includes at least two battery protection chips 1 connected in parallel. When the target selection pad sel is suspended or coupled to the negative electrode of the battery, and the battery protection chip 1 detects a battery abnormality signal, the battery protection chip 1 corresponding to the target selection pad sel being suspended or coupled to the negative electrode of the battery is the master chip, and the other battery protection chips 1 in the battery protector are slave chips, then the target drive circuit 1011 in the master chip controls each target switch tube 102 to turn off.

[0077] As another example, when the target selection pad sel is coupled to the positive electrode of the battery, the battery protection chip 1 corresponding to the target selection pad sel coupled to the positive electrode of the battery is a slave chip, and each target switch tube 102 is controlled to be turned off according to the target control signal received by the target control pad sw, and the target control signal is a control signal output when the external circuit detects a battery abnormality. The external circuit is the main chip in the battery protector.

[0078] In this embodiment, the target driving circuit 1011 is connected to the target selection pad sel, the target control pad sw and the control end of each target switch tube 102, and it is ensured that when the target selection pad sel is suspended or coupled to the negative electrode of the battery and the battery protection chip 1 detects a battery abnormality signal, the target driving circuit 1011 controls each target switch tube 102 to be turned off, and when the target selection pad sel is coupled to the positive electrode of the battery, each target switch tube 102 is controlled to be turned off according to the target control signal received by the target control pad sw, and the target control signal is a control signal output when the external circuit detects a battery abnormality, so that when the battery protector includes at least two battery protection chips 1 connected in parallel, Rds (ON) in the battery protector is reduced, thereby reducing the overall impedance of the battery protector, avoiding the battery protector from overheating, and avoiding the situation where the target switch tube 102 in one battery protection chip 1 is turned on and the target switch tube 102 in another battery protection chip 1 is turned off, so as to reduce the overall impedance of the battery protector, avoid the situation where the temperature is too high, and thus improve the efficiency of the battery protector.

[0079] In one embodiment, if Figure 4 As shown, the battery protection chip 1 also includes a battery positive electrode pad vdd; the target control loop 101 also includes a logic control circuit 113, the input end of the logic control circuit 113 is coupled to the battery positive electrode pad vdd and the signal detection pad vm of the battery protection chip 1, and the output end of the logic control circuit 113 is connected to the target drive circuit 1011, which is used to detect battery abnormality signals and output target control signals.

[0080] As an example, the target control loop 101 also includes a logic control circuit 113, the input end of the logic control circuit 113 is coupled to the battery positive electrode pad vdd and the signal detection pad vm of the battery protection chip 1, and the output end of the logic control circuit 113 is connected to the target drive circuit 1011, which is used to detect the battery abnormality signal and output the target control signal. In this embodiment, when the target selection pad sel in the battery protection chip 1 is suspended or coupled to the negative electrode of the battery, and the battery protection chip 1 detects a battery abnormality signal, the control circuit receives the battery abnormality signal, outputs the target control signal, and controls the target switch tube 102 to turn off.

[0081] Further, in one embodiment, if Figure 4 As shown, the target control loop 101 also includes an overcharge and overdischarge detection circuit 112 and an overcurrent protection circuit 114; the first end of the overcharge and overdischarge detection circuit 112 is connected to the battery positive electrode pad vdd, and the second end of the overcharge and overdischarge detection circuit 112 is connected to the logic control circuit 113, which is used for overcharge and overdischarge detection and outputs an overcharge and overdischarge detection signal; the first end of the overcurrent protection circuit 114 is connected to the second end of the target switch tube 102 and the battery negative electrode pad vss, and the second end of the overcurrent protection circuit 114 is connected to the logic control circuit 113, which is used for overcurrent detection and outputs an overcurrent detection signal. The logic control circuit 113 is connected to the target drive circuit 1011, which is used to output a target control signal according to the overcharge and overdischarge detection signal and / or the overcurrent detection signal; the target drive circuit 1011 is connected to the target control pad sw and the target selection pad sel, which is used to output a transistor drive signal to the target control pad sw according to the target control signal.

[0082] In this embodiment, the overcharge and overdischarge detection circuit 112 determines whether the battery is overcharged or overdischarged by detecting the charging voltage or discharging voltage of the battery, and outputs an overcharge and overdischarge detection signal according to the charging voltage or discharging voltage of the battery. Among them, overcurrent detection refers to the detection of the charging current or discharging current of the battery. The logic control circuit 113 receives the overcharge and overdischarge detection signal and / or the overcurrent detection signal, and performs logic processing on the overcharge and overdischarge detection signal and / or the overcurrent detection signal, and outputs the target control signal when the battery is abnormally charged or discharged. If the target selection pad sel is suspended or coupled to the negative electrode of the battery, and the battery protection chip 1 detects a battery abnormality signal, the target drive circuit 1011 controls each target switch tube 102 to turn off; if the target selection pad sel is coupled to the positive electrode of the battery, each target switch tube 102 is controlled to turn off according to the target control signal received by the target control pad sw. The target control signal is a control signal output when the external circuit detects a battery abnormality.

[0083] In one embodiment, if Figure 5As shown, the target driving circuit 1011 includes a first signal conversion circuit 1111, a second signal conversion circuit 1112, a level shift circuit 1113 and a transistor network 1114; the first input end of the first signal conversion circuit 1111 is connected to the output end of the logic control circuit 113, the second signal conversion circuit 1112 is connected to the target selection pad sel, the output end of the first signal conversion circuit 1111 is connected to the input end of the level shift circuit 1113, and is used to output a first conversion signal according to the target control signal output by the logic control circuit 113 and the level signal corresponding to the target selection pad sel; the first input end of the second signal conversion circuit 1112 is connected to the target selection pad sel, The second input terminal of the second signal conversion circuit 1112 is connected to the negative electrode pad vss of the battery, and the output terminal of the second signal conversion circuit 1112 is connected to the first input terminal of the transistor network 1114, and is used to output a second conversion signal according to the level signal corresponding to the target selection pad sel; the second input terminal of the transistor network 1114 is connected to the output terminal of the level shift circuit 1113, and the third input terminal of the transistor network 1114 is connected to the target selection pad sel. The transistor network 1114 is used to enter the target operating mode according to the first conversion signal, the second conversion signal and the level signal corresponding to the target selection pad sel, and output the transistor drive signal to the target control pad sw in the target operating mode.

[0084] The target operation mode of the transistor network 1114 is a normal operation mode. The transistor network 1114 also includes a high impedance operation mode.

[0085] As an example, when the battery protection chip 1 is used as the main chip in the battery protector, that is, when the target selection pad sel in the battery protection chip 1 is floating or connected to the battery negative electrode pad vss, the transistor network 1114 in the target drive circuit 1011 is used to enter the normal working mode according to the first conversion signal, the second conversion signal and the level signal corresponding to the target selection pad sel. When the battery protection chip 1 detects an abnormal battery signal, it controls the target switch tube 102 to turn off.

[0086] As another example, when the battery protection chip 1 is used as a slave chip in a battery protector, that is, when the target selection pad sel is connected to the battery positive pad vdd, the transistor network 1114 in the battery protection chip 1 is used to enter a high-impedance working mode according to the first conversion signal, the second conversion signal and the level signal corresponding to the target selection pad sell, and when the external circuit detects an abnormal battery output, that is, when the main chip in the battery protection device detects an abnormal battery output, the main chip outputs a target control signal to the target control pad sw. The target switch tube 102 is controlled to be turned off.

[0087] In this example, according to different electrical connection methods of the target selection pad sel, one chip is the master chip and the other chips are slave chips among the at least two battery chips in the battery protector. When the master chip detects an abnormal battery signal, the switch tubes in all chips are controlled to be turned off to avoid the situation where some switch tubes are turned on and other switch tubes are turned off, so as to reduce Rds(ON) in the battery protector, thereby reducing the overall impedance of the battery protector and avoiding the battery protector from overheating.

[0088] In one embodiment, the first signal conversion circuit 1111 includes a first inverter P11 and a NOR gate circuit NG1; the input end of the first inverter P11 is connected to the output end of the logic control circuit 113, the output end of the first inverter P11 is connected to the first input end of the NOR gate circuit NG1, the second input end of the NOR gate circuit NG1 is connected to the target selection pad sel, and the output end of the NOR gate circuit NG1 is connected to the input end of the level shift circuit 1113.

[0089] As an example, when the battery protection chip 1 is used as the main chip, that is, when the target selection pad sel is floating or connected to the battery negative pad vss, the level signal corresponding to the target selection pad sel is low, and the battery protection chip 1 does not detect the battery abnormality signal, the target control signal is high, and the target control signal becomes low after passing through the first inverter P11. The level signal corresponding to the target selection pad sels received by the first input end of the NOR gate circuit NG1 is low, and the level signal output by the first inverter P11 received by the second input end of the NOR gate circuit NG1 is low, so the first conversion signal output by the NOR gate circuit NG1 is high. Similarly, when the battery protection chip 1 detects a battery abnormality signal, the target control signal is at a low level, and the target control signal becomes a high level after passing through the first inverter P11. The level signal corresponding to the first selection pad sel received by the first input end of the NOR gate circuit NG1 is a low level, and the level signal output by the first inverter P11 received by the second input end of the NOR gate circuit NG1 is a high level. Therefore, the first conversion signal output by the NOR gate circuit NG1 is a low level.

[0090] As an example, when the battery protection chip 1 acts as a slave chip, that is, when the target selection pad sel is connected to the battery positive pad vdd, the level signal corresponding to the target selection pad sel is high, and when the battery protection chip 1 does not detect a battery abnormality signal, the target control signal is high, and the target control signal becomes low after passing through the first inverter P11. The level signal corresponding to the target selection pad sel received by the first input end of the NOR gate circuit NG1 is high, and the level signal output by the first inverter P11 received by the second input end of the NOR gate circuit NG1 is low, so the first conversion signal output by the NOR gate circuit NG1 is low. When the battery protection chip 1 does not detect a battery abnormality signal, the target control signal is low, and the target control signal becomes high after passing through the first inverter P11. The level signal corresponding to the target selection pad sel received at the first input end of the NOR gate circuit NG1 is high level, and the level signal output by the first inverter P11 received at the second input end of the NOR gate circuit NG1 is high level, so the first conversion signal output by the NOR gate circuit NG1 is low level. That is, when the battery protection chip 1 acts as a slave chip, regardless of whether the battery protection chip 1 detects a battery abnormality signal, the first signal conversion circuit 1111 outputs a low level. Therefore, the battery protection chip 1 in the external circuit acts as a master chip, and when an abnormal signal is detected, a target control signal is output to control each target switch tube 102 to be turned off.

[0091] In one embodiment, the second signal conversion circuit 1112 includes a second inverter P12 and a first resistor R1; the first end of the first resistor R1 is connected to the battery negative electrode pad vss, the second end of the first resistor R1 is connected to the target selection pad sel and the input end of the second inverter P12, and the output end of the second inverter P12 is connected to the first input end of the transistor network 1114.

[0092] As an example, when the battery protection chip 1 is used as the main chip, that is, when the target selection pad selsel is floating or connected to the battery negative electrode pad vss, the level signal corresponding to the target selection pad sel is a low level, and the input end of the second inverter P12 is a low level due to the weak pull-down of the first resistor R1. Therefore, the second conversion signal output from the output end of the second inverter P12 is a high level.

[0093] As an example, when the battery protection chip 1 is used as the main chip, that is, when the target selection pad sel is connected to the battery positive electrode pad vdd, the level signal corresponding to the target selection pad sel is a high level, so the second conversion signal output from the output end of the second inverter P12 is a low level.

[0094] In this example, by connecting the first end of the first resistor R1 to the negative battery pin VSS, the second end of the first resistor R1 to the first selection pad sel and the input end of the second inverter P12, and the output end of the second inverter P12 to the first input end of the transistor network 1114, the second signal conversion circuit 1112 outputs second conversion signals of different levels according to different electrical connection methods of the target selection pad sel.

[0095] The present embodiment provides a battery protector, which can be used in a battery module. Exemplarily, the battery module includes a battery and a battery protector. Exemplarily, the battery can be a lithium battery. The battery protector includes a plurality of pins. Optionally, the plurality of pins include a signal detection pin VM, a battery negative pin VSS, and a battery positive pin VDD. Specifically, the battery positive pin VDD of the battery protector is coupled to the positive electrode of the battery and the positive output terminal of the battery module, the battery negative pin VSS of the battery protector is coupled to the negative electrode of the battery, and the signal detection pin VM of the battery protector is coupled to the negative output terminal of the battery module. Among them, the battery positive pin VDD is used to detect overcharge and over-discharge detection signals. The signal detection pin VM is used to detect overcurrent detection signals.

[0096] This embodiment provides a battery protector, such as Figure 3 and Figure 4 As shown, it includes a first chip 10 and a second chip 20; a first control loop 11 is provided on the first chip 10, and the first control loop 11 includes at least one first switch tube M11, and the control end of each first switch tube M11 is connected to the first control pad sw on the first chip 10; a second control loop (not shown in the figure) is provided on the second chip 20, and the second control loop includes at least one second switch tube (not shown in the figure), and the control end of each second switch tube is connected to the second control pad on the second chip 20; the first control pad sw is connected to the second control pad; when the first chip 10 or the second chip 20 detects a battery abnormality signal, it controls the first switch tube M11 and the second switch tube to be turned off at the same time.

[0097] As an example, the battery protector includes a first chip 10 and a second chip 20. Exemplarily, the first chip 10 and the second chip 20 are packaged in the battery protector using chip packaging technology. It should be noted that the chip packaging technology can use existing chip packaging technology to ensure that the first chip 10 and the second chip 20 are packaged in the battery protector, and there is no limitation here.

[0098] As an example, the first chip 10 and the second chip 20 are two identical chips.

[0099] As an example, a first control loop 11 is provided in the first chip 10, and the first control loop 11 is a loop for controlling the battery to charge or discharge. The first control loop 11 includes at least one first switch tube M11, the first end of each first switch tube M11 is connected to the signal detection pin VM, the second end of each first switch tube M11 is connected to the battery negative electrode pin VSS, and the third end of each first switch tube M11 is a control end. Exemplarily, the first chip 10 is provided with a first signal detection pad vmvm, a first battery negative electrode pad vssvss and a first control pad sw. The first end of each first switch tube M11 is connected to the first signal detection pad vmvm, the first signal detection pad vmvm is connected to the signal detection pin VM through a transmission line, the second end of each first switch tube M11 is connected to the first battery negative electrode pad vssvss, the first battery negative electrode pad vssvss is connected to the signal detection pin VM, and the third end of each first switch tube M11 is connected to the first control pad sw. The first switch tube M11 is a field effect transistor, the first end of the first switch tube M11 is a drain, the second end of the first switch tube M11 is a source, and the third end of the first switch tube M11 is a gate. In this example, by connecting the first end of each first switch tube M11 to the signal detection pin VM, and the second end of each first switch tube M11 to the battery negative electrode pin VSS, each first switch tube M11 is connected in parallel, so that the Rds (ON) of the first chip 10 is reduced, thereby preventing the first chip 10 from overheating.

[0100] As an example, a second control loop is provided in the second chip 20, and the second control loop is a loop for controlling the battery to charge or discharge. The second control loop includes at least one second switch tube, the first end of each second switch tube is connected to the signal detection pin VM, the second end of each second switch tube is connected to the battery negative electrode pin VSS, and the third end of each second switch tube is a control end. Exemplarily, the second chip 20 is provided with a second signal detection pad vmvm, a second battery negative electrode pad vssvss and a second control pad sw. The first end of each second switch tube is connected to the second signal detection pad vmvm, the second signal detection pad vmvm is connected to the signal detection pin VM through a transmission line, the second end of each second switch tube is connected to the second battery negative electrode pad vssvss, the second battery negative electrode pad vssvss is connected to the signal detection pin VM, and the third end of each first switch tube M11 is connected to the second control pad sw. The second switch tube is a field effect transistor, the first end of the second switch tube is a drain, the second end of the second switch tube is a source, and the third end of the second switch tube is a gate. In this example, by connecting the first end of each second switch tube to the signal detection pin VM, and the second end of each second switch tube to the battery negative electrode pin VSS, each second switch tube is connected in parallel, so that the Rds (ON) of the second chip 20 is reduced, thereby preventing the second chip 20 from overheating.

[0101] As an example, the control end of each first switch tube M11 is connected to the first control pad sw on the first chip 10, the control end of each second switch tube is connected to the second control pad on the second chip 20, and the first control pad sw on the first chip 10 is connected to the second control pad on the second chip 20. When the first chip 10 or the second chip 20 detects a battery abnormality signal, the first switch tube M11 and the second switch tube are simultaneously controlled to be turned off. The battery abnormality signal refers to a signal that detects an abnormality in the discharge process or charging process of the battery. In this example, by connecting the control end of each first switch tube M11 to the first control pad sw on the first chip 10, and connecting the control end of each second switch tube to the second control pad on the second chip 20, and connecting the first control pad sw on the first chip 10 to the second control pad on the second chip 20, the connection relationship between the first chip 10 and the second chip 20 is a parallel connection, further reducing the Rds(ON) in the battery protector, thereby reducing the overall impedance of the battery protector, avoiding the battery protector from overheating, and at the same time, ensuring that any one of the first chip 10 and the second chip 20 is the master chip and the other chip is the slave chip. For example, the first chip 10 is the master chip and the second chip 20 is the slave chip. When the first chip 10 detects a battery abnormality signal, the first chip 10 simultaneously controls the first switch tube M11 and the second switch tube to be turned off. For another example, the second chip 20 is the master chip and the first chip 10 is the slave chip. When the second chip 20 detects a battery abnormality signal, the second chip 20 simultaneously controls the first switch tube M11 and the second switch tube to be turned off, thereby avoiding the situation where one of the first switch tube M11 and the second switch tube is turned on and the other switch tube is turned off, so as to reduce the overall impedance of the battery protector and avoid overtemperature, thereby improving the efficiency of the battery protector.

[0102] In this embodiment, the battery protector includes a first chip 10 and a second chip 20; a first control loop 11 is provided on the first chip 10, and the first control loop 11 includes at least one first switch tube M11, and the control end of each first switch tube M11 is connected to the first control pad sw on the first chip 10; a second control loop is provided on the second chip 20, and the second control loop includes at least one second switch tube, and the control end of each second switch tube is connected to the second control pad on the second chip 20; the first control pad sw is connected to the second control pad, so that the connection relationship between the first chip 10 and the second chip 20 is a parallel connection, thereby reducing the Rds(ON) in the battery protector, thereby reducing the overall impedance of the battery protector, and avoiding the battery protector from overheating, and when the first chip 10 or the second chip 20 detects a battery abnormality signal, the first switch tube M11 and the second switch tube are simultaneously controlled to be turned off, thereby avoiding the situation where one of the first switch tube M11 and the second switch tube is turned on and the other switch tube is turned off, so as to reduce the overall impedance of the battery protector, avoid the situation where the temperature is too high, and thus improve the efficiency of the battery protector.

[0103] In one embodiment, the battery protector includes a signal detection pin VMVM and a battery negative electrode pin VSSVSS; the first end of the first switch tube M11 is connected to the signal detection pin VM; the second end of the first switch tube M11 is connected to the battery negative electrode pin VSS, and the third end of the first switch tube M11 is a control end; the first end of the second switch tube is connected to the signal detection pin VM; the second end of the second switch tube is connected to the battery negative electrode pin VSS, and the third end of the second switch tube is a control end; when the first chip 10 or the second chip 20 detects a battery abnormality signal, it simultaneously controls the first switch tube M11 and the second switch tube to be turned off.

[0104] In this embodiment, the second end of the first switch tube M11 is connected to the battery negative electrode pin VSS, and the third end of the first switch tube M11 is the control end; the first end of the second switch tube is connected to the signal detection pin VM; the second end of the second switch tube is connected to the battery negative electrode pin VSS, and the third end of the second switch tube is the control end. Since the third end of the first switch tube M11 in the first chip 10 and the third end of the second switch tube in the second chip 20 are electrically connected, when the first chip 10 as the main chip detects a battery abnormality signal, the first chip 10 detects a battery abnormality signal through the third end of the first switch tube M11. and the third end of the second switch tube in the second chip 20, controls the first switch tube M11 and the second switch tube to be turned off, or when the second chip 20 detects a battery abnormality signal as the main chip, the second chip 20 controls the first switch tube M11 and the second switch tube to be turned off through the third end of the first switch tube M11 and the third end of the second switch tube in the second chip 20, thereby avoiding the situation where one of the first switch tube M11 and the second switch tube is turned on and the other switch tube is turned off, so as to reduce the overall impedance of the battery protector and avoid the situation of overtemperature, thereby improving the efficiency of the battery protector.

[0105] In one embodiment, if Figure 3 and Figure 4 As shown, the battery protector also includes a battery positive pin VDD; the first control loop 11 also includes a first drive circuit 111 connected to the first control pad sw, and the second control loop also includes a second drive circuit connected to the second control pad; when the first chip 10 detects a battery abnormality signal, it sends a target control signal to the first drive circuit 111, and controls the first switch tube M11 and the second switch tube to be turned off; or, when the second chip 20 detects a battery abnormality signal, it sends a target control signal to the second drive circuit, and controls the first switch tube M11 and the second switch tube to be turned off.

[0106] The target control signal refers to a signal output by the first chip 10 when a battery abnormality signal is detected, or a signal output by the second chip 20 when a battery abnormality signal is detected.

[0107] As an example, when the first chip 10 serves as the master chip and the second chip 20 serves as the slave chip, when the first chip 10 detects a battery abnormality signal, the first drive circuit 111 controls the first switch tube M11 and the second switch tube to be turned off according to the received target control signal, so that the first drive circuit 111 can simultaneously control the first switch tube M11 and the second switch tube to be turned off.

[0108] As an example, when the first chip 10 serves as the master chip and the second chip 20 serves as the slave chip, when the first chip 10 detects a battery abnormality signal, the first drive circuit 111 controls the first switch tube M11 and the second switch tube to be turned off according to the received target control signal, so that the first drive circuit 111 can simultaneously control the first switch tube M11 and the second switch tube to be turned off.

[0109] In this embodiment, by connecting the first drive circuit 111 to the first control pad sw, and connecting the second drive circuit to the second control pad, when the first chip 10 detects a battery abnormality signal, a target control signal is sent to the first drive circuit 111, so that the first drive circuit 111 can simultaneously control the first switch tube M11 and the second switch tube to be turned off, or when the second chip 20 detects a battery abnormality signal, a target control signal is sent to the second drive circuit, so that the second drive circuit can simultaneously control the first switch tube M11 and the second switch tube to be turned off, that is, it is ensured that the first switch tube M11 and the second switch tube can be controlled to be turned off at the same time through one chip (the first chip 10 or the second chip 20), avoiding the situation where one of the first switch tube M11 and the second switch tube is turned on and the other switch tube is turned off, so as to reduce Rds (ON) in the battery protector, thereby reducing the overall impedance of the battery protector and avoiding the battery protector from overheating.

[0110] In one embodiment, the battery protector further includes a battery positive pin VDD and a battery negative pin VSS; a first selection pad sel is provided on the first chip 10, and a second selection pad sel is provided on the second chip 20; the first selection pad sel is floating or connected to the battery negative pin VSS, and the second selection pad sel is connected to the battery positive pin VDD, so that when the first chip 10 detects a battery abnormality signal, it sends a target control signal to the first drive circuit 111 to control the first drive circuit 111 to drive the first switch tube M11 and the second switch tube to turn off; or, the first selection pad sel is connected to the battery positive pin VDD, and the second selection pad sel is floating or connected to the battery negative pin VSS, so that when the second chip 20 detects a battery abnormality signal, it sends a target control signal to the second drive circuit to control the second drive circuit to drive the first switch tube M11 and the second switch tube to turn off.

[0111] As an example, the first selection pad sel on the first chip 10 is floating or connected to the battery negative electrode pin VSS, and the second pad on the second chip 20 is connected to the battery positive electrode pin VDD, that is, the first chip 10 is able to send a target control signal to the first drive circuit 111 when a battery abnormality signal is detected, and control the first drive circuit 111 to drive the first switch tube M11 and the second switch tube to be turned off, that is, by floating the first selection pad sel on a chip or connecting it to the battery negative electrode pin VSS, and connecting the second selection pad sel on the second chip 20 to the battery positive electrode pin VDD, the first chip 10 is the master chip and the second chip 20 is the slave chip, so that the second drive circuit in the second chip 20 is in a high impedance state, so that the first switch tube M11 and the second switch tube are turned off only by the first chip 10 when a battery abnormality signal is detected.

[0112] As an example, the first selection pad sel on the first chip 10 is connected to the battery positive pin VDD, and the second selection pad sel on the second chip 20 is floating or connected to the battery negative pin VSS, that is, it is ensured that the second chip 20 can send a target control signal to the second drive circuit when a battery abnormality signal is detected, and control the second drive circuit to drive the first switch tube M11 and the second switch tube to be turned off, that is, the first selection pad sel on the first chip 10 is connected to the battery positive pin VDD, and the second selection pad sel on the second chip 20 is floating or connected to the battery negative pin VSS, so that the first chip 10 is a slave chip and the second chip 20 is a master chip, so that the first drive circuit 111 in the first chip 10 is in a high impedance state, so that the first switch tube M11 and the second switch tube are controlled to be turned off only when the battery abnormality signal is detected by the first chip 10.

[0113] In this embodiment, the first chip 10 is used as the master chip and the second chip 20 is used as the slave chip, that is, the first selection pad sel on the first chip 10 is floated or connected to the battery negative electrode pin VSS, and the second selection pad sel is connected to the battery positive electrode pin VDD, so that when the first chip 10 detects a battery abnormality signal, it sends a target control signal to the first drive circuit 111 to control the first drive circuit 111 to drive the first switch tube M11 and the second switch tube to turn off; or, the second chip 20 is used as the master chip and the first chip 10 is used as the slave chip, that is, the first selection pad sel on the first chip 10 is connected to the battery positive electrode pin VDD, and the second chip 20 is used as the master chip and the first chip 10 is used as the slave chip, that is, the first selection pad sel on the first chip 10 is connected to the battery positive electrode pin VDD, and the second chip 20 is used as the slave chip. The second selection pad sel on 20 is floating or connected to the battery negative pin VSS, so that when the second chip 20 detects a battery abnormality signal, it sends a target control signal to the second drive circuit to control the second drive circuit to drive the first switch tube M11 and the second switch tube to turn off, so that one chip (the first chip 10 or the second chip 20) can simultaneously control the first switch tube M11 and the second switch tube to turn off, avoiding the situation where one of the first switch tube M11 and the second switch tube is turned on and the other switch tube is turned off, so as to reduce Rds (ON) in the battery protector, thereby reducing the overall impedance of the battery protector and avoiding the battery protector from overheating.

[0114] In one embodiment, if Figure 4 As shown, the first control loop 11 also includes an overcharge and overdischarge detection circuit 112, a logic control circuit 113 and an overcurrent protection circuit 114; the first end of the overcharge and overdischarge detection circuit 112 is connected to the battery positive electrode pin VDD, and the second end of the overcharge and overdischarge detection circuit 112 is connected to the logic control circuit 113, which is used for overcharge and overdischarge detection and outputs an overcharge and overdischarge detection signal; the first end of the overcurrent protection circuit 114 is connected to the second end of the first switch tube M11 and the battery negative electrode pin VSS, and the second end of the overcurrent protection circuit 114 is connected to the logic control circuit 113, which is used for overcurrent detection and outputs an overcurrent detection signal; the logic control circuit 113 is connected to the first drive circuit 111, which is used to output a target control signal according to the overcharge and overdischarge detection signal and / or the overcurrent detection signal; the first drive circuit 111 is connected to the first control pad sw and the first selection pad sel, which is used to output a transistor drive signal to the first control pad sw according to the target control signal.

[0115] As an example, the first end of the overcharge and overdischarge detection circuit 112 is connected to the positive pin VDD of the battery, and the second end of the overcharge and overdischarge detection circuit 112 is connected to the logic control circuit 113, which is used for overcharge and overdischarge detection and outputs an overcharge and overdischarge detection signal. Exemplarily, the overcharge and overdischarge detection circuit 112 determines whether the battery is overcharged or overdischarged by detecting the charging voltage or discharging voltage of the battery, and outputs an overcharge and overdischarge detection signal according to the charging voltage or discharging voltage of the battery.

[0116] As an example, the first end of the overcurrent protection circuit 114 is connected to the second end of the first switch tube M11 and the battery negative electrode pin VSS, and the second end of the overcurrent protection circuit 114 is connected to the logic control circuit 113 for overcurrent detection and outputting an overcurrent detection signal. Wherein, overcurrent detection refers to the detection of the charging current or discharging current of the battery.

[0117] As an example, the logic control circuit 113 is connected to the first drive circuit 111, and is used to output a target control signal according to an overcharge and overdischarge detection signal and / or an overcurrent detection signal. In this example, the logic control circuit 113 receives the overcharge and overdischarge detection signal and / or the overcurrent detection signal, and performs logic processing on the overcharge and overdischarge detection signal and / or the overcurrent detection signal, and outputs a target control signal when the battery is abnormally charged or discharged.

[0118] As an example, the first drive circuit 111 is connected to the first control pad sw and the first selection pad sel, and is used to output a transistor drive signal to the first control pad sw according to a target control signal. Exemplarily, when the first selection pad sel of the first chip 10 is floating or connected to the negative pin VSS of the battery, and the second selection pad sel on the second chip 20 is connected to the positive pin VDD of the battery, the first chip 10 serves as the main chip, and the first drive circuit 111 outputs a transistor drive signal to the first control pad sw according to the target control signal. Since the third end of the first switch tube M11 and the third end of the second switch tube are electrically connected through the first control pad sw and the second control pad, when the first chip 10 detects a battery abnormality signal, the first drive circuit 111 can simultaneously drive the first switch tube M11 and the second switch tube to turn off.

[0119] Furthermore, the second chip 20 also includes an overcharge and overdischarge detection circuit 112, a logic control circuit 113 and an overcurrent protection circuit 114, which are not described here to avoid repetition. It should be noted that, by simply connecting the first selection pad sel on the first chip 10 to the positive pin VDD of the battery, and floating the second selection pad sel on the second chip 20 or connecting it to the negative pin VSS of the battery, the second chip 20 can be used as the master chip and the first chip 10 as the slave chip, that is, the second drive circuit in the second chip 20 outputs a transistor drive signal to the second control pad according to the target control signal. Since the third end of the first switch tube M11 and the third end of the second switch tube are electrically connected through the first control pad sw and the second control pad sw, when the second chip 20 detects a battery abnormality signal, the second drive circuit can simultaneously drive the first switch tube M11 and the second switch tube to turn off.

[0120] In one embodiment, if Figure 5 As shown, the first driving circuit 111 includes a first signal conversion circuit 1111, a second signal conversion circuit 1112, a level shift circuit 1113 and a transistor network 1114; the first input end of the first signal conversion circuit 1111 is connected to the logic control circuit 113, the second signal conversion circuit 1112 is connected to the first selection pad sel, the output end of the first signal conversion circuit 1111 is connected to the input end of the level shift circuit 1113, and is used to output a first conversion signal according to the target control signal output by the logic control circuit 113 and the level signal corresponding to the first selection pad sel; the first input end of the second signal conversion circuit 1112 is connected to the first selection pad sel, and the second signal conversion circuit 1112 is connected to the first selection pad sel. The second input terminal of the second signal conversion circuit 1112 is connected to the negative electrode pin VSS of the battery, and the output terminal of the second signal conversion circuit 1112 is connected to the first input terminal of the transistor network 1114, and is used to output a second conversion signal according to the level signal corresponding to the first selection pad sel; the second input terminal of the transistor network 1114 is connected to the output terminal of the level shift circuit 1113, and the third input terminal of the transistor network 1114 is connected to the first selection pad sel. The transistor network 1114 is used to enter the target working mode according to the first conversion signal, the second conversion signal and the level signal corresponding to the first selection pad sel, and output the transistor drive signal to the first control pad sw in the target working mode.

[0121] The target operation mode of the transistor network 1114 is a normal operation mode. The transistor network 1114 also includes a high impedance operation mode.

[0122] As an example, when the first chip 10 serves as the main chip, that is, when the first selection pad sel is floating or connected to the negative electrode pin VSS of the battery, and the second selection pad sel is connected to the positive electrode pin VDD of the battery, the transistor network 1114 in the first chip 10 is used to enter the normal working mode according to the first conversion signal, the second conversion signal and the level signal corresponding to the first selection pad sel. When the first chip 10 detects an abnormal battery signal, it controls the first switch tube M11 and the second switch tube to turn off.

[0123] As another example, when the second chip 20 serves as the main chip, that is, when the second selection pad sel is floating or connected to the negative battery pin VSS, and the first selection pad sel is connected to the positive battery pin VDD, the transistor network 1114 in the first chip 10 is used to enter a high-impedance operating mode according to the first conversion signal, the second conversion signal and the level signal corresponding to the first selection pad sel. When the second chip 20 detects an abnormal battery signal, it controls the first switch tube M11 and the second switch tube to turn off.

[0124] In this example, according to the different electrical connection methods of the first selection pad sel and the second selection pad sel, one of the first chip 10 and the second chip 20 is the master chip and the other chip is the slave chip. When the master chip detects a battery abnormality signal, the transistors in all chips are controlled to be turned off to avoid the situation where one of the first switch tube M11 and the second switch tube is turned on and the other is turned off, so as to reduce Rds (ON) in the battery protector, thereby reducing the overall impedance of the battery protector and avoiding the battery protector from overheating.

[0125] In one embodiment, if Figure 5 As shown, the first signal conversion circuit 1111 includes a first inverter P11 and a NOR gate circuit NG1; the input end of the first inverter P11 is connected to the logic control circuit 113, the output end of the first inverter P11 is connected to the first input end of the NOR gate circuit NG1, the second input end of the NOR gate circuit NG1 is connected to the first selection pad sel, and the output end of the NOR gate circuit NG1 is connected to the input end of the level shift circuit 1113.

[0126] As an example, when the first chip 10 is used as the main chip, that is, when the first selection pad sel is floating or connected to the negative pin VSS of the battery, and the second selection pad sel is connected to the positive pin VDD of the battery, the level signal corresponding to the first selection pad sel is low level, and when the first chip 10 does not detect the abnormal battery signal, the target control signal is high level, and the target control signal becomes low level after passing through the first inverter P11. The level signal corresponding to the first selection pad sel received by the first input end of the NOR gate circuit NG1 is low level, and the level signal output by the first inverter P11 received by the second input end of the NOR gate circuit NG1 is low level, therefore, the first conversion signal output by the NOR gate circuit NG1 is high level. Similarly, when the first chip 10 detects a battery abnormality signal, the target control signal is at a low level, and the target control signal becomes a high level after passing through the first inverter P11. The level signal corresponding to the first selection pad sel received by the first input end of the NOR gate circuit NG1 is a low level, and the level signal output by the first inverter P11 received by the second input end of the NOR gate circuit NG1 is a high level. Therefore, the first conversion signal output by the NOR gate circuit NG1 is a low level.

[0127] As an example, when the first chip 10 acts as a slave chip, that is, when the second selection pad sel is floating or connected to the negative pin VSS of the battery, and the first selection pad sel is connected to the positive pin VDD of the battery, the level signal corresponding to the first selection pad sel is high level, and when the first chip 10 does not detect the abnormal battery signal, the target control signal is high level, and the target control signal becomes low level after passing through the first inverter P11. The level signal corresponding to the first selection pad sel received by the first input end of the NOR gate circuit NG1 is high level, and the level signal output by the first inverter P11 received by the second input end of the NOR gate circuit NG1 is low level, so the first conversion signal output by the NOR gate circuit NG1 is low level. When the first chip 10 does not detect the abnormal battery signal, the target control signal is low level, and the target control signal becomes high level after passing through the first inverter P11. The level signal corresponding to the first selection pad sel received by the first input end of the NOR gate circuit NG1 is high level, and the level signal output by the first inverter P11 received by the second input end of the NOR gate circuit NG1 is high level, so the first conversion signal output by the NOR gate circuit NG1 is low level. That is, when the first chip 10 acts as a slave chip, no matter whether the first chip 10 detects a battery abnormality signal, the first signal conversion circuit 1111 outputs a low level, so that when the second chip 20 acts as a master chip, when an abnormal signal is detected, the first switch tube M11 and the second switch tube are simultaneously controlled to be turned off.

[0128] In this embodiment, by connecting the input end of the first inverter P11 to the logic control circuit 113, connecting the output end of the first inverter P11 to the first input end of the NOR gate circuit NG1, connecting the second input end of the NOR gate circuit NG1 to the first selection pad sel, and connecting the output end of the NOR gate circuit NG1 to the input end of the level shift circuit 1113, the master chip and the slave chip can be selected from the first chip 10 and the second chip 20 according to the different electrical connection methods of the first selection pad sel or the second selection pad sel.

[0129] In one embodiment, if Figure 5 As shown, the second signal conversion circuit 1112 includes a second inverter P12 and a first resistor R1; the first end of the first resistor R1 is connected to the battery negative electrode pin VSS, the second end of the first resistor R1 is connected to the first selection pad sel and the input end of the second inverter P12, and the output end of the second inverter P12 is connected to the first input end of the transistor network 1114.

[0130] As an example, when the first chip 10 serves as the main chip, that is, when the first selection pad sel is floating or connected to the negative electrode pin VSS of the battery, and the second selection pad sel is connected to the positive electrode pin VDD of the battery, the level signal corresponding to the first selection pad sel is a low level, and the input end of the second inverter P12 is a low level due to the weak pull-down of the first resistor R1. Therefore, the second conversion signal outputted from the output end of the second inverter P12 is a high level.

[0131] As an example, when the first chip 10 acts as a slave chip, that is, when the second selection pad sel is floating or connected to the negative battery pin VSS, and the first selection pad sel is connected to the positive battery pin VDD, the level signal corresponding to the first selection pad sel is a high level, and therefore, the second conversion signal output from the output end of the second inverter P12 is a low level.

[0132] In this example, by connecting the first end of the first resistor R1 to the negative battery pin VSS, the second end of the first resistor R1 to the first selection pad sel and the input end of the second inverter P12, and the output end of the second inverter P12 to the first input end of the transistor network 1114, the second signal conversion circuit 1112 outputs second conversion signals of different levels according to different electrical connection methods of the first selection pad sel or the second selection pad sel.

[0133] In one embodiment, if Figure 5As shown, the transistor network 1114 includes a first transistor PM1, a second transistor NM1, a third transistor PM2, a fourth transistor NM2 and a second resistor R2; the gate of the first transistor PM1 is connected to the output end of the second conversion signal, the source of the first transistor PM1 is connected to the positive electrode pin VDD of the battery, the drain of the first transistor PM1 is connected to the first end of the second resistor R2 and the output end of the level shift circuit 1113, the second end of the second resistor R2 is connected to the source of the second transistor NM1, the gate of the second transistor NM1 is connected to the first selection pad sel, and the drain of the second transistor NM1 is connected to the first end of the second resistor R2 and the output end of the level shift circuit 1113. The drain is grounded; the gate of the third transistor PM2 is connected to the drain of the first transistor PM1, the output end of the level shift circuit 1113 and the source of the second transistor NM1, the source of the third transistor PM2 is connected to the positive pin VDD of the battery, the drain of the third transistor PM2 is connected to the source of the fourth transistor NM2, the gate of the fourth transistor NM2 is connected to the second end of the second resistor R2 and the source of the second transistor NM1, and the drain of the fourth transistor NM2 is grounded; wherein, the connection node between the drain of the third transistor PM2 and the source of the fourth transistor NM2 is the output end of the transistor network 1114.

[0134] As an example, when the first chip 10 is used as a slave chip, that is, when the second selection pad sel is floating or connected to the negative pin VSS of the battery, and the first selection pad sel is connected to the positive pin VDD of the battery, and the first chip 10 does not detect the abnormal battery signal, the first conversion signal is high, and the level shift circuit 1113 processes the first conversion signal and converts the first conversion signal into a low level. At this time, the level signal corresponding to the first selection pad sel is low, and the input end of the second inverter P12 is low due to the weak pull-down of the first resistor R1, so the second conversion signal output from the output end of the second inverter P12 is high. At this time, the first transistor PM1 and the second transistor NM1 are turned off, the third transistor PM2 and the fourth transistor NM2 are turned on, and the output end of the transistor network 1114 outputs a transistor drive signal to drive the first switch tube M11 and the second switch tube to turn on. Similarly, when the first chip 10 detects an abnormal battery signal, the output end of the transistor network 1114 outputs a transistor drive signal to drive the first switch tube M11 and the second switch tube to turn off.

[0135] As an example, when the first chip 10 is used as the master chip, that is, when the first selection pad sel is floating or connected to the negative pin VSS of the battery, and the second selection pad sel is connected to the positive pin VDD of the battery, the level signal corresponding to the first selection pad sel is high level, so the second conversion signal outputted from the output end of the second inverter P12 is low level. When the first chip 10 is used as the slave chip, regardless of whether the first chip 10 detects a battery abnormality signal, the first signal conversion circuit 1111 outputs a low level first conversion signal, and the first conversion signal is processed by the level shift circuit 1113 to become a high level, so the first transistor PM1 and the second transistor NM1 are turned on, the third transistor PM2 and the fourth transistor NM2 are turned off, and the transistor network 1114 is in a high impedance state, so that the first chip 10 loses control of the first switch tube M11, and the second chip 20 is used as the master chip. When the battery abnormality signal is detected, the first switch tube M11 and the second switch tube are controlled to be turned off at the same time.

[0136] In one embodiment, the first transistor PM1 and the third transistor PM2 are P-type transistors, and the second transistor NM1 and the fourth transistor NM2 are N-type transistors.

[0137] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A battery protection chip, characterized in that: It includes a target control loop, a target selection pad and a target control pad; The target control loop includes a target drive circuit and at least one target switch tube; The target driving circuit is connected to the target selection pad, the target control pad and the control end of each target switch tube; If the target selection pad is suspended or coupled to the negative electrode of the battery, and the battery protection chip detects a battery abnormality signal, the target drive circuit controls each of the target switch tubes to turn off; If the target selection pad is coupled to the positive electrode of the battery, each of the target switch tubes is controlled to be turned off according to the target control signal received by the target control pad, wherein the target control signal is a control signal output when an external circuit detects a battery abnormality; The battery protection chip also includes a signal detection pad and a battery negative electrode pad; The first end of the target switch tube is connected to the signal detection pad; the second end of the target switch tube is connected to the battery negative electrode pad; and the third end of the target switch tube is a control end.

2. The battery protection chip according to claim 1, characterized in that: The battery protection chip also includes a battery positive electrode pad; The target control loop also includes a logic control circuit, the input end of the logic control circuit is coupled to the battery positive electrode pad and the signal detection pad of the battery protection chip, and the output end of the logic control circuit is connected to the target drive circuit for detecting the battery abnormality signal and outputting a target control signal.

3. The battery protection chip according to claim 2, characterized in that: The target driving circuit includes a first signal conversion circuit, a second signal conversion circuit, a level shift circuit and a transistor network; The first input end of the first signal conversion circuit is connected to the output end of the logic control circuit, the second signal conversion circuit is connected to the target selection pad, and the output end of the first signal conversion circuit is connected to the input end of the level shift circuit, and is used to output a first conversion signal according to the target control signal output by the logic control circuit and the level signal corresponding to the target selection pad; The first input end of the second signal conversion circuit is connected to the target selection pad, the second input end of the second signal conversion circuit is connected to the negative electrode pad of the battery, and the output end of the second signal conversion circuit is connected to the first input end of the transistor network, and is used to output a second conversion signal according to the level signal corresponding to the target selection pad; The second input terminal of the transistor network is connected to the output terminal of the level shift circuit, and the third input terminal of the transistor network is connected to the target selection pad. The transistor network is used to enter a target operating mode according to the first conversion signal, the second conversion signal and the level signal corresponding to the target selection pad, and output a transistor drive signal to the target control pad under the target operating mode.

4. The battery protection chip according to claim 3, characterized in that: The first signal conversion circuit includes a first inverter and a NOR gate circuit; The input end of the first inverter is connected to the output end of the logic control circuit, the output end of the first inverter is connected to the first input end of the NOR gate circuit, the second input end of the NOR gate circuit is connected to the target selection pad, and the output end of the NOR gate circuit is connected to the input end of the level shift circuit.

5. The battery protection chip according to claim 3, characterized in that: The second signal conversion circuit includes a second inverter and a first resistor; The first end of the first resistor is connected to the battery negative electrode pad, the second end of the first resistor is connected to the target selection pad and the input end of the second inverter, and the output end of the second inverter is connected to the first input end of the transistor network.

6. A battery protector, characterized in that: comprising a first chip and a second chip; A first control loop is provided on the first chip, the first control loop includes at least one first switch tube, and a control end of each first switch tube is connected to a first control pad on the first chip; A second control loop is provided on the second chip, the second control loop includes at least one second switch tube, and a control end of each second switch tube is connected to a second control pad on the second chip; The first control pad is connected to the second control pad; When the first chip or the second chip detects a battery abnormality signal, the first switch tube and the second switch tube are simultaneously controlled to be turned off; The battery protector comprises a signal detection pin and a battery negative electrode pin; The first end of the first switch tube is connected to the signal detection pin; the second end of the first switch tube is connected to the negative electrode pin of the battery, and the third end of the first switch tube is a control end; The first end of the second switch tube is connected to the signal detection pin; the second end of the second switch tube is connected to the negative electrode pin of the battery, and the third end of the second switch tube is a control end; When the first chip or the second chip detects a battery abnormality signal, the first switch tube and the second switch tube are simultaneously controlled to be turned off.

7. The battery protector according to claim 6, characterized in that: The battery protector further includes a battery positive electrode pin; the first control loop further includes a first drive circuit connected to the first control pad, and the second control loop further includes a second drive circuit connected to the second control pad; When the first chip detects a battery abnormality signal, it sends a target control signal to the first drive circuit and controls the first switch tube and the second switch tube to be turned off; Alternatively, when the second chip detects a battery abnormality signal, it sends a target control signal to the second drive circuit and controls the first switch tube and the second switch tube to be turned off.

8. The battery protector according to claim 7, characterized in that: The battery protector also includes a battery positive electrode pin and a battery negative electrode pin; The first chip is provided with a first selection pad, and the second chip is provided with a second selection pad; The first selection pad is floating or connected to the negative pin of the battery, and the second selection pad is connected to the positive pin of the battery, so that when the first chip detects a battery abnormality signal, it sends a target control signal to the first drive circuit to control the first drive circuit to drive the first switch tube and the second switch tube to turn off; Alternatively, the first selection pad is connected to the positive pin of the battery, and the second selection pad is floating or connected to the negative pin of the battery, so that when the second chip detects the battery abnormality signal, it sends a target control signal to the second drive circuit to control the first switch tube and the second switch tube of the second drive circuit to be turned off.

9. The battery protector according to claim 8, characterized in that: The first control loop also includes an overcharge and overdischarge detection circuit, a logic control circuit and an overcurrent protection circuit; The first end of the overcharge and overdischarge detection circuit is connected to the positive electrode pin of the battery, and the second end of the overcharge and overdischarge detection circuit is connected to the logic control circuit, and is used for overcharge and overdischarge detection and outputting an overcharge and overdischarge detection signal; The first end of the overcurrent protection circuit is connected to the second end of the first switch tube and the negative electrode pin of the battery, and the second end of the overcurrent protection circuit is connected to the logic control circuit for overcurrent detection and outputting an overcurrent detection signal; The logic control circuit is connected to the first driving circuit, and is used to output a target control signal according to the overcharge and overdischarge detection signal and / or the overcurrent detection signal; The first driving circuit is connected to the first control pad and the first selection pad, and is configured to output a transistor driving signal to the first control pad according to the target control signal.

10. The battery protector according to claim 9, characterized in that: The first driving circuit includes a first signal conversion circuit, a second signal conversion circuit, a level shift circuit and a transistor network; The first input end of the first signal conversion circuit is connected to the logic control circuit, the second signal conversion circuit is connected to the first selection pad, and the output end of the first signal conversion circuit is connected to the input end of the level shift circuit, and is used to output a first conversion signal according to the target control signal output by the logic control circuit and the level signal corresponding to the first selection pad; The first input end of the second signal conversion circuit is connected to the first selection pad, the second input end of the second signal conversion circuit is connected to the negative pin of the battery, and the output end of the second signal conversion circuit is connected to the first input end of the transistor network, and is used to output a second conversion signal according to the level signal corresponding to the first selection pad; The second input terminal of the transistor network is connected to the output terminal of the level shift circuit, and the third input terminal of the transistor network is connected to the first selection pad. The transistor network is used to enter a target operating mode according to the first conversion signal, the second conversion signal and the level signal corresponding to the first selection pad, and output a transistor drive signal to the first control pad under the target operating mode.

11. The battery protector according to claim 10, characterized in that: The first signal conversion circuit includes a first inverter and a NOR gate circuit; The input end of the first inverter is connected to the logic control circuit, the output end of the first inverter is connected to the first input end of the NOR gate circuit, the second input end of the NOR gate circuit is connected to the first selection pad, and the output end of the NOR gate circuit is connected to the input end of the level shift circuit.

12. The battery protector according to claim 10, characterized in that: The second signal conversion circuit includes a second inverter and a first resistor; The first end of the first resistor is connected to the negative pin of the battery, the second end of the first resistor is connected to the first selection pad and the input end of the second inverter, and the output end of the second inverter is connected to the first input end of the transistor network.

13. The battery protector according to claim 10, characterized in that: The transistor network includes a first transistor, a second transistor, a third transistor, a fourth transistor and a second resistor; The gate of the first transistor is connected to the output end of the second conversion signal, the source of the first transistor is connected to the positive pin of the battery, the drain of the first transistor is connected to the first end of the second resistor and the output end of the level shift circuit, the second end of the second resistor is connected to the source of the second transistor, the gate of the second transistor is connected to the first selection pad, and the drain of the second transistor is grounded; The gate of the third transistor is connected to the drain of the first transistor, the output end of the level shift circuit and the source of the second transistor, the source of the third transistor is connected to the positive pin of the battery, the drain of the third transistor is connected to the source of the fourth transistor, the gate of the fourth transistor is connected to the second end of the second resistor and the source of the second transistor, and the drain of the fourth transistor is grounded; Wherein, a connection node between the drain of the third transistor and the source of the fourth transistor is an output end of the transistor network.

14. A battery module, characterized in that: It comprises a battery and a battery protection chip as claimed in any one of claims 1 to 5, or a battery protector as claimed in any one of claims 6 to 13.

Citation Information

Patent Citations

  • Charger detection circuit of battery protection chip for different-port application

    CN114744731A