motor controller

Abstract

This invention discloses a motor controller comprising a switching circuit, a control unit, and a duty cycle processing unit. The switching circuit is coupled to a motor to drive the motor. The control unit generates a plurality of control signals to control the switching circuit. The duty cycle processing unit receives a first pulse width modulation signal, wherein the first pulse width modulation signal has a first duty cycle. The duty cycle processing unit determines whether the first duty cycle is equal to 0% or 100%. The duty cycle processing unit includes a duty cycle calculation unit, wherein the duty cycle calculation unit is used to retrieve the first duty cycle.

Description

Technical Field

[0001] This invention relates to a motor controller, and more particularly to a motor controller applicable to a fan motor system. Background Technology

[0002] Traditionally, motor controllers use the duty cycle of an input pulse-width modulation (PWM) signal to control motor speed. Early methods directly used this input PWM signal to drive the motor. That is, the output duty cycle of the motor drive was equal to the duty cycle of this input PWM signal. However, when the motor controller directly uses this input PWM signal to enter a soft-switching drive mode, the frequency of the output PWM signal, after modulation, may fall into the audio range, generating noise. Furthermore, when the motor controller uses this early method to perform a speed-open-loop operation, the motor speed will change if the power supply voltage or temperature changes. Therefore, a new technology is needed to solve these problems. Summary of the Invention

[0003] In view of the aforementioned problems, the object of the present invention is to provide a motor controller applicable to a fan motor system. The motor controller includes a switching circuit, a control unit, a pulse width modulation (PWM) processing unit, a duty cycle processing unit, and a soft switching processing unit. The switching circuit is coupled to a motor to drive the motor. The control unit generates a plurality of control signals to control the switching circuit. The duty cycle processing unit receives a first PWM signal and generates a first signal to the PWM processing unit. The soft switching processing unit generates a second signal to the PWM processing unit, causing the motor controller to be in a soft switching drive mode. The PWM processing unit generates a second PWM signal to the control unit based on the first signal and the second signal.

[0004] The first pulse width modulation signal has an on-time, an off-time, a period, and a first operating period, wherein the first operating period is equal to (on-time / period) × 100%. The operating period processing unit has a operating period calculation unit, which includes an on-time calculation unit, an off-time calculation unit, a period calculation unit, a charging unit, a discharging unit, and a memory unit. The operating period calculation unit is used to retrieve the first operating period. According to an embodiment of the present invention, the operating period processing unit can be used to determine whether the first operating period is equal to 0% or 100%. For example, when the first pulse width modulation signal is maintained at a low level for a time greater than a first predetermined time, the operating period calculation unit can determine that the first operating period is equal to 0%. When the first pulse width modulation signal is maintained at a high level for a time greater than a second predetermined time, the operating period calculation unit can determine that the first operating period is equal to 100%. When the first pulse width modulation signal is maintained at one level for a period longer than a third predetermined time, the duty cycle calculation unit can determine that the first duty cycle is equal to 0% or 100%. If the level is the lower level, the first duty cycle is equal to 0%. If the level is the higher level, the first duty cycle is equal to 100%. The duty cycle calculation unit can determine whether the first duty cycle is equal to 0% or 100% using a specific application calculation unit. Furthermore, the charging unit or the discharging unit can also be used to determine whether the first duty cycle is equal to 0% or 100%.

[0005] The pulse width modulation (PWM) processing unit includes a multiplication unit, a comparison unit, and a triangular wave generation unit. To avoid noise during phase switching, the soft-switching processing unit generates a second duty cycle. The PWM processing unit then multiplies the first duty cycle with the second duty cycle to generate a modulation duty cycle. Finally, the PWM processing unit compares the modulation duty cycle with a comparison value to generate a second PWM signal for the control unit. In other words, the multiplication unit can generate a third signal for the comparison unit based on the first and second signals, where the first signal has the first duty cycle, the second signal has the second duty cycle, and the third signal has the modulation duty cycle. The multiplication unit can utilize a multiplier or multiple adders to perform the multiplication operation. The triangular wave generation unit generates a fourth signal for the comparison unit, where the fourth signal has the comparison value. The comparison unit can be a digital comparator. The comparison unit receives the third signal and the fourth signal, and compares the third signal and the fourth signal to generate the second pulse width modulation signal to the control unit. The fourth signal can be a fixed-frequency signal, so that the second pulse width modulation signal is also a fixed-frequency signal. For example, when the fourth signal is greater than the third signal, the second pulse width modulation signal can be at the low level. When the fourth signal is less than or equal to the third signal, the second pulse width modulation signal can be at the high level. The soft switching processing unit can adjust the second duty cycle so that the second duty cycle gradually decreases or gradually increases over time. That is, the modulation duty cycle and the duty cycle of the second pulse width modulation signal can both gradually change during phase switching, thus causing the phase current to gradually change during phase switching and avoiding noise. Therefore, when the motor controller is in the soft switching drive mode, the motor controller can achieve a current waveform shaping function and avoid generating an audio signal during phase switching. Furthermore, the motor controller can use the first duty cycle to operate in a speed closed-loop mode. This motor controller enables the motor to reach a target speed by capturing the first duty cycle. The motor speed remains constant regardless of changes in power supply voltage or temperature. This motor controller ensures stable motor rotation without speed deviation. Therefore, this motor controller overcomes the problems encountered in earlier methods. Attached Figure Description

[0006] Figure 1 This is a schematic diagram of a motor controller according to an embodiment of the present invention.

[0007] Figure 2 This is a timing diagram of an embodiment of the present invention.

[0008] Figure 3 This is a schematic diagram of a work cycle processing unit according to an embodiment of the present invention.

[0009] Figure 4 This is a schematic diagram of a pulse width modulation processing unit according to an embodiment of the present invention.

[0010] Figure 5 This is a waveform diagram of an embodiment of the present invention.

[0011] Figure reference numerals: 10-Motor controller; M-Motor; 100-Switching circuit; 101-First transistor; 102-Second transistor; 103-Third transistor; 104-Fourth transistor; O1-First terminal; O2-Second terminal; VCC-Terminal; GND-Terminal; 110-Control unit; C1-First control signal; C2-Second control signal; C3-Third control signal; C4-Fourth control signal; 120-Pulse width modulation processing unit; 130-Duty cycle processing unit; 140 - Soft switching processing unit; Vp1 - First pulse width modulation signal; Vp2 - Second pulse width modulation signal; V1 - First signal; V2 - Second signal; 131 - Working cycle calculation unit; 132 - On-time calculation unit; 133 - Off-time calculation unit; 134 - Cycle calculation unit; 135 - Charging unit; 136 - Discharging unit; 137 - Memory unit; 121 - Multiplication unit; 122 - Comparison unit; 123 - Triangle wave generation unit; V3 - Third signal; V4 - Fourth signal. Detailed Implementation

[0012] The objects, features, and advantages of the invention will become more apparent from the following description. Preferred embodiments of the invention will now be described in detail with reference to the accompanying drawings.

[0013] Figure 1 This is a schematic diagram of a motor controller 10 according to an embodiment of the present invention. The motor controller 10 includes a switching circuit 100, a control unit 110, a pulse width modulation processing unit 120, a duty cycle processing unit 130, and a soft switching processing unit 140. The switching circuit 100 includes a first transistor 101, a second transistor 102, a third transistor 103, and a fourth transistor 104 for driving a motor M. The first transistor 101 is coupled to a first terminal O1 and a terminal VCC, while the second transistor 102 is coupled to the first terminal O1 and a terminal GND. The third transistor 103 is coupled to a second terminal O2 and a terminal VCC, while the fourth transistor 104 is coupled to the second terminal O2 and a terminal GND. The first transistor 101, the second transistor 102, the third transistor 103, and the fourth transistor 104 can be a P-type metal-oxide-semiconductor transistor or an N-type metal-oxide-semiconductor transistor. Figure 1As shown, the first transistor 101 and the third transistor 103 are two P-type metal-oxide-semiconductor transistors (MOSFETs). The second transistor 102 and the fourth transistor 104 are two N-type MOSFETs (MOSFETs). The control unit 110 generates a first control signal C1, a second control signal C2, a third control signal C3, and a fourth control signal C4 to control the conduction states of the first transistor 101, the second transistor 102, the third transistor 103, and the fourth transistor 104, respectively. The duty cycle processing unit 130 receives a first pulse width modulation (PWM) signal Vp1 to generate a first signal V1 to the PWM processing unit 120, wherein the first PWM signal Vp1 is an input PWM signal and the first signal V1 can be an M-shaped wave signal. The soft switching processing unit 140 generates a second signal V2 to the PWM processing unit 120, causing the motor controller 10 to be in a soft switching drive mode. The pulse width modulation (PWM) processing unit 120 generates a second PWM signal Vp2 to the control unit 110 based on the first signal V1 and the second signal V2, wherein the second PWM signal Vp2 is an output PWM signal. The motor controller 10 adjusts the speed of the motor M using the second PWM signal Vp2. Furthermore, the motor controller 10 can be applied to a fan motor system.

[0014] Figure 2 This is a timing diagram of an embodiment of the present invention. The first pulse width modulation signal Vp1 has an on-time, an off-time, a period, and a first operating period, wherein the first operating period is equal to (on-time / period) × 100%. In order to overcome the problems encountered in earlier methods, the motor controller 10 needs to have the function of capturing the first operating period. Figure 3This is a schematic diagram of a duty cycle processing unit 130 according to an embodiment of the present invention. The duty cycle processing unit 130 includes a duty cycle calculation unit 131, wherein the duty cycle calculation unit 131 includes a conduction time calculation unit 132, a non-conduction time calculation unit 133, a cycle calculation unit 134, a charging unit 135, a discharging unit 136, and a memory unit 137. The duty cycle calculation unit 131 is used to capture a first duty cycle. The duty cycle calculation unit 131 may be part of a microcontroller, wherein the microcontroller is implemented on an integrated circuit chip. The conduction time calculation unit 132 receives a first pulse width modulation signal Vp1 and uses it to calculate the conduction time. The conduction time calculation unit 132 can use multiple flip-flops to calculate the conduction time. The memory unit 137 is coupled to the conduction time calculation unit 132 to store the conduction time. The non-conduction time calculation unit 133 receives the first pulse width modulation signal Vp1 and uses it to calculate the non-conduction time. The non-conduction time calculation unit 133 can calculate the non-conduction time using multiple flip-flops. A memory unit 137 is coupled to the non-conduction time calculation unit 133 to store the non-conduction time. The period calculation unit 134 receives a first pulse width modulation signal Vp1 and uses it to calculate the period. The period calculation unit 134 can calculate the period using multiple flip-flops. The memory unit 137 is coupled to the period calculation unit 134 to store the period. Therefore, the duty cycle calculation unit 131 can retrieve the first duty cycle based on the on-time, non-conduction time, and period stored in the memory unit 137. To simplify the duty cycle calculation unit 131, the designer can choose to use any two of the on-time calculation unit 132, the non-conduction time calculation unit 133, and the period calculation unit 134 to calculate the first duty cycle. Furthermore, the first duty cycle can be represented by an N-bit value, where N is a positive integer greater than 1. According to a preferred embodiment of the present invention, N can be equal to 8.

[0015] However, the formula used to calculate the first duty cycle described above cannot accurately calculate the two extreme values ​​of 0% and 100%. Therefore, a specific method is needed to extract 0% and 100%. According to an embodiment of the present invention, the duty cycle processing unit 130 can be used to determine whether the first duty cycle is equal to 0% or 100%. For example, when the first pulse width modulation signal Vp1 is maintained at a low level for a time greater than a first predetermined time, the duty cycle calculation unit 131 can determine that the first duty cycle is equal to 0%. When the first pulse width modulation signal Vp1 is maintained at a high level for a time greater than a second predetermined time, the duty cycle calculation unit 131 can determine that the first duty cycle is equal to 100%. When the first pulse width modulation signal Vp1 is maintained at a level for a time greater than a third predetermined time, the duty cycle calculation unit 131 can determine that the first duty cycle is equal to 0% or 100%. If the level is a low level, the first duty cycle is equal to 0%. If the level is a high level, the first duty cycle is equal to 100%. Therefore, the non-conduction time calculation unit 133 or the cycle calculation unit 134 can be used to determine whether the first operating cycle is equal to 0%. The conduction time calculation unit 132 or the cycle calculation unit 134 can be used to determine whether the first operating cycle is equal to 100%. The operating cycle calculation unit 131 can further determine whether the first operating cycle is equal to 0% or 100% using a specific application calculation unit (not shown). The specific application calculation unit is used to determine whether the first operating cycle is equal to 0% or 100%. In addition, the charging unit 135 or the discharging unit 136 can also be used to determine whether the first operating cycle is equal to 0% or 100%. For example, the charging unit 135 can charge a component according to the first pulse width modulation signal Vp1, and then the operating cycle calculation unit 131 determines whether the first operating cycle is equal to 0% or 100% based on a parameter value of the component. The discharging unit 136 can discharge a component according to the first pulse width modulation signal Vp1, and then the operating cycle calculation unit 131 determines whether the first operating cycle is equal to 0% or 100% based on a parameter value of the component. In other words, the duty cycle calculation unit 131 can use a charging procedure to determine whether the first duty cycle is equal to 0% or 100%. The duty cycle calculation unit 131 can use a discharging procedure to determine whether the first duty cycle is equal to 0% or 100%.

[0016] Figure 4 This is a schematic diagram of a pulse width modulation (PWM) processing unit 120 according to an embodiment of the present invention. The PWM processing unit 120 includes a multiplication unit 121, a comparison unit 122, and a triangular wave generation unit 123. Please also refer to... Figure 1 and Figure 4To avoid noise during phase switching, the soft switching processing unit 140 generates a second duty cycle, which can be represented by an N-bit value. Next, the pulse width modulation (PWM) processing unit 120 performs a multiplication operation between the first and second duty cycles to generate a modulation duty cycle, which can also be represented by an N-bit value. Finally, the PWM processing unit 120 compares the modulation duty cycle with a comparison value to generate a second PWM signal Vp2 to the control unit 110, where the comparison value can also be represented by an N-bit value. According to a preferred embodiment of the invention, N can be equal to 8. That is, the multiplication unit 121 can generate a third signal V3 to the comparison unit 122 based on the first signal V1 and the second signal V2, where the first signal V1 has a first duty cycle, the second signal V2 has a second duty cycle, and the third signal V3 has a modulation duty cycle. The multiplication unit 121 can utilize a multiplier or multiple adders to implement the multiplication operation. The triangular wave generation unit 123 generates a fourth signal V4 to the comparison unit 122, wherein the fourth signal V4 has a comparison value. The comparison unit 122 may be a digital comparator. The comparison unit 122 receives the third signal V3 and the fourth signal V4, and compares the third signal V3 and the fourth signal V4 to generate a second pulse width modulation signal Vp2 to the control unit 110. The fourth signal V4 may be a fixed-frequency signal, such that the second pulse width modulation signal Vp2 is also a fixed-frequency signal. For example, when the fourth signal V4 is greater than the third signal V3, the second pulse width modulation signal Vp2 may be at a low level. When the fourth signal V4 is less than or equal to the third signal V3, the second pulse width modulation signal Vp2 may be at a high level. Figure 5 This is a waveform diagram according to an embodiment of the present invention. The soft switching processing unit 140 can adjust the second operating cycle, causing the second operating cycle to gradually decrease or gradually increase over time. That is, both the modulation operating cycle and the operating cycle of the second pulse width modulation signal Vp2 can gradually change during phase switching, thus causing the phase current to gradually change during phase switching and thereby avoiding noise. Figure 5 As shown, the waveform of the first signal V1 is gradually modulated into the waveform of the third signal V3 during a soft switching process. The first signal V1 and the third signal V3 can each be an M-shaped wave signal. The fourth signal V4 can be a triangular wave signal or a sawtooth wave signal. Therefore, when the motor controller 10 is in the soft switching drive mode, the motor controller 10 can achieve a current waveform shaping function and avoid generating an audio signal during phase switching. Furthermore, the motor controller 10 can utilize the first duty cycle to operate in a speed closed-loop mode. The motor controller 10 can capture the first duty cycle to make the motor M reach a target speed. When the power supply voltage or temperature changes, the speed of the motor M can remain constant. The motor controller 10 can make the motor M rotate stably without deviating from its speed.

[0017] According to one embodiment of the present invention, the motor controller 10 can be applied to a single-phase motor or a multi-phase motor. The motor controller 10 can capture a first duty cycle, enabling smooth operation and noise avoidance when entering a soft-switching drive mode. Furthermore, the motor controller 10 can capture the first duty cycle to operate in a speed closed-loop mode. When the power supply voltage or temperature changes, the speed of the motor M can remain constant. Therefore, the motor controller 10 of the present invention overcomes the problems encountered in earlier methods.

[0018] While the invention has been described by way of example with reference to preferred embodiments, it should be understood that the invention is not limited to the embodiments disclosed herein. Rather, the invention is intended to cover various modifications and similar configurations that will be apparent to those skilled in the art. Therefore, the scope of the invention should be interpreted in the broadest sense to include all such modifications and similar configurations.

[0019] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made within the scope of the present invention should be included within the scope of the present invention.

Claims

1. A motor controller, characterized in that, Include: A switching circuit, coupled to a motor, is used to drive the motor; A control unit is used to generate multiple control signals to control the switching circuit; A duty cycle processing unit, wherein the duty cycle processing unit receives a first pulse width modulation signal, the first pulse width modulation signal having a first duty cycle, and the duty cycle processing unit is used to determine whether the first duty cycle is equal to 0% or 100%; A pulse width modulation (PWM) processing unit, wherein a duty cycle processing unit generates a first signal to the PWM processing unit, the first signal having the first duty cycle; and A soft-switching processing unit generates a second signal to the pulse width modulation (PWM) processing unit. The second signal has a second operating cycle. The PWM processing unit includes a multiplication unit, a comparison unit, and a triangular wave generation unit. The multiplication unit generates a third signal based on the first signal and the second signal. The third signal has a modulation operating cycle. The triangular wave generation unit generates a fourth signal to the comparison unit. The comparison unit receives the third signal and the fourth signal and compares the third signal and the fourth signal to generate a second PWM signal to the control unit.

2. The motor controller as described in claim 1, characterized in that, The work cycle processing unit includes a work cycle calculation unit that uses a charging procedure to determine whether the first work cycle is equal to 0% or 100%.

3. The motor controller as described in claim 1, characterized in that, The work cycle processing unit includes a work cycle calculation unit that uses a discharge procedure to determine whether the first work cycle is equal to 0% or 100%.

4. The motor controller as described in claim 1, characterized in that, The work cycle processing unit includes a work cycle calculation unit for retrieving the first work cycle, which the motor controller uses to operate in a speed closed-loop mode.

5. The motor controller as described in claim 1, characterized in that, The pulse width modulation processing unit performs a multiplication operation between the first working cycle and the second working cycle to generate the modulation working cycle.

6. The motor controller as described in claim 5, characterized in that, The second work cycle gradually decreases over time.

7. The motor controller as described in claim 5, characterized in that, The second work cycle gradually increases over time.

8. The motor controller as described in claim 1, characterized in that, The cycle processing unit includes a cycle calculation unit for capturing the first cycle, and the cycle calculation unit is part of a microcontroller.

9. The motor controller as described in claim 8, characterized in that, This microcontroller is implemented on an integrated circuit chip.

10. The motor controller as claimed in claim 1, characterized in that, The duty cycle processing unit includes a duty cycle calculation unit. The first pulse width modulation signal also has an on-time and an off-time. The duty cycle calculation unit includes: A conduction time calculation unit is provided to receive the first pulse width modulation signal and calculate the conduction time. A non-conduction time calculation unit is used to receive the first pulse width modulation signal to calculate the non-conduction time; as well as A memory unit, wherein the memory unit is coupled to the on-time calculation unit to store the on-time, and the memory unit is coupled to the non-on-time calculation unit to store the non-on-time.

11. The motor controller as described in claim 10, characterized in that, The non-conduction time calculation unit is used to determine whether the first working cycle is equal to 0%, and the conduction time calculation unit is used to determine whether the first working cycle is equal to 100%.

12. The motor controller as claimed in claim 1, characterized in that, The duty cycle processing unit includes a duty cycle calculation unit. The first pulse width modulation signal also has an on-time and a period. The duty cycle calculation unit includes: A conduction time calculation unit is provided to receive the first pulse width modulation signal and calculate the conduction time. A cycle calculation unit is used to receive the first pulse width modulation signal to calculate the cycle; as well as A memory unit, wherein the memory unit is coupled to the conduction time calculation unit to store the conduction time, and the memory unit is coupled to the cycle calculation unit to store the cycle.

13. The motor controller as described in claim 12, characterized in that, The cycle calculation unit is used to determine whether the first working cycle is equal to 0%, and the conduction time calculation unit or the cycle calculation unit is used to determine whether the first working cycle is equal to 100%.

14. The motor controller as claimed in claim 1, characterized in that, The duty cycle processing unit includes a duty cycle calculation unit. The first pulse width modulation signal also has a non-conduction time and a period. The duty cycle calculation unit includes: A non-conduction time calculation unit is used to receive the first pulse width modulation signal to calculate the non-conduction time; A cycle calculation unit is used to receive the first pulse width modulation signal to calculate the cycle; as well as A memory unit, wherein the memory unit is coupled to the non-conducting time calculation unit to store the non-conducting time, and the memory unit is coupled to the cycle calculation unit to store the cycle.

15. The motor controller as described in claim 14, characterized in that, The non-conduction time calculation unit or the cycle calculation unit is used to determine whether the first working cycle is equal to 0%, and the cycle calculation unit is used to determine whether the first working cycle is equal to 100%.

16. The motor controller as claimed in claim 1, characterized in that, The work cycle processing unit includes a work cycle calculation unit, which includes a charging unit for determining whether the first work cycle is equal to 0% or 100%.

17. The motor controller as claimed in claim 16, characterized in that, The charging unit charges a component according to the first pulse width modulation signal, and the duty cycle calculation unit determines whether the first duty cycle is equal to 0% or 100% based on a parameter value of the component.

18. The motor controller as claimed in claim 1, characterized in that, The work cycle processing unit includes a work cycle calculation unit, which includes a discharge unit for determining whether the first work cycle is equal to 0% or 100%.

19. The motor controller as described in claim 18, characterized in that, The discharge unit discharges a component based on the first pulse width modulation signal, and the duty cycle calculation unit determines whether the first duty cycle is equal to 0% or 100% based on a parameter value of the component.

20. The motor controller as claimed in claim 1, characterized in that, The work cycle processing unit includes a work cycle calculation unit, which includes a specific application calculation unit for determining whether the first work cycle is equal to 0% or 100%.

21. The motor controller as claimed in claim 1, characterized in that, The first working cycle is represented by an N-bit value, where N is a positive integer greater than 1.

22. The motor controller as described in claim 21, characterized in that, N equals 8.

23. The motor controller as claimed in claim 1, characterized in that, The first signal is an M-shaped wave signal.

24. The motor controller as claimed in claim 1, characterized in that, The third signal is an M-shaped wave signal.

25. The motor controller as claimed in claim 1, characterized in that, The fourth signal is either a triangular wave signal or a sawtooth wave signal.

26. The motor controller as claimed in claim 1, characterized in that, The fourth signal is a fixed-frequency signal.

27. The motor controller as claimed in claim 1, characterized in that, The comparison unit is a digital comparator.

28. The motor controller as claimed in claim 1, characterized in that, When the motor controller is in a soft-switching drive mode, it achieves a current waveform shaping function when switching phases.

29. The motor controller as claimed in claim 1, characterized in that, This motor controller is used in a fan motor system.

30. The motor controller as claimed in claim 1, characterized in that, This motor controller is applicable to a single-phase motor or a multi-phase motor.

31. The motor controller as described in claim 1, characterized in that, The motor controller enables the motor to reach a target speed by capturing the first working cycle.

32. The motor controller as described in claim 1, characterized in that, When the power supply voltage changes, the motor's rotational speed remains constant.

33. The motor controller as described in claim 1, characterized in that, When a temperature changes, the motor's rotational speed remains constant.

34. The motor controller as claimed in claim 1, characterized in that, The motor controller ensures that the motor rotates stably and that the motor's rotational speed does not deviate.

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