Ceramic electronic component

Abstract

A ceramic electronic component includes an element main body having a ceramic layer and an internal electrode layer, and an external electrode formed on an end surface of the element main body and electrically connected to at least one end of the internal electrode layer. The external electrode has a fired electrode layer containing at least either one of copper and a copper alloy as a main component. The fired electrode layer has voids. At least a portion of an inner wall surface of the voids is covered with a film portion containing at least either one of nickel and a nickel alloy.

Description

Technical Field

[0001] This invention relates to ceramic electronic components with external electrodes. Background Technology

[0002] As shown in Patent Document 1, an electronic component is known to have a component body containing ceramic components and an external electrode formed on the outer surface of the component body. A sintered electrode layer is widely used as the external electrode of ceramic electronic components. The sintered electrode layer can be formed by applying a conductive paste containing conductor powder and glass frit to the surface of the component body and then sintering it.

[0003] In cases where electronic components with such sintered electrode layers are used at high temperatures, the external electrodes may oxidize, increasing the equivalent series resistance (ESR) of the electronic component. Furthermore, in conventional ceramic electronic components, the mounting strength to the substrate, etc., has been a technical challenge.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 4-171912 Summary of the Invention

[0007] The problem that the invention aims to solve

[0008] The present invention was made in view of such actual conditions, and its object is to provide a ceramic electronic component that has high mounting strength to substrates and the like and can maintain low ESR.

[0009] Technical solutions for solving the problem

[0010] To achieve the above objectives, the present invention provides a ceramic electronic component having:

[0011] The main body of the component has a ceramic layer and an internal electrode layer;

[0012] An external electrode, formed on the end face of the component body, is electrically connected to at least one end of the internal electrode layer, wherein...

[0013] The external electrode has a sintered electrode layer.

[0014] The sintered electrode layer contains at least one of copper and copper alloys as a main component.

[0015] The sintered electrode layer has voids.

[0016] The inner wall surface of the void is specified to be covered by a film containing at least one of nickel and nickel alloys.

[0017] The inventors have discovered that ceramic electronic components, by having the above-described structure, exhibit improved mounting strength to substrates and the like, while maintaining low ESR. The reasons for achieving these effects may not be immediately clear, but the following reasons are considered.

[0018] In the ceramic electronic component of the present invention, because the sintered electrode layer has voids, stress in the direction in which the sintered electrode layer is fastened to the component body can be suppressed during cooling after the sintered electrode layer is formed onto the component body. As a result, it is believed that the mounting strength to the substrate or the like is improved, and the degradation or breakage of the ceramic electronic component caused by substrate deflection after mounting can be suppressed.

[0019] Furthermore, in the ceramic electronic component of the present invention, since the main component of the sintered electrode layer is at least copper or a copper alloy, the sintered electrode layer itself has high conductivity. Additionally, at least a portion of the inner wall surface of the voids contained in the sintered electrode layer of the present invention is covered by a film portion composed of at least nickel or a nickel alloy. The nickel or nickel alloy forms a non-dynamic film. Therefore, copper or the like, covered by the film portion formed of nickel or the like with the non-dynamic film, is difficult to oxidize. As a result, the conductivity of the sintered electrode layer is further improved. Consequently, a low ESR of the ceramic electronic component can be maintained.

[0020] Preferably, the sintered electrode layer has a first region and a second region.

[0021] The first region is in contact with the end face of the component body and is located near the joint boundary with the component body.

[0022] The second region is located outside the first region, forming the outer surface of the sintered electrode layer. The ratio of nickel atoms to copper atoms in the first region is set as a first ratio, Ni / Cu.

[0023] When the ratio of the number of nickel atoms to the number of copper atoms in the second region is set as the second ratio Ni / Cu,

[0024] The ratio of (second ratio Ni / Cu - first ratio Ni / Cu) is greater than 0.02.

[0025] Because the second region is the outer side (the side furthest from the main component), copper and other materials are less prone to oxidation. Therefore, by increasing the nickel content in the outer region, i.e., the second region, the effect of suppressing the increase in ESR caused by changes over time or temperature can be further improved.

[0026] Preferably, the conductor area ratio, expressed as the ratio of the total cross-sectional area of ​​the conductors to the unit cross-sectional area of ​​the sintered electrode layer, is 0.55 to 0.75.

[0027] By setting the conductor area ratio within the aforementioned range, the mounting strength to the substrate and the like is further improved, and a lower ESR can be maintained.

[0028] Preferably, the void area ratio, expressed as the ratio of the total cross-sectional area of ​​the voids to the unit cross-sectional area of ​​the sintered electrode layer, is 0.1 to 0.25.

[0029] By setting the void area ratio within the aforementioned range, the mounting strength to the substrate and the like is further improved, and a lower ESR can be maintained.

[0030] Preferably, the ratio of nickel atoms to copper atoms in the sintered electrode layer (overall ratio Ni / Cu) is 0.08 to 0.2.

[0031] By setting the overall Ni / Cu ratio within the aforementioned range, it is easier to form a nickel-containing film on the inner wall surface of the void, further suppressing ESR changes caused by temperature variations, and further improving the mounting strength to the substrate, etc.

[0032] The sintered electrode layer may also contain an oxide, which contains at least one of silicon and zinc. Attached Figure Description

[0033] Figure 1 This is a schematic cross-sectional view showing a multilayer ceramic capacitor according to one embodiment of the present invention.

[0034] Figure 2 It is Figure 1 The enlarged cross-sectional view of the main part of region II is shown.

[0035] Figure 3 It is Figure 2 The enlarged cross-sectional view of the main part of region III is shown.

[0036] Figure 4 It is Figure 3 The enlarged cross-sectional view of the main part of region IV is shown.

[0037] Figure 5 These are explanatory diagrams of embodiments of the present invention. Detailed Implementation

[0038] The present invention will now be described in detail based on the embodiments shown in the accompanying drawings.

[0039] In this embodiment, as an example of the ceramic electronic component of the present invention, [the following is an example of the ceramic electronic component of the present invention]. Figure 1 The multilayer ceramic capacitor 2 shown will be described below. The multilayer ceramic capacitor 2 has an element body 4 and a pair of external electrodes 6 formed on the outer surface of the element body 4.

[0040] Figure 1 The component body 4 shown is typically roughly rectangular, having two opposing end faces 4a along the X-axis, two opposing side faces 4b along the Y-axis, and two opposing side faces 4b along the Z-axis. The shape of the component body 4 is not particularly limited; it can also be elliptical, cylindrical, or other prismatic shapes. Furthermore, the external dimensions of the component body 4 are not particularly limited; for example, the length (L0) along the X-axis can be set to 0.4–5.7 mm, the width (W0) along the Y-axis to 0.2–5.0 mm, and the height (T0) along the Z-axis to 0.2–3.0 mm.

[0041] In this embodiment, the X-axis, Y-axis, and Z-axis are perpendicular to each other. Furthermore, in this embodiment, "inner side" refers to the side closer to the center of the multilayer ceramic capacitor 2, and "outer side" refers to the side further away from the center of the multilayer ceramic capacitor 2.

[0042] The component body 4 has a dielectric layer 10 (ceramic layer) and an internal electrode layer 12 that are substantially parallel to a plane including the X and Y axes. Inside the component body 4, the dielectric layer 10 and the internal electrode layer 12 are alternately stacked along the Z-axis direction (stack direction). Here, "substantially parallel" means that although they are mostly parallel, they may have slightly non-parallel parts, and the dielectric layer 10 and the internal electrode layer 12 may also have slight irregularities or tilts.

[0043] In addition, according to Figure 1 The end face 4a of the component body 4 in the X-axis direction is a plane; in other words, the dielectric layer 10 and the internal electrode layer 12 are stacked as a plane. However, the end face 4a of the component body 4 in the X-axis direction may also have a portion that is not a plane. In addition, the dielectric layer 10 and the internal electrode layer 12 may not be a plane, but may be stacked in a state where, for example, a portion of the dielectric layer 10 is cut off or a portion of the internal electrode layer 12 protrudes.

[0044] The material of the dielectric layer 10 is not particularly limited, and can include perovskite-type compounds represented by ABO3, tungsten bronze-type compounds, etc. as the main components. Preferably, the dielectric layer 10 includes perovskite-type compounds represented by ABO3 as the main components.

[0045] The main component of dielectric layer 10 refers to the component that contains more than 80% by mass in dielectric layer 10.

[0046] Perovskite compounds represented by ABO3 can also be, for example, composed of (Ba... 1-a-b Sr a Ca b ) m (Ti 1-c-d Zrc Hf d The perovskite compound represented by )O3 satisfies the formula 0.94 < m < 1.1, 0 ≤ a ≤ 1, 0 ≤ b ≤ 1, 0 ≤ c ≤ 1, and 0 ≤ d ≤ 1.

[0047] m represents the element ratio of the A-site and the B-site, for example, 0.94 < m < 1.1.

[0048] a represents the element ratio of strontium (Sr), for example, 0 ≤ a ≤ 1, preferably 0 ≤ a < 1.

[0049] b represents the element ratio of calcium (Ca), 0 ≤ b ≤ 1, preferably 0 ≤ b < 1.

[0050] c represents the element ratio of zirconium (Zr), 0 ≤ c ≤ 1, preferably 0 ≤ c < 1.

[0051] d represents the element ratio of hafnium (Hf), 0 ≤ d ≤ 1, preferably 0 ≤ d < 1.

[0052] In addition, the element ratio of oxygen (O) in the above composition formula can also deviate slightly from the stoichiometric composition.

[0053] In addition to these main components, the dielectric layer 10 of the present embodiment may also contain auxiliary components such as manganese compounds, magnesium compounds, chromium compounds, nickel compounds, rare earth element compounds, silicon compounds, lithium compounds, boron compounds, and vanadium compounds. The type or combination of the auxiliary components and their addition amounts are not particularly limited.

[0054] The average thickness (Td) of the dielectric layer 10 sandwiched by the internal electrode layers 12 is not particularly limited. For example, it is preferably 30 μm or less, more preferably 15 μm or less, and further preferably 10 μm or less. In addition, the number of stacked dielectric layers 10 can be determined according to the desired characteristics and is not particularly limited. For example, it can be set to 20 layers or more, and more preferably 50 layers or more.

[0055] On the other hand, the internal electrode layers 12 are stacked between the respective dielectric layers 10, and the number of stacked layers is determined according to the number of stacked dielectric layers 10. Moreover, the average thickness (Te) of each layer of the internal electrode layer 12 is not particularly limited. For example, it can be set to 3.0 μm or less.

[0056] Moreover, for the plurality of internal electrode layers 12, they are stacked such that one end portion is alternately exposed at the two end faces 4a of the element body 4 facing each other in the X-axis direction. Moreover, a pair of external electrodes 6 are respectively formed on one end face 4a of the element body 4 and are electrically connected to the exposed ends of the alternately arranged internal electrode layers 12. By forming the internal electrode layers 12 and the external electrodes 6 in this way, a capacitor circuit is constituted by the external electrodes 6 and the internal electrode layers 12.

[0057] That is, the internal electrode layer 12, as part of the capacitor circuit, functions to apply voltage to each dielectric layer 10. Therefore, the internal electrode layer 12 is constructed of a conductive material. Specifically, materials such as copper, nickel, silver, palladium, gold, platinum, or alloys containing at least one of these metallic elements can be used. More preferably, because the constituent material of the dielectric layer 10 has reduction resistance, the conductive material contained in the internal electrode layer 12 is nickel or a nickel alloy. Furthermore, when nickel or a nickel alloy is used as the main component, one or more secondary components selected from manganese, copper, chromium, etc., for internal electrodes may also be included.

[0058] In addition, the inner electrode layer 12 may contain ceramic components as commonly used materials, in addition to the conductive materials described above, as well as trace amounts (e.g., less than 0.1% by mass) of non-metallic components such as sulfur or phosphorus.

[0059] like Figure 1 As shown, the external electrode 6 of this embodiment integrally has an end portion formed on the end face 4a in the X-axis direction of the element body 4 and extension portions of the ends formed on the four side faces 4b of the element body 4 in the X-axis direction. That is, a pair of external electrodes 6 are formed to each surround the element body 4 from the end face 4a to the side face 4b. Furthermore, the pair of external electrodes 6 are insulated from each other in such a way that they do not contact each other in the X-axis direction.

[0060] As described above, in this embodiment, the extension portions of the external electrode 6 are formed on the four sides 4b of the component body 4. The extension portions of the external electrode 6 are not mandatory; the external electrode 6 may also consist only of end faces. Alternatively, when the multilayer ceramic capacitor 2 is surface-mounted onto the substrate, the extension portions of the external electrode 6 may be formed at least on the side 4b of the substrate opposite to the mounting surface, or may not be formed on the side 4b opposite to the mounting surface.

[0061] Figure 2 It is Figure 1 An enlarged schematic cross-sectional view of Part II. Furthermore, in Figure 2 The image shows one of a pair of external electrodes 6, but the other external electrode 6 also has the same characteristics as... Figure 2 The same characteristics. The following is based on... Figure 2 The detailed features of the external electrode 6 in this embodiment will be described.

[0062] like Figure 2 As shown, the external electrode 6 has a sintered electrode layer 6a comprising a conductor 61, a void 62, and an oxide 63. Furthermore, regarding the sintered electrode layer 6a, at least a portion of the inner wall surface of the void 62 is covered by a film portion 64. The film portion 64 contains at least a portion of nickel and nickel alloys. Additionally, the film portion 64... Figure 2 Not shown in the figure, but described later. Figure 3 and Figure 4 The diagram is shown in the figure.

[0063] The sintered electrode layer 6a contains at least one of copper and copper alloys as a main component. That is, copper and / or copper alloys constitute the conductor 61. Furthermore, the film portion 64 is also included in the conductor 61. That is, when calculating the conductor area ratio described later, the film portion 64 is also included in the calculation of the conductor 61. The main component of the sintered electrode layer 6a refers to a component containing 80% by mass or more in the sintered electrode layer 6a.

[0064] When a copper alloy is used as conductor 61, conductor 61 may contain elements other than copper, such as aluminum, nickel, silver, palladium, tin, zinc, phosphorus, iron, and manganese. Moreover, the elements constituting conductor 61 other than copper are preferably set to 5 moles or less relative to 100 moles of copper.

[0065] The composition of oxide 63 constituting this embodiment is not particularly limited, but it contains at least one of silicon and zinc. In addition to silicon and zinc, oxide 63 may also contain boron, aluminum, zirconium, manganese, magnesium, titanium, potassium, sodium, calcium, strontium, barium, phosphorus, and rare earth elements. Oxide 63 may or may not be glass.

[0066] The electrode layer 6a is bonded to the outer surface (end face 4a) of the component body 4.

[0067] The external electrode 6 can be composed of a single sintered electrode layer 6a, or it can be composed of multiple electrode layers stacked together. When the external electrode 6 is composed of multiple electrode layers, the sintered electrode layer 6a is formed in contact with the outer surface of the component body 4, and other sintered electrode layers 6a, resin electrode layers, or plated electrode layers are formed on the sintered electrode layer 6a.

[0068] like Figure 2 As shown, the external electrode 6 preferably has a plated electrode layer 6b. By forming the plated electrode layer 6b, the external electrode 6 exhibits good solder wettability. Figure 2 In this example, an external electrode 6 is illustrated, consisting of a three-layer structure (stacked in the order described) of an electrode layer 6a, a nickel plating layer 6b1, and a tin plating layer 6b2.

[0069] The average thickness (Ts) of the sintered electrode layer 6a connected to the end face 4a can be set to 5 to 200 μm, preferably 20 to 50 μm. Furthermore, when the external electrode 6 is composed of multiple electrode layers, the average thickness (Tt) of the external electrode 6 can be set to approximately 5 to 300 μm, preferably 100 μm or less.

[0070] In this embodiment, the conductor area ratio, expressed as the ratio of the total cross-sectional area of ​​the conductors 61 to the unit cross-sectional area of ​​the sintered electrode layer 6a, is not particularly limited, but is preferably 0.55 to 0.75, more preferably 0.56 to 0.74. When the conductor area ratio is within the above range, the multilayer ceramic capacitor 2 is less prone to damage due to flexural bending compared to when it exceeds the above range. Furthermore, when the conductor area ratio is within the above range, a lower ESR can be maintained compared to when it is below the above range.

[0071] Furthermore, the "unit cross-sectional area" is preferably an area that includes at least the area around the joint boundary 46 to the area around the outer surface 6ab.

[0072] In this embodiment, the void area ratio, expressed as the ratio of the total cross-sectional area of ​​the voids 62 to the unit cross-sectional area of ​​the sintered electrode layer 6a, is not particularly limited, but is preferably 0.1 to 0.25, more preferably 0.12 to 0.24. When the void area ratio is within the above range, a lower ESR can be maintained compared to when it exceeds the above range. Furthermore, when the void area ratio is within the above range, the multilayer ceramic capacitor 2 is less prone to damage due to flexural deformation compared to when it is below the above range.

[0073] In this embodiment, the ratio of nickel atoms to copper atoms (overall ratio Ni / Cu) in the sintered electrode layer 6a is preferably 0.08 to 0.2, more preferably 0.082 to 0.191. When the overall Ni / Cu ratio is within the above range, the multilayer ceramic capacitor 2 is less prone to damage due to flexural bending compared to when it exceeds the above range. When the overall Ni / Cu ratio is within the above range, the film portion 64 is more easily formed compared to when it is below the above range; therefore, even when heat-treated at high temperatures, a lower ESR can be maintained.

[0074] Figure 3 It is Figure 2 An enlarged, approximate cross-sectional view of Part III. (See attached image.) Figure 3 As shown, in this embodiment, the sintered electrode layer 6a is divided into at least two regions, having a first region 6a1 and a second region 6a2.

[0075] The first region 6a1 is in contact with the end face 4a of the component body 4, and is located near the boundary 46 between the component body 4 and the sintered electrode layer 6a. Furthermore, as... Figure 3 As shown, the bonding boundary 46 in this embodiment is not a strict boundary between the element body 4 and the sintered electrode layer 6a, but is represented as a straight line that is approximately located at the boundary between the element body 4 and the sintered electrode layer 6a.

[0076] On the other hand, the second region 6a2 is located outside the first region 6a1, forming the outer surface 6ab of the deposited electrode layer 6a. That is, the second region 6a2 is the region near the outer surface 6ab that is in contact with the plated electrode layer 6b.

[0077] The thickness (t1) of the first region 6a1 and the thickness (t2) of the second region 6a2 are determined, for example, by the method described below.

[0078] A cross-section in the XZ direction is obtained for the external electrode 6 of the multilayer ceramic capacitor 2. Next, a sintered electrode layer thickness segment corresponding to the thickness (Ts) of the sintered electrode layer 6a is drawn. That is, the sintered electrode layer thickness segment is a line segment parallel to the X-axis direction and extends from the end face 4a of the element body 4 to the outer surface 6ab. The ratio of nickel atoms to copper atoms (Ni / Cu) is determined at at least 10 equally spaced measurement points on the sintered electrode layer thickness segment. The Ni / Cu ratios of two adjacent measurement points on the sintered electrode layer thickness segment are compared. Compared to the element body 4 side, the Ni / Cu ratio on the outer surface 6ab side is larger, with a difference of 0.02 or more. The midpoint between the two points with the largest absolute value of the difference is identified as the boundary point between the first region 6a1 and the second region 6a2. That is, the region boundary point to the end face 4a of the element body 4 is the first region 6a1, and the region boundary point to the outer surface 6ab is the second region 6a2. In addition, the distance from the boundary point of the region to the end face 4a of the component body 4 is the thickness (t1) of the first region 6a1, and the distance from the boundary point of the region to the outer surface 6ab is the thickness (t2) of the second region 6a2.

[0079] The thickness (t1) of the first region 6a1 is preferably 15 to 35% of the thickness (Ts) of the sintered electrode layer 6a, more preferably 20 to 30%.

[0080] Furthermore, the first ratio Ni / Cu described later can also be the average Ni / Cu of each measurement point in the first region 6a1 among the measurement points of the aforementioned sintered electrode layer thickness segment. Additionally, the second ratio Ni / Cu described later can also be the average Ni / Cu of each measurement point in the second region 6a2 among the measurement points of the aforementioned sintered electrode layer thickness segment.

[0081] The composition of the conductor 61 in the first region 6a1 and the conductor 61 in the second region 6a2 may be different, but a common composition is preferred.

[0082] Figure 4 It is Figure 3 An enlarged, approximate cross-sectional view of section IV. (See attached image.) Figure 3 and Figure 4As shown, in this embodiment, at least a portion of the inner wall surface of the defined gap 62 is covered by a film portion 64 made of nickel or a nickel alloy. That is, the film portion 64 may cover the entire surface of the gap 62, or it may only cover a portion, but it is preferable that it does not completely fill the interior of the gap 62. In addition, the thickness of the film portion 64 may be uneven, and it may have irregularities.

[0083] As described above, the film portion 64 always covers the inner wall surface of the gap 62. Therefore, in this embodiment, in a field of view of 30μm × 30μm in contact with the outer surface 6ab, the portion of the gap 62 with an equivalent circle diameter of 3μm or more in which the interior of the gap 62 is completely filled with nickel and / or nickel alloy is preferably one or less, more preferably zero. Furthermore, the equivalent circle diameter refers to the diameter of a circle having an area equal to the area of ​​this shape.

[0084] Alternatively, oxide 63 may be contained inside the void 62, and a film portion 64 may be formed between the conductor 61 and the oxide 63.

[0085] The average thickness (Tc) of the film portion 64 is not particularly limited, and is 0.5 to 3 μm, preferably 0.58 to 2.9 μm. When the average thickness of the film portion 64 is within the above range, the multilayer ceramic capacitor 2 is less prone to damage due to bending compared to when it exceeds the above range. Furthermore, when the average thickness of the film portion 64 is within the above range, the effect of the film portion 64 is more easily obtained compared to when it is below the above range; therefore, even when heat-treated at high temperatures, a lower ESR can be maintained.

[0086] In this embodiment, within a field of view of 30μm × 30μm that is in contact with the outer surface 6ab, it is preferable to identify at least four film portions 64 with a thickness of 0.5μm or more and a length of 4μm or more.

[0087] In this embodiment, when the ratio of nickel atoms to copper atoms in the first region 6a1 is set as a first ratio Ni / Cu, and the ratio of nickel atoms to copper atoms in the second region 6a2 is set as a second ratio Ni / Cu, the (second ratio Ni / Cu - first ratio Ni / Cu) is preferably 0.02 or more, and more preferably 0.023 to 0.073. This is because the second region 6a2 is an outer region, and therefore a region where copper is easily oxidized; thus, compared to the first region 6a1, the necessity of forming the film portion 64 is higher. That is, by increasing the nickel ratio in the outer region, i.e., the second region, the effect of suppressing the increase in ESR caused by changes over time or temperature can be further improved.

[0088] Furthermore, the external electrode 6 can be analyzed through cross-sectional observation using methods such as SEM (Scanning Electron Microscopy) or STEM (Scanning Transmission Electron Microscopy). Additionally, during cross-sectional observation, the composition of the conductor 61, oxide 63, and coating 64 can be determined by performing component analysis using an electron beam microscopy (EPMA) analyzer. In this embodiment, when performing component analysis using EPMA, an EDS (Energy Dispersion Spectrometer) or WDS (Wavelength Dispersion Spectrometer) can be used as an X-ray spectrometer. Preferably, the component analysis is performed at at least three sites, and the composition of the conductor 61, oxide 63, and coating 64 is calculated by averaging the measurement results.

[0089] For example, the conductor area ratio and void area ratio of the sintered electrode layer 6a can be determined by image analysis of cross-sectional photographs obtained through cross-sectional observation using SEM or STEM. When observing the cross-section of the sintered electrode layer 6a using SEM reflectance electron images or STEM HAADF images, conductors 61, which typically have a higher density than other parts, are usually identified as high-contrast regions. In contrast, oxides 63 are typically identified as low-contrast regions, and voids 62 are typically identified as regions with even lower contrast than oxides 63. Therefore, by binarizing the cross-sectional photograph, the conductor area ratio can typically be calculated as the ratio of the area of ​​the high-contrast regions to the area of ​​the entire measurement field. Furthermore, the void area ratio can typically be calculated as the ratio of the area of ​​the lower-contrast regions to the area of ​​the entire measurement field.

[0090] Specifically, the average conductor area ratio is determined by the following method. The area encompassing at least the area near the joint boundary 46 of the XZ section to the area near the outer surface 6ab is defined as the unit cross-sectional area (L). The total area (M) of the conductor 61 is calculated for each of the five unit cross-sectional areas, and the average value of M / L is calculated.

[0091] Furthermore, the average void area ratio is obtained by the following method. The area encompassing at least the area near the joint boundary 46 of the XZ section to the area near the outer surface 6ab is defined as the unit cross-sectional area (L). The total area (N) of the voids 62 is calculated for each of the five unit cross-sectional areas, and the average N / L is calculated.

[0092] Next, regarding Figure 1 An example of the manufacturing method of the stacked ceramic capacitor 2 shown will be described.

[0093] First, the manufacturing process of the component body 4 will be explained. In the manufacturing process of the component body 4, a paste for the dielectric layer that will become the dielectric layer 10 after firing and a paste for the internal electrode layer that will become the internal electrode layer 12 after firing are prepared.

[0094] The paste for dielectric layers is manufactured, for example, by the following method: First, dielectric raw materials are uniformly mixed by methods such as wet mixing and then dried. Next, a pre-fired powder is obtained by heat treatment under specified conditions. Then, a known organic carrier or a known water-based carrier is added to the obtained pre-fired powder and kneaded to prepare the paste for dielectric layers. The obtained paste for dielectric layers is then sheeted using methods such as a scraper to obtain ceramic green sheets. Furthermore, the paste for dielectric layers may, as needed, contain additives selected from various dispersants, plasticizers, dielectrics, by-product compounds, glass frits, etc.

[0095] On the other hand, the paste for the internal electrode layer is prepared by mixing conductive powder, which is composed of a conductive metal or its alloy, with a known binder or solvent. Furthermore, the paste for the internal electrode layer may, as needed, contain ceramic powder (e.g., barium titanate powder or calcium strontium zirconate powder) as a commonly used material. These commonly used materials play a role in inhibiting the sintering of the conductive powder during the firing process.

[0096] Next, a paste for the internal electrode layer is applied to the ceramic green sheet according to a prescribed pattern using various printing methods such as screen printing or transfer printing. Furthermore, after stacking multiple layers of green sheets with the internal electrode pattern, they are stamped along the stacking direction to obtain a master laminate. At this point, the ceramic green sheet and the internal electrode pattern are stacked such that the upper and lower surfaces of the ceramic green sheet are located in the stacking direction of the master laminate.

[0097] The master layer laminate obtained through the above processes is cut into specified dimensions using a cutting saw or cutter to obtain multiple green wafers. The green wafers may be cured and dried as needed to remove plasticizers, or they may be tumble polished using a horizontal centrifugal tumbler or similar device after curing and drying. In tumble polishing, the green wafers, along with a medium and polishing fluid, are placed in a tumbler container, and the container is subjected to rotational motion or vibration to polish unwanted areas such as burrs generated during cutting, forming rounded corners (corner radius) at the corners of the green wafers. After tumble polishing, the green wafers are washed with a washing solution such as water and then dried.

[0098] Next, the green chip obtained above is subjected to a binder removal process and a firing process to obtain the component body 4.

[0099] The conditions for the binder removal process can be appropriately determined based on the main component composition of the dielectric layer 10 or the main component composition of the internal electrode layer 12, and there are no particular limitations. For example, it is preferable to set the heating rate to 5 to 300°C / hour, the holding temperature to 180 to 400°C, and the temperature holding time to 0.5 to 24 hours. In addition, the binder removal atmosphere is set to air or a reducing atmosphere.

[0100] The firing conditions can be appropriately determined based on the main component composition of the dielectric layer 10 or the main component composition of the internal electrode layer 12, and there are no particular limitations. For example, the holding temperature during firing is preferably 1200–1400°C, more preferably 1220–1300°C, the holding time is preferably 0.5–8 hours, more preferably 1–3 hours, and the heating rate and cooling rate (cooling rate) are preferably 50–500°C / hour. Furthermore, the firing atmosphere is preferably a reducing atmosphere, and a mixture of nitrogen and hydrogen can be used as the atmosphere gas, for example, with humidification. Moreover, when the internal electrode layer 12 is composed of a base metal such as nickel or a nickel alloy, the oxygen partial pressure in the firing atmosphere is preferably set to 1.0 × 10⁻⁶. -14 ~1.0×10 -10 MPa.

[0101] Furthermore, annealing can be performed as needed after firing. Annealing is a process used to re-oxidize the dielectric layer 10, and it is preferable to perform annealing if firing has been performed in a reducing atmosphere. The conditions for annealing can be appropriately determined based on the main component composition of the dielectric layer 10, and there are no particular limitations. For example, it is preferable to set the holding temperature to 950–1150°C, the holding time to 0–20 hours, and the heating and cooling rates to 50–500°C / hour. In addition, it is preferable to use humidified nitrogen gas or the like as the atmosphere gas, and the oxygen partial pressure in the annealing atmosphere is preferably set to 1.0 × 10⁻⁶. -9 ~1.0×10 -5 MPa.

[0102] In the aforementioned debinding, firing, and annealing processes, a humidifier can be used to humidify the nitrogen or mixed gas. In this case, the water temperature is preferably about 5 to 75°C. Furthermore, the debinding, firing, and annealing processes can be performed continuously or independently.

[0103] Next, a first region 6a1 of the sintered electrode layer 6a is formed on the outer surface of the element body 4 obtained above. In forming the first region 6a1, a paste for the first region is prepared. The paste for the first region contains metal powder such as copper, which becomes a conductor 61 after the sintering treatment, and oxide powders such as silicon oxide powder and zinc oxide powder, which become oxides 63. In addition to the above, the paste for the first region may also appropriately contain by-products such as binders, solvents, dispersants, and plasticizers.

[0104] Silicon oxide and zinc oxide, which become oxide 63, can also be included as glass powder in conductive pastes. Glass powder can be manufactured, for example, by the following method: Starting materials such as zinc oxide powder, silicon oxide powder, boron oxide powder, barium carbonate powder, and other oxide powders are mixed in a prescribed ratio, placed in a crucible, and then heated to melt in a furnace. While molten, the mixture is removed from the furnace using clamps, the crucible is tilted, and the melt is dropped into water for rapid cooling to obtain glass. The glass is then pulverized using a mortar and pestle, and further pulverized into a prescribed particle size using a ball mill or similar device, thereby producing glass powder.

[0105] Next, a paste for the first region is applied to the entire surface of the end face 4a and the end face 4a side of the side surface 4b of the component body 4 by dip-dip or printing, and then dried. Furthermore, the paste for the first region is subjected to a sintering treatment by holding the component body 4 at a temperature of 700–1000°C for 0.1–3 hours. This forms the first region 6a1 of the sintered electrode layer 6a.

[0106] There are no particular limitations on the method for adjusting the thickness (t1) of the first region 6a1. For example, methods such as adjusting the amount of paste applied to the first region or the concentration of metal powder in the paste of the first region can be cited.

[0107] The component body 4, on which the first region 6a1 is formed, the chip, the dielectric, and the polishing slurry are mixed by tumble polishing. The component body 4, after tumble polishing, is washed with a detergent such as water and then dried. As a result, the surface of the first region 6a1 is tapped, and metals such as copper extend, thereby sealing the void 62 formed on the outer surface of the first region 6a1.

[0108] Next, a second region 6a2 is formed on the outer surface of the first region 6a1. During the formation of the second region 6a2, a paste for the second region is prepared. The paste for the second region has the same components as the paste for the first region, except that it contains resin powder.

[0109] In this embodiment, since the second region paste contains resin powder, it is easy to obtain a second region 6a2 with voids 62 after calcination of the second region paste. Therefore, the resin powder contained in the second region paste is a component that decomposes thermally during calcination, and is also a component that is not easily soluble in the solvent contained in the second region paste. From this viewpoint, the resin powder contained in the second region paste is preferably a crystalline resin. Examples of crystalline resins include polypropylene and polyethylene. In addition, the solvent contained in the second region paste is preferably an alcohol or an aromatic hydrocarbon. Since the resin powder contained in the second region paste decomposes thermally during calcination, it vaporizes into carbon dioxide, forming voids 62 in the second region 6a2.

[0110] The binder contained in the paste for the second region is a component different from the resin powder, added for the purpose of imparting viscosity to the paste for the second region. Therefore, the binder contained in the paste for the second region is preferably a component that is soluble in the solvent contained in the paste for the second region. In addition, the binder contained in the paste for the second region is preferably ethyl cellulose or propylene, etc.

[0111] The paste for the second region is applied to the outer surface of the first region 6a1 by means of impregnation or printing and then dried.

[0112] There are no particular limitations on the method for adjusting the thickness (t2) of the second region 6a2; examples include adjusting the coating amount of the paste for the second region or the concentration of metal powder in the paste for the second region. Therefore, in this embodiment, the coating amount of the paste for the second region is preferably greater than the coating amount of the paste for the first region. Alternatively, the concentration of metal powder in the paste for the second region is preferably higher than the concentration of metal powder in the paste for the first region.

[0113] Furthermore, the second region paste is subjected to a sintering treatment by holding the component body 4 coated with and dried with the second region paste at a temperature of 700–1000°C for 0.1–3 hours. As a result, a second region 6a2 with voids 62 is easily formed.

[0114] After the second region 6a2 is formed, the sintered electrode layer 6a is briefly nickel-plated and immediately washed with water to remove excess plating solution. As a result, a film portion 64 is formed on the inner wall surface of the voids 62 of the sintered electrode layer 6a.

[0115] There are no particular restrictions on the plating method for short-time nickel plating; it can be either electrolytic plating or electroless plating.

[0116] If the plating time for short-time nickel plating is shortened or the concentration of the plating solution is reduced, there is a tendency for the thickness of the film 64 to become thinner.

[0117] Short-time nickel plating helps to form a film 64 that is mostly formed on the inner wall surface of the voids 62 in the second region 6a2, but sometimes the film 64 also forms on the inner wall surface of the voids 62 in the first region 6a1. The reasons for this are as follows: First, the paste used in the first region does not contain resin powder, but sometimes some voids 62 are generated in the first region 6a1. Furthermore, even if the voids 62 on the outer surface of the first region 6a1 are closed by roller polishing, some portions of the voids 62 remain exposed towards the outer surface. Therefore, it is believed that the plating solution also penetrates into the voids 62 in the first region 6a1 through the voids 62 in the second region 6a2. Therefore, it is believed that the film 64 also forms on the inner wall surface of the voids 62 in the first region 6a1.

[0118] After forming the film portion 64, the component body 4, the chip, the dielectric, and the polishing solution, on which the sintered electrode layer 6a, consisting of the first region 6a1 and the second region 6a2, is formed, are mixed by tumble polishing. The tumble-polished component body 4 is then washed with a washing solution such as water and dried. By tapping the surface of the sintered electrode layer 6a, metals such as copper extend, thus sealing the voids 62 formed on the outer surface 6ab of the sintered electrode layer 6a.

[0119] Furthermore, as needed, a coating layer is formed on the outside of the portion where the paste for sintering the electrode layer is applied by means of plating or the like. That is, the coating layer formed by sintering the paste for sintering the electrode layer and plating or the like forms the outer electrode 6. There are no particular limitations on the coating layer; for example, a tin-plated electrode layer 6b2, a tin-lead-plated electrode layer, or a gold-plated electrode layer can be formed after forming a nickel-plated electrode layer 6b1.

[0120] Through the above processes, a multilayer ceramic capacitor 2 with external electrodes 6 is obtained.

[0121] The resulting multilayer ceramic capacitor 2 can be surface-mounted on a substrate such as a printed circuit board using solder (including molten solder, solder paste, or tin paste) or a conductive adhesive, and used in various electronic devices. Alternatively, the multilayer ceramic capacitor 2 can also be mounted on a substrate via wire-like lead terminals or plate-like metal terminals.

[0122] The multilayer ceramic capacitor 2 of this embodiment has a sintered electrode layer 6a. The sintered electrode layer 6a contains at least one of copper and copper alloys as the main component. In addition, the sintered electrode layer 6a has voids 62. Moreover, at least a portion of the inner wall surface of the voids 62 is covered by a film portion 64 made of at least one of nickel and nickel alloys.

[0123] The inventors have discovered that the multilayer ceramic capacitor 2, having the above-described structure, has high mounting strength to a substrate or the like and can maintain a low ESR.

[0124] The reasons for achieving the above effects may not be clear, but consider the reasons shown below.

[0125] Because the sintered electrode layer 6a of this embodiment has voids 62, stress in the direction in which the sintered electrode layer 6a is fastened to the element body 4 can be suppressed during cooling after its formation. As a result, damage to the multilayer ceramic capacitor 2 caused by deflection after mounting to the substrate can be suppressed. In other words, the multilayer ceramic capacitor 2 of this embodiment has high mounting strength to the substrate.

[0126] Furthermore, because the sintered electrode layer 6a of this embodiment contains at least one of copper and copper alloys as the main component, its conductivity is high. However, if the copper or copper alloy is completely exposed, it may oxidize to the interior. In contrast, at least a portion of the inner wall surface of the voids 62 of the sintered electrode layer 6a of this embodiment is covered by a film portion 64 made of at least one of nickel and nickel alloys. Nickel and nickel alloys form a non-dynamic film. Therefore, copper or the like, covered by the film portion 64 made of nickel or the like with the non-dynamic film, is less prone to oxidation. As a result, the conductivity of the sintered electrode layer 6a is further improved. Consequently, the multilayer ceramic capacitor 2 of this embodiment can maintain a low ESR.

[0127] Furthermore, when the main component of the sintered electrode layer 6a is nickel to prevent the external electrode 6 from oxidizing, the ESR becomes high due to the non-dynamic film of nickel. In contrast, in this embodiment, as described above, the main component of the sintered electrode layer 6a is at least one of copper and copper alloys, thus maintaining a low ESR compared to the case where the main component of the sintered electrode layer 6a is nickel.

[0128] Furthermore, when the main component of the calcined electrode layer 6a is copper or a copper alloy, as in this embodiment, the possibility of cracks in the stacked ceramic capacitor 2 due to deflection after mounting to the substrate or the like is reduced compared to when the main component of the calcined electrode layer 6a is nickel.

[0129] Furthermore, since the main component of the sintered electrode layer 6a in this embodiment is at least one of copper and copper alloys, the migration that is prone to occur when the main component of the sintered electrode layer 6a is silver is not easily observed. Therefore, the decrease in reliability can be suppressed.

[0130] Furthermore, in this embodiment, since the electrode layer 6a is composed of a sintered electrode layer 6a having a defined film portion 64, it is able to maintain a low ESR compared to a resin electrode. In addition, compared to a resin electrode, it is easier to maintain quality at high temperatures.

[0131] The embodiments of the present invention have been described above, but the present invention is not limited to any of the above embodiments, and various changes can be made without departing from the spirit of the present invention.

[0132] For example, in this embodiment, a multilayer ceramic capacitor 2 is shown as a ceramic electronic component, but the ceramic electronic component of the present invention may also be, for example, a bandpass filter, a multilayer three-terminal filter, a thermistor, a varistor, etc.

[0133] In this embodiment, the dielectric layer 10 and the internal electrode layer 12 are stacked along the Z-axis direction, but the stacking direction can also be the X-axis or Y-axis direction. In this case, the external electrode 6 can be formed according to the exposed surface of the internal electrode layer 12. Furthermore, the component body 4 does not necessarily need to be a laminate; it can also be a single layer. Moreover, the internal electrode layer 12 can also be led out to the outer surface of the component body 4 via a through-hole electrode, in which case the through-hole electrode and the external electrode 6 are electrically bonded.

[0134] In addition, in this embodiment, the sintered electrode layer 6a contains oxide 63, but the sintered electrode layer 6a may not contain oxide 63.

[0135] Example

[0136] The present invention will now be described with reference to more detailed embodiments, but the present invention is not limited to these embodiments.

[0137] [Experiment 1]

[0138] <Sample No. 1>

[0139] Preparation (Ca) 0.7 Sr 0.3 (Ti) 0.03 Zr 0.97 O3 powder was used as the main raw material for the dielectric powder. Next, relative to 100 moles of the main raw material, 2.1 moles of MnCO3 powder, 0.3 moles of Al2O3 powder, and 1.6 moles of SiO2 powder were weighed as secondary components. These secondary component powders were then wet-mixed, dried, and pre-calcined using a ball mill to obtain pre-calcined secondary component powders.

[0140] Next, using a ball mill, 100 parts by mass of the main raw material of dielectric powder, the pre-calcined powder of the by-component obtained above, 7 parts by mass of acrylic resin, 4 parts by mass of butyl benzyl phthalate (BBP) as plasticizer, and 80 parts by mass of methyl ethyl ketone as solvent are mixed and pasted to obtain a paste for dielectric layer.

[0141] In addition, separately from the above, 56 parts by weight of nickel particles, 40 parts by weight of terpineol, 4 parts by weight of ethyl cellulose (molecular weight 140,000), and 1 part by weight of benzotriazole are mixed and pasted using three rollers to make a paste for the internal electrode layer.

[0142] Furthermore, a green sheet is formed on a PET film using the dielectric layer paste prepared above. A green sheet is then formed by screen printing the internal electrode layer paste.

[0143] A green wafer is formed by stacking multiple green wafers and bonding them under pressure. The green wafer is then cut into specified dimensions to obtain a green chip.

[0144] Next, the obtained green chip is subjected to debinding, firing and annealing under the following conditions to obtain a sintered body (component body 4).

[0145] The conditions for debinding were set as follows: temperature maintained at 260°C, atmosphere in air.

[0146] The firing conditions will be maintained at a temperature of 1250°C. Furthermore, the atmosphere will be a humidified mixture of nitrogen and oxygen, with an oxygen partial pressure of 10. -9 Below MPa.

[0147] The annealing conditions were set as follows: temperature maintained at 1050℃, atmosphere gas was humidified nitrogen (oxygen partial pressure: 10). -8 Below MPa).

[0148] In addition, a humidifier is used to humidify the atmosphere gas during firing and annealing.

[0149] Next, the first region is coated with paste onto the outer surface (part of end face 4a and side face 4b) of the component body 4 by impregnation and then dried. Afterward, the component body 4 is held at 800°C for 0.2 hours to form the first region 6a1.

[0150] Furthermore, the paste for the first region contains copper, which becomes a conductor 61 after firing, and silicon oxide and zinc oxide, which become oxides 63 after firing. The solvent contained in the paste for the first region is terpineol.

[0151] The component body 4, on which the first region 6a1 is formed, the dielectric, and the polishing slurry are mixed by tumble polishing. The tumble-polished component body 4 is then washed with a washing solution and dried. This seals the void 62 formed on the outer surface of the first region 6a1.

[0152] Next, the second region is coated with a paste onto the outer surface of the first region 6a1 using an impregnation method and allowed to dry. Then, the component body 4 is held at 800°C for 0.2 hours to form the second region 6a2.

[0153] Furthermore, the second-zone paste contains the same components as the first-zone paste, except for the resin powder. The resin powder in the second-zone paste is polyethylene. Additionally, the copper concentration in the second-zone paste is higher than that in the first-zone paste.

[0154] After the second region 6a2 is formed, the sintered electrode layer 6a is briefly nickel-plated and immediately washed with water to remove excess plating solution. As a result, a film portion 64 is formed on the inner wall surface of the void 62 formed in the sintered electrode layer 6a.

[0155] After forming the film portion 64, the component body 4, to which the sintered electrode layer 6a is formed, the chip, the dielectric, and the solvent are mixed by tumble polishing. The tumble-polished component body 4 is then washed with a washing solution and dried. This seals the voids 62 formed on the outer surface 6ab of the sintered electrode layer 6a.

[0156] A nickel-plated electrode layer 6b1 and a tin-plated electrode layer 6b2 are formed on the sintered electrode layer 6a. Accordingly, a capacitor sample (multilayer ceramic capacitor 2) with an external electrode 6 is obtained.

[0157] Accordingly, a capacitor sample 2 (layered ceramic capacitor 2) with an external electrode 6 is obtained.

[0158] The dimensions of the main body 4 of the obtained capacitor sample 2 are L0×W0×T0=3.2mm×1.6mm×1.6mm. In addition, the number of dielectric layers 10 sandwiched in the internal electrode layer 12 is 80.

[0159] The obtained capacitor sample 2 was cut parallel to the XZ plane, and the resulting cross-section was sputtered with Pt. Pt sputtering was performed using a JFC-1600 automatic fine coating machine manufactured by Nippon Electronics Co., Ltd., at 20 mA and 20 sec. The sputtered cross-section was observed using reflected electron microscopy (EEM) and electronic spectrometry (EDS). The EEM was observed using a Hitachi Miniscope TM3030 desktop microscope manufactured by Hitachi High Technology Co., Ltd., at 15 kV. EDS was observed using a BRUKER QUANTAX 70.

[0160] The results confirm that the main component of the sintered electrode layer 6a is copper, the oxide 63 is composed of zinc oxide and silicon oxide, and at least a portion of the inner wall surface of the void 62 is covered by the film portion 64. Furthermore, in a field of view of 30 μm × 30 μm in contact with the outer surface 6ab, at least four film portions 64 with a thickness of 0.5 μm or more and a length of 4 μm or more can be identified. Additionally, in a field of view of 30 μm × 30 μm in contact with the outer surface 6ab, there are zero locations in the void 62 with an equivalent circle diameter of 3 μm or more where the interior of the void 62 is completely filled with nickel. The arrangement of the conductor 61, void 62, oxide 63, and film portion 64 is as follows... Figures 2-4 As shown.

[0161] In addition, the average thickness (Td) of the dielectric layer 10 sandwiched in the inner electrode layer 12, the average thickness (Te) of the inner electrode layer 12, the average thickness (Tc) of the film portion 64, the average thickness (Tt) of the outer electrode 6, and the average thickness (Ts) of the sintered electrode layer 6a were measured. Ten locations were measured, and the average values ​​were calculated. The results are described below.

[0162] Average thickness (Td) of the dielectric layer 10 sandwiched in the inner electrode layer 12: 6.2 μm; Average thickness (Te) of the inner electrode layer 12: 1.5 μm

[0163] Average thickness (Tc) of the membrane portion 64: 1 μm

[0164] Average thickness (Tt) of external electrode 6: 64 μm

[0165] Average thickness (Ts) of sintered electrode layer 6a: 59 μm

[0166] The obtained capacitor sample 2 was evaluated for "ESR", "ESR after heat treatment" and "10mm flexural strength" using the following methods.

[0167] ESR

[0168] The ESR of the obtained capacitor sample 2 was measured at a frequency of 10 MHz. The results are shown in Table 1.

[0169] ESR after heat treatment

[0170] The obtained capacitor sample 2 was heat-treated by placing it in an environment of 200°C for 24 hours. The ESR of the heat-treated capacitor sample 2 was measured using an impedance analyzer at a frequency of 10 MHz. The results are shown in Table 1.

[0171] 10mm flexural evaluation

[0172] The electrostatic capacitance of ten capacitor samples was measured at 25°C using a digital LCR meter at 1 kHz and 1 Vrms. Then, as... Figure 5 As shown, the fabricated capacitor sample 102 (layered ceramic capacitor 2) was mounted onto a 1.6 mm thick glass epoxy plate 104 using solder (Sn 96.5% - Ag 3% - Cu 0.5%). Furthermore, Figure 5 L1 is 45mm. Then, using a flexural testing machine, flexural stress is applied to the glass epoxy plate 104 from the direction of arrow P1 through a 20mm wide, R230 pressure clamp 106 until the flexural amount f becomes 10mm.

[0173] At 25°C, the electrostatic capacitance of ten capacitor samples was measured using a digital LCR meter at 1 kHz and 1 Vrms. The number of capacitor samples that showed a decrease in electrostatic capacitance or produced abnormal noise was counted.

[0174] <Sample No. 2>

[0175] In sample number 2, except for short-time nickel plating of the sintered electrode layer 6a, a capacitor sample was obtained in the same manner as sample number 1, and the "average thickness (Tc) of the film 64", "ESR" and "ESR after heat treatment" were measured, as well as "10 mm flexural evaluation". The results are shown in Table 1.

[0176] <Sample No. 3>

[0177] In sample number 3, except that the main component of the sintered electrode layer 6a contained in the paste for the sintered electrode layer was replaced by nickel instead of copper, a capacitor sample was obtained in the same manner as sample number 2, and the "average thickness (Tc) of the film portion 64", "ESR" and "ESR after heat treatment" were measured, as well as "10 mm flexural evaluation". The results are shown in Table 1.

[0178] <Sample No. 4>

[0179] In sample number 4, a capacitor sample was obtained in the same manner as sample number 1, except that a resin electrode layer was formed instead of a sintered electrode layer 6a. The "average thickness (Tc) of the film portion 64", "ESR" and "ESR after heat treatment" were measured, and the "10 mm flexural evaluation" was performed. The results are shown in Table 1.

[0180] Specifically, a paste containing a copper-based base electrode layer is applied to a sintered body (element body 4) obtained by the method described in sample number 1, and then sintered at 800°C. Next, an uncured thermosetting resin composition, an epoxy resin, silver powder, and an organic solvent are mixed to prepare a conductive thermosetting resin composition. The conductive thermosetting resin composition is then applied to the outer surface of the base electrode layer. Next, the element body 4 coated with the conductive thermosetting resin composition is placed in an atmosphere above the curing temperature of the conductive thermosetting resin composition, and a resin electrode layer is formed on the element body 4.

[0181] A nickel-plated electrode layer 6b1 and a tin-plated electrode layer 6b2 are formed on the resin electrode layer to obtain a capacitor sample (layered ceramic capacitor 2).

[0182] <Sample No. 5>

[0183] In sample number 5, except for extending the short-time nickel plating time applied to the second region 6a2 of the sintered electrode layer 6a, a capacitor sample was obtained in the same manner as sample number 1, and the "average thickness (Tc) of the film portion 64", "ESR", and "ESR after heat treatment" were measured, as well as the "10 mm deflection evaluation". The results are shown in Table 1. In sample number 5, in a field of view of 30 μm × 30 μm in contact with the outer surface 6ab, the interior of all voids 62 with an equivalent circle diameter of 3 μm or more was completely filled with nickel.

[0184] Table 1

[0185]

[0186] As can be confirmed from sample numbers 1 and 2, the ESR is lower in the case with the film portion 64 (sample number 1) compared to the case without the film portion 64 (sample number 2), and the ESR becomes even lower after heat treatment. This is believed to be because, in sample number 1, the copper-based sintered electrode layer 6a is less prone to oxidation due to the film portion 64 in the void 62.

[0187] As confirmed by sample numbers 1 and 3, the ESR is lower in the case where the main component of the sintered electrode layer 6a is copper and has a film portion 64 (sample number 1) compared to the case where the main component of the sintered electrode layer 6a is nickel and does not have a film portion 64 (sample number 3). The ESR becomes even lower after heat treatment. This is believed to be because, in sample number 3, nickel, as the main component of the sintered electrode layer 6a, forms a non-dynamic film.

[0188] As can be confirmed from sample number 1 and sample number 3, the case where the main component of the sintered electrode layer 6a is copper and has a film portion 64 (sample number 1) has a better 10mm flexural evaluation compared to the case where the main component of the sintered electrode layer 6a is nickel and does not have a film portion 64 (sample number 3).

[0189] As can be confirmed from sample numbers 1 and 4, the case of sintered electrode layer 6a with copper as the main component and having a film portion 64 (sample number 1) has a lower ESR compared to the case of a resin electrode layer containing silver (sample number 4), and the ESR becomes even lower after heat treatment.

[0190] As confirmed by specimen numbers 1 and 5, the case where the thickness (Tc) of the film portion 64 is 1 μm (specimen number 1) shows a better 10 mm flexural performance compared to the case where the voids 62 of the sintered electrode layer 6a are completely filled by the film portion 64 (specimen number 5). This is believed to be because, in the case of specimen number 1, the presence of voids in the sintered electrode layer 6a suppresses defects caused by flexural deformation.

[0191] [Experiment 2]

[0192] <Sample No. 11>

[0193] Except for the formation method of the first region 6a1 as described below, the determination of the "second ratio Ni / Cu - first ratio Ni / Cu", and the "15 mm flexural evaluation" performed by the method described below, the "ESR" was determined and the "10 mm flexural evaluation" was performed in the same manner as for sample number 1. The results are shown in Table 2.

[0194] In sample number 11, the component body 4 was obtained in the same manner as in sample number 1. Next, a first region containing resin powder was coated with a paste onto the outer surface (part of end face 4a and side face 4b) of the component body 4 by impregnation and allowed to dry. Afterward, the component body 4 was held at 800°C for 0.2 hours to form the first region 6a1.

[0195] A short-time nickel plating is performed on the first region 6a2, followed immediately by washing with water to remove excess plating solution. As a result, a film 64 is formed on the surface of the void 62 formed in the first region 6a1.

[0196] After forming the film portion 64, the component body 4, on which the first region 6a1 is formed, the chip, the dielectric, and the polishing solution are mixed by tumble polishing. The tumble-polished component body 4 is washed with a washing solution and dried. The voids 62 formed on the outer surface of the first region 6a1 are sealed. Then, the second region 6a2 is formed in the same manner as sample number 1 to obtain capacitor sample 2.

[0197] 15mm flexural evaluation

[0198] The electrostatic capacitance of ten capacitor samples was measured at 25°C using a digital LCR meter at 1 kHz and 1 Vrms. Then, as... Figure 5 As shown, the fabricated capacitor sample 102 (layered ceramic capacitor 2) was mounted onto a 1.6 mm thick glass epoxy plate 104 using solder (96.5% tin, 3% silver, 0.5% copper). Furthermore, Figure 5 L1 is 45mm. Then, using a flexural testing machine, flexural stress is applied to the glass epoxy plate 104 from the direction of arrow P1 through a 20mm wide, R230 pressure clamp 106 until the flexural amount f becomes 15mm.

[0199] At 25°C, the electrostatic capacitance of ten capacitor samples was measured using a digital LCR meter at 1 kHz and 1 Vrms. The number of capacitor samples that showed a decrease in electrostatic capacitance or produced abnormal noise was counted.

[0200] <Sample numbers 12 and 13>

[0201] In addition to changing the short-time nickel plating time to alter the ratio (second ratio Ni / Cu - first ratio Ni / Cu) and measuring the "second ratio Ni / Cu - first ratio Ni / Cu" ratio, the "ESR" and "10mm flexural evaluation" were performed in the same manner as for sample number 1, and the "15mm flexural evaluation" was also performed using the methods described above. The results are shown in Table 2.

[0202] Table 2

[0203]

[0204] Table 2 confirms that the 15mm flexural evaluation is better when (second ratio Ni / Cu - first ratio Ni / Cu) is above 0.02 (samples 12 and 13) compared to when (second ratio Ni / Cu - first ratio Ni / Cu) is -0.001 (sample 11).

[0205] [Experiment 3]

[0206] <Sample numbers 21-25>

[0207] In addition to changing the conductor area ratio and void area ratio by altering the resin powder content in the paste of the second region, the "average value of conductor area ratio" and "average value of void area ratio" were determined by the method described in the above embodiments. Similarly, the "ESR" was measured for sample number 1, and "10 mm flexural evaluation" and "15 mm flexural evaluation" were performed. The results are shown in Table 3.

[0208] Table 3

[0209]

[0210] Table 3 confirms that the ESR is better when the conductor area ratio is 0.55–0.75 and the void area ratio is 0.1–0.25 (samples 22–24) compared to the case with a conductor area ratio of 0.52 and a void area ratio of 0.26 (sample 21).

[0211] Table 3 confirms that the 15mm flexural performance is better for the cases with a conductor area ratio of 0.55–0.75 and a void area ratio of 0.1–0.25 (sample numbers 22–24) compared to the case with a conductor area ratio of 0.81 and a void area ratio of 0.09 (sample number 25).

[0212] <Sample numbers 31-35>

[0213] In samples 31-35, in addition to changing the overall Ni / Cu ratio and the average thickness (Tc) of the coating by varying the short-time nickel plating, and measuring the "overall Ni / Cu ratio" and "average thickness (Tc) of the coating", the "ESR after heat treatment" and "10 mm flexural evaluation" were performed in the same manner as in sample 1, and the "15 mm flexural evaluation" was also performed using the methods described above. The results are shown in Table 4.

[0214] Table 4

[0215]

[0216] Table 4 confirms that the overall Ni / Cu ratio of 0.08–0.2 and the average thickness (Tc) of the coating of 0.5–3 (samples 32–34) showed better ESR after heat treatment compared to the overall Ni / Cu ratio of 0.069 and the average thickness (Tc) of the coating of 0.48 (sample 31).

[0217] Table 4 confirms that the 15mm flexural evaluation is better when the overall Ni / Cu ratio is 0.08–0.2 and the average thickness (Tc) of the film portion is 0.5–3 (sample numbers 32–34) compared to the case with an overall Ni / Cu ratio of 0.211 and an average thickness (Tc) of 3.4 (sample number 35).

[0218] Explanation of reference numerals in the attached figures

[0219] 2. 102...Laminated ceramic capacitor (capacitor sample)

[0220] 4...Component body

[0221] 4a……End face

[0222] 4b...side view

[0223] 10...Dielectric layer (ceramic layer)

[0224] 12……Internal electrode layer

[0225] 6……External Electrode

[0226] 6a……Sintered electrode layer

[0227] 6a1……First Area

[0228] 6a2……Second Region

[0229] 61……Conductor

[0230] 62...gap

[0231] 63... oxides

[0232] 64…Coatal part

[0233] 6ab……Outer surface (boundary between sintered electrode layer and plated electrode layer)

[0234] 6b……Electrode plating layer

[0235] 6b1...Ni coating

[0236] 6b2……Sn coating

[0237] 46……Joint Boundary

[0238] 104……Glass epoxy board

[0239] 106... Pressure clamp

Claims

1. A ceramic electronic component, wherein having: an element main body having a ceramic layer and an internal electrode layer; an external electrode formed on an end surface of the element main body, electrically connected to at least one end of the internal electrode layer, the external electrode has a fired electrode layer, in the fired electrode layer, at least either one of copper and a copper alloy is contained as a main component, the fired electrode layer has a void, at least a part of an inner wall surface of the void is covered by a film portion containing at least either one of nickel and a nickel alloy, a void area ratio represented by a ratio of a total cross-sectional area of the void to a unit cross-sectional area of the fired electrode layer is 0.1 to 0.25, a total ratio Ni / Cu of a ratio of a number of atoms of nickel to a number of atoms of copper in the fired electrode layer as a whole is 0.08 to 0.

2.

2. The ceramic electronic component according to claim 1, wherein the fired electrode layer has a first region and a second region, the first region is in contact with the end surface of the element main body and is located in the vicinity of a joint boundary with the element main body, the second region is located outside the first region and constitutes an outer surface of the fired electrode layer, and when a ratio of a number of atoms of nickel to a number of atoms of copper in the first region is set as a first ratio Ni / Cu, a ratio of a number of atoms of nickel to a number of atoms of copper in the second region is set as a second ratio Ni / Cu, the second ratio Ni / Cu - the first ratio Ni / Cu is 0.02 or more.

3. The ceramic electronic component according to claim 1, wherein a conductor area ratio represented by a ratio of a total cross-sectional area of the conductor to a unit cross-sectional area of the fired electrode layer is 0.55 to 0.

75.

4. The ceramic electronic component according to any one of claims 1 to 3, wherein the fired electrode layer contains an oxide containing at least either one of silicon and zinc.

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