Nanosecond pulse generator pulse generation

Abstract

Some embodiments include a high-voltage pulse generating power supply. The high-voltage pulse generating power supply may include: a high-voltage pulse generator having an output that provides pulses having an amplitude greater than about 1 kV, a pulse width less than about 1 μs, and a pulse repetition frequency greater than about 20 kHz; a plasma chamber; and an electrode disposed within the plasma chamber, the electrode being electrically coupled to the output of the high-voltage pulse generator to generate an electric field within the plasma chamber.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Provisional Patent Application No. 62 / 711,464, filed on July 27, 2018, entitled “NANOSECOND PULSER SYSTEM,” which is incorporated herein by reference in its entirety.

[0003] This application claims priority to U.S. Provisional Patent Application No. 62 / 711,334, filed on July 28, 2018, entitled “NANOSECOND PULSER THERMAL MANAGEMENT,” which is incorporated herein by reference in its entirety.

[0004] This application claims priority to U.S. Provisional Patent Application No. 62 / 711,457, filed on July 27, 2018, entitled “NANOSECOND PULSER PULSE GENERATION,” which is incorporated herein by reference in its entirety.

[0005] This application claims priority to U.S. Provisional Patent Application No. 62 / 711,347, filed on July 27, 2018, entitled “NANOSECOND PULSER ADC SYSTEM,” which is incorporated herein by reference in its entirety.

[0006] This application claims priority to U.S. Provisional Patent Application No. 62 / 711,467, filed on July 27, 2018, entitled “EDGE RING POWER SYSTEM,” which is incorporated herein by reference in its entirety.

[0007] This application claims priority to U.S. Provisional Patent Application No. 62 / 711,406, filed on July 27, 2018, entitled “NANOSECOND PULSER BIAS COMPENSATION,” which is incorporated herein by reference in its entirety.

[0008] This application claims priority to U.S. Provisional Patent Application No. 62 / 711,468, filed on July 27, 2018, entitled “NANOSECOND PULSER CONTROL MODULE,” which is incorporated herein by reference in its entirety.

[0009] This application claims priority to U.S. Provisional Patent Application No. 62 / 711,523, filed August 10, 2018, entitled “PLASMA SHEATH CONTROL FOR RF PLASMA REACTORS,” which is incorporated herein by reference in its entirety.

[0010] This application claims priority to U.S. Provisional Patent Application No. 62 / 789,523, filed January 1, 2019, entitled “EFFICIENT NANOSECOND PULSER WITH SOURCE AND SINKCAPABILITY FOR PLASMA CONTROL APPLICATIONS,” which is incorporated herein by reference in its entirety.

[0011] This application claims priority to U.S. Provisional Patent Application No. 62 / 789,526, filed January 1, 2019, entitled “EFFICIENT ENERGY RECOVERY IN ANANOSECOND PULSERCIRCUIT,” which is incorporated herein by reference in its entirety.

[0012] This application claims priority to and is a continuation-in-part of U.S. non-provisional patent application No. 16 / 523,840, filed on July 26, 2019, entitled “NANOSECOND PULSER BIAS COMPENSATION,” which is incorporated herein by reference in its entirety. Background Art

[0013] Generating high voltage pulses with fast rise and / or fast fall times is challenging. For example, to achieve fast rise and / or fall times (e.g., less than about 50 ns) for high voltage pulses (e.g., greater than about 5 kV), the slope of the pulse rise and / or fall must be extremely steep (e.g., greater than 10 11 V / s). Such steep rise and / or fall times can be particularly difficult to produce, especially in circuits driving loads with low capacitance. Producing such pulses can be particularly challenging using standard electrical components in a compact manner, and / or when the pulses have variable pulse width, voltage, and repetition rate; and / or in applications with capacitive loads (e.g., such as plasmas). Some plasma deposition systems may not produce similar pulses and may not produce wafers efficiently. Summary of the Invention

[0014] Some embodiments include a high voltage pulse generating power supply comprising: a high voltage pulse generator having an output that provides pulses having an amplitude greater than about 1 kV, a pulse width less than about 1 μs, and a pulse repetition frequency greater than about 20 kHz; a plasma chamber; and an electrode disposed within the plasma chamber, the electrode electrically coupled to the output of the high voltage pulse generator to generate an electric field within the plasma chamber.

[0015] In some embodiments, the inductance between the output of the high voltage pulse generator and the electrode may be less than about 10 μH. In some embodiments, the capacitance between the output of the high voltage pulse generator and ground may be less than about 10 nF.

[0016] In some embodiments, the high voltage pulse generating power supply may further include a control module that measures the voltage of the output pulse.

[0017] In some embodiments, the high-voltage pulse generating power supply may further include: a bias capacitor disposed between the high-voltage pulse generator and the electrode; and a bias compensation power supply electrically coupled to the high-voltage pulse generator and the electrode, the bias compensation power supply generating a voltage across the bias capacitor.

[0018] In some embodiments, the high voltage pulse generating power supply may further include a resistive output stage electrically coupled to the high voltage pulse generator and the electrode, the resistive output stage removing charge from a load on a fast time scale.

[0019] In some embodiments, the resistive output stage includes an inductor and a capacitor arranged in series, wherein the inductor has an inductance of less than approximately 200 μH.

[0020] In some embodiments, the high voltage pulse generating power supply may further include an energy recovery circuit electrically coupled to the high voltage pulse generator and the electrode, the energy recovery circuit removing charge from a load on a fast time scale.

[0021] In some embodiments, the high-voltage pulse generating power supply may further include a control module electrically coupled to the high-voltage pulse generator, wherein the control module generates a low-voltage signal for controlling the pulse width and pulse repetition frequency of the output pulse.

[0022] In some embodiments, the high voltage pulse generating power supply may further include: a second high voltage pulse generator having an output for providing pulses having an amplitude greater than about 1 kV, a pulse width less than about 1 μs, and a pulse repetition frequency greater than about 20 kHz; and a second electrode disposed within the plasma chamber, the second electrode being electrically coupled to the output of the second high voltage pulse generator to generate a pulse generating electric field within the plasma chamber near the second electrode.

[0023] In some embodiments, the pulses from the high voltage pulse generator and the pulses from the second high voltage pulse generator differ in at least one of voltage, pulse width, and pulse repetition frequency.

[0024] In some embodiments, the high voltage pulse generating power supply may further include a thermal management subsystem comprising one or more switch cooling plates and one or more transformer core cooling plates, wherein the high voltage pulse generator comprises: a plurality of switches coupled to the one or more switch cooling plates; and a transformer coupled to the one or more transformer core cooling plates.

[0025] In some embodiments, the thermal management subsystem includes a fluid flowing through the switch cooling plate and the core cooling plate.

[0026] In some embodiments, the high voltage pulse generating power supply may further include: a housing having a diameter less than 1m 3 The housing comprises a volume dimension of 100 nm, wherein the high-voltage pulse generator is disposed within the housing; and at least three of the following are disposed within the housing: a thermal management system, a control system, a bias capacitor, a bias compensation power supply, a second nanosecond pulse generator, a resistive output stage, and an energy recovery circuit. In some embodiments, a peak electric field between any two components within the housing is less than approximately 20 MV / m.

[0027] Some embodiments include a high-voltage pulse generating power supply comprising: a high-voltage pulse generator having an output that provides pulses having an amplitude greater than about 1 kV, a pulse width less than about 1 μs, and a pulse repetition frequency greater than about 20 kHz; a plasma chamber; and an electrode disposed within the plasma chamber, the electrode electrically coupled to the output of the high-voltage pulse generator to generate an electric field within the plasma chamber. In some embodiments, the high-voltage pulse generating power supply may further include: a control module electrically coupled to the high-voltage pulse generator, the control module measuring a voltage of the pulse at the electrode and modifying at least one of the voltage, pulse width, and pulse repetition frequency of the pulse in response to the measured voltage; and in some embodiments, the high-voltage pulse generating power supply may further include a thermal management subsystem comprising a plurality of cooling plates coupled to the high-voltage pulse generator.

[0028] In some embodiments, the high voltage pulse generator includes: a plurality of switches; and a transformer coupled to the plurality of switches and the output and having a transformer core; and in some embodiments, the plurality of cooling plates include: one or more switch cooling plates coupled to the plurality of switches; and one or more transformer core cooling plates coupled to the transformer core.

[0029] In some embodiments, the thermal management subsystem includes a fluid flowing through at least one of the plurality of cooling plates.

[0030] In some embodiments, the control module measures one or more parameters of the thermal management subsystem and stops the high voltage pulse generator from outputting pulses if one of the one or more parameters is out of tolerance.

[0031] Some embodiments include a high-voltage pulse generating power supply comprising: a first high-voltage pulse generator having a first output that provides pulses having a first amplitude greater than approximately 1 kV, a first pulse width less than approximately 1 μs, and a first pulse repetition frequency greater than approximately 20 kHz; a second high-voltage pulse generator having a second output that provides pulses having a second amplitude greater than approximately 1 kV, a second pulse width less than approximately 1 μs, and a second pulse repetition frequency greater than approximately 20 kHz; and a plasma chamber. In some embodiments, a first electrode may be disposed within the plasma chamber, the first electrode electrically coupled to the first output of the first high-voltage pulse generator; and a second electrode may be disposed within the plasma chamber, the second electrode electrically coupled to the second output of the second high-voltage pulse generator. In some embodiments, the high-voltage pulse generating power supply may further comprise: a first bias capacitor disposed between the first high-voltage pulse generator and the first electrode; and a second bias capacitor disposed between the second high-voltage pulse generator and the second electrode.

[0032] In some embodiments, the high-voltage pulse generating power supply may further include: a first bias compensation power supply electrically coupled to the first high-voltage pulse generator and the first electrode, the first bias compensation power supply generating a voltage across the first bias capacitor; and a second bias compensation power supply electrically coupled to the second high-voltage pulse generator and the second electrode, the second bias compensation power supply generating a voltage across the second bias capacitor.

[0033] In some embodiments, the high voltage pulse generating power supply may further include a thermal management subsystem comprising a plurality of cooling plates coupled to the first high voltage pulse generator and the second high voltage pulse generator.

[0034] In some embodiments, one or both of the first bias capacitor or the second bias capacitor has a capacitance greater than approximately 1 nF.

[0035] Some embodiments of the present invention include a nanosecond pulse generation system comprising: a first nanosecond pulse generator; a second nanosecond pulse generator; an interconnection board coupled to the first nanosecond pulse generator and the second nanosecond pulse generator; a resistive output stage coupled to the interconnection board and ground, the resistive output stage comprising at least a resistor and / or an inductor; and a chamber interface board coupled to the interconnection board via a capacitor.

[0036] In some embodiments, the nanosecond pulse generation system outputs pulses having an amplitude of at least 8 kV.

[0037] In some embodiments, the nanosecond pulse generation system outputs pulses having a frequency of 10 kHz or greater.

[0038] In some embodiments, the nanosecond pulse generation system outputs pulses having a power of 30 kW or more.

[0039] In some embodiments, the resistive output stage includes a resistor having a resistance of 140 ohms.

[0040] In some embodiments, the resistive output stage includes a plurality of resistors having a combined resistance of 140 ohms.

[0041] In some embodiments, the resistive output stage includes an inductor having an inductance of 15 μH.

[0042] In some embodiments, the resistive output stage includes a plurality of inductors having a combined inductance of 15 μH.

[0043] Some embodiments include a nanosecond pulse generator comprising: a plurality of switches; one or more transformers; an output configured to output a high voltage waveform having an amplitude greater than 2 kV and a frequency greater than 1 kHz; and an ADC control module that senses the output waveform.

[0044] A nanosecond pulse generator system is disclosed. In some embodiments, the nanosecond pulse generator system may include a nanosecond pulse generator, a pulse generator output, and a control system. In some embodiments, the nanosecond pulse generator includes: a pulse generator input; a high-voltage DC power supply; one or more solid-state switches coupled to the high-voltage DC power supply and the pulse generator input, the one or more solid-state switches switching the high-voltage DC power supply based on an input pulse provided by the pulse generator input; one or more transformers coupled to the one or more switches; and a pulse generator output coupled to the one or more transformers, the pulse generator output outputting a high-voltage waveform having an amplitude greater than approximately 2 kV and a pulse repetition frequency greater than approximately 1 kHz based on the pulse generator input. In some embodiments, the control system may be coupled to the nanosecond pulse generator at a measurement point, the control system providing the input pulse to the pulse generator input.

[0045] In some embodiments, the measurement point comprises a point between the transformer and the pulse generator output.

[0046] In some embodiments, the nanosecond pulse generator system further comprises an electrode coupled to the pulse generator output; and the measurement point is at the electrode.

[0047] In some embodiments, the control system measures a voltage at the measurement point and adjusts a voltage, a pulse repetition frequency, or a duty cycle of the input pulses based on the measured voltage.

[0048] In some embodiments, the control system measures the pulse repetition frequency at the measurement point and adjusts the pulse repetition frequency of the input pulses based on the measured pulse repetition frequency.

[0049] In some embodiments, the input pulse includes a first burst comprising a first plurality of low voltage pulses, each of the first plurality of low voltage pulses having a first pulse width; and the input pulse includes a second burst comprising a second plurality of low voltage pulses, each of the second plurality of low voltage pulses having a second pulse width; and the second pulse width is greater than the first pulse width.

[0050] In some embodiments, the control system receives input data specifying a voltage and a pulse repetition frequency corresponding to a desired high voltage waveform; compares an output pulse generator waveform measured at the measurement point with the desired high voltage waveform; and determines an adjustment to the pulse generator input to produce the desired high voltage waveform.

[0051] In some embodiments, the control system includes a voltage divider that reduces the high voltage waveform by a factor of 1000.

[0052] In some embodiments, the control system includes an analog-to-digital converter that converts the measured high voltage waveform into a digital signal.

[0053] In some embodiments, the nanosecond pulse generator system includes a metal shield disposed between the nanosecond pulse generator and the control system.

[0054] In some embodiments, the nanosecond pulse generator includes a resistive output stage, and wherein the measurement point spans a resistor in the resistive output stage.

[0055] A nanosecond pulse generator system is disclosed. In some embodiments, the nanosecond pulse generator system may include a nanosecond pulse generator,

[0056] a nanosecond pulse generator having a pulse generator output that outputs a high voltage waveform comprising a plurality of bursts, wherein each burst comprises a plurality of pulses having an amplitude greater than 2 kV and a pulse repetition frequency greater than 1 kHz; and

[0057] A control system controls in real time a plurality of characteristics of the high voltage waveform including the number of pulses in each burst, the pulse repetition frequency, the pulse width and the pulse voltage.

[0058] In some embodiments, the pulse generator system controls at least one characteristic of the high voltage waveform with a resolution of less than about 1 μs.

[0059] In some embodiments, the pulse generator system controls the period between pulses with an accuracy of less than about 10 μs.

[0060] In some embodiments, the control system controls the plurality of characteristics of the high voltage waveform in response to a plasma processing recipe.

[0061] In some embodiments, the plasma processing recipe includes multiple stages, and each stage is associated with an ion current, a chamber pressure, and a gas mixture.

[0062] In some embodiments, the plasma processing recipe corresponds to an electric field or voltage at the wafer surface.

[0063] In some embodiments, the high voltage waveform includes a first burst comprising a first plurality of pulses, each of the first plurality of pulses having a first pulse width; and the high voltage waveform includes a second burst comprising a second plurality of pulses, each of the second plurality of pulses having a second pulse width; and the second pulse width is greater than the first pulse width.

[0064] In some embodiments, the nanosecond pulse generator includes: a transformer; and an output that outputs a high voltage waveform; and the control system is coupled to the nanosecond pulse generator at a point between the transformer and the pulse generator output.

[0065] In some embodiments, the control system includes a voltage divider and a fast analog-to-digital converter.

[0066] Some embodiments include a nanosecond pulse generator system comprising: a nanosecond pulse generator having a pulse generator output that outputs pulses having an amplitude greater than approximately 2 kV and a pulse repetition frequency greater than 1 kHz; a plurality of sensors that measure an environmental characteristic of the nanosecond pulse generator system, and each of the plurality of sensors provides a sensor signal representative of the corresponding environmental characteristic; a sensor that provides an electronic sensor signal representative of a physical characteristic of the nanosecond pulse generator system; and an interlock electrically coupled to the sensor and the nanosecond pulse generator, wherein the interlock stops operation of the nanosecond pulse generator if the electronic sensor signal is above a first threshold.

[0067] In some embodiments, the nanosecond pulse generator system may further include a control module electrically coupled to the sensor, wherein the control module stops operation of the nanosecond pulse generator if the electronic sensor signal is above a second threshold, the second threshold being different from the first threshold.

[0068] In some embodiments, the nanosecond pulse generator system may further include a liquid cooling subsystem. In some embodiments, the sensor includes a liquid flow sensor disposed within the liquid cooling subsystem; the first threshold includes a first flow rate; and the second threshold includes a second flow rate greater than the first flow rate.

[0069] In some embodiments, the nanosecond pulse generator system may further include a cooling subsystem. In some embodiments, one of the sensors includes a temperature sensor disposed within the cooling subsystem; the first threshold includes a first temperature; and the second threshold includes a second temperature less than the first temperature.

[0070] In some embodiments, the nanosecond pulse generator system may further include: a cooling subsystem including a liquid coolant; and a temperature sensor measuring a temperature of the liquid coolant.

[0071] These illustrative embodiments are not intended to limit or qualify the present disclosure, but rather to provide examples to aid understanding thereof. Additional embodiments are discussed in the detailed description, and further description is provided herein. Advantages provided by one or more of the various embodiments may be further understood by examining this specification or by practicing one or more of the embodiments presented. BRIEF DESCRIPTION OF THE DRAWINGS

[0072] These and other features, aspects, and advantages of the present disclosure will be better understood when the following detailed description is read with reference to the accompanying drawings.

[0073] Figure 1 is a circuit diagram of a nanosecond pulse generator according to some embodiments.

[0074] Figure 2 An example waveform produced by a nanosecond pulse generator is shown.

[0075] Figure 3 is a circuit diagram of a nanosecond pulse generator according to some embodiments.

[0076] Figure 4 is a block diagram of a spatially variable wafer bias power system according to some embodiments.

[0077] Figure 5 is a circuit diagram of a high voltage power system with a plasma load, according to some embodiments. Figure 6is a circuit diagram of a high voltage power system with a plasma load, according to some embodiments.

[0078] Figure 7 is a block diagram of a high voltage switch with isolated power supply according to some embodiments.

[0079] Figure 8 is a block diagram of an ADC control system for a nanosecond pulse generator system, according to some embodiments.

[0080] Figure 9 is a functional block diagram of a nanosecond pulse generator system according to some embodiments.

[0081] Figure 10 is a block diagram of a thermal management system according to some embodiments.

[0082] Figure 11 Embodiments and / or arrangements of switch cooling plate systems according to some embodiments are shown.

[0083] Figure 12 Embodiments and / or arrangements of cooling plates according to some embodiments are shown.

[0084] Figure 13 Embodiments and / or arrangements of cooling plates according to some embodiments are shown.

[0085] Figure 14 Embodiments and / or arrangements of cooling plates according to some embodiments are shown.

[0086] Figure 15 is a block diagram of a flow diagram of a process according to some embodiments.

[0087] Figure 16 An illustrative computing system is shown for performing functions to facilitate implementation of the embodiments described herein. DETAILED DESCRIPTION

[0088] A nanosecond pulse generation system is disclosed. In some embodiments, the nanosecond pulse generation system can provide bursts of pulses having an amplitude of 2 kV or greater into a plasma chamber. In some embodiments, the nanosecond pulse generation system can provide waveforms having a pulse repetition frequency greater than 10 kHz. In some embodiments, the nanosecond pulse generation system can include one or more nanosecond pulse generators coupled to an NSP interconnect board and / or a resistive output stage.

[0089] In some embodiments, the high voltage nanosecond pulse generator system can pulse voltage with an amplitude greater than about 2 kV to about 40 kV. In some embodiments, the high voltage nanosecond pulse generator system can switch with a pulse repetition frequency of up to about 500 kHz or greater. In some embodiments, the high voltage nanosecond pulse generator system can provide individual pulses with varying pulse widths from about 50 nanoseconds to about 1 microsecond. In some embodiments, the high voltage nanosecond pulse generator system can switch at a frequency greater than about 10 kHz. In some embodiments, the high voltage nanosecond pulse generator system can operate with a rise time of less than about 20 ns up to about 200 ns.

[0090] In some embodiments, the high voltage nanosecond pulse generator system may include multiple components or subsystems, which may include one or more of the following: a resistive output stage (e.g., resistive output stage 102), an energy recovery circuit (e.g., energy recovery circuit 165), a spatially variable wafer bias system (e.g., spatially variable wafer bias power system 400), a bias compensation circuit (e.g., bias compensation circuit 104, 514, or 614), a control module (e.g., controller 825), a first ADC (e.g., first ADC 820), a Multilam second ADC (e.g., second ADC 845), multiple sensors, a thermal management system (e.g., thermal management system 1000), and the like.

[0091] Figure 1 FIG1 is a circuit diagram of a nanosecond pulse generator 100 according to some embodiments. The nanosecond pulse generator system 100 can be implemented within a high-voltage nanosecond pulse generator system. The nanosecond pulse generator system 100 can be summarized into five stages (these stages can be broken down into other stages or summarized into fewer stages and / or may or may not include components shown in the figure). The nanosecond pulse generator system 100 includes a pulse generator and transformer stage 101, a resistive output stage 102, a lead stage 103, a DC offset compensation circuit 104, and a load stage 106.

[0092] In some embodiments, the nanosecond pulse generator system 100 can generate pulses from a power supply having a voltage greater than 2 kV, a rise time less than about 20 ns, and a frequency greater than about 10 kHz.

[0093] In some embodiments, the pulse generator and transformer stage 101 can generate a plurality of high voltage pulses having a high frequency and fast rise and fall times. In all of the circuits shown, the high voltage pulse generator can comprise a nanosecond pulse generator.

[0094] In some embodiments, the pulse generator and transformer stage 101 may include one or more solid-state switches S1 (e.g., solid-state switches (e.g., such as IGBTs, MOSFETs, SiC MOSFETs, SiC junction transistors, FETs, SiC switches, GaN switches, photoconductive switches, etc.)), one or more snubber resistors R3, one or more snubber diodes D4, one or more snubber capacitors C5, and / or one or more freewheeling diodes D2. The one or more switches and / or circuits may be arranged in parallel or in series.

[0095] In some embodiments, load stage 106 may represent an active circuit for a plasma deposition system, a plasma etching system, or a plasma sputtering system. Capacitor C2 may represent the capacitance of a dielectric material on which a wafer may be seated, or capacitor C2 may represent the capacitance between an electrode separated by a dielectric material and the wafer. Capacitor C3 may represent the sheath capacitance of the plasma to the wafer. Capacitor C9 may represent the capacitance within the plasma between the chamber wall and the top surface of the wafer. Current source I2 and current source I1 may represent the ion current through the plasma sheath.

[0096] In some embodiments, the resistive output stage 102 may include one or more inductive elements represented by inductor L1 and / or inductor L5. For example, inductor L5 may represent the stray inductance of the leads in the resistive output stage 102. Inductor L1 may be configured to minimize the power flowing directly from the pulse generator and transformer stage 101 into the resistor R1.

[0097] In some embodiments, resistor R1 can dissipate charge from load stage 106, for example, at a fast time scale (e.g., 1 ns, 10 ns, 50 ns, 100 ns, 250 ns, 500 ns, 1,000 ns, etc.). The resistance of resistor R1 can be low to ensure that the pulse across load stage 106 has a fast fall time t f .

[0098] In some embodiments, resistor R1 may include multiple resistors arranged in series and / or parallel. Capacitor C11 may represent the stray capacitance of resistor R1 including the capacitance of the resistors arranged in series and / or parallel. For example, the capacitance of stray capacitance C11 may be less than 5nF, 2nF, 1nF, 500pF, 250pF, 100pF, 50pF, 10pF, 1pF, etc. For example, the capacitance of stray capacitance C11 may be less than the load capacitance (e.g., such as less than the capacitance of C2, C3, and / or C9).

[0099] In some embodiments, multiple pulse generator and transformer stages 101 may be arranged in parallel and coupled across inductor L1 and / or resistor R1 to resistive output stage 102. Each of the multiple pulse generator and transformer stages 101 may also include diode D1 and / or diode D6.

[0100] In some embodiments, capacitor C8 may represent the stray capacitance of blocking diode D1. In some embodiments, capacitor C4 may represent the stray capacitance of diode D6.

[0101] In some embodiments, DC bias compensation circuit 104 may include a DC voltage source V1 that can be used to positively or negatively bias the output voltage. In some embodiments, capacitor C12 isolates / decouples the DC bias voltage from the resistive output stage and other circuit components. This allows potential to be transferred from one part of the circuit to another. In some applications, the potential offset it establishes is used to hold the wafer in place. Resistor R2 can protect / isolate the DC bias supply from high voltage pulses pulsed from the output of pulse generator and transformer stage 101.

[0102] In this example, the DC offset compensation circuit 104 is a passive offset compensation circuit and can include an offset compensation diode D1 and an offset compensation capacitor C15. The offset compensation diode C15 can be arranged in series with the offset supply voltage V1. The offset compensation capacitor C15 can be arranged across one or both of the offset supply voltage V1 and the resistor R2. The offset compensation capacitor C15 can have a capacitance of less than 100 nH to 100 μF (e.g., approximately 100 μF, 50 μF, 25 μF, 10 μF, 2 μ, 500 nH, 200 nH, etc.).

[0103] In some embodiments, bias capacitor C12 can allow for a voltage offset between the output of the pulse generator and transformer stage 101 (e.g., at the location marked 125) and the voltage on the electrode (e.g., at the location marked 124). In operation, for example, the electrode can be at a DC voltage of -2 kV during a burst, while the output of the nanosecond pulse generator alternates between +6 kV during a pulse and 0 kV between pulses.

[0104] For example, the bias capacitor C12 is 100nF, 10nF, 1nF, 100μF, 10μF, 1μF, etc. For example, the resistor R2 may have a high resistance (eg, a resistance such as approximately 1kOhm, 10kOhm, 100kOhm, 1MOhm, 10MOhm, 100MOhm, etc.).

[0105] In some embodiments, the bias compensation capacitor C15 and the bias compensation diode D1 can allow a voltage offset between the output of the pulse generator and transformer stage 101 (e.g., at the location marked 125) and the voltage on the electrode (e.g., at the location marked 124) to be established at the beginning of each burst, achieving a desired equilibrium state. For example, charge is transferred from the bias capacitor C12 to the bias compensation capacitor C15 at the beginning of each burst over a period of multiple pulses (e.g., approximately 5-100 pulses), establishing the correct voltage in the circuit.

[0106] In some embodiments, the DC bias compensation circuit 104 may include one or more high voltage switches placed across the bias compensation diode D1 and coupled to the power supply V1. In some embodiments, the high voltage switch may include multiple switches arranged in series to collectively open and close the high voltage.

[0107] The high voltage switch can be coupled in series with one or both of an inductor and a resistor. The inductor can limit the peak current through the high voltage switch. For example, the inductor can have an inductance of less than about 100 μH (e.g., such as about 250 μH, 100 μH, 50 μH, 25 μH, 10 μH, 5 μH, 1 μH, etc.). For example, the resistor can transfer power dissipation to the resistive output stage 102. The resistance of the resistor can have a resistance of less than about 1000 ohms, 500 ohms, 250 ohms, 100 ohms, 50 ohms, 10 ohms, etc.

[0108] In some embodiments, the high voltage switch may include a snubber circuit.

[0109] In some embodiments, the high voltage switch may include multiple switches arranged in series to collectively open and close the high voltage. For example, the high voltage switch may include any of the switches described in U.S. patent application Ser. No. 16 / 178,565, filed on November 1, 2018, entitled “High Voltage Switch with Isolated Power,” which is incorporated herein in its entirety for all purposes.

[0110] In some embodiments, the high voltage switch can be open while the pulse generator and transformer stage 101 is pulsing, and closed when the pulse generator and transformer stage 101 is not pulsing. For example, when the high voltage switch is closed, current can be shorted across the bias compensation diode C15. Shorting this current can allow the bias between the wafer and the chuck to be less than 2 kV, which can be within acceptable tolerances.

[0111] In some embodiments, the pulse generator and transformer stage 101 can generate pulses with high pulse voltages (e.g., voltages greater than 1 kV, 10 kV, 20 kV, 50 kV, 100 kV, etc.), high pulse repetition frequencies (e.g., frequencies greater than 1 kHz, 10 kHz, 100 kHz, 200 kHz, 500 kHz, 1 MHz, etc.), fast rise times (e.g., rise times less than approximately 1 ns, 10 ns, 50 ns, 100 ns, 250 ns, 500 ns, 1,000 ns, etc.), fast fall times (e.g., fall times less than approximately 1 ns, 10 ns, 50 ns, 100 ns, 250 ns, 500 ns, 1,000 ns, etc.), and / or short pulse widths (e.g., pulse widths less than approximately 1,000 ns, 500 ns, 250 ns, 100 ns, 20 ns, etc.).

[0112] Figure 2 Example waveforms generated by a nanosecond pulse generator are shown. Among these example waveforms, pulse waveform 205 may represent the voltage provided by the pulse generator and transformer stage 101. As shown, pulse waveform 205 generates a pulse having the following qualities: a high voltage (e.g., greater than approximately 4 kV as shown in the waveform), a fast rise time (e.g., less than approximately 200 ns as shown in the waveform), a fast fall time (e.g., less than approximately 200 ns as shown in the waveform), and a short pulse width (e.g., less than approximately 300 ns as shown in the waveform). Waveform 210 may represent the voltage at the surface of a wafer represented by the nanosecond pulse generator system 100, at a point between capacitors C2 and C3 or across capacitor C3. Pulse waveform 215 represents the current flowing from the pulse generator and transformer stage 101 to the plasma. The nanosecond pulse generator system 100 may or may not include one or both of diodes D1 or D2.

[0113] During the transient state (e.g., during an initial number of pulses not shown in the figure), the high voltage pulses from the pulse generator and transformer stage 101 charge capacitor C2. Because the capacitance of capacitor C2 is large compared to the capacitance of capacitor C3 and / or capacitor C1, and / or because the pulse width of the pulses is short, capacitor C2 can fully charge multiple pulses from the high voltage pulse generator. Once capacitor C2 is charged, the circuit reaches a steady state, as shown in FIG. Figure 2 As shown in the waveform.

[0114] In the steady state, and when switch S1 is open, capacitor C2 is charged and slowly dissipates through the resistive output stage 110, as shown by the slightly rising slope of waveform 210. Once capacitor C2 is charged, and while switch S1 is open, the voltage at the surface of the wafer (the point between capacitor C2 and capacitor C3) is negative. This negative voltage may be the negative of the voltage of the pulse provided by the pulse generator and transformer stage 101. For Figure 2 In the example waveform shown, the voltage of each pulse is approximately 4 kV; and the steady-state voltage at the wafer is approximately -4 kV. This results in a negative potential across the plasma (e.g., across capacitor C3), which accelerates positive ions from the plasma to the surface of the wafer. While switch S1 is open, the charge on capacitor C2 slowly dissipates through the resistive output stage.

[0115] When switch S1 is closed, as capacitor C2 is charged, the voltage across capacitor C2 may reverse (the pulse from the pulse generator is high, as shown by waveform 205). Furthermore, as capacitor C2 charges, the voltage at the point between capacitor C2 and capacitor C3 (e.g., at the surface of the wafer) changes to approximately zero, as shown by waveform 210. Thus, the pulses from the high voltage pulse generator generate a plasma potential (e.g., the potential in the plasma) that rises from a negative high voltage to zero and back to a negative high voltage at a high frequency, with a fast rise time, a fast fall time, and / or a short pulse width.

[0116] In some embodiments, the action of the resistive output stage, represented by resistive output stage 102, can rapidly discharge stray capacitance C1 and can allow the voltage at the point between capacitors C2 and C3 to quickly return to its stable negative value of approximately -4 kV, as shown by waveform 210. The resistive output stage can allow the voltage at the point between capacitors C2 and C3 to exist for approximately % of the time, thereby maximizing the time that ions are accelerated into the wafer. In some embodiments, the components included within the resistive output stage can be specifically selected to optimize the time that ions are accelerated into the wafer and to maintain the voltage approximately constant during that time. Thus, for example, short pulses with fast rise and fall times can be useful, so that long periods of relatively uniform negative potential can exist.

[0117] The nanosecond pulse generator system 100 can generate various other waveforms.

[0118] Figure 3 is a circuit diagram of a nanosecond pulse generator system 150 having a pulse generator and transformer stage 101 and an energy recovery circuit 165 according to some embodiments. For example, the energy recovery circuit may replace Figure 11. The resistive output stage 102 shown. In this example, the energy recovery circuit 165 can be positioned on or electrically coupled to the secondary side of the transformer T1. For example, the energy recovery circuit 165 can include a diode 180 (e.g., a crowbar diode) across the secondary side of the transformer T1. For example, the energy recovery circuit 165 can include a diode 160 and an inductor 155 (arranged in series), which can allow current to flow from the secondary side of the transformer T1 to charge the power supply C7. The diode 160 and the inductor 155 can be electrically connected to the secondary side of the transformer T1 and the power supply C7. In some embodiments, the energy recovery circuit 165 can include a diode 175 and / or an inductor 170 electrically coupled to the secondary side of the transformer T1. The inductor 170 can represent a stray inductance and / or can include the stray inductance of the transformer T1.

[0119] When the nanosecond pulse generator is on, current can charge the load stage 106 (e.g., capacitor C3, capacitor C2, or capacitor C9). For example, when the voltage on the secondary side of transformer T1 rises above the charging voltage on power supply C7, some current can flow through inductor 155. When the nanosecond pulse generator is off, the capacitors within the load stage 106 flow through inductor 155 to charge power supply C7 until the voltage across inductor 155 reaches zero. Diode 180 can prevent the capacitors within the load stage 106 from looping with the inductor in load stage 106 or bias compensation circuit 104.

[0120] For example, diode 160 may prevent charge from flowing from power source C7 to capacitors within load stage 106 .

[0121] The value of inductor 155 can be selected to control the current fall time. In some embodiments, inductor 155 can have an inductance value between 1 μH and 500 μH.

[0122] In some embodiments, the energy recovery circuit 165 may include an energy recovery switch that can be used to control the flow of current through the inductor 155. For example, the energy recovery switch can be placed in series with the inductor 155. In some embodiments, when the switch S1 is open and / or no longer pulsing, the energy recovery switch can be closed to allow current to flow from the load stage 106 back to the high voltage load C7.

[0123] In some embodiments, the energy recovery switch may include multiple switches arranged in series to collectively open and close the high voltage. For example, the energy recovery switch may include any of the switches described in U.S. patent application Ser. No. 16 / 178,565, filed on November 1, 2018, entitled “High Voltage Switch with Isolated Power,” which is incorporated herein in its entirety for all purposes.

[0124] In some embodiments, the stray capacitance between the pulse generator and transformer stage 101 and ground is less than about 10 nF.

[0125] In some embodiments, the nanosecond pulse generator system 150 can generate Figure 2 The waveform shown is similar to the waveform.

[0126] Figure 4 is a block diagram of a spatially variable wafer bias power system according to some embodiments. The spatially variable wafer bias power system 400 may include a first high voltage pulse generator 425 and a second high voltage pulse generator 430 .

[0127] The interconnect board 405 can be electrically coupled to the first high-voltage pulse generator 425 and the second high-voltage pulse generator 430 or additional high-voltage pulse generators. In some embodiments, the interconnect board 405 can provide a high DC voltage to each of the first high-voltage pulse generator 425 or the second high-voltage pulse generator 430. In some embodiments, the interconnect board 405 can provide a trigger signal to the first high-voltage pulse generator 425 or the second high-voltage pulse generator 430. In some embodiments, the interconnect board 405 can provide a low voltage pulse to the first high-voltage pulse generator 425 or the second high-voltage pulse generator 430.

[0128] In some embodiments, the interconnect board 405 may include a controller or processor that includes one or more components of the computing system 1600. In some embodiments, one or more sensors may be included that measure characteristics of the plasma chamber (e.g., such as the electric field on the surface of the wafer, the uniformity of the electric field, the voltage on the first electrode, the voltage on the second electrode, the voltage across one or more resistive output stages or resistors in one or more energy recovery circuits). Based on the measurements from the sensors, the voltage, pulse width, or pulse repetition frequency of the first high-voltage pulse generator 425 and the second high-voltage pulse generator 430 may be adjusted.

[0129] For example, if the voltage on the second electrode is measured and determined to be lower than the voltage on the first electrode, this may result in electric field non-uniformity across the surface of the wafer (e.g., a difference of less than approximately 5%, 10%, 15%, or 20%). The controller may adjust the pulse width of the control pulse being sent to the second high-voltage pulse generator 430, which may increase the voltage generated by the second high-voltage pulse generator 430 (e.g., by increasing the capacitive charging time) and, therefore, the electric field on the second electrode. This process may be repeated until the electric field across the surface of the wafer is uniform (e.g., within 10%, 15%, 20%, 25%, etc.).

[0130] As another example, the voltage across the first resistive output stage and the second resistive output stage can be measured. As the capacitors in the chamber discharge, these voltages can correspond to the current flowing from the chamber to the ground. This current can be proportional to the ion energy. If the ion energy at the first electrode and the ion energy at the second electrode are uneven or misaligned (e.g., a difference greater than 10%, 20%, or 30%), the controller can adjust the pulse width of the control pulse being sent to the first high-voltage pulse generator 425 or the second high-voltage pulse generator 430, which can increase the voltage generated by the nanosecond pulse generator (e.g., by increasing the capacitive charging time) and thus increase the electric field on the corresponding electrode.

[0131] In some embodiments, pulses from the first high-voltage pulse generator 425 and the second high-voltage pulse generator 430 can be delivered to the energy recovery circuit 440 and the plasma chamber 435 via the chamber interface board. For example, the energy recovery circuit 440 can include the resistive output stage 102 of the nanosecond pulse generator system 100. As another example, the energy recovery circuit 440 can include the energy recovery circuit 165. As another example, the energy recovery circuit 440 can be omitted. As another example, the energy recovery circuit 440 can be coupled to one or both of the first high-voltage pulse generator 425 or the second high-voltage pulse generator 430. In some embodiments, the plasma chamber 435 can include a plasma chamber, an etching chamber, a deposition chamber, etc. In some embodiments, the active circuit of the plasma chamber 435 can include the load stage 106.

[0132] In some embodiments, bias compensation circuit 410 may include any or all of the components shown in bias compensation circuits 104, 514, or 614. In some embodiments, multiple bias compensation circuits may be used. For example, a first bias compensation circuit may be coupled to first high-voltage pulse generator 425 and the first electrode; and a second bias compensation circuit may be coupled to second high-voltage pulse generator 430 and the second electrode. For example, the bias compensation circuit may include bias compensation capacitor C12, which may have a capacitance of 100 pF, 10 pF, 1 pF, 100 μF, 10 μF, 1 μF, etc.

[0133] Although two high voltage pulse generators are shown, any number may be used. For example, multiple electrode rings may be coupled to multiple high voltage pulse generators.

[0134] In some embodiments, the first high-voltage pulse generator 425 can generate pulses that are different from the pulses generated by the second high-voltage pulse generator 430. For example, the first high-voltage pulse generator 425 can provide a pulsed output of at least 2 kV. In some embodiments, the second high-voltage pulse generator 430 can provide a pulsed output of at least 2 kV that is the same as or different from the pulses provided by the first high-voltage pulse generator 425.

[0135] As another example, the first high voltage pulse generator 425 can generate pulses having a first pulse repetition frequency, and the second high voltage pulse generator 430 can generate pulses having a second pulse repetition frequency. The first pulse repetition frequency and the second pulse repetition frequency can be the same or different. The first pulse repetition frequency and the second pulse repetition frequency can be in phase or out of phase with each other.

[0136] As another example, the first high voltage pulse generator 425 can generate a first plurality of bursts having a first pulse repetition frequency, and the second high voltage pulse generator 430 can generate a second plurality of bursts having a second pulse repetition frequency. Each burst can include multiple pulses. The first burst repetition frequency and the second burst repetition frequency can be the same or different. The first burst repetition frequency and the second burst repetition frequency can be in phase or out of phase with each other.

[0137] In some embodiments, the first high voltage pulse generator 425 and the second high voltage pulse generator 430 may be water cooled or dielectric cooled.

[0138] In some embodiments, the cables or transmission lines between the output of the first high voltage pulse generator 425 and the output of the second high voltage pulse generator 430 and the plasma chamber 435 (or electrodes) may be greater than 5 m, 10 m, 15 m, etc.

[0139] In some embodiments, the inductance between any of the following components may be less than about 100 μH: the first high voltage pulse generator 425 , the second high voltage pulse generator 430 , and the plasma chamber 435 .

[0140] In some embodiments, the stray capacitance between the first high voltage pulse generator 425 or the second high voltage pulse generator 430 and the ground is less than about 10 nF.

[0141] Figure 5 is a circuit diagram of a high voltage power system with a plasma load 500 according to some embodiments. The high voltage power system with a plasma load 500 is similar to the high voltage power system with a plasma load 500.

[0142] In this embodiment, the bias compensation circuit 514 may include a high voltage switch 505 coupled across a bias compensation diode 506 and coupled to a power source V1. In some embodiments, the high voltage switch 505 may include multiple switches 505 arranged in series to collectively open and close a high voltage. For example, the high voltage switch 505 may include Figure 7 In some embodiments, the high voltage switch 505 can be coupled to a switch trigger V4.

[0143] The high voltage switch 505 can be coupled in series with one or both of the inductor L9 and the resistor R11. The inductor L9 can limit the peak current through the high voltage switch 505. For example, the inductor can have an inductance of less than about 100 μH (e.g., such as about 250 μH, 100 μH, 50 μH, 25 μH, 10 μH, 5 μH, 1 μH, etc.). For example, the resistor R11 can transfer power dissipation to the resistive output stage 102. For example, the resistance of the resistor R11 can have a resistance of less than about 1000 ohms, 500 ohms, 250 ohms, 100 ohms, 50 ohms, 10 ohms, etc.

[0144] In some embodiments, the high voltage switch 505 may include a snubber circuit, which may include a resistor R9, a snubber diode D8, a snubber capacitor C15, and a snubber resistor R10.

[0145] In some embodiments, resistor R8 may represent a stray resistance that offsets supply voltage V1. For example, resistor R8 may have a high resistance (e.g., a resistance such as approximately 10kOhm, 100kOhm, 1MOhm, 10MOhm, 100MOhm, 1GOhm, etc.).

[0146] In some embodiments, the high voltage switch 505 may include multiple switches arranged in series to collectively open and close the high voltage. For example, the high voltage switch 505 may include Figure 7 As another example, the high voltage switch 505 may include any switch described in U.S. patent application Ser. No. 16 / 178,565, filed on Nov. 1, 2018, entitled “High Voltage Switch with Isolated Power,” which is incorporated herein in its entirety for all purposes.

[0147] In some embodiments, the high voltage switch 505 can be open while the pulse generator and transformer stage 101 is pulsing, and closed when the pulse generator and transformer stage 101 is not pulsing. For example, when the high voltage switch 505 is closed, current can be shorted across the bias compensation diode 506. Shorting this current can allow the bias between the wafer and the clamp to be less than 2 kV, which can be within acceptable tolerances.

[0148] In some embodiments, the high voltage switch 505 can allow the electrode voltage (position marked 124) and the wafer voltage (position marked 122) to quickly recover (e.g., less than approximately 100ns, 200ns, 500ns, 1μs) to the clamping potential (position marked 121).

[0149] Figure 6 is a circuit diagram of a high voltage power system 600 with a plasma load according to some embodiments. The high voltage power system 600 with a plasma load includes a bias compensation circuit 614 that includes a second pulse generator 601 and a switch 610.

[0150] The bias compensation circuit 614 may include a second pulse generator 601. For example, the second pulse generator 601 may include Figure 1 or Figure 3 One or more or all of the components of the pulse generator and transformer stage 101 shown. For example, the pulse generator and transformer stage 101 may include any of the components described in this document (e.g., Figure 7 and related paragraphs). In some embodiments, the second pulse generator 601 can be configured to be turned off when the pulse generator stage 101 is pulsing (e.g., during a burst), and the second pulse generator 601 can be configured to be turned on when the pulse generator stage 101 is not pulsing (e.g., between bursts).

[0151] The bias compensation circuit 614 may further include an inductor L9 on the secondary side of the transformer T2, and the switch 610 may be coupled to a voltage source V6. The inductor L9 may represent the stray inductance of the bias compensation circuit 614 and may have a low inductance (e.g., such as less than approximately 500 nH, 250 nH, 100 nH, 50 nH, 25 nH, etc.). In some embodiments, the voltage source V6 may represent a trigger for the switch 610.

[0152] In some embodiments, the bias compensation circuit 614 can include a blocking diode D7. For example, the blocking diode D7 can ensure that current flows from the switch 610 to the load stage 106. For example, the capacitor C14 can represent the stray capacitance of the blocking diode D7. For example, the capacitance of the capacitor C14 can have a low capacitance (e.g., less than approximately 1 nF, 500 pF, 200 pF, 100 pF, 50 pF, 25 pF, etc.).

[0153] In some embodiments, the switch 610 may be open while the pulse generator and transformer stage 101 is pulsing and closed when the pulse generator and transformer stage 101 is not pulsing to offset (or bias) the voltage provided by the pulse generator stage.

[0154] In some embodiments, the switch 610 may include multiple switches arranged in series to collectively open and close the high voltage. In some embodiments, the switch 610 may include Figure 7 As another example, the high voltage switch 505 may include any switch described in U.S. patent application Ser. No. 16 / 178,565, filed on Nov. 1, 2018, entitled “High Voltage Switch with Isolated Power,” which is incorporated herein in its entirety for all purposes.

[0155] Figure 7 is a block diagram of a high voltage switch 700 with an isolated power supply according to some embodiments. The high voltage switch 700 may include a plurality of switch modules 705 (collectively or individually 705, and individually 705A, 705B, 705C, and 705D) that may switch a voltage from a high voltage source 760 with a fast rise time and / or high frequency and / or with a variable pulse width. Each switch module 705 may include a switch 710 (e.g., such as a solid-state switch).

[0156] In some embodiments, the switch 710 can be electrically coupled to a gate driver circuit 730, which can include a power supply 740 and / or an isolated fiber optic trigger 745 (also referred to as a gate trigger or switch trigger). For example, the switch 710 can include a collector, an emitter, and a gate (or a drain, a source, and a gate), and the power supply 740 can drive the gate of the switch 710 via the gate driver circuit 730. For example, the gate driver circuit 730 can be isolated from other components of the high voltage switch 700.

[0157] In some embodiments, for example, an isolation transformer can be used to isolate the power supply 740. The isolation transformer can include a low-capacitance transformer. For example, the low capacitance of the isolation transformer can allow the power supply 740 to charge on a fast time scale without requiring significant current. For example, the isolation transformer can have a capacitance of less than approximately 100 pF. As another example, the isolation transformer can have a capacitance of less than approximately 30-100 pF. In some embodiments, the isolation transformer can provide voltage isolation of up to 1 kV, 5 kV, 10 kV, 25 kV, 50 kV, etc.

[0158] In some embodiments, the isolation transformer can have low stray capacitance. For example, the isolation transformer can have a stray capacitance of less than approximately 1,000 pF, 100 pF, 10 pF, etc. In some embodiments, the low capacitance can minimize electrical coupling to low-voltage components (e.g., a source of input control power) and / or can reduce EMI generation (e.g., electrical noise generation). In some embodiments, the transformer stray capacitance of the isolation transformer can include the capacitance measured between the primary winding and the secondary winding.

[0159] In some embodiments, the isolation transformer can be a DC to DC converter or an AC to DC transformer. In some embodiments, for example, the transformer can include a 110V AC transformer. Regardless, the isolation transformer can provide isolated power from other components in the high-voltage switch 700. In some embodiments, the isolation can be galvanic so that conductors on the primary side of the isolation transformer do not pass through or come into contact with the secondary side of the isolation transformer.

[0160] In some embodiments, the transformer may include a primary winding that may be tightly wound or wrapped around the transformer core. In some embodiments, the primary winding may include a conductive sheet wrapped around the transformer core. In some embodiments, the primary winding may include one or more windings.

[0161] In some embodiments, the secondary winding can be wound around the core as far away from the core as possible. For example, the winding bundle comprising the secondary winding can be wound through the center of the aperture in the transformer core. In some embodiments, the secondary winding can include one or more windings. In some embodiments, the wire bundle comprising the secondary winding can include a circular or square cross-section, for example, to minimize stray capacitance. In some embodiments, an insulator (e.g., oil or air) can be disposed between the primary winding, the secondary winding, or the transformer core.

[0162] In some embodiments, keeping the secondary winding away from the transformer core can have several benefits. For example, it can reduce stray capacitance between the primary side of the isolation transformer and the secondary side of the isolation transformer. As another example, it can allow high voltages between the primary side of the isolation transformer and the secondary side of the isolation transformer to be isolated so that corona and / or breakdown do not form during operation.

[0163] In some embodiments, the spacing between the primary side of the isolation transformer (e.g., the primary winding) and the secondary side of the isolation transformer (e.g., the secondary winding) can be approximately 0.1 inches, 0.5 inches, 1 inch, 5 inches, or 10 inches. In some embodiments, a typical spacing between the core of the isolation transformer and the secondary side of the isolation transformer (e.g., the secondary winding) can be approximately 0.1 inches, 0.5 inches, 1 inch, 5 inches, or 10 inches. In some embodiments, the gap between the windings can be filled with the lowest dielectric material possible (e.g., such as a vacuum, air, any insulating gas or liquid, or a solid material with a relative dielectric constant less than 3).

[0164] In some embodiments, power supply 740 may include any type of power supply that can provide high voltage isolation (for example, less than approximately 1,000 pF, 100 pF, 10 pF, etc.) or low capacitance. In some embodiments, the control voltage power supply may provide 720V AC or 240V AC at 60 Hz.

[0165] In some embodiments, each power supply 740 can be electrically coupled inductively to a single control voltage source. For example, power supply 740A can be electrically coupled to the power source via a first transformer; power supply 740B can be electrically coupled to the power source via a second transformer; power supply 740C can be electrically coupled to the power source via a third transformer; and power supply 740D can be electrically coupled to the power source via a fourth transformer. For example, any type of transformer that can provide voltage isolation between the various power supplies can be used.

[0166] In some embodiments, the first transformer, the second transformer, the third transformer, and the fourth transformer may include different secondary windings around the core of a single transformer. For example, the first transformer may include a first secondary winding, the second transformer may include a second secondary winding, the third transformer may include a third secondary winding, and the fourth transformer may include a fourth secondary winding. Each of these secondary windings may be wound around the core of a single transformer. In some embodiments, the first secondary winding, the second secondary winding, the third secondary winding, the fourth secondary winding, or the primary winding may include a single winding or multiple windings wound around the transformer core.

[0167] In some embodiments, power supply 740A, power supply 740B, power supply 740C, and / or power supply 740D may not share a return reference ground or local ground.

[0168] For example, the isolated fiber optic trigger 745 can also be isolated from other components of the high voltage switch 700. The isolated fiber optic trigger 745 can include a fiber optic receiver that allows each switch module 705 to float relative to other switch modules 705 and / or other components of the high voltage switch 700 and / or simultaneously allow active control of the gate of each switch module 705, for example.

[0169] In some embodiments, for example, the return reference ground or local ground or common ground for each switching module 705 can be isolated from each other, for example, using an isolation transformer.

[0170] For example, the electrical isolation of each switch module 705 from a common ground can allow multiple switches to be arranged in a series configuration for cumulative high voltage switching. In some embodiments, some hysteresis in the timing of the switch modules can be allowed or designed in. For example, each switch module 705 can be configured or rated to switch 1 kV, each switch module can be electrically isolated from each other, and / or the timing of closing each switch module 705 may not need to be perfectly aligned for a period of time defined by the capacitance of the snubber capacitor and / or the voltage rating of the switch.

[0171] In some embodiments, electrical isolation can provide a number of advantages. For example, one possible advantage may include minimizing switch-to-switch jitter and / or allowing for arbitrary switch timing. For example, each switch 710 may have a switch transition jitter of less than approximately 500 ns, 50 ns, 20 ns, 5 ns, etc.

[0172] In some embodiments, electrical isolation between two components (or circuits) may imply an extremely high resistance between the two components, and / or may imply a small capacitance between the two components.

[0173] Each switch 710 may include any type of solid-state switching device (e.g., such as an IGBT, MOSFET, SiC MOSFET, SiC junction transistor, FET, SiC switch, GaN switch, photoconductive switch, etc.). For example, the switches 710 may be capable of switching high voltages (e.g., voltages greater than approximately 1 kV) at high speeds (e.g., repetition rates greater than approximately 500 kHz) at high frequencies (e.g., greater than 1 kHz), and / or with fast rise times (e.g., rise times less than approximately 25 ns), and / or with long pulse lengths (e.g., greater than approximately 10 ms). In some embodiments, each switch may be individually rated for switching 1,200 V to 1,700 V, while the combined switch may be capable of switching greater than 4,800 V to 6,800 V (for all four switches). Switches with various other voltage ratings may also be used.

[0174] There are some advantages to using a large number of lower-voltage switches rather than a small number of higher-voltage switches. For example, low-voltage switches typically have better performance: they can switch faster, have faster transition times, and / or switch more efficiently than high-voltage switches. However, the greater the number of switches, the greater the timing issues that may arise.

[0175] Figure 7 The illustrated high-voltage switch 700 includes four switch modules 705. Although four are shown in this figure, any number of switch modules 705 may be used (e.g., two, eight, twelve, sixteen, twenty, twenty-four, etc.). For example, if each switch in each switch module 705 is rated at 1200V and sixteen switches are used, the high-voltage switch can switch up to 19.2kV. As another example, if each switch in each switch module 705 is rated at 1700V and sixteen switches are used, the high-voltage switch can switch up to 27.2kV.

[0176] In some embodiments, the high voltage switch 700 can include a flying capacitor 755. For example, the flying capacitor 755 can include one or more capacitors arranged in series and / or parallel. For example, the capacitors can include one or more polypropylene capacitors. The flying capacitor 755 can store energy from the high voltage source 760.

[0177] In some embodiments, the flying capacitor 755 can have a low capacitance. In some embodiments, the flying capacitor 755 can have a capacitance value of about 1 μF, about 5 μF, between about 1 μF and about 5 μF, between about 100 nF and about 1,000 nF, or the like.

[0178] In some embodiments, the high-voltage switch 700 may or may not include a crowbar diode 750. The crowbar diode 750 may include multiple diodes arranged in series or parallel, which can be beneficial, for example, for driving inductive loads. In some embodiments, the crowbar diode 750 may include one or more Schottky diodes (e.g., such as silicon carbide Schottky diodes). For example, the crowbar diode 750 can sense whether the voltage from the switch in the high-voltage switch is above a specific threshold. If so, the crowbar diode 750 can short-circuit the power from the switching module to ground. For example, the crowbar diode can allow an alternating current path to dissipate energy stored in the inductive load after the switch. For example, this can prevent large inductive voltage spikes. In some embodiments, the crowbar diode 750 may have a low inductance (e.g., such as 1nH, 10nH, 100nH, etc.). In some embodiments, the crowbar diode 750 may have a low capacitance (e.g., such as 100pF, 1nF, 10nF, 100nF, etc.).

[0179] In some embodiments, such as, for example, when the load 765 is primarily resistive, the crowbar diode 750 may not be used.

[0180] In some embodiments, each gate driver circuit 730 can generate jitter of less than approximately 1000 ns, 100 ns, 10.0 ns, 5.0 ns, 3.0 ns, 1.0 ns, etc. In some embodiments, each switch 710 can have a minimum on-time (e.g., less than approximately 10 μs, 1 μs, 500 ns, 100 ns, 50 ns, 10 ns, 5 ns, etc.) and a maximum on-time (e.g., greater than 25 s, 10 s, 5 s, 1 s, 500 ms, etc.).

[0181] In some embodiments, during operation, each of the high voltage switches may be turned on and / or off within 1 ns of each other.

[0182] In some embodiments, each switch module 705 can have the same or substantially the same (±5%) stray inductance. Stray inductance can include any inductance within the switch module 705 that is not associated with the inductor (e.g., such as leads, diodes, resistors, switches 710 and / or circuit board traces, etc.). The stray inductance within each switch module 705 can include low inductance (e.g., such as less than approximately 300nH, 100nH, 10nH, 1nH, etc.). The stray inductance between each switch module 705 can include low inductance (e.g., such as less than approximately 300nH, 100nH, 10nH, 1nH, etc.).

[0183] In some embodiments, each switch module 705 can have the same or substantially the same (±5%) stray capacitance. Stray capacitance can include any capacitance within the switch module 705 that is not associated with a capacitor (e.g., such as capacitance in leads, diodes, resistors, switches 710, and / or circuit board traces, etc.). The stray capacitance 705 within each switch module can include, for example, low capacitance, such as less than approximately 1,000 pF, 100 pF, 10 pF, etc. The stray capacitance 705 between each switch module can include, for example, low capacitance, such as less than approximately 1,000 pF, 100 pF, 10 pF, etc.

[0184] For example, deficiencies in voltage sharing can be addressed using passive snubber circuits (e.g., snubber diode 715, snubber capacitor 720, and / or freewheeling diode 725). For example, small differences in the time between each of switches 710 turning on or off, or differences in inductance or capacitance, can result in voltage spikes. These spikes can be mitigated using various snubber circuits (e.g., snubber diode 715, snubber capacitor 720, and / or freewheeling diode 725).

[0185] For example, the snubber circuit may include a snubber diode 715, a snubber capacitor 720, a snubber resistor 716, and / or a freewheeling diode 725. In some embodiments, the snubber circuit may be arranged in parallel with the switch 710. In some embodiments, the snubber capacitor 720 may have a low capacitance (e.g., such as a capacitance of less than about 100 pF).

[0186] In some embodiments, the high voltage switch 700 can be electrically coupled to or include a load 765 (e.g., a resistive, capacitive, or inductive load). For example, the load 765 can have a resistance of 50 ohms to 500 ohms. Alternatively or additionally, the load 765 can be an inductive or capacitive load.

[0187] Figure 8is a block diagram of an ADC control system 800 for the nanosecond pulse generator system 100 (or nanosecond pulse generator system 300) according to some embodiments. In some embodiments, the ADC control system 800 can be electrically coupled to the nanosecond pulse generator system 100 at one or more locations. For example, a first HV signal 805A can include a voltage signal at point 120 of the nanosecond pulse generator system 100 between the pulse generator and transformer stage 101 and the bias compensation circuit 104. As another example, a second HV signal 805B can include a voltage signal at point 125 of the nanosecond pulse generator system 100 between the load stage 106 and the bias compensation circuit 104. In some embodiments, the first HV signal 805A and the second HV signal 805B can include voltage signals on each side of the capacitor C12 of the bias compensation circuit 104. Any number of other signals can be received.

[0188] In some embodiments, the first HV signal 805A or the second HV signal 805B may include a voltage signal provided to the load stage 106. In some embodiments, the first HV signal 805A or the second HV signal 805B may include a voltage signal provided to the bias compensation circuit 104. In some embodiments, the first HV signal 805A or the second HV signal 805B may include a voltage signal provided to the lead stage 103. In some embodiments, the first HV signal 805A or the second HV signal 805B may include a voltage signal provided to the pulse generator and transformer stage 101. In some embodiments, the first HV signal 805A or the second HV signal 805B may include a voltage signal provided to the resistor output stage 102.

[0189] The first HV signal 805A and the second HV signal 805B may be collectively or individually referred to as HV input signals 805 .

[0190] In some embodiments, the HV input signal 805 can be divided at a voltage divider 810. For example, the voltage divider 810 can include a high-value resistor or a low-value capacitor to divide the high-voltage HV input signal (e.g., greater than 1 kV) into a low-voltage signal (e.g., less than 50 V). For example, the voltage divider 810 can divide the voltage by a 500:1 ratio. For example, the voltage divider 810 can divide the voltage of the 0-10 kV HV input signal 805 into a voltage of 0-20 V. For example, the voltage divider 810 can divide the voltage with minimal power loss (e.g., such as a power loss of less than about 5 W).

[0191] In some embodiments, the voltage divider 810 may include a low-value capacitor, a large-value capacitor, a low-value resistor, and a large-value resistor. For example, the low-value capacitor may include a capacitor having a capacitance value of approximately 0.1, 0.5, 1.0, 2.5, 5.0, 10.0 pF, etc. For example, the large-value capacitor may include a capacitor having a capacitance value of approximately 500 pF. In some embodiments, the large-value capacitor may have a capacitance value greater than the capacitance value of the low-value capacitor by approximately 50, 100, 250, 500, 1,000, 2,500, 5,000 pF, etc.

[0192] The low-value resistors may have resistance values ​​of approximately 1.0, 2.5, 5.0, 10, 25, 50, 100 kΩ, etc. The large-value resistors may have resistance values ​​of approximately 0.5, 1.0, 2.5, 5.0, 10, 25, 50, 100 MΩ, etc. In some embodiments, the resistance value of the large-value resistors may be greater than the resistance value of the low-value resistors by approximately 50, 100, 250, 500, 1,000, 2,500, 5,000 kΩ, etc. In some embodiments, the ratio of low-value capacitors to large-value capacitors may be substantially the same as the ratio of low-value resistors to large-value resistors.

[0193] In some embodiments, the voltage divider 810 can receive an HV input signal and output a divided voltage signal. For example, the divided voltage signal can be 100, 250, 500, 750, 1,000, etc. times smaller than the HV input signal.

[0194] In some embodiments, a filter 815 may be included, such as, for example, to filter out any noise from the divided voltage signal.

[0195] In some embodiments, the divided voltage signal can be digitized by the first ADC 820. Any type of analog-to-digital converter can be used. The first ADC 820 can generate a digitized waveform signal. In some embodiments, the first ADC 820 can capture data at 100, 250, 500, 1,000, 2,000, or 5,000 MSPS (megasamples per second or million samples per second). In some embodiments, the digitized waveform signal can be transmitted to the controller 825 using any type of communication protocol (e.g., SPI, UART, RS-232, USB, I2C, etc.).

[0196] In some embodiments, the controller 825 may include any type of controller (e.g., such as an FPGA, an ASIC, a complex programmable logic device, a microcontroller, a system on a chip (SoC), or any combination thereof). In some embodiments, the controller 825 may include any or all components of the computing system 1600. In some embodiments, the controller 825 may include a standard microcontroller (e.g., such as a Broadcom ARM Cortex, an Intel ARM Cortex, a PIC32, etc.).

[0197] In some embodiments, the controller 825 may receive a trigger signal from the trigger 830. In other embodiments, the first ADC 820 may receive a trigger signal from the trigger 830. The trigger signal may provide timing for data acquisition at the first ADC 820. For example, the trigger signal may be a 5V TTL trigger. For example, the trigger signal may have a 50 Ohm termination.

[0198] The digitized signal can then be output from the controller 825 via one or more output ports (e.g., such as first output 835A or second output 835B (individually or collectively, output 835)). These outputs can be coupled to the nanosecond pulse generator controller. One or both of the outputs 835 can include an electrical connector (e.g., such as LVDS, TTL, LVTTL connectors). One or both of the outputs 835 can provide data to the nanosecond pulse generator controller using any type of communication protocol (e.g., such as SPI, UART, RS-232, USB, I2C, EtherCAT, Ethernet, Profibus, PROFINET).

[0199] In some embodiments, the ADC control system 800 can be coupled to the nanosecond pulse generator system 100 via an 8 mm Multilam container on the ADC control system 800 .

[0200] In some embodiments, the second ADC 845 and the first ADC 820 may comprise a single ADC device. In some embodiments, one or both of the second ADC 845 or the first ADC 820 may be part of the controller 825. In some embodiments, the first ADC 820 may operate at a higher acquisition rate than the second ADC 845.

[0201] In some embodiments, the ADC control system 800 can include a second ADC 845 that can receive input from a first sensor 850A and a second sensor 850B (individually or collectively, sensors 850) (or any number of sensors). In some embodiments, the second ADC 845 can digitize analog signals from the sensors 850. For example, the sensors 850 can include sensors that sense inlet water temperature, dielectric fluid temperature, dielectric fluid pressure, rack air temperature, voltage, fluid flow, fluid leakage, and the like.

[0202] In some embodiments, the ADC control system 800 can monitor the voltage, frequency, pulse width, etc. of a given waveform and, in response thereto, adjust the voltage, pulse repetition frequency, pulse width, burst repetition frequency (where a burst includes multiple pulses), etc., of the input provided to the nanosecond pulse generator system 100. For example, the first ADC 820 can monitor the voltage amplitude of the waveform. This voltage data can be provided to the nanosecond pulse generator controller. The nanosecond pulse generator controller can adjust the amplitude or frequency of the signal provided to the nanosecond pulse generator system 100.

[0203] In some embodiments, the ADC control system 800 can output any pulse signal to one or more nanosecond pulse generator systems 100 via output 835. For example, the output 835 can include an optical fiber or an electrical connection. In some embodiments, the ADC control system 800 can include multiple output pulse channels (e.g., 1, 2, 5, 8, 20, 50, 100, etc.), which can be independent of each other. For example, the multiple output pulse channels can output pulses with sub-nanosecond resolution.

[0204] For example, if the waveform voltage is less than a predetermined voltage, the first ADC 820 may send a signal to the nanosecond pulse generator system 100 to generate a waveform with a higher voltage. If the waveform voltage is greater than a predetermined voltage, the first ADC 820 may send a signal to the nanosecond pulse generator system 100 to generate a waveform with a higher voltage.

[0205] As another example, if the pulse repetition frequency is greater than the expected pulse repetition frequency, the first ADC 820 may send a signal to the nanosecond pulse generator system 100 to generate a waveform having a lower frequency. If the burst repetition frequency is less than the expected burst repetition frequency, the first ADC 820 may send a signal to the nanosecond pulse generator system 100 to generate a waveform having a higher pulse repetition frequency.

[0206] As another example, if the waveform pulse width is longer than the expected pulse width, the first ADC 820 can send a signal to the nanosecond pulse generator system 100 to generate a waveform with a shorter or longer pulse width. If the waveform duty cycle is shorter or longer than the expected duty cycle, the first ADC 820 can send a signal to the nanosecond pulse generator system 100 to generate a pulse with the appropriate duty cycle.

[0207] ADC control system 800 may monitor other waveform characteristics and / or adjust these other characteristics.

[0208] In some embodiments, the ADC control system 800 can output an arbitrary pulse signal to one or more nanosecond pulse generator systems 100 via output 835. For example, the ADC control system can include an arbitrary pulse generator. For example, the output 835 can include an optical fiber or an electrical connection. In some embodiments, the ADC control system 800 can include multiple output pulse channels (e.g., 1, 2, 5, 8, 20, 50, 100, etc.) that can be independent of each other. For example, the multiple output pulse channels can output pulses with sub-nanosecond resolution. In some embodiments, the ADC control system 800 can output pulses with a resolution of less than about 0.1ns. In some embodiments, the ADC control system 800 can output pulses with a jitter of less than about 100ps.

[0209] In some embodiments, each output pulse channel of the ADC control system 800 can output a pulse to the nanosecond pulse generator system 100 that triggers the nanosecond pulse generator system 100. For example, the ADC control system 800 can adjust parameters of the output pulses in real time or between pulses. These parameters may include pulse width, pulse repetition frequency, duty cycle, burst repetition frequency, voltage, number of pulses in a burst, number of bursts, etc. In some embodiments, one or more parameters can be adjusted or changed based on input to the ADC control system 800 or based on a recipe or program.

[0210] For example, a recipe can include alternating high and low bursts. For example, a high burst can include multiple pulses with long pulse widths. For example, a low burst can include multiple pulses with short pulse widths. For example, the high and low bursts can include the same number of bursts or different numbers of bursts. For example, the short pulse width can be 20%, 30%, 80%, 50%, etc., of the width of the long pulse width. Alternating high and low bursts can include low bursts that are 5%, 20%, 50%, 100%, 125%, 150%, etc., relative to the number of high bursts.

[0211] In some embodiments, the control system 800 can adjust the pulse width, duty cycle, or pulse repetition frequency in conjunction with different steps of a plasma processing recipe, where each stage of the recipe can correspond to a different ion current, chamber pressure, or different gases in the chamber. Adjusting the pulse width, duty cycle, or pulse repetition frequency can adjust the electric field and / or voltage at the wafer surface to optimize performance at each step of the recipe.

[0212] In some embodiments, the ADC control system 800 includes an electrical shield. For example, the electrical shield can separate high-voltage components from low-voltage components. For example, the electrical shield can be physically disposed between the voltage divider 810 and the controller 825 or the first ADC 820. As another example, the electrical shield can be physically disposed between the nanosecond pulse generator system 100 and the controller 825 or the first ADC 820.

[0213] In some embodiments, the electrical shield may be physically disposed between the resistors in the voltage divider 810. In some embodiments, the electrical shield may be physically disposed between the capacitors in the voltage divider 810.

[0214] In some embodiments, the electrical shield may include copper, nickel, or in some embodiments, the electrical shield may include sheet metal, metal mesh, or metal foam.

[0215] In some embodiments, the ADC control system 800 can monitor the sensors 850 and take action. A number of examples are provided below.

[0216] In some embodiments, the nanosecond pulse generator system may include a cooling subsystem. In some embodiments, the cooling subsystem may include a fluid (e.g., such as water or a dielectric fluid) that flows through the cooling subsystem to remove heat from the nanosecond pulse generator system 100 (e.g., such as Figure 11-14 ). For example, one of the sensors 850 can include a flow rate sensor for the fluid in the cooling system. If the controller 825 determines that the flow rate is below a flow rate threshold, the ADC control system 800 will not allow the nanosecond pulse generator system 100 to turn on. If the controller 825 determines that the flow rate is below a flow rate threshold, the ADC control system 800 will automatically shut down the nanosecond pulse generator system 100. In some embodiments, the flow rate sensor (and, in some cases, the controller 825) can be a flow rate interlock. For example, if the flow rate is below a flow rate threshold, the flow rate interlock can prevent the nanosecond pulse generator system 100 from turning on, or can shut down the nanosecond pulse generator system 100 if it is already on.

[0217] For example, one of the sensors 850 may include a thermometer coupled to the cooling subsystem. If the controller 825 determines that the temperature of the cooling subsystem (e.g., the temperature of the fluid) is above a water temperature threshold, the ADC control system 800 will not allow the nanosecond pulse generator system 100 to turn on. If the controller 825 determines that the temperature of the water is above the water temperature threshold, the ADC control system 800 will automatically shut down the nanosecond pulse generator system 100. For example, if the temperature is above the water temperature threshold, the temperature interlock may prevent the nanosecond pulse generator system 100 from turning on, or may shut down the nanosecond pulse generator system 100 if it is already on.

[0218] For example, one of the sensors 850 may include a fluid level sensor for a fluid reservoir in the cooling system. If the controller 825 determines that the reservoir fluid level is above a fluid level threshold, the ADC control system 800 will not turn on. If the controller 825 determines that the reservoir fluid level is above the fluid level threshold, the ADC control system 800 will automatically shut down the nanosecond pulse generator system 100. For example, if the fluid level is below the fluid level threshold, the fluid level interlock may prevent the nanosecond pulse generator system 100 from turning on, or may shut down the nanosecond pulse generator system 100 if it is already on.

[0219] In some embodiments, the nanosecond pulse generator system 100 can include a nitrogen purge subsystem that pumps nitrogen into the nanosecond pulse generator system. For example, the nitrogen purge system can introduce dry nitrogen into the housing housing the high-voltage nanosecond pulse generator system. For example, one of the sensors 850 can include a nitrogen pressure sensor. If the controller 825 determines that the nitrogen pressure level is below a pressure threshold, the ADC control system 800 will not turn on. If the controller 825 determines that the nitrogen pressure level is below the pressure threshold, the ADC control system 800 will automatically shut down the nanosecond pulse generator system 100. For example, a pressure interlock can prevent the nanosecond pulse generator system 100 from turning on if the pressure is below the pressure threshold, or can shut down the nanosecond pulse generator system 100 if it is already on.

[0220] In some embodiments, one of the sensors 850 may include a DC voltage sensor that may be coupled to a DC power supply in the nanosecond pulse generator system 100. For example, if multiple DC power supply systems are used in the nanosecond pulse generator system 100 and the voltage varies by more than a set percentage (e.g., 1%, 5%, 10%, 20%, etc.) or an absolute voltage (e.g., 5V, 10V, 50V, 100V, etc.) during operation, the ADC control system 800 may automatically shut down the nanosecond pulse generator system 100. As another example, if a power supply system is used and the voltage output differs from the set voltage by more than a certain percentage (e.g., 1%, 5%, 10%, 20%, etc.) or an absolute voltage (e.g., 5V, 10V, 50V, 100V, etc.) during operation, the ADC control system 800 may automatically shut down pulse generation.

[0221] In some embodiments, output 835 may include an EtherCat module that can communicate with a third-party system (e.g., an external system). In some embodiments, the EtherCat module may include any type of communication module. In some embodiments, the EtherCat module may include one or more components of the computing system 1600.

[0222] In some embodiments, the controller 825 can be responsive to the operation of one or more interlocks. For example, the interlocks can include a 24V interlock, a dry N2 pressure interlock, a water flow interlock, a dielectric flow interlock, a water reservoir level interlock, a water temperature interlock, a dielectric temperature interlock, etc.

[0223] In some embodiments, the control system can control the operation of the pulse generating system (for example, pulse width, duty cycle, high voltage set point, on / off, return current output voltage, high voltage current set point, return current output current, enable high voltage output, return to high voltage enabled state, emergency shutdown, etc.).

[0224] In some embodiments, a user can interface with the control system through an EtherCat module. For example, a user can issue a PW command to set the output pulse width. As another example, a user can issue a DUTY command to set the duty cycle. As another example, a user can issue a PWR command to turn on the power and begin unit operation, or to turn off to end unit operation. As another example, the unit can continue to operate as configured until another command is issued to change the duty cycle or pulse width, or another PWR command is issued to power off.

[0225] In some embodiments, the ADC control system 800 may receive commands from an external source via any type of communication protocol (e.g., such as EtherCAT, LXI, Ethernet, Profibus, PROFINET, RS-232, ModBus, USB, UART, SPI, CC-Lin, etc.).

[0226] Figure 15 1 is a block diagram of a flow diagram of process 1500 according to some embodiments. Process 500 includes multiple blocks. Any additional blocks may be added, or any blocks may be deleted. For example, process 1500 may be performed by one or more components of computing system 600. For example, process 1500 may be performed by control system 400.

[0227] At block 1505, the process 1500 may send a plurality of low-voltage pulses to a high-voltage pulse generator system (e.g., the nanosecond pulse generator 100 or the nanosecond pulse generator 300) based on a recipe. For example, the low-voltage pulses may have a peak voltage of less than 20 V (e.g., such as 5 V). The low-voltage pulses may have a pulse repetition frequency, and each pulse may have a pulse width.

[0228] In some embodiments, the recipe may include alternating high bursts and low bursts as described above. In some embodiments, the recipe may be adjusted or changed in real time. In some embodiments, the recipe may depend on various parameters or characteristics of the plasma chamber.

[0229] At block 1510, a high voltage pulse can be measured at a high voltage pulse generator. For example, the high voltage pulse generator can have a peak voltage greater than 2 kV. In some embodiments, the high voltage pulse can have a peak voltage greater than 100 times the peak voltage of the low voltage pulse. In some embodiments, the high voltage pulse can be measured at an electrode within a plasma chamber. In some embodiments, the high voltage pulse can be measured across a resistor within a resistive output stage or energy recovery stage of the high voltage pulse generator. In some embodiments, the high voltage pulse can be measured at a bias capacitor within the high voltage pulse generator.

[0230] In some embodiments, the full width half maximum value, peak voltage, DC offset, rise time, fall time, etc. of the high voltage pulse can be measured.

[0231] The measured pulse may be compared to the expected (or anticipated) pulse at block 1515. If the measured pulse is consistent with the expected pulse (eg, within a certain tolerance), process 1500 proceeds to block 1505, and the process repeats.

[0232] If the measured pulse does not match the expected pulse, process 1500 proceeds to block 1520. At block 1520, the pulse width or pulse repetition frequency of the low-voltage pulse is adjusted. For example, if the voltage of the high-voltage pulse is lower than expected, the pulse width of the low-voltage pulse can be increased. As another example, if the voltage of the high-voltage pulse is higher than expected, the pulse width of the low-voltage pulse can be decreased.

[0233] For example, if the pulse repetition frequency (or pulse repetition period) of the high voltage pulse is lower than desired, the pulse repetition frequency of the low voltage pulse can be increased. As another example, if the pulse repetition frequency (or pulse repetition period) of the high voltage pulse is higher than desired, the pulse repetition frequency of the low voltage pulse can be reduced.

[0234] In some embodiments, process 1500 can be performed in real time. For example, process 1500 can be repeated at intervals of less than approximately 20 μs, 10 μs, 5 μs, 1 μs, etc. As another example, process 1500 can control the accuracy of the period between pulses (e.g., the pulse repetition period) with an accuracy of less than approximately 50 μs, 20 μs, 10 μs, 5 μs, 1 μs, etc.

[0235] Figure 9 is a functional block diagram of a nanosecond pulse generator system 900 according to some embodiments. In some embodiments, the nanosecond pulse generator system 900 may include all or some of the components shown or arranged in the nanosecond pulse generator system 100 and / or the nanosecond pulse generator system 150 .

[0236] In some embodiments, the nanosecond pulse generator system 900 may include a housing 905 that encloses some components. In some embodiments, the nanosecond pulse generator system 900 may include an ADC control module 912. The ADC control module 912 may include all or some of the components shown in the ADC control system 800.

[0237] In some embodiments, the nanosecond pulse generator system 900 may include a bias compensation module 965 (e.g., all or some components of the bias compensation circuit 104, the bias compensation circuit 514, or the bias compensation circuit 614) and / or a bias capacitor 910 (e.g., capacitor C12).

[0238] In some embodiments, the nanosecond pulse generator system 900 may include a heat exchanger subsystem 940 .

[0239] In some embodiments, the nanosecond pulse generator system 900 can include a high voltage DC power supply 950. The high voltage DC power supply can provide DC power to the bias compensation module 965 or the nanosecond pulse generator 955.

[0240] In some embodiments, the nanosecond pulse generator system 900 may include a resistive output stage 920 (e.g., resistive output stage 102). In some embodiments, the nanosecond pulse generator system 900 may include any or all components, arrangements, functionality, etc. shown and / or described in U.S. patent application Ser. No. 15 / 941,931, filed on March 30, 2018, entitled “High Voltage Resistive Output Stage Circuit,” which is incorporated herein in its entirety for all purposes.

[0241] In some embodiments, the nanosecond pulse generator system 900 may include: Figure 3 The energy recovery circuit 165 is shown.

[0242] In some embodiments, the nanosecond pulse generator system 900 may include an HVM module 915. In some embodiments, the HVM module 915 may include an EtherCat slave module and / or a high voltage DC power supply module. The HVM module 915 may include various connectors or ports for communication with external systems.

[0243] In some embodiments, the nanosecond pulse generator system 900 may include a control module 925. The control module 925 may include an EtherCat slave module, a system-on-chip module, and / or an FPGA.

[0244] In some embodiments, the nanosecond pulse generator system 900 may include a second ADC module 930. The second ADC module 930 may include a microcontroller (e.g., all or a portion of the controller 825) and / or an analog-to-digital converter (e.g., the second ADC 845). For example, the microcontroller may include any or all of the components shown in the computing system 1600.

[0245] In some embodiments, the nanosecond pulse generator system 900 can have a modular design so that various modules can be easily replaced or repaired. For example, the nanosecond pulse generator system 900 can include a power entry module, an AC heater filter module, a fast ADC module, a control module, and / or an HVM. For example, these modules can be slide-in modules. As another example, the nanosecond pulse generator system 900 can include other modules (e.g., such as a resistive output stage resistor and / or inductor module, a thermal management system, and / or a nanosecond pulse generator). These modules can be accessed by removing or opening one or more covers on the body of the system.

[0246] In some embodiments, the nanosecond pulse generator system 900 may include a pulse bias generation (PBG) module. This module can generate output pulses at up to 8 kV and 900 kHz. For example, the module may include two or more nanosecond pulse generators and / or resistive output stages.

[0247] In some embodiments, the nanosecond pulse generator system 900 may include a spatially variable wafer bias power system (e.g., any or all components of the spatially variable wafer bias power system 400). In some embodiments, this module may be a smaller version of the pulse bias generation subsystem (e.g., scaled to approximately 25% power, for example). In some embodiments, this module may drive the edge of the wafer separately from the center portion of the wafer. Various other implementations may be used where different spatial regions of the wafer may be pulsed independently of one another.

[0248] In some embodiments, the nanosecond pulse generator system 900 can include an HVM module (eg, a slide-in module). In some embodiments, the module can provide a DC clamp voltage.

[0249] In some embodiments, the nanosecond pulse generator system 900 can include an AC heater filter module (e.g., a slide-in module). In some embodiments, the module can filter the AC power going to the heater element to minimize ground leakage current and prevent excessive power from being drawn from the PBG through the heater element to ground.

[0250] In some embodiments, the nanosecond pulse generator system 900 can include a control module and / or a second ADC (e.g., a slide-in module). In some embodiments, the module can allow control of the system via EtherCat. In some embodiments, the module can interface with an external DC power supply to control charging voltage and current. In some embodiments, the module can monitor internal sensors (e.g., temperature, flow, status, etc.) to determine system status.

[0251] In some embodiments, the nanosecond pulse generator system 900 may include a power distribution unit (e.g., a slide-in module). In some embodiments, the module may provide an interface for plugging in external power (e.g., HVDC and three-phase 208V). In some embodiments, the module may include an ACDC power supply to generate the required control voltages for other modules within the P1 rack. In some embodiments, the module may provide a power distribution network to ensure that the required voltages reach the required modules in the system.

[0252] In some embodiments, the nanosecond pulse generator system 900 can include a rack. In some embodiments, the rack can include a mechanical assembly that houses all modules. In some embodiments, the rack can provide RF sealing to prevent EMI from entering or leaking out of the system. In some embodiments, the rack can be modular and / or include a removable front cover to allow access to the system's internal components. In some embodiments, the rack can allow for easy replacement of "slide-in" modules from the side as needed.

[0253] In some embodiments, the nanosecond pulse generator system 900 may include a thermal management subsystem 1000, which may include a heat exchanger, multiple fluid lines, and multiple cooling plates. In some embodiments, the thermal management subsystem may provide cooling to other system components. In some embodiments, the thermal management subsystem may include cooling water (e.g., 5 gpm or more). In some embodiments, the thermal management subsystem may include a heat exchanger so that a dielectric coolant can circulate within the system, which may, for example, eliminate arcing / capacitive coupling issues that would occur if water were used throughout. In some embodiments, the thermal management subsystem may include cooling plates for switches and cores on the NSP and for ROS and snubber resistors.

[0254] In some embodiments, the nanosecond pulse generator system 900 may include a sensor subsystem. In some embodiments, the sensor subsystem may provide all required sensors to monitor the status and operation of the system. In some embodiments, the sensor subsystem may include a temperature sensor that measures the temperature of the dielectric fluid in key components (e.g., switches, cores, resistors, etc.) and / or thermal management subsystems. In some embodiments, the sensor subsystem may include a flow / pressure sensor that can verify that the coolant is circulating correctly and / or is not leaking. In some embodiments, the sensor subsystem may include a sensor to verify the flow of nitrogen in the system, which may be necessary, for example, to prevent condensation.

[0255] Figure 101000 is a block diagram of a thermal management system 1000 according to some embodiments. In certain embodiments, thermal management system 1000 may include main manifold 1005 and heat exchanger 1010. Heat exchanger 1010 may exchange heat between the cold side and the hot side of the thermal management system. Hot side may be coupled in a fluidic manner with any number of cooling plates so that the hot system fluid returned from the cooling plate may be cooled by the facility fluid in heat exchanger 1010. In certain embodiments, system fluid may include water, dielectric fluid, dielectric fluid Galden HT110, deionized water, ethylene glycol / water solution, aromatic-based dielectric fluid (e.g., DEB), silicate-based dielectric fluid (e.g., Coolool 25R), aliphatic-based dielectric fluid (e.g., PAO), silicone-based dielectric fluid (e.g., Syltherm XLT), fluorocarbon-based dielectric fluid (e.g., FC-77), ethylene glycol, propylene glycol, methanol / water, potassium formate / potassium acetate solution, etc. In certain embodiments, facility fluid may include water (e.g., such as tap water).

[0256] In some embodiments, the facility side of heat exchanger 1010 can receive facility fluid (e.g., water) from an external fluid source 1015. In some embodiments, external fluid source 1015 can include a fluid inlet and a fluid outlet. In some embodiments, external fluid source 1015 can include a facility fluid thermal management system. In some embodiments, the external fluid source can include one or more pumps to ensure that facility fluid is flowing through the external fluid source including heat exchanger 1010.

[0257] In some embodiments, for example, the heat exchanger 1010 can exchange heat from the hot side (e.g., various plate assemblies) to the cold side (e.g., facility). In some embodiments, the cold side can include facility fluid (e.g., water), while the hot side can include system fluid (e.g., dielectric fluid). In some embodiments, the hot side can include one or more switch cooling plates 1041, 1051, one or more core cooling plates 1046, 1047, 1056, 1057, one or more resistor cooling plates 1060, 1061, 1062, 1063, buffer resistor cooling plates 1070, 1071, one or more liquid to air heat exchangers 1080, 1081, pumps 1025, and / or reservoirs 1020, etc. The hot side can be a fully contained system. The cold side can be coupled to an external fluid supply and / or thermal management system. In some embodiments, the system fluid can circulate faster than the facility fluid (e.g., twice as fast). In some embodiments, system fluid may flow at a rate of approximately 1 to 100 gallons per minute, or facility fluid may flow at a rate of approximately 1 to 100 gallons per minute. In some embodiments, heat exchanger 1010 may facilitate heat exchange between the hot side and the cold side without transferring fluid between the hot side and the cold side.

[0258] In some embodiments, the hot side of the heat exchanger 1010 may be coupled to a cold plate, a reservoir 1020 , a pump 1025 , or a main manifold 1030 , such as via one or more pipes or tubes, for example.

[0259] In some embodiments, the heat exchanger 1010 may comprise a scalable plate heat exchanger. In some embodiments, the heat exchanger 1010 may comprise a shell and tube heat exchanger. In some embodiments, the heat exchanger 1010 may comprise a double pipe heat exchanger.

[0260] In some embodiments, the reservoir 1020 can allow the system fluid to expand or contract as the various components of the high-voltage nanosecond pulse generator system heat up during operation. In some embodiments, the reservoir 1020 can store excess system fluid to prevent the pump 1025 from potentially running dry. In some embodiments, the reservoir 1020 can be constructed in any number of ways, such as, for example, as a welded steel container or a polymer container. In some embodiments, the reservoir 1020 can have a custom shape that can be sized or formed to fit in any configuration or space. In some embodiments, the reservoir 1020 can have an opening on the top of the reservoir 1020 to allow the reservoir 1020 to be filled with additional system fluid. In some embodiments, the reservoir 1020 can include a pressure relief valve that can automatically open or close to allow pressure from within the reservoir to escape. In some embodiments, the reservoir 1020 can include multiple chambers or compartments, which can be useful for isolating bubbles or reducing disturbances in the flow of the system fluid.

[0261] In some embodiments, pump 1025 can pump system fluid through heat exchanger 1010, reservoir 1020, main manifold 1030, pipe fittings, pipeline or other components. For example, pump 1025 can pump system fluid at a flow rate of about 10-30 gallons per minute or about 15-20 gallons per minute. In some embodiments, pump can pump system fluid at a flow rate of about 18 gallons per hour. In some embodiments, pump 1025 can include a magnetic drive pump, a centrifugal pump, a regenerative turbine pump, a mechanical seal pump, etc. In some embodiments, pump 1025 can include a variable frequency drive motor pump or a traditional single speed centrifugal pump. In some embodiments, the pump can be wired so that when the entire system is powered on, the pump automatically turns on.

[0262] In some embodiments, the main manifold 1030 can distribute the system fluid between any number of cooling plates. For example, the cooling plates can include one or more switching cooling plates 1041, 1051. Figure 1 An example of a switch cooling plate is shown in FIG. For example, the cooling plate may include one or more core cooling plates 1046, 1047, 1056, 1057. Figure 13 and Figure 14 An example of a core cooling plate is shown in .

[0263] In some embodiments, a core cooling plate can be bonded to a toroidal transformer core to provide optimized cooling while minimizing the impact on transformer performance. In some embodiments, the core cooling plate can include an inner or outer insulating ring so that the transformer's continuous conductive sheet primary winding can be insulated from the core cooling plate. In some embodiments, the core cooling plate can be made from tubing that is press-fitted into an aluminum ring, or larger diameter copper tubing can be flattened into a ring so that there is less material interaction. As another example, the core cooling plate can be made from a solid piece of copper with grooves machined into it to create an inner "tube" where another piece of metal (e.g., copper) is then brazed on top.

[0264] For example, the cooling plate may include one or more resistor cooling plates 1060, 1061, 1062, 1063, one or more buffer resistor cooling plates 1070, 1071. Figure 11 and Figure 12 Examples of resistor cooling plates and buffered resistor cooling plates are shown in In some embodiments, the resistor cooling plates may comprise machined or brazed copper so that the resistor cooling plates may be as thin as possible while handling high pressure / high speed.

[0265] For example, the cooling plate can include one or more liquid-to-air heat exchangers 1080, 1081. One or more liquid-to-air heat exchangers 1080, 1081 can cool the air circulating within the nanosecond pulse generator system. Fans deployed within the nanosecond pulse generator system can circulate this cool air through components that are not attached to the liquid-cooled cooling plate. For example, the heat exchanger can be used to cool diodes, gate drive circuits, switching regulators, etc.

[0266] In some embodiments, the main manifold 1030 can include multiple interconnected orifices coupled to multiple connectors. The multiple connectors can be used to connect tubing to various components. In some embodiments, each of the multiple connectors can include a quick-connect connector for ease of assembly, disassembly, or maintenance. In some embodiments, each of the multiple connectors can include a barbed connector, which can create less resistance to system fluids. In some embodiments, the manifold can have orifices of different sizes to allow for different fluid flow rates for different components.

[0267] In some embodiments, the cooling plate may include various cooling plates that may be configured or adapted to couple with various components. In some embodiments, the cooling plate may be designed using computational fluid dynamics (CFD) to ensure proper cooling based on the specific operating conditions (e.g., steady-state flow rate, pressure, temperature, etc.) or geometry of each component.

[0268] In some embodiments, the switch cooling plates and core cooling plates may be designed and configured to minimize size, stray capacitance, or stray inductance while removing as much heat as possible from each component in a uniform manner.

[0269] In some embodiments, the core cooling plate may introduce a stray capacitance of less than about 10 pF, 1 pF, 100 nF, 10 nF, etc. For example, the stray capacitance measured between the secondary winding and ground with the core cooling plate in place is greater than the stray capacitance between the secondary winding and ground without the core cooling plate by less than about 10 nF (or about 10 pF, 1 pF, 100 nF).

[0270] In some embodiments, the core cooling plate can introduce a stray inductance measured on the secondary side that is less than approximately 1 nH, 10 nH, 100 nH, 1 μH, 10 μH, etc. For example, the stray inductance measured on the secondary side of the transformer with the core cooling plate can be less than 10 μH greater than the stray inductance measured on the secondary side of the transformer without the core cooling plate. As another example, the stray inductance measured on the primary side of the transformer with the core cooling plate can be less than 10 nH greater than the stray inductance on the secondary side of the transformer without the core cooling plate.

[0271] In some embodiments, the switch cooling plate can introduce a capacitance of less than approximately 10 nF. For example, the switch can include a heat sink. The switch cooling plate can be coupled to the heat sink. When the switch cooling plate is not coupled to the heat sink, a first capacitance between the switch heat sink and the ground can be determined. When the switch cooling plate is coupled to the heat sink, a second capacitance between the switch heat sink and the ground can be determined. The difference between the first capacitance and the second capacitance can be less than a capacitance of approximately 10 pF-10 nF (e.g., such as a capacitance of less than approximately 5 nF). As another example, the stray capacitance between the switch cooling plate and the ground when the switch cooling plate is coupled to the switch heat sink is greater than the stray capacitance between the switch heat sink and the ground when the first switch cooling plate is removed, which is less than 5 nF.

[0272] In some embodiments, the switch cooling plate can be coupled to the switch heat sink so that the switch cooling plate and the switch heat sink are at the same electrical potential. This also allows the switch cooling plate to be electrically coupled to the collector (for IGBTs) or drain (for MOSFETs), since the heat sink in the switch can be connected to the collector or drain.

[0273] In some embodiments, thermal (or electrical) insulating material may be disposed between the switch and the switch cooling plate.

[0274] In some embodiments, the switch cooling plate and / or the core cooling plate may have a minimized geometry.

[0275] In some embodiments, the various cooling plates may be connected to the main manifold 1030 in series or in parallel.

[0276] In this example, two circuit boards 1040, 1050 are included that include a pulse generator and transformer stage (e.g., pulse generator and transformer stage 101) and a transformer core included on each board. Each board may include a switch that may be connected to one or more switches (e.g., Figure 1 One or more switch cooling plates in contact with the switch S1 in FIG. 1 and / or may be in contact with a transformer core (e.g., Figure 1 One or more core cooling plates in contact with the transformer T2). Multiple resistor cooling plates are connected to the resistor output stage resistors (e.g., Figure 1 resistor R1) and a buffer resistor (e.g. Figure 1 Each of these cooling plates can be fluidly connected to the main manifold via copper tubing or plex tubing. In some embodiments, the tubing can have a pipe size of approximately 0.1 inches, 0.2 inches, 0.5 inches, etc.

[0277] In some embodiments, a thermal interface material can be used to bridge gaps between electrical components (e.g., switches, resistors, transformer cores, etc.) and cooling plates (e.g., one or more switch cooling plates 1041, 1051, one or more core cooling plates 1046, 1047, 1056, 1057, one or more resistor cooling plates 1060, 1061, 1062, 1063, buffered resistor cooling plates 1070, 1071, one or more liquid-to-air heat exchangers 1080, 1081). In some embodiments, a thermal interface material can be placed between tubing and cooling plates (e.g., one or more switch cooling plates 1041, 1051, one or more core cooling plates 1046, 1047, 1056, 1057, one or more resistor cooling plates 1060, 1061, 1062, 1063, buffered resistor cooling plates 1070, 1071, one or more liquid-to-air heat exchangers 1080, 1081).

[0278] In some embodiments, for example, the thermal interface material can be very thin (e.g., as thin as 0.0005 inches and up to 0.1 inches thick) to minimize thermal resistance. In some embodiments, the thermal interface material can have a greater thickness or a non-uniform thickness to bridge gaps between objects with non-uniform surfaces or to provide structural rigidity. For example, the thermal interface material can be solid (e.g., such as aluminum nitride), or can be deformable (e.g., such as conductive epoxy, thermal paste, or compressible thermal pads). Depending on the application, the thermal interface material can be electrically insulating or conductive.

[0279] In some embodiments, thermal epoxy can be used to mechanically and thermally attach the core cooling plate to the transformer core. For example, thermal epoxy has a higher thermal conductivity than standard RTV. In some embodiments, a thermally conductive adhesive pad, which has a higher thermal conductivity than thermal epoxy but less structure, can be used to couple each switch to the switch cooling plate. In some embodiments, a clamp can be secured to the switch cooling plate with screws. In some embodiments, a thin layer of thermally conductive paste, which can be more thermally conductive than an adhesive pad, can be used to couple the resistors to the resistor core cooling plate. In some embodiments, the resistors can be screwed onto the surface of the resistor cooling plate, providing constant, even pressure to optimize heat transfer.

[0280] Figure 11 An embodiment and / or arrangement of a switch cooling plate system 1100 (e.g., switch cooling plates 1041, 1051) is shown. The switch cooling plate system 1100 may include a plurality of switch cooling plates 1105A, 1105B, 1105C, 1105D, 1105E, 1105F, 1105G, 1105H (individually or collectively, switch cooling plates 1105) arranged in a circle or octagon (e.g., arranged axially around a center point) to align with switches (e.g., arranged axially around a center point) Figure 1 The switch cooling plates 1105 can be coupled together via tubing 1120, 1125. For example, tubing 1120, 1125 can conduct system fluid through each of the switch cooling plates 1105. In some embodiments, two parallel tubing lines can connect each of the switch cooling plates 1105 and conduct system fluid between them.

[0281] In some embodiments, each switch cooling plate 1105 can include a first front face and a second front face. For example, each switch cooling plate 1105 can include one or two channels (or grooves) cut through the second front face that are sized and configured to securely couple with the tubing 1120, 1125 (e.g., such as having a channel diameter substantially similar to the tubing diameter). In some embodiments, the first front face can be substantially flat and can be coupled to a surface of the switch (e.g., a flat portion of the switch) using a thermal interface material, such as, for example, thermally conductive paste or an adhesive (e.g., aluminum nitride). For example, a thermally conductive interface material, such as, for example, thermally conductive paste or an adhesive (e.g., aluminum nitride), can be used to physically couple the channel to the tubing. In some embodiments, the tubing 1120, 1125 can be press-fit into the channel of each switch cooling plate and / or then brazed to the inlet / outlet manifold 1110 or the loop manifold 1115, creating an octagonal shape that can be screwed onto a circuit board to which the switch is coupled.

[0282] In some embodiments, the second front surface of each switch cooling plate 1105 can have 1, 2, 4, 8, etc. switches attached thereto, such as via thermal paste or adhesive. In some embodiments, each switch cooling plate 1105 can include one or more mounting holes to which a switch can be coupled.

[0283] In some embodiments, system fluid can enter the switch cold plate system 1100 via the inlet / outlet manifold 1110 by entering the inlet / outlet manifold 1110 via the inlet port 1140 and exiting the inlet / outlet manifold 1110 via the outlet port 1145. In some embodiments, the inlet port 1140 can include an inlet connector. In some embodiments, the outlet port can include an outlet connector. In some embodiments, the inlet / outlet manifold 1110 can include a block of aluminum material. In some embodiments, the loop manifold 1115 can include a block of metal material (e.g., such as aluminum, brass, bronze, or copper). In some embodiments, the loop manifold 1115 can include plastic.

[0284] In some embodiments, the inlet / outlet manifold 1110 can divide the system fluid into two separate paths: a first path can conduct the system fluid through the tubing 1120 coupled to the four switch cooling plates 1105G, 1105F, 1105E, 1105D, and return through the tubing 1125 also coupled to the four switch cooling plates 1105G, 1105F, 1105E, 1105D; and a second path can conduct the system fluid through the tubing 1130 coupled to the four switch cooling plates 1105H, 1105A, 1105B, 1105C, and return through the tubing 1135 also coupled to the four switch cooling plates 1105H, 1105A, 1105B, 1105C.

[0285] In some embodiments, loop manifold 1115 can receive system fluid from tubing 1120 and return the system fluid through tubing 1125. In some embodiments, loop manifold 1115 can receive system fluid from tubing 1130 and return the system fluid through tubing 1135. For example, this arrangement can help keep temperature differences between switches small and / or can reduce the number of fittings.

[0286] In some embodiments, a thermal interface material may be placed between tubing 1130 or tubing 1135 and each switch cooling plate 1105 .

[0287] In some embodiments, the inlet / outlet manifold 1110 can divide the system fluid into: a first path that conducts the system fluid in one direction in one tubing (e.g., tubing 1125) through each switch cooling plate 1105; and a second path that conducts the system fluid in the opposite direction in another tubing (e.g., tubing 1120) through each switch cooling plate 1105 without looping back to the manifold 1115.

[0288] In some embodiments, the switch cooling plate can maintain the surface temperature of each switch at a temperature less than about 250° C. In some embodiments, the switch cooling plate can remove more than about 1 W of heat from each switch.

[0289] Figure 12 、 Figure 13 and Figure 14 Embodiments and / or arrangements of cooling plates 1200 (e.g., core cooling plates 1046, 1047, 1056, 1057) according to some embodiments are shown. In some embodiments, core cooling plates 1200 can provide heat dissipation for one or more transformer cores (e.g., such as toroidal transformer cores). In some embodiments, core cooling plates 1200 can be deployed between two transformer cores 1210, 1211: one transformer core 1210 on one side of core cooling plates 1200, and the other transformer core 1211 on the other side of core cooling plates 1200. In some embodiments, additional core cooling plates can be deployed on the other side of transformer cores 1210 and 1211.

[0290] In some embodiments, the system fluid may be pumped through the internal tubing 1215 of the core cooling plate 1200 at a rate of 0.1-10 gallons per minute.

[0291] In some embodiments, as Figure 13 and Figure 14 As shown, core cooling plate 1200 can be made of a flat ring 1205 that can include internal tubing 1215. In some embodiments, flat ring 1205 can have an annular or donut-shaped shape and an internal aperture. In some embodiments, flat ring 1205 can have an inner circumference or an outer circumference. Flat ring 1205 can be made of any metal (e.g., such as aluminum, brass, steel, bronze, copper, etc.). In some embodiments, internal tubing 1215 can conduct system fluid between two transformer cores 1210 and 1211. For example, internal tubing 1215 can include copper tubing.

[0292] In some embodiments, core cooling plate 1200 includes a flat ring 1205, an inner tube 1215, an inner ring 1230, or an outer ring 1235. In some embodiments, inner ring 1230 or outer ring 1235 can comprise plastic or any other insulating material. In some embodiments, inner ring 1230 can have an outer circumference substantially similar to the inner circumference of flat ring 1205. In some embodiments, inner ring 1230 can be disposed within an inner aperture of flat ring 1205. In some embodiments, outer ring 1235 can have an inner circumference substantially similar to the outer circumference of flat ring 1205.

[0293] In some embodiments, the apertures of flat ring 1205 , inner ring 1230 , outer ring 1235 , transformer core 1210 , and transformer core 1211 may be substantially aligned, such as, for example, along a central axis through each of the apertures of flat ring 1205 , inner ring 1230 , outer ring 1235 , transformer core 1210 , and transformer core 1211 .

[0294] In some embodiments, the inner ring 1230 or outer ring 1235 can be attached to the inner and outer diameters of the transformer core to allow for isolation from any primary transformer windings and / or secondary transformer windings that may be wound around the transformer core. In some embodiments, the inner ring 1230 or outer ring 1235 can reduce capacitive or inductive coupling between the core cooling plate 1200 and any primary transformer windings and / or secondary transformer windings that may be wound around the transformer core.

[0295] In some embodiments, the internal tubing 1215 can be coupled to the inlet connector 1220 and the outlet connector 1225. For example, the inlet connector 1220 can be coupled to the inlet tubing 1240 via a clamp 1260 (metal or plastic clamp), a quick disconnect device, or welded together. For example, the inlet tubing 1240 can be coupled to the connector 1250 via the clamp 1260. For example, the connector 1250 can be connected to the main manifold 1030. For example, the outlet connector 1225 can be coupled to the outlet tubing 1241 via the clamp 1260. For example, the outlet tubing 1241 can be coupled to the connector 1251 via the clamp 1260. For example, the connector 1251 can be connected to the main manifold 1030.

[0296] In some embodiments, the core cooling plate can maintain the surface temperature of the transformer core at a temperature of less than about 200° C. 25. In some embodiments, the core cooling plate can remove more than about 1 W of heat from the transformer core.

[0297] In some embodiments, the transformer core may include a ferrite core. In some embodiments, the transformer core may include a toroidal, square, rectangular, etc. In some embodiments, the transformer may include a cylindrical transformer.

[0298] In some embodiments, the thermal management system can include a plurality of sensors (e.g., sensor 850) (e.g., such as a pressure sensor within one or more system fluid lines, a thermal sensor (e.g., a thermometer, thermistor, or thermocouple), a level sensor (e.g., within a reservoir), or a flow meter). In some embodiments, the flow meter can be disposed within or in line with one or more system fluid pipes. In some embodiments, the flow meter can be disposed within or in line with one or more water pipes. In some embodiments, the thermal sensor can be disposed within the system fluid pipes, at the inlet / outlet manifold, or at the outlet port of the switch cold plate system.

[0299] In some embodiments, these sensors can provide data to a controller or interlock system that can, for example, adjust the flow rate of one or both of the system fluid or facility fluid, such as by changing pump speed or opening or closing various valves throughout the system. In some embodiments, the high voltage power supply may not turn on or may automatically shut down if a particular sensor value (or average) is not achieved.

[0300] In some embodiments, the temperature of the system fluid can be measured at the main manifold before the heat exchanger, pump output, resistor cooling plate, core cooling plate, switch cooling plate, switch core cooling plate, or any other location. In some embodiments, the air temperature within the high voltage power supply can be monitored using an air temperature sensor (such as a surface mount sensor, for example).

[0301] In some embodiments, the high voltage power supply may not be turned on unless the water flow rate is above a flow threshold (e.g., such as above approximately 1, 2.5, 5, 7.5, or 10 gallons per minute). In some embodiments, the high voltage power supply may not be turned on unless the water flow rate is below a flow threshold (e.g., such as below approximately 10, 20, 50, or 100 gallons per minute). For example, the water flow rate may be measured at or near the water inlet port.

[0302] In some embodiments, the high voltage power supply may not be turned on unless the flow rate of the system fluid is above a flow threshold (e.g., such as approximately 1, 2.5, 5, 7.5, or 10 gallons per minute). In some embodiments, the high voltage power supply may not be turned on unless the flow rate of the system fluid is below a flow threshold (e.g., such as below approximately 10, 20, 50, or 100 gallons per minute). For example, the system fluid flow rate may be measured at or near the pump.

[0303] In some embodiments, the high voltage power supply may not be turned on if the input water temperature or system fluid temperature is greater than a temperature threshold (eg, a temperature threshold such as approximately 20-50°C, approximately 20-25°C, or approximately 20°C).

[0304] In some embodiments, the high voltage power supply may be shut off if the input water temperature or system fluid temperature is greater than a temperature threshold (eg, such as a temperature threshold of approximately 50-70°C, approximately 50-60°C, or approximately 50°C).

[0305] In some embodiments, the high voltage power supply can be shut off if the system fluid level in a reservoir (e.g., a reservoir) is less than a certain amount or less than a percentage full (e.g., such as less than approximately 30% to 75%, approximately 30% to 50%, or approximately 30% full).

[0306] In some embodiments, the high voltage power supply may be shut off if the temperature of the system fluid exiting one or more switch cooling plates is greater than a temperature threshold (e.g., such as 50 to 75°C, approximately 50 to 55°C, or approximately 50°C).

[0307] In some embodiments, if the pressure in the system fluid system is below a pressure threshold (e.g., such as below approximately 0 to 1.5 bar, approximately 0.5 to 1 bar, or approximately 1 bar), the high voltage power supply can be turned off or not turned on. In some embodiments, if the pressure in the system fluid system is above a pressure threshold (e.g., such as above approximately 1.7 to 3 bar, approximately 1.75 to 2 bar, or approximately 1.75 bar), the high voltage power supply can be turned off or not turned on. For example, the pressure of the system fluid can be measured within any dielectric pipe or conduit coupled to the main manifold.

[0308] In some embodiments, if the pressure from the nitrogen sensor is below a pressure threshold (such as below atmospheric pressure, for example), the high voltage power supply may be turned off or not turned on.

[0309] In some embodiments, if the leak sensor indicates that a fluid leak (system fluid or facility fluid) has occurred, the high voltage power supply may be turned off or not turned on. For example, the leak sensor may include an optical sensor that indicates the presence of liquid if the optical sensor is blocked.

[0310] In some embodiments, any sensor may include a switch sensor. For example, if a sensed threshold is met, the switch sensor may automatically close a switch. For example, the switch may open or close a circuit.

[0311] In some embodiments, multiple fans can be deployed within the high-voltage nanosecond pulse generator system. For example, multiple fans can be used to circulate air within the high-voltage nanosecond pulse generator system. In this example, the various fans are positioned so that they create an airflow pattern that circulates cool air (e.g., such as through a control interconnect board) around the sides of each module from the bottom up and then back down to each heat exchanger that can be coupled to one or both of the system fluid system and the facility fluid system.

[0312] According to some embodiments, an inert gas purge subsystem may be included. In some embodiments, an inert gas (e.g., nitrogen, helium, argon, etc.) may be flowed through the system to reduce the possibility of condensation forming on cooling components. In some embodiments, nitrogen may enter through a nitrogen baffle (e.g., on the bottom side of the rack), pass through a filter, a nitrogen flow sensor, and exit an orifice restrictor (e.g., which limits nitrogen flow to 10 liters per minute) to enter the high-voltage nanosecond pulse generator system. In some embodiments, nitrogen may exit the rack through another baffle, through a gap in the rack or body, or at any other point in the rack.

[0313] In some embodiments, the nanosecond pulse generator system may include a housing, and one or more nanosecond pulse generators with various subsystems may be located within the housing. For example, two or more of the following may be located within the housing: a thermal management system, a control system, a bias capacitor, a bias compensation power supply, a second nanosecond pulse generator, a resistive output stage, or an energy recovery circuit. In some embodiments, the housing may have a housing that is less than about 1 m 3 volume.

[0314] In some embodiments, a plurality of output stage resistors can be coupled to each of the nanosecond pulse generators. In some embodiments, a plurality of buffer resistors R3 can be coupled to each of the nanosecond pulse generators. In some embodiments, the various components can be slidably mounted within a housing.

[0315] In some embodiments, the internal and slide-in modules can be connected to an interconnecting PCB. In some embodiments, the PCB can allow signals to be shielded between the ground plane to minimize EMI effects. In some embodiments, a rigid design can be used that is optimized for placement / alignment of the slide-in modules. In some embodiments, the modules can be screwed together, and a socket-type connection allows for modularity compared to cable or soldered connections.

[0316] In some embodiments, the peak electric field between any two components inside the housing can be less than about 20 MV / m.

[0317] Unless otherwise specified, the term "substantially" means within 5% or 10% of the referenced value or within a manufacturing tolerance. Unless otherwise specified, the term "approximately" means within 5% or 10% of the referenced value or within a manufacturing tolerance.

[0318] Figure 16 The computing system 1600 shown can be used to perform any embodiment of the present invention. As another example, the computing system 1600 can be used to perform any calculation, identification and / or determination described herein. The computing system 1600 includes hardware elements that can be electrically coupled via a bus 1605 (or can communicate in other ways as appropriate). The hardware elements may include one or more processors 1610, including but not limited to one or more general-purpose processors and / or one or more special-purpose processors (e.g., digital signal processing chips, graphics acceleration chips, etc.); one or more input devices 1615, which may include but are not limited to a mouse, keyboard, etc.; and one or more output devices 1620, which may include but are not limited to a display device, a printer, etc.

[0319] The computing system 1600 may also include (and / or communicate with) one or more storage devices 1625, which may include, but are not limited to, local and / or network accessible storage, and / or may include, but are not limited to, disk drives, drive arrays, optical storage devices, solid-state storage devices (e.g., random access memory ("RAM") and / or read-only memory ("ROM")), which may be programmable, flash memory-updatable, etc. The computing system 1600 may also include a communication subsystem 1630, which may include, but are not limited to, a modem, a network card (wireless or wired), an infrared communication device, a wireless communication device and / or a chipset (e.g., a Bluetooth device, an 802.6 device, a Wi-Fi device, a WiMax device, a cellular communication facility, etc.). The communication subsystem 1630 may allow data to be exchanged with a network (e.g., the networks described below, to name just one example) and / or any other device described herein. In many embodiments, as described above, the computing system 1600 will also include a working memory 1635, which may include a RAM or ROM device.

[0320] The computing system 1600 may also include software elements, shown as currently being located within the working memory 1635, including an operating system 1640 and / or other code (e.g., one or more application programs 1645), which may include the computer programs of the present invention and / or may be designed to implement the methods of the present invention and / or configure the systems of the present invention, as described herein. For example, one or more of the processes described with respect to the methods discussed above may be implemented as code and / or instructions executable by a computer (and / or a processor within a computer). A collection of these instructions and / or code may be stored on a computer-readable storage medium (e.g., the storage device 1625 described above).

[0321] In some cases, the storage medium may be incorporated into or in communication with computing system 1600. In other embodiments, the storage medium may be separate from computing system 1600 (e.g., removable media (e.g., a compact disk, etc.)) and / or provided in the form of an installation package such that the storage medium can be used to program a general-purpose computer via the instructions / code stored thereon. These instructions may take the form of executable code that can be executed by computing system 1600, and / or may take the form of source code and / or installable code that, when compiled and / or installed on computing system 1600 (e.g., using any of a variety of general-purpose compilers, installers, compression / decompression utilities, etc.), then takes the form of executable code.

[0322] Numerous specific details are set forth herein to provide a thorough understanding of the claimed subject matter. However, it will be understood by those skilled in the art that the claimed subject matter may be practiced without these specific details. In other instances, methods, devices, or systems well known to those skilled in the art have not been described in detail so as not to obscure the claimed subject matter.

[0323] Some parts are presented in view of algorithms or symbolic representations of operations on data bits or binary digital signals stored in a computing system memory (e.g., computer memory). These algorithmic descriptions or representations are examples of techniques used by those of ordinary skill in the art of data processing to convey the essence of their work to others skilled in the art. An algorithm is a self-consistent sequence of operations or similar processes that lead to a desired result. In this context, the operations or processes involve the physical manipulation of physical quantities. Typically, but not necessarily, these quantities can take the form of electrical or magnetic signals that can be stored, transferred, combined, compared, or otherwise manipulated. Mainly for common usage reasons, it has sometimes proven convenient to refer to these signals as bits, data, values, elements, symbols, characters, terms, numbers, numerical values, etc. However, it should be understood that all of these and similar terms are associated with appropriate physical quantities and are merely convenient labels. Unless specifically stated otherwise, it should be understood that throughout this specification, discussions utilizing terms such as "process," "compute," "calculate," "determine," and "identify" refer to actions or processes of a computing device (e.g., one or more computers or similar electronic computing devices) that manipulate or transform data represented as physical electronic or magnetic quantities within a memory, register, or other information storage device, transmission device, or display device of a computing platform.

[0324] The one or more systems discussed herein are not limited to any particular hardware architecture or configuration. A computing device may include any suitable arrangement of components that provide a result conditioned on one or more inputs. Suitable computing devices include multi-purpose microprocessor-based computer systems that access stored software that programs or configures a general-purpose computing device to implement one or more embodiments of the present invention. Any suitable programming, scripting, or other type of language or combination of languages ​​may be used to implement the teachings contained herein in implementing software to be used in programming or configuring a computing device.

[0325] The embodiments of the methods disclosed herein may be performed in the operation of these computing devices. The order of the blocks presented in the above examples may be changed, for example, the blocks may be reordered, combined and / or decomposed into sub-blocks. Certain blocks or processes may be performed in parallel.

[0326] The use of "suitable for" or "configured to" herein is open-ended and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps. Furthermore, the use of "based on" is open-ended and inclusive in that a process, step, calculation, or other action that is "based on" one or more stated conditions or values ​​may actually be based on additional conditions or values ​​beyond those stated. The headings, lists, and numbering included herein are for ease of explanation only and are not intended to be limiting.

[0327] Although the subject matter has been described in detail with respect to specific embodiments thereof, it will be appreciated that modifications, variations, and equivalents to these embodiments may readily occur to those skilled in the art upon realizing the foregoing understanding. Accordingly, it will be appreciated that the present disclosure has been presented for purposes of illustration and not limitation, and does not exclude the inclusion of such modifications, variations, and / or additions to the subject matter as would be readily apparent to one of ordinary skill in the art.

Claims

1. A high voltage pulse generating power supply comprising: a high voltage pulse generator, the output of which provides pulses having an amplitude greater than 1 kV, a pulse width less than 1 μs, and a pulse repetition frequency greater than 20 kHz; plasma chamber; an electrode within the plasma chamber, the electrode being electrically coupled to the output of the high voltage pulse generator to generate an electric field within the plasma chamber; housing, which has less than 1m 3 a volume dimension of , wherein the high voltage pulse generator is disposed within the housing; as well as At least three of the following are disposed within the housing: a thermal management system coupled to a portion of the high-voltage pulse generator, a control system electrically coupled to the high-voltage pulse generator and configured to control pulsed operation of the high-voltage pulse generator, a bias capacitor electrically coupled to the electrode, a bias compensation power supply electrically coupled to the electrode, a second high-voltage pulse generator, a resistive output stage electrically coupled to the electrode, and an energy recovery circuit electrically coupled to the electrode and the high-voltage pulse generator; wherein an output of the second high-voltage pulse generator is electrically coupled to a second electrode disposed within the plasma chamber to generate a pulse generating electric field within the plasma chamber near the second electrode.

2. The high voltage pulse generating power supply according to claim 1, wherein: The inductance between the output of the high voltage pulse generator and the electrode is less than 10 μH.

3. The high voltage pulse generating power supply according to claim 1, wherein: The capacitance between the output of the high voltage pulse generator and the ground is less than 10 nF.

4. The high voltage pulse generating power supply according to claim 1, further comprising a control module that measures the voltage of the output pulse.

5. The high voltage pulse generating power supply according to claim 1, further comprising: a bias capacitor disposed between the high voltage pulse generator and the electrode; and A bias compensation power supply is electrically coupled to the high voltage pulse generator, the bias compensation power supply generating a voltage across the bias capacitor.

6. The high voltage pulse generating power supply of claim 1 further comprising a resistive output stage electrically coupled to the high voltage pulse generator and the electrode, the resistive output stage removing charge from a load on a fast time scale.

7. The high voltage pulse generating power supply according to claim 6, wherein: The resistive output stage includes an inductor and a capacitor arranged in series, wherein the inductor has an inductance of less than 200 μH.

8. The high voltage pulse generating power supply according to claim 1, wherein: The energy recovery circuit removes charge from the load on a fast time scale.

9. The high-voltage pulse generating power supply according to claim 1, further comprising a control module electrically coupled to the high-voltage pulse generator, the control module generating a low-voltage signal for controlling the pulse width and the pulse repetition frequency of the output pulse.

10. The high voltage pulse generating power supply according to claim 1, in, The output of the second high voltage pulse generator provides a second pulse having an amplitude greater than 1 kV, a pulse width less than 1 μs, and a pulse repetition frequency greater than 20 kHz.

11. The high voltage pulse generating power supply according to claim 10, wherein: The pulse from the high voltage pulse generator and the second pulse from the second high voltage pulse generator differ in at least one of voltage, pulse width, and pulse repetition frequency.

12. The high voltage pulse generating power supply of claim 1 , further comprising a thermal management subsystem comprising one or more switch cooling plates and one or more transformer core cooling plates, wherein: The high voltage pulse generator includes a plurality of switches coupled to the one or more switch cooling plates and a transformer coupled to the one or more transformer core cooling plates.

13. The high voltage pulse generating power supply according to claim 12, wherein: The thermal management subsystem includes a fluid flowing through the switch cooling plate and the core cooling plate.

14. The high voltage pulse generating power supply according to claim 1, wherein: The peak electric field between any two components inside the housing is less than 20 MV / m.

15. A high voltage pulse generating power supply comprising: a high voltage pulse generator, the output of which provides pulses having an amplitude greater than 1 kV, a pulse width less than 1 μs, and a pulse repetition frequency greater than 20 kHz; plasma chamber; an electrode within the plasma chamber, the electrode being electrically coupled to the output of the high voltage pulse generator to generate an electric field within the plasma chamber; a control module electrically coupled to the high voltage pulse generator, the control module measuring a voltage of the pulse at the electrode, and the control module modifying at least one of the voltage, pulse width, and pulse repetition frequency of the pulse in response to the measured voltage; and A thermal management subsystem includes a plurality of cooling plates coupled to the high voltage pulse generator.

16. The high voltage pulse generating power supply according to claim 15, in, The high voltage pulse generator comprises: multiple switches; and a transformer coupled to the plurality of switches and the output and having a transformer core; and Wherein, the plurality of cooling plates include: one or more switch cooling plates coupled to the plurality of switches; and One or more transformer core cooling plates are coupled to the transformer core.

17. The high voltage pulse generating power supply according to claim 15, wherein: The thermal management subsystem includes a fluid flowing through at least one of the plurality of cooling plates.

18. The high voltage pulse generating power supply according to claim 15, wherein: The control module measures one or more parameters of the thermal management subsystem and stops the high voltage pulse generator from outputting pulses if one of the one or more parameters is out of tolerance.

19. A high voltage pulse generating power supply comprising: a first high voltage pulse generator having a first output providing pulses having a first amplitude greater than 1 kV, a first pulse width less than 1 μs, and a first pulse repetition frequency greater than 20 kHz; a second high voltage pulse generator having a second output that provides pulses having a second amplitude greater than 1 kV, a second pulse width less than 1 μs, and a second pulse repetition frequency greater than 20 kHz; plasma chamber; a first electrode disposed within the plasma chamber, the first electrode being electrically coupled to the first output of the first high-voltage pulse generator; a second electrode disposed within the plasma chamber, the second electrode being electrically coupled to the second output of the second high voltage pulse generator; a first bias capacitor disposed between the first high voltage pulse generator and the first electrode; and A second bias capacitor is disposed between the second high-voltage pulse generator and the second electrode.

20. The high voltage pulse generating power supply according to claim 19, further comprising: a first bias compensation power supply electrically coupled to the first high voltage pulse generator and the first electrode, the first bias compensation power supply generating a voltage across the first bias capacitor; and A second bias compensation power supply is electrically coupled to the second high voltage pulse generator and the second electrode, the second bias compensation power supply generating a voltage across the second bias capacitor.

21. The high voltage pulse generating power supply of claim 19, further comprising a thermal management subsystem comprising a plurality of cooling plates coupled to the first high voltage pulse generator and the second high voltage pulse generator.

22. The high voltage pulse generating power supply according to claim 19, wherein: One or both of the first bias capacitor or the second bias capacitor has a capacitance greater than 1 nF.

Images