Wafer loading platform

Abstract

The present invention provides a chip carrier that suppresses the generation of hot spots in a chip. The chip carrier (10) comprises: a ceramic substrate (20), a cooling substrate (30), and a plurality of holes (e.g., a gas hole (44), a terminal hole (51)). The ceramic substrate (20) has a chip carrier surface (22a) on the upper surface on which a chip can be placed, and has a built-in chip adsorption electrode (26). The cooling substrate (30) is bonded to the lower surface of the ceramic substrate (20) and has a coolant flow path (32). The gas hole (44) and the terminal hole (51) penetrate the cooling substrate (30) in the up-down direction. A heat exchange promotion portion (e.g., a portion (32a) where the flow path becomes narrower) is provided in the peripheral area of ​​these holes to promote heat exchange between the coolant flowing in the coolant flow path (32) and the chip (W) placed on the chip carrier surface (22a).

Description

Technical Field

[0001] The present invention relates to a wafer loading platform. Background Art

[0002] In the past, a wafer carrier is known, which includes: a ceramic substrate having a wafer carrier surface and a built-in electrode; a cooling substrate having a coolant flow path; and a bonding layer that bonds the ceramic substrate and the cooling substrate. For example, Patent Documents 1 and 2 describe that, in the wafer carrier, as a cooling substrate, a component made of a metal-based composite material having a linear thermal expansion coefficient that is the same as that of the ceramic substrate is used. In addition, it is described that a terminal hole for inserting a power supply terminal for supplying power to the electrode, a gas hole for supplying He gas to the back of the wafer, or a lifting pin hole for inserting a lifting pin for lifting the wafer from the wafer carrier surface is provided on the wafer carrier.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent No. 5666748

[0006] Patent Document 2: Japanese Patent No. 5666749 Summary of the invention

[0007] However, the heat dissipation capability is poor around the terminal hole, the gas hole, or the lift pin hole, and therefore the area just above the hole of the chip sometimes becomes a so-called hot spot where the temperature is higher than other parts.

[0008] The present invention has been made to solve the above problems, and a main object of the present invention is to suppress the generation of hot spots on a wafer.

[0009] The wafer loading platform of the present invention comprises:

[0010] A ceramic substrate having a wafer placement surface on an upper surface thereof on which a wafer can be placed and having electrodes built therein;

[0011] A cooling substrate, which is bonded to the lower surface of the ceramic substrate and has a cooling medium flow path;

[0012] a plurality of holes extending through the cooling substrate in an up-down direction; and

[0013] A heat exchange promotion portion is provided in a peripheral region of at least one hole among the plurality of holes and promotes heat exchange between the coolant flowing through the coolant flow path and the wafer placed on the wafer placement surface.

[0014] In the wafer placing table, a heat exchange promoting portion is provided in the peripheral area of ​​at least one hole among the plurality of holes to promote heat exchange between the coolant flowing in the coolant flow path and the wafer placed on the wafer placing surface. Usually, the periphery of the wafer just above the hole is prone to become a hot spot, but in the present invention, since the heat exchange promoting portion is provided in the peripheral area of ​​the hole, heat removal in the peripheral area of ​​the hole is promoted. Therefore, the generation of hot spots in the wafer can be suppressed.

[0015] The chip carrier of the present invention may be: in the heat exchange promotion section, the coolant flow path becomes thinner compared to the area deviating from the peripheral area of ​​the hole. The flow velocity of the coolant flowing in the portion where the coolant flow path becomes thinner becomes faster than the case where the coolant flows in the portion where the coolant flow path does not become thinner. Therefore, the heat removal of the peripheral area of ​​the hole is promoted. For example, in the heat exchange promotion section, when looking down at the coolant flow path, the width of the coolant flow path may be narrower compared to the area deviating from the peripheral area of ​​the hole. The flow path cross-sectional area of ​​the portion where the coolant flow path becomes thinner is preferably 60 to 90% of the flow path cross-sectional area of ​​the portion that does not become thinner.

[0016] The wafer carrier of the present invention may be: in the heat exchange promotion part, fins are provided on the inner surface of the coolant flow path. The coolant flowing in the portion where the fins are provided in the coolant flow path is more likely to become turbulent than the coolant flowing in the portion where the fins are not provided. Therefore, heat removal from the peripheral area of ​​the hole is promoted. The cross-sectional area of ​​the flow path of the portion where the fins are provided in the coolant flow path is preferably 60 to 90% of the cross-sectional area of ​​the flow path of the portion where the fins are not provided.

[0017] The wafer carrier of the present invention may be such that: in the heat exchange promotion section, the distance from the wafer to the top surface of the coolant flow path is shortened compared to the area deviating from the peripheral area of ​​the hole. The coolant flowing through the portion where the distance from the wafer to the top surface of the coolant flow path is shorter is compared to the case where the coolant flows through the portion where the distance from the wafer to the top surface of the coolant flow path is not shortened, and the thermal resistance between the coolant and the wafer is reduced. Therefore, heat removal from the peripheral area of ​​the hole is promoted. The distance from the wafer to the top surface of the coolant flow path in the heat exchange promotion section is preferably 50 to 90% of the distance from the wafer to the top surface of the coolant flow path outside the heat exchange promotion section.

[0018] The wafer carrier of the present invention may have a plurality of small protrusions on the reference surface of the wafer carrier surface for supporting the lower surface of the wafer with the top surface, and the top surfaces of the plurality of small protrusions may be on the same plane. In the heat exchange promotion part, the area ratio of the small protrusions may be increased compared with the area deviating from the peripheral area of ​​the hole, or the reference surface may be raised. "The area ratio of the small protrusions" refers to: the proportion of the total area of ​​the top surface of the small protrusions in the unit area. The small protrusions are ceramics, and ceramics have good thermal conductivity compared with the voids. The portion with a larger area ratio of the small protrusions has a higher proportion of ceramics in the plane direction than the portion with a smaller area ratio of the small protrusions, so that the heat exchange between the wafer and the refrigerant is promoted, thereby promoting heat dissipation. The area ratio of the small protrusions within a radius of 25 mm from the center of the hole is preferably more than twice that of the other parts. In addition, the thickness of the void between the reference surface and the wafer becomes thinner than the portion where the reference surface is not raised. The portion where the reference surface is raised has a higher proportion of ceramic in the thickness direction than the portion where the reference surface is not raised, so heat exchange between the chip and the coolant is promoted, thereby promoting heat removal. It should be noted that the heat exchange promotion portion may have a larger area ratio of small protrusions and a raised reference surface than the area around the hole.

[0019] In the wafer carrier of the present invention, the hole may be at least one of a power supply component insertion hole, a lifting pin hole, and a gas hole. The power supply component insertion hole is set downward from the electrode in the wafer carrier and is inserted by the power supply component for supplying power to the electrode. The lifting pin hole passes through the wafer carrier in the vertical direction and is inserted by the lifting pin. The gas hole passes through the wafer carrier surface in the vertical direction and supplies gas to the wafer carrier surface. Usually, the area directly above the power supply component insertion hole, the lifting pin hole, and the gas hole in the wafer is prone to become a hot spot. Therefore, the application of the present invention is of great significance. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a longitudinal cross-sectional view of the wafer stage 10 installed in the chamber 94 .

[0021] Figure 2 It is a plan view of the wafer stage 10 .

[0022] Figure 3 This is a cross-sectional view when the wafer stage 10 is cut along a horizontal plane passing through the coolant flow path 32 .

[0023] Figure 4 It is an enlarged cross-sectional view showing a main portion of the refrigerant flow path 32 .

[0024] Figure 5 It is a manufacturing process diagram of the wafer stage 10.

[0025] Figure 6 This is an enlarged cross-sectional view of a main part showing another example of the refrigerant flow path 32 .

[0026] Figure 7 This is an enlarged cross-sectional view of a main part showing another example of the refrigerant flow path 32 .

[0027] Figure 8 This is an enlarged cross-sectional view of a main part showing another example of the refrigerant flow path 32 .

[0028] Fig. 9 It is an enlarged cross-sectional view of a main part showing another example of the wafer placement surface 22a.

[0029] Fig.10 Yes means Fig. 9 A plan view of a main portion of the chip placement surface 22a.

[0030] Fig.11 It is a plan view showing a main part of another example of the wafer placement surface 22a.

[0031] Explanation of symbols

[0032] 10 wafer placement table, 20 ceramic substrate, 22 central portion, 22a wafer placement surface, 22b sealing ring, 22c, 22f, 22g, 22h small protrusions, 22d, 22e reference surface, 24 peripheral portion, 24a focus ring placement surface, 26 wafer adsorption electrode, 30 cooling substrate, 32 coolant flow path, 32a portion of the coolant flow path passing through the peripheral area of ​​the hole, 32b fin, 32p inlet, 32q outlet, 34 flange portion, 40 metal bonding layer, 42 insulating film, 44 gas hole, 46 gas supply source, 48 lift pin hole, 51 terminal hole, 52 wafer adsorption DC power supply, 53 low pass filter (LPF) , 54 power supply terminal, 55 insulating tube, 62RF power supply, 63 high pass filter (HPF), 64 power supply terminal, 70 fastening component, 70a inner circumferential step surface, 72 bolt, 78 focusing ring, 94 chamber, 96 setting plate, 98 nozzle, 110 joint body, 120 ceramic sintered body, 130MMC block, 131MMC circular plate component, 132 groove, 135 metal bonding layer, 136MMC circular plate component, 144a gas hole upper part, 144b gas hole middle part, 144c gas hole lower part, 151a terminal hole upper part, 151b terminal hole middle part, 151c terminal hole lower part, d1, d2 distance, W chip. DETAILED DESCRIPTION

[0033] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. Figure 1 1 is a longitudinal cross-sectional view of the wafer stage 10 provided in the chamber 94 (a cross-sectional view when cut along a plane including the central axis of the wafer stage 10). Figure 2 is a plan view of the wafer stage 10, Figure 3 The cross-sectional view is a view of the wafer placement table 10 cut along a horizontal plane passing through the cooling medium flow path 32. Figure 4 It is an enlarged cross-sectional view showing a main portion of the refrigerant flow path 32 .

[0034] The wafer stage 10 is a member used when CVD or etching is performed on a wafer W using plasma, and is fixed to a mounting plate 96 provided inside a chamber 94 for semiconductor processes. The wafer stage 10 includes a ceramic substrate 20 , a cooling substrate 30 , and a metal bonding layer 40 .

[0035] The ceramic substrate 20 has an outer peripheral portion 24 having an annular focus ring placement surface 24a on the outer periphery of a central portion 22 having a circular wafer placement surface 22a. Hereinafter, the focus ring is sometimes abbreviated as "FR". A wafer W is placed on the wafer placement surface 22a, and a focus ring 78 is placed on the FR placement surface 24a. The ceramic substrate 20 is formed of a ceramic material represented by aluminum oxide, aluminum nitride, etc. The FR placement surface 24a is lowered by one level relative to the wafer placement surface 22a.

[0036] The central portion 22 of the ceramic substrate 20 has a wafer adsorption electrode 26 built in on the side close to the wafer placement surface 22a. The wafer adsorption electrode 26 is formed of a material containing, for example, W, Mo, WC, MoC, etc. The wafer adsorption electrode 26 is a disk-shaped or mesh-shaped monopolar electrostatic adsorption electrode. The layer on the upper side of the wafer adsorption electrode 26 in the ceramic substrate 20 functions as a dielectric layer. A wafer adsorption DC power supply 52 is connected to the wafer adsorption electrode 26 via a power supply terminal 54 (equivalent to the power supply member of the present invention). The power supply terminal 54 is inserted into a terminal hole 51 provided between the lower surface of the wafer adsorption electrode 26 and the lower surface of the cooling substrate 30 in the wafer placement table 10. The power supply terminal 54 is provided so as to pass through an insulating tube 55 arranged in a through hole in the terminal hole 51 that penetrates the cooling substrate 30 and the metal bonding layer 40 in the up-down direction, and reach the wafer adsorption electrode 26 from the lower surface of the ceramic substrate 20. A low-pass filter (LPF) 53 is provided between the wafer adsorption DC power supply 52 and the wafer adsorption electrode 26 .

[0037] like Figure 2As shown, a sealing ring 22b is formed along the outer edge of the wafer loading surface 22a, and a plurality of small protrusions 22c are formed on the entire surface. The sealing ring 22b and the plurality of small protrusions 22c are formed on the reference surface 22d of the wafer loading surface 22a. The small protrusions 22c are flat cylindrical protrusions in this embodiment. The top surface of the sealing ring 22b and the top surfaces of the plurality of small protrusions 22c are located on the same plane. The height of the sealing ring 22b and the small protrusions 22c (that is, the distance from the reference surface 22d to their top surfaces) is several μm to several 10 μm. The wafer W is placed on the wafer loading surface 22a in a state of contact with the top surface of the sealing ring 22b and the top surfaces of the plurality of small protrusions 22c.

[0038] The cooling substrate 30 is a disk component made of a metal-matrix composite material (Metal-Matrix Composite (MMC)). The cooling substrate 30 is provided with a refrigerant flow path 32 for refrigerant circulation inside. The refrigerant flow path 32 is connected to a refrigerant supply path and a refrigerant discharge path not shown in the figure, and the refrigerant discharged from the refrigerant discharge path adjusts the temperature and returns to the refrigerant supply path again. As MMC, it can be cited: a material containing Si, SiC and Ti, a material obtained by impregnating Al and / or Si in a SiC porous body, etc. The material containing Si, SiC and Ti is called SiSiCTi, the material obtained by impregnating Al in a SiC porous body is called AlSiC, and the material obtained by impregnating Si in a SiC porous body is called SiSiC. When the ceramic substrate 20 is an alumina substrate, as the MMC for cooling the substrate 30, AlSiC, SiSiCTi, etc., which have a thermal expansion coefficient close to that of alumina, are preferably used. The cooling substrate 30 is connected to the RF power supply 62 by means of a power supply terminal 64. A high pass filter (HPF) 63 is disposed between the cooling substrate 30 and the RF power source 62. The cooling substrate 30 has a flange portion 34 for fastening the wafer stage 10 to the installation plate 96 on the lower surface side.

[0039] The metal bonding layer 40 bonds the lower surface of the ceramic substrate 20 and the upper surface of the cooling substrate 30. The metal bonding layer 40 may be, for example, a layer formed of solder or metal brazing material. The metal bonding layer 40 is formed using, for example, TCB (Thermal Compression Bonding). TCB refers to a well-known method of sandwiching a metal bonding material between two components to be bonded and bonding the two components under pressure while heating to a temperature below the solidus temperature of the metal bonding material.

[0040] The side surface of the outer peripheral portion 24 of the ceramic substrate 20, the outer periphery of the metal bonding layer 40, and the side surface of the cooling substrate 30 are covered with an insulating film 42. Examples of the insulating film 42 include a thermal sprayed film of aluminum oxide, yttrium trioxide, and the like.

[0041] The wafer stage 10 has a plurality of holes penetrating the wafer stage 10 in the vertical direction. Figure 2 As shown in FIG. 2 , there are a plurality of gas holes 44 opened on the reference surface 22d of the wafer placement surface 22a, and lift pin holes 48 for inserting lift pins that move the wafer W up and down relative to the wafer placement surface 22a. When the wafer placement surface 22a is viewed from above, a plurality of gas holes 44 (three in this embodiment) are provided at appropriate positions on the reference surface 22d. A gas supply source 46 (see FIG. 2 ) is provided from outside. Figure 1 ) is supplied to the gas hole 44 with a heat-conducting gas such as He gas. If the heat-conducting gas is supplied to the gas hole 44 with the wafer W placed on the wafer placing surface 22a, the space surrounded by the wafer W, the sealing ring 22b, the small protrusion 22c and the reference surface 22d is filled with the heat-conducting gas. The heat-conducting gas has a higher thermal conductivity than a vacuum, and therefore plays a role in improving the heat conduction between the wafer W and the ceramic substrate 20. When the wafer placing surface 22a is viewed from above, a plurality of lift pin holes 48 (three in the present embodiment) are provided at equal intervals along the concentric circles of the wafer placing surface 22a.

[0042] For the refrigerant flow path 32 provided inside the cooling substrate 30, Figure 3 As shown in FIG. 1 , when the cross section of the coolant flow path 32 cut in a horizontal plane is observed from above, the coolant flow path 32 is formed in a single stroke from the inlet 32p to the outlet 32q in the entire area of ​​the cooling substrate 30 except the flange portion 34. In the present embodiment, the coolant flow path 32 is formed in a spiral shape. The coolant flow path 32 is formed in the peripheral area ( Figure 2 and Figure 3 The portion 32a through which the area surrounded by the double-dotted dashed line in the figure), the peripheral area of ​​the gas hole 44, and the peripheral area of ​​the lifting pin hole 48 pass is formed to be narrower in width (the flow path becomes thinner) than the portions other than the peripheral areas of these holes. That is, the cross-sectional area of ​​the flow path of the above-mentioned portion 32a in the refrigerant flow path 32 becomes smaller than that of the other portions. Therefore, the flow velocity of the refrigerant flowing in the above-mentioned portion 32a in the refrigerant flow path 32 becomes faster than that of the refrigerant flowing in the other portions. The portion 32a of the refrigerant flow path 32 is equivalent to the heat exchange promotion portion of the present invention. The refrigerant flow path 32 passes through the left and right sides of the above-mentioned holes 51, 44, 48, but in the present embodiment, one side of the holes 51, 44, 48 is thinned.

[0043] The wafer stage 10 is provided with a fastening member 70, which is mounted on a setting plate 96 provided inside a chamber 94. The fastening member 70 is an annular member having a substantially inverted L-shaped cross section, and has an inner peripheral step surface 70a. The wafer stage 10 and the setting plate 96 are integrated by the fastening member 70. In a state where the inner peripheral step surface 70a of the fastening member 70 is placed on the flange portion 34 of the cooling substrate 30 of the wafer stage 10, bolts 72 are inserted from the upper surface of the fastening member 70 and screwed into screw holes provided on the upper surface of the setting plate 96. The bolts 72 are installed at multiple locations (e.g., 8 locations, 12 locations) provided at equal intervals along the circumferential direction of the fastening member 70. The fastening member 70 and the bolts 72 may be made of insulating materials or conductive materials (metal, etc.).

[0044] Next, use Figure 5 , a manufacturing example of the wafer placement table 10 is described. Figure 5 1 is a manufacturing process diagram of the wafer stage 10. First, a ceramic powder compact is hot-pressed and fired to produce a disk-shaped ceramic sintered body 120 ( Figure 5 (A)). The ceramic sintered body 120 has a wafer adsorption electrode 26 built therein. Next, a terminal hole upper portion 151a is formed between the lower surface of the ceramic sintered body 120 and the wafer adsorption electrode 26, and a gas hole upper portion 144a and a lift pin hole upper portion (not shown) are provided at a predetermined position so as to penetrate the ceramic sintered body 120 in the vertical direction. ( Figure 5 (B)). Then, the power supply terminal 54 is inserted into the upper portion 151a of the terminal hole, and the power supply terminal 54 and the chip adsorption electrode 26 are joined ( Figure 5 (C)).

[0045] At the same time, two MMC disk components 131 and 136 are made ( Figure 5 (D)). Then, a plurality of holes penetrating in the vertical direction are provided in the two MMC disk components 131 and 136, and a groove 132 which eventually becomes the refrigerant flow path 32 is formed on the lower surface of the upper MMC disk component 131 ( Figure 5(E)). Specifically, the terminal hole middle part 151b, the gas hole middle part 144b and the lift pin hole middle part (not shown) are provided on the upper MMC disc part 131. In addition, the terminal hole lower part 151c, the gas hole lower part 144c and the lift pin hole lower part (not shown) are provided on the lower MMC disc part 136. For the portion 132a of the groove 132 corresponding to the narrower portion 32a of the refrigerant flow path 32, the groove width is narrowed. When the ceramic sintered body 120 is made of alumina, the MMC disc parts 131 and 136 are preferably made of SiSiC or AlSiC. This is because: the thermal expansion coefficient of alumina is roughly the same as the thermal expansion coefficient of SiSiC and AlSiC.

[0046] The SiSiCTi disc component can be made, for example, as follows. First, silicon carbide, metal Si and metal Ti are mixed to make a powder mixture. Next, the obtained powder mixture is formed into a disc-shaped molded body by uniaxial pressure forming, and the molded body is hot-pressed and sintered in an inert atmosphere to obtain a SiSiCTi disc component.

[0047] Next, a metal bonding material is arranged between the lower surface of the upper MMC disc component 131 and the upper surface of the lower MMC disc component 136, and a metal bonding material is arranged on the upper surface of the upper MMC disc component 131. Through holes are pre-set at positions of each metal bonding material that are opposite to each hole. Then, the power supply terminal 54 of the ceramic sintered body 120 is inserted into the middle portion 151b of the terminal hole and the lower portion 151c of the terminal hole, and the ceramic sintered body 120 is placed on the metal bonding material arranged on the upper surface of the upper MMC disc component 131. Thus, a stacked body is obtained in which the lower MMC disc component 136, the metal bonding material, the upper MMC disc component 131, the metal bonding material and the ceramic sintered body 120 are stacked in sequence from the bottom. The stacked body is heated and pressurized (TCB) to obtain a joint body 110 ( Figure 5(F)). The joint body 110 is obtained by joining the ceramic sintered body 120 to the upper surface of the MMC block 130 which serves as the basis of the cooling substrate 30 by means of a metal bonding layer 40. The MMC block 130 is obtained by joining the upper MMC disc part 131 and the lower MMC disc part 136 by means of a metal bonding layer 135. The MMC block 130 has a refrigerant flow path 32, a terminal hole 51, a gas hole 44 and a lifting pin hole (not shown) inside. The width of the portion 32a of the refrigerant flow path 32 passing through the peripheral area of ​​each hole is narrowed. The terminal hole 51 is a hole formed by connecting the upper part 151a of the terminal hole, the middle part 151b of the terminal hole and the lower part 151c of the terminal hole, and the gas hole 44 is a hole formed by connecting the upper part 144a of the gas hole, the middle part 144b of the gas hole and the lower part 144c of the gas hole. The lift pin hole is not shown in the figure, but is a hole formed by connecting the upper portion of the lift pin hole, the middle portion of the lift pin hole, and the lower portion of the lift pin hole.

[0048] TCB is performed, for example, as follows. That is, the stack is pressurized and joined at a temperature below the solidus temperature of the metal bonding material (for example, a temperature above the solidus temperature minus 20°C and below the solidus temperature), and then returned to room temperature. Accordingly, the metal bonding material becomes a metal bonding layer. As the metal bonding material at this time, Al-Mg bonding materials and Al-Si-Mg bonding materials can be used. For example, when TCB is performed using an Al-Si-Mg bonding material, the stack is pressurized in a heated state under a vacuum atmosphere. The metal bonding material preferably uses a metal bonding material with a thickness of about 100 μm.

[0049] Next, the outer periphery of the ceramic sintered body 120 is cut to form a step, thereby manufacturing a ceramic substrate 20 having a central portion 22 and an outer peripheral portion 24. In addition, the outer periphery of the MMC block 130 is cut to form a step, thereby manufacturing a cooling substrate 30 having a flange portion 34. In addition, an insulating tube 55 for inserting a power supply terminal 54 is arranged from the lower surface of the ceramic substrate 20 to the lower surface of the cooling substrate 30 in the terminal hole 51. Furthermore, ceramic powder is sprayed on the side of the outer peripheral portion 24 of the ceramic substrate 20, the periphery of the metal bonding layer 40, and the side of the cooling substrate 30, thereby forming an insulating film 42 ( Figure 5 (G) The sealing ring 22b and the small protrusions 22c are formed by, for example, sandblasting. Thus, the wafer placement table 10 is obtained.

[0050] It should be explained that Figure 1 The cooling substrate 30 is described as an integrated product, however, it can also be Figure 5 The structure in which two components are bonded together with a metal bonding layer as shown in (G) may be a structure in which three or more components are bonded together with a metal bonding layer.

[0051] Next, use Figure 1 , an example of using the wafer stage 10 is described. As described above, the wafer stage 10 is fixed to the setting plate 96 of the chamber 94 by the fastening member 70. A shower head 98 is arranged on the top surface of the chamber 94 to release the process gas into the chamber 94 from a plurality of gas injection holes.

[0052] A focus ring 78 is placed on the FR placement surface 24a of the wafer placement table 10, and a disc-shaped wafer W is placed on the wafer placement surface 22a. The focus ring 78 has a step along the inner circumference of the upper end so that it does not interfere with the wafer W. In this state, a DC voltage of the wafer adsorption DC power supply 52 is applied to the wafer adsorption electrode 26, so that the wafer W is adsorbed on the wafer placement surface 22a. Then, the interior of the chamber 94 is set to a predetermined vacuum atmosphere (or a reduced pressure atmosphere), and while supplying a process gas from the shower head 98, an RF voltage from the RF power supply 62 is applied to the cooling substrate 30. As a result, plasma is generated between the wafer W and the shower head 98. Then, CVD film formation or etching is performed on the wafer W using this plasma. It should be noted that the focus ring 78 is also consumed along with the plasma processing of the wafer W. However, since the focus ring 78 is thicker than the wafer W, the focus ring 78 is replaced after a plurality of wafers W are processed.

[0053] When the wafer W is processed with high-power plasma, the wafer W needs to be efficiently cooled. In the wafer carrier 10, a metal bonding layer 40 with high thermal conductivity is used as a bonding layer between the ceramic substrate 20 and the cooling substrate 30, rather than a resin layer with low thermal conductivity. Therefore, the ability to take away heat from the wafer W (heat dissipation ability) is high. In addition, since the thermal expansion difference between the ceramic substrate 20 and the cooling substrate 30 is small, even if the stress relaxation of the metal bonding layer 40 is low, it is not easy to cause problems. In addition, since the portion 32a of the coolant flow path 32 passing through the peripheral area of ​​each hole becomes thinner, the flow rate of the coolant flowing through the portion 32a is faster than that of other portions, and the heat exchange between the wafer W and the coolant is promoted.

[0054] In the wafer placement table 10 of the present embodiment described above, a heat exchange promotion portion (a narrowed portion 32a in the coolant flow path 32) is provided in the peripheral area of ​​the hole (the terminal hole 51, the gas hole 44 or the lift pin hole 48) to promote heat exchange between the coolant flowing in the coolant flow path 32 and the wafer W placed on the wafer placement surface 22a. Generally, the periphery of the above-mentioned hole in the wafer W is prone to become a hot spot, but in the present embodiment, since the heat exchange promotion portion is provided in the peripheral area of ​​the above-mentioned hole, heat removal in the peripheral area of ​​the hole is promoted. Therefore, the generation of a hot spot in the wafer W can be suppressed.

[0055] In addition, generally, the area directly above the terminal hole 51, the gas hole 44, or the lift pin hole 48 in the wafer W tends to become a hot spot. Therefore, it is significant to apply a heat exchange promotion portion (the narrowed portion 32a in the coolant flow path 32) to the surrounding area of ​​these holes.

[0056] It should be noted that the present invention is not limited to the above-described embodiment and can be implemented in various forms as long as they fall within the technical scope of the present invention.

[0057] In the above embodiment, one of the refrigerant flow paths 32 passing through the left and right sides of the terminal hole 51 is provided with a narrowed portion 32a, but the present invention is not particularly limited thereto. Figure 6 As shown in the enlarged cross-sectional view of FIG. 5 , a thinner portion 32a can be provided in both of the refrigerant flow paths 32 passing through the left and right sides of the terminal hole 51. This makes it easier to prevent the peripheral area of ​​the terminal hole 51 from becoming a hot spot. The refrigerant flow paths 32 passing through the left and right sides of the gas hole 44 or the lift pin hole 48 can also adopt the same structure.

[0058] In the above embodiment, the coolant flow path 32 passing through the peripheral area of ​​the terminal hole 51 is provided with a narrowed portion 32a of the coolant flow path 32 as a heat exchange promotion portion, but the present invention is not particularly limited to this. Figure 7 As shown in the enlarged cross-sectional view, fins 32b can be provided on the inner surface of the refrigerant flow path 32 passing through the peripheral area of ​​the terminal hole 51 as a heat exchange promotion portion. The refrigerant flowing in the portion where the fins 32b are provided in the refrigerant flow path 32 is more likely to become turbulent than the refrigerant flowing in the portion where the fins are not provided. Therefore, the heat removal from the peripheral area of ​​the terminal hole 51 is promoted. It should be noted that the number and length of the fins 32b can be appropriately set according to the desired heat removal amount. The refrigerant flow path 32 passing through the peripheral area of ​​the gas hole 44 or the lifting pin hole 48 can also adopt the same structure as this.

[0059] Or, if Figure 8 As shown in the enlarged cross-sectional view, the distance d1 from the chip W to the top surface of the coolant flow path 32 in the peripheral area of ​​the terminal hole 51 can be made shorter than the distance d2 from the chip W to the top surface of the coolant flow path 32 in the area deviating from the peripheral area of ​​the terminal hole 51. The thermal resistance between the coolant and the chip W is smaller when the coolant flows in the portion where the distance from the chip W to the top surface of the coolant flow path 32 is shorter (the portion with distance d1) than when the coolant flows in the portion where the distance from the chip W to the top surface of the coolant flow path 32 is not shortened (the portion with distance d2). Therefore, heat dissipation in the peripheral area of ​​the terminal hole 51 is promoted. It should be noted that Figure 8In the embodiment, the length of the coolant flow path 32 in the vertical direction is longer than that of other parts for the portion where the distance from the wafer W to the top surface of the coolant flow path 32 is shorter than that of other parts, but it can be the same length as that of other parts. The surrounding area of ​​the gas hole 44 or the lifting pin hole 48 can also adopt the same structure.

[0060] Or, if Fig. 9 The enlarged cross-sectional view and Fig.10 As shown in the plan view of FIG. 2 , the reference surface 22e formed in the peripheral region X of the terminal hole 51 of the chip loading surface 22a can be raised compared with the reference surface 22d formed in the region of the peripheral region X deviating from the terminal hole 51. Accordingly, the thickness of the gap between the chip W supported by the small protrusion 22c and the reference surface 22e is thinner than the thickness of the gap between the chip W and the reference surface 22d. Since the peripheral region X of the terminal hole 51 of the chip loading surface 22a where the raised reference surface 22e is formed is higher in the proportion of ceramics in the thickness direction than the region (region where the reference surface 22d is formed) of the peripheral region X deviating from the terminal hole 51, heat exchange between the chip W and the coolant is promoted, thereby promoting heat removal. The peripheral region of the gas hole 44 or the lifting pin hole 48 can also adopt the same structure.

[0061] Or, if Fig.11 As shown in (A) to (D), the area ratio of the small protrusions can be made larger in the peripheral region X of the terminal hole 51 than in the region away from the peripheral region X of the terminal hole 51 . Fig.11 (A) to (D) are main parts showing another example of the wafer placement surface 22a (equivalent to Figure 2 The area ratio of the small protrusions refers to the ratio of the total area of ​​the top surface of the small protrusions to the unit area. For example, Fig.11 In (A), the arrangement density of the small protrusions 22 c is increased in the peripheral region X of the terminal hole 51 compared to the region away from the peripheral region X of the terminal hole 51 . Fig.11 In (B), a small protrusion 22 f having a top surface area larger than that of the small protrusion 22 c is arranged in the peripheral region X of the terminal hole 51 . Fig.11 In (C), the small protrusions 22g having a larger top surface area than the small protrusions 22c are arranged more densely in the peripheral region X of the terminal hole 51 than in the region away from the peripheral region X of the terminal hole 51. Fig.11In (D), a small protrusion 22h having an area that substantially covers the peripheral area X is arranged in the peripheral area X of the terminal hole 51. In either case, the area ratio of the small protrusion in the peripheral area X of the terminal hole 51 is larger than that in the area deviating from the peripheral area X of the terminal hole 51. The small protrusion is ceramic, and ceramic has a better thermal conductivity than the gap. Since the portion with a larger area ratio of the small protrusion is compared with the portion with a smaller area ratio of the small protrusion, the proportion of ceramic occupied in the plane direction is higher, so the heat exchange between the chip and the refrigerant is promoted, thereby promoting heat dissipation. The peripheral area of ​​the gas hole 44 or the lifting pin hole 48 can also adopt the same structure.

[0062] In the above embodiment, the heat exchange promotion part is provided in the peripheral area of ​​the terminal hole 51, the gas hole 44 and the lifting pin hole 48, but it is not particularly limited to this. For example, the heat exchange promotion part can be provided in the peripheral area of ​​some of these holes (for example, the area that is particularly prone to become a hot spot).

[0063] In the above embodiment, the width of the coolant flow path 32 is narrowed for the portion 32a passing through the peripheral area of ​​the hole, but the present invention is not particularly limited thereto. For example, the length of the coolant flow path 32 in the vertical direction may be reduced for the portion 32a passing through the peripheral area of ​​the hole.

[0064] In the above embodiment, the cooling substrate 30 is made of MMC, but the present invention is not particularly limited thereto. The cooling substrate 30 may be made of metal (eg, aluminum, titanium, molybdenum, tungsten, and alloys thereof).

[0065] In the above embodiment, the ceramic substrate 20 and the cooling substrate 30 are bonded via the metal bonding layer 40 having good thermal conductivity and high inventive effect, but the present invention is not limited thereto. For example, a resin bonding layer may be used instead of the metal bonding layer 40 .

[0066] In the above embodiment, the shape of the coolant flow path 32 when viewed from above is a spiral shape, but it is not particularly limited to this. For example, the shape of the coolant flow path 32 when viewed from above can be a sawtooth shape. Specifically, the inlet and the outlet can be set at two points near the outer periphery that are point-symmetrical with the center of the cooling substrate 30 as the symmetry center when viewed from above, and the coolant flow path 32 can be formed in a sawtooth shape in a single stroke from the inlet to the outlet.

[0067] In the above embodiment, the wafer adsorption electrode 26 is built into the central portion 22 of the ceramic substrate 20. However, an RF electrode for plasma generation or a heater electrode (resistance heating element) may be built in place of the wafer adsorption electrode 26, or an RF electrode for plasma generation or a heater electrode (resistance heating element) may be built in addition to the wafer adsorption electrode 26. In addition, a focusing ring (FR) adsorption electrode may be built in the outer peripheral portion 24 of the ceramic substrate 20, or an RF electrode or a heater electrode may be built in.

[0068] In the above embodiment, Figure 5 The ceramic sintered body 120 of (A) is produced by hot pressing a ceramic powder molded body. However, the molded body in this case may be produced by stacking a plurality of tape-cast molded bodies, by die casting, or by compacting ceramic powder.

Claims

1. A wafer loading platform, wherein: have: A ceramic substrate having a wafer placement surface on an upper surface thereof on which a wafer can be placed and having electrodes built therein; A cooling substrate, which is bonded to the lower surface of the ceramic substrate and has a cooling medium flow path; A plurality of holes, the plurality of holes penetrating the cooling substrate in a vertical direction; as well as a heat exchange promotion portion, the heat exchange promotion portion being provided in a peripheral region of at least one hole among the plurality of holes, and promoting heat exchange between the coolant flowing through the coolant flow path and the wafer placed on the wafer placement surface, The wafer placing table has a plurality of small protrusions on the reference surface of the wafer placing surface for supporting the lower surface of the wafer with the top surface. The top surfaces of the plurality of small protrusions are on the same plane, In the heat exchange promotion portion, the area ratio of the small protrusions is increased, or the reference surface is raised, compared with a region away from the peripheral region of the hole.

2. The wafer stage according to claim 1, wherein: In the heat exchange promotion portion, the refrigerant flow path is narrower than a region away from a peripheral region of the hole.

3. The wafer stage according to claim 2, wherein: In the heat exchange promotion portion, the width of the coolant flow path is narrower than that of a region separated from the peripheral region of the hole when the coolant flow path is viewed in plan.

4. The wafer stage according to any one of claims 1 to 3, wherein: In the heat exchange promotion section, fins are provided on the inner surface of the refrigerant flow path.

5. The wafer stage according to any one of claims 1 to 3, wherein: In the heat exchange promotion portion, a distance from the wafer to a top surface of the coolant flow path is shorter than a region away from a peripheral region of the hole.

6. The wafer stage according to any one of claims 1 to 3, wherein: The hole is at least one of a power supply component insertion hole, a lifting pin hole and a gas hole. The power supply component insertion hole is set downward from the electrode in the chip loading platform and is used for the power supply component that supplies power to the electrode to be inserted. The lifting pin hole penetrates the chip loading platform in the up-down direction and is used for the lifting pin to be inserted. The gas hole penetrates the chip loading surface in the up-down direction and supplies gas to the chip loading surface.

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