A constant voltage control system for a primary side feedback active clamp flyback converter

Abstract

The present invention discloses a constant voltage control system for a primary side feedback active clamp flyback converter, which includes a sampling module, an auxiliary switch tube conduction time calculation module, a PID control module, and a switch tube control module; the sampling module samples the auxiliary winding feedback voltage at the moment when both the output diode and the auxiliary switch tube are conducting, and outputs the feedback voltage to the PID control module; the PID control module outputs a peak current target value to the auxiliary switch tube conduction time calculation module and the switch tube control module; the auxiliary switch tube conduction time calculation module designs and outputs the conduction time control parameter of the auxiliary switch tube to the switch tube control module through the slopes of different charging stages after the main switch tube is turned off; the input of the switch tube control module is the conduction time control parameter of the auxiliary switch tube and the peak current target value, and it outputs the duty cycle control signals for the main switch tube and the auxiliary switch tube to switch. The present invention solves the sampling problem of constant voltage control in the CCM mode of the active clamp flyback converter.

Description

Technical Field

[0001] The present invention relates to a switching power supply, and more particularly to a constant voltage control system for a primary-side feedback active clamp flyback converter. Background Art

[0002] Flyback converters are widely used in medium and low power AC-DC converters and are a very effective solution. Compared with traditional secondary-side feedback flyback converters based on optocouplers, they eliminate the optocoupler and corresponding circuits, have the advantages of simple circuit, high stability, and low volume and cost, and are widely used in mobile phone chargers. However, due to the parasitic resonance between the leakage inductance and the parasitic capacitance of the main switch, the leakage inductance of the power transformer will cause high power loss and voltage spikes. Usually, a dissipative clamp circuit is required to dissipate the leakage energy and suppress the voltage spikes. How to further improve the efficiency of flyback converters remains a challenge.

[0003] To solve the voltage spikes and energy losses caused by the leakage inductance of traditional flyback converters, a primary-side feedback active clamp flyback converter can be used. The clamp circuit replaces the traditional RCD filter circuit, which can not only recover the leakage inductance energy but also achieve soft switching of the switching tube, improving the working efficiency of the system while increasing the system working frequency. However, there are still many difficulties in the use of primary-side feedback active clamp flyback converters at present. One of the difficulties is how to achieve high-precision sampling of the converter in the CCM mode. Because in the CCM (Continuous Conduction Mode), the output diode current I s is continuous and the current does not reset and does not drop to zero, and the auxiliary winding waveform has no large resonance, resulting in the inability to accurately determine the strict proportional relationship between the auxiliary winding voltage and the output voltage at a certain moment in the CCM mode. Therefore, the traditional sampling method in the DCM (Discontinuous Conduction Mode) cannot be used continuously, and thus the high-precision voltage output control of the active clamp converter in the CCM mode cannot be achieved.

[0004] To achieve high-precision sampling of the primary-side feedback active clamp flyback converter in the CCM mode, the most important current solution is to compensate for the conduction voltage drop of the output diode. The main principle is to calculate the output diode current I at the sampling moment s , and at the same time, regard the output diode as an equivalent small resistor. Therefore, the diode voltage at the sampling moment, that is, the conduction voltage drop, is equal to the product of the equivalent small resistor and the current I s , and this product is used for compensating the error of sampling. However, there are big problems with the above error compensation method. Since the relationship between the output diode voltage and the current I s flowing through it is non-linear, and this non-linear relationship becomes even more unpredictable with temperature changes, it is impossible to accurately calculate the accurate value of the conduction voltage drop under different working conditions, and thus the problem of inaccurate sampling of the converter in the CCM mode cannot be truly solved.

[0005] In summary, for the constant voltage control of the primary-side feedback active-clamp flyback converter in CCM mode, it is very necessary to propose an accurate, efficient and easy-to-implement sampling method. Summary of the Invention

[0006] To solve the sampling problem of the constant voltage control of the active-clamp flyback converter in CCM mode, the present invention proposes a constant voltage control system for the primary-side feedback active-clamp flyback converter, determines a new effective sampling position and can effectively sample it, and realizes high-precision output voltage control in the CCM and DCM of the active-clamp flyback converter, with low implementation difficulty, high accuracy and easy to popularize.

[0007] In order to achieve the above object, the technical solution adopted by the present invention is:

[0008] A constant voltage control system for a primary-side feedback active-clamp flyback converter forms a closed loop with the main topology; the main topology adopts a primary-side feedback active-clamp flyback converter, and the output signals are the auxiliary winding feedback voltage V aux , and the primary peak current sampling value I pp ; the main topology replaces the traditional RCD circuit with an active-clamp circuit, and the active-clamp circuit includes a clamping capacitor C r and a clamping auxiliary switch tube M2. One end of the clamping capacitor is connected to the positive end of the filtered DC voltage, the other end of the clamping capacitor is connected to the drain of the clamping auxiliary switch tube M2, the source of the clamping auxiliary switch tube M2 is connected to the positive end of the DC voltage, and the clamping capacitor C r is in series with M2 and is connected in parallel to the primary winding N p of the transformer; the auxiliary winding N aux loop is connected in series with voltage-dividing resistors R 1 and R 2 , and the voltage across the auxiliary winding is divided by R 2 to obtain the output signal voltage V aux , and the current sampling resistor R 3 is connected in series with the drain of the main switch tube M1 in the primary main circuit, and the primary current is sampled to obtain the output signal primary peak current sampling value I pp ;

[0009] This control system includes a sampling module, an auxiliary switch tube conduction time calculation module, a PID control module and a switch tube control module; among them,

[0010] The sampling module samples the auxiliary winding feedback voltage V aux at the moment when both the output diode and the auxiliary switch tube are conducting, and obtains the feedback voltage V ref and outputs it to the PID control module;

[0011] The PID control module obtains the peak current target value I through the PID method pi , and the peak current target value I pi is output to the conduction time calculation module of the auxiliary switch tube and the switch tube control module;

[0012] The input of the conduction time calculation module of the auxiliary switch tube is the peak current target value I pi , and the conduction time control parameter T of the auxiliary switch tube is designed and output to the switch tube control module through the slope of different charging stages after the main switch tube M1 is turned off onsr ;

[0013] The input of the switch tube control module is the conduction time control parameter T of the auxiliary switch tube onsr and the peak current target value I pi , and the duty cycle control signals of the main switch tube and the auxiliary switch tube are output.

[0014] The present invention can achieve a constant voltage output with high precision through primary side feedback control.

[0015] Further, in order for the proposed sampling time T sample to exist, the condition needs to be satisfied: when the main switch tube M1 is turned off, the clamped capacitor voltage V cr needs to satisfy the condition V cr <(1 + m)NV out . Where m = L k / L m , L k is the equivalent leakage inductance of the transformer, L m is the primary side exciting inductance, N is the ratio of the number of turns of the primary side winding to the number of turns of the secondary side winding of the transformer, and V out is the output voltage.

[0016] Further, the slope design of different charging stages after the main switch tube M1 is turned off includes:

[0017] Charging stage 1: When the main switch tube M1 is turned off, the current moment is recorded as t 1 , and at this time the clamped capacitor voltage V cr satisfies: V cr <(1 + m)NV out . One end of the clamped capacitor is connected to the positive end of the filtered DC voltage, and its voltage value is equal to the input DC voltage V in , and the other end of the clamped capacitor is connected to the drain of the clamping auxiliary switch tube M2, and its voltage value is equal to V in +V cr At the moment of t 1 , the output diode Dr, the switch tubes M1 and M2 are all turned off. In this stage, the primary side current I of the transformer p charges the drain-source capacitors C of the switch tubes M1 and M2eq1 Charge C eq2 so that the voltage V at the drain of switch M1 ds1 rises from zero to V in +V cr At this time, the body diode of switch M2 conducts, and the current stage ends. Record the time at this moment as t 2 . Since C eq1 +C eq2 =C eq has a very small capacitance value, I p is approximately constant from t 1 to t 2 . The rising slope k aux of V 1 is approximately constant and can be expressed as:

[0018]

[0019]

[0020] The primary current I p at time t 2 , i.e., I p (t 2 ) can be expressed by the following formula. It can be seen that due to the small capacitance values of the equivalent node capacitance C eq1 of the switch drain and C eq2 , the change in the primary current I p from time t 1 to t 2 is extremely small. Therefore, the primary current I is approximately equal to its value at time t 1 and t 2 .

[0021]

[0022] Charge stage 2: At time t 2 , the body diode of the auxiliary switch M2 conducts. At this time, turn on the auxiliary switch M2, and keep the main switch M1 and the output diode Dr off. The exciting inductance L m of the transformer and the leakage inductance L k of the transformer charge the clamping capacitor C r , and the voltage V cr of the clamping capacitor starts to rise. When the voltage V cr of the clamping capacitor rises to (1 + m)NV out , the output diode Dr conducts, and this stage ends. Record this moment as t 3 ; in this stage, the change in the voltage V cr is relatively small. Therefore, the primary current I pThe change in size is relatively small, and it can be considered that the magnitude of the primary current in this stage is approximately equal to I p (t 2 ), so the rising slope k aux of V 2 can be approximately expressed as:

[0023]

[0024]

[0025] It can be seen that since the capacitance value of C r (at the nF or uF level) is much larger than the capacitance value of C eq1 (at the pF level), so k 2 << k 1 . Then, based on the slope difference between k 1 and k 2 , the position of time t 2 can be determined;

[0026] Charging stage three: At time t 3 , the output diode Dr conducts, the auxiliary diode M2 remains conducting, and the main diode M1 remains off. In this stage, the clamping capacitor C r is in series resonance with the equivalent leakage inductance L k to continue charging the clamping capacitor, and the voltage of V cr increases. When the primary current, that is, the charging current I r of the clamping capacitor C p drops to zero, turn off the clamping auxiliary switch tube M2 to stop charging, and record this moment as time t 4 . During the time from t 3 to t 4 , since Dr conducts, the output winding voltage is clamped to V out + V dr . V dr is the voltage of the output diode Dr. Considering that the voltage of the transformer winding is proportional to its number of turns, the rising slope k aux of V 3 can be expressed as:

[0027]

[0028] where R dr represents the equivalent resistance of the output diode, and I s is the current of the output diode. Since the resistance of R dr is very small, the slope k 3 is very small. Combining the analysis of the slopes of V aux in the above three charging stages, the slopes k 1 , k 2 and k 3 satisfy the condition k1 >>k 2 >k 3 , thus generating a three-stage V with an obvious slope change aux voltage waveform, and based on the slope difference between k 2 and k 3 , the position of time t 3 can be determined;

[0029] At time t 3 , the second charging stage ends and the third charging stage starts. At the moment when the output diode Dr conducts, the output diode current I s = 0A and its rising slope dI s / d t = 0. The conduction voltage drop of the output diode Dr is equal to zero, and the parasitic resistance and parasitic leakage inductance voltage of the output loop are both zero. At this moment, the output winding voltage is exactly equal to the output voltage. Here, time t 3 is defined as T sample , and this moment is the sampling moment proposed in this patent. At this moment, the voltage V aux of V ref satisfies:

[0030] V ref = V aux (t 3 ) = V aux (T sample )

[0031] At this time, the output voltage V out and the auxiliary winding feedback signal V aux corresponding feedback voltage V ref have a strict proportional relationship. By sampling the auxiliary winding feedback voltage V sample at time T aux and combining the above formula, the output voltage feedback voltage V ref can be obtained and satisfies at this moment:

[0032] V ref = V out / (N s / N aux )·(R 2 / (R 1 +R 2 ))

[0033] V out is the output voltage, V ref is the sampling voltage value of V sample at time T aux , N s / N aux is the turn ratio of the output winding and the auxiliary winding, R 1， R2 It is the voltage-dividing resistor on the auxiliary winding in the abstract drawing;

[0034] Considering k 1 >>k 2 >k 3 , using T sample Before and after the moment of T, k 2 , k 3 The slope difference is relatively large, and the output voltage feedback voltage V at the moment of T sample and its corresponding moment can be obtained; ref . Digital control based on an ADC chip or traditional two-wire sampling and other schemes can be used to sample the voltage V at the moment of T sample to obtain V aux . Based on this feedback signal, the real-time output voltage magnitude can be accurately calculated; ref The sampling module samples the voltage V of the auxiliary winding at the moment of T

[0035] , and transmits the sampled output voltage feedback voltage V sample to the PID control module. Based on the analysis and calculation of the sampled signal V aux , high-precision constant voltage control can be achieved. ref ref ref Furthermore, the proposed PID control module, the input signal of this module is the output voltage feedback voltage V

[0036] , and the output is the peak current target value I ref . This module analyzes and calculates V pi , and uses the PID calculation method to obtain the peak current target value I ref . pi

[0037] Furthermore, the conduction time calculation module of the auxiliary switch tube, the input signal of this module is the peak current target value I pi , and the output signal is the conduction time control parameter T of the auxiliary switch tube onsr . In order to meet the prerequisite conditions for the implementation of the sampling method in the sampling module, that is, when the main switch tube M1 is turned off, the voltage V of the clamping capacitor cr <(1 + m)NV out , it is necessary to reasonably set the conduction time of the auxiliary switch tube;

[0038] Combined with the analysis and calculation of the system parameters and the theoretical model, the detailed calculation process is introduced in the specific implementation manner, and the conduction time control parameter T of the auxiliary switch tube M2 can be obtained onsr When the following conditions are met, the prerequisite conditions of the sampling method in the sampling module can be satisfied, where N is the turns ratio of the primary and secondary sides N p : N s :

[0039]

[0040]

[0041] Further, for the proposed switching transistor control module, its input signals are the conduction time control parameter T of the auxiliary switching transistor onsr , and the peak current target value I pi , and the peak current sampled value I pp . This module includes a comparator. I pi is connected to the negative terminal of the comparator after being converted by DAC, and I pp is connected to the positive terminal of the comparator. When I pp rises to I pp ≥ I pi , the result V p_comp of the comparator is set to 1, otherwise it is set to 0. The output signals are respectively the control signals duty and duty 1 for controlling the switching of the main switching transistor M1 and the auxiliary switching transistor M2.

[0042] Further, method for generating the duty ratio control signal duty of the main switching transistor M1: Taking the PWM working mode as an example, an internal timer counter_duty starts counting from 0, and continues to count after clearing to 0 when reaching Ts. Ts is the switching period and is determined by the working frequency. When counter_duty = 0, the control signal duty is set to 1, and the main switching transistor M1 conducts. When V p_comp = 1, the control signal duty is set to 0, and the main switching transistor M1 turns off. Until counter_duty counts to Ts and clears and then starts counting again. When counter_duty = 0, duty is set to 1, and the main switching transistor M1 conducts again. Repeating the above switching process to achieve digital control of the main switching transistor M1.

[0043] Method for generating the duty ratio control signal duty 1 of the auxiliary switching transistor M2: Taking the PWM working mode as an example, when the timer counter_duty = Ts - T onsr - Tn, the control signal duty 1 is set to 1, and the auxiliary switching transistor M2 conducts. When counter_duty = Ts - Tn, the control signal duty 1 is set to 0, and the auxiliary switching transistor M2 turns off, where Tn is the self-set digital quantity of the dead time duration. Repeating the above switching process to achieve digital control of the auxiliary switching transistor M2.

[0044] Repeating the calculations of the above-mentioned sampling module, PID control module, primary-side main circuit switch tube M1 control module, and clamping auxiliary switch tube M2 control module enables the system to obtain good constant-voltage control accuracy. At the same time, this method is not only applicable to the CCM mode, but also applicable to other modes such as the DCM mode, and is applicable to various digital constant-voltage control schemes for active-clamp flyback converters.

[0045] Compared with the prior art, the remarkable effects of the present invention are as follows:

[0046] 1. By sampling at a specific sampling moment T of the auxiliary winding voltage in the present invention, the output voltage feedback voltage V is sampled, which can accurately reflect the magnitude of the output voltage in real time, and thus accurately control the output voltage; sample , the output voltage feedback voltage V is sampled, ref , which can accurately reflect the magnitude of the output voltage in real time, and further achieve accurate control of the output voltage;

[0047] 2. The specific sampling moment T of the auxiliary winding voltage V proposed in the present invention is realized by controlling the conduction time of the active-clamp auxiliary switch tube M2. This control method is simple and easy to implement, does not require adding new circuits or devices, and has low cost; aux of the auxiliary winding voltage V, sample its sampling moment exists by controlling the conduction time of the active-clamp auxiliary switch tube M2. This control method is simple and easy to implement, does not require adding new circuits or devices, and has low cost;

[0048] 3. The present invention is not only applicable to the CCM continuous current mode, but also applicable to the DCM discontinuous current mode and other modes. It is a sampling method with a wide application range and easy to implement;

[0049] 4. The present invention has a wide application range, is applicable to various working modes, is simple and easy to implement, and its sampling idea can be extended to other primary-side feedback control or high- and low-frequency switch converter sampling control methods. Description of the Drawings

[0050] (a) in FIG. 1 is the key waveform diagram of the traditional DCM mode of the primary-side feedback active-clamp flyback converter, and (b) in FIG. 1 is the key waveform diagram of the traditional CCM mode of the primary-side feedback active-clamp flyback converter.

[0051] Figure 2 is the overall control system framework diagram and the main topology circuit diagram of the present invention.

[0052] Figure 3 is the position of the proposed sampling moment T sample and the related waveform diagram.

[0053] (a) in FIG. 4 is the equivalent circuit diagram of the first charging stage in the CCM mode of the embodiment, (b) in FIG. 4 is the equivalent circuit diagram of the second charging stage in the CCM mode of the embodiment, (c) in FIG. 4 is the equivalent circuit diagram of the third charging stage in the CCM mode of the embodiment, and (d) in FIG. 4 is the equivalent circuit diagram of the auxiliary switch tube conduction stage in the CCM mode of the embodiment.

[0054] Figure 5 where (a) is the sampling T sample Circuit diagram of the method for obtaining the auxiliary winding voltage at a moment Figure 5 where (b) is the principle calculation diagram of the sampling module.

[0055] Figure 6 is T sample Equivalent circuit diagram of the transformer operation at a moment Specific implementation manner

[0056] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0057] Referring to FIG. 1(a) and FIG. 1(b), FIG. 1(a) is the key waveform diagram in the traditional DCM mode of the primary-side feedback active-clamp flyback converter, and FIG. 1(b) is the key waveform diagram in the CCM mode, where I s is the current of the output diode Dr. As shown in the DCM mode of FIG. 1(a), I s drops to zero at t 4 moment. At this time, the conduction voltage drop of the output diode Dr is zero, and the parasitic resistance and parasitic leakage inductance voltage of the output loop are both zero. Moreover, the sampling point position can be judged by the resonant change of the V aux waveform. By sampling the auxiliary winding V 4 voltage at the t aux moment in FIG. 1(a), the feedback voltage value with a strict relationship with the output voltage V out can be obtained. Referring to the key waveform in the CCM mode of FIG. 1(b), it can be seen that within the time from the turn-off of the main switch M1 to the next turn-on, the output diode current I s does not drop to zero, that is, it is not reset, and there is no large resonance in the auxiliary winding voltage V aux waveform. Therefore, it is impossible to accurately determine that there is a strict proportional relationship between the auxiliary winding voltage and the output voltage at a certain moment on the V aux voltage waveform, that is, the sampling point position cannot be determined, and the sampling method of the traditional DCM mode cannot be continued, and thus the high-precision sampling of constant voltage control cannot be realized. Therefore, this patent proposes a new high-precision constant voltage control system for the above CCM mode, and the specific implementation method is as follows:

[0058] Referring to Figure 2, which is the overall control system framework diagram and the main topology circuit diagram of the present invention, adopts a primary-side feedback active-clamp flyback converter. The main topology circuit applies a primary-side feedback active-clamp flyback converter, and an auxiliary winding N is added to the transformer at the input end aux , as shown in the figure, a resistor R is connected in series on this auxiliary winding 1 , R 2 . The two voltage-dividing resistors, and its output signal is the auxiliary winding feedback voltage V obtained after the voltage of the auxiliary winding is divided by the resistor R 2 . At the same time, a clamping capacitor C aux and a clamping auxiliary switch tube M2 are adopted on the primary side. As shown in the figure, one end of the clamping capacitor is connected to the positive end of the filtered DC voltage, the other end of the clamping capacitor is connected to the drain of the clamping auxiliary switch tube M2, the source of the clamping auxiliary switch tube M2 is connected to the positive end of the DC voltage, and the clamping capacitor C r is in series with M2 and is connected in parallel to the primary winding N of the transformer r . p .

[0059] Refer to Figure 2 the proposed control module. Its input signals are the auxiliary winding feedback voltage V aux , and the change value I of the primary-side current pp . The output signals are the control signals duty and duty of the main switch tube M1 and the auxiliary switch tube M2 1 . This module specifically includes a sampling module, an auxiliary switch tube conduction time calculation module, a PID control module, and a switch tube control module. This control system is connected to the controlled switching power supply to form a closed loop. The present invention can achieve a constant voltage output with high precision through the primary-side feedback control method.

[0060] Refer to Figure 2 the proposed sampling module. The input signal of this module is the auxiliary winding feedback voltage V aux , and the output signal is the output voltage feedback voltage V ref . Its implementation method is at a specific moment T sample moment, refer to Figure 3 the t 3 moment in it. At this moment, the auxiliary winding feedback voltage V aux is sampled. The position of the sampling point corresponding to its specific V aux waveform is marked in Figure 3 to obtain the output voltage feedback voltage V ref . By analyzing and calculating V ref , the real-time magnitude of the output voltage can be accurately obtained; the sampling moment T sample is realized by controlling the conduction time of the active-clamp auxiliary switch tube M2. Following the change of the conduction time of the auxiliary switch tube M2, this sampling moment changes automatically.

[0061] For the proposed sampling time T sample to exist, the condition needs to be satisfied that when the main switch M1 is turned off, the voltage V of the clamping capacitor cr should satisfy V cr <(1 + m)NV out . Where m = L k / L m , L k is the equivalent leakage inductance of the transformer, L m is the primary exciting inductance, N is the ratio of the number of turns of the primary winding to the number of turns of the secondary winding of the transformer, and V out is the output voltage.

[0062] To achieve this condition, the conduction time of the auxiliary switch needs to be reasonably designed, and its design method is introduced in the calculation module of the conduction time of the auxiliary switch. When the system satisfies this condition, after the main switch M1 is turned off, the charging process of the clamping capacitor C r can be divided into three working stages:

[0063] Charging stage 1: When the main switch M1 is turned off, corresponding to Figure 3 at the t 1 moment in it, at this time the voltage V of the clamping capacitor cr satisfies: V cr <(1 + m)NV out . The equivalent circuit of this stage is shown in Fig. 4(a). The light-colored part in the figure represents the non-working circuit. One end of the clamping capacitor is connected to the positive terminal of the filtered DC voltage, and its voltage value is equal to the input DC voltage V in , and the other end of the clamping capacitor is connected to the drain of the clamping auxiliary switch M2, and its voltage value is equal to V in +V cr . At the t 1 moment, the output diode Dr, the switches M1 and M2 are all turned off, and the primary current I of the transformer p charges the drain-source capacitors C eq1 and C eq2 of the switches M1 and M2, so that the voltage V at the drain of the switch M1 ds1 rises from zero to V in +V cr . When the body diode of the auxiliary switch M2 conducts, the current stage ends, and the time at this moment is recorded as t 2 ; Since the sum of the drain-source capacitors C eq1 +C eq2 =C eq of the main switch M1 and the auxiliary switch M2 is very small, I p is approximately constant from t 1 to t 2 , and the rising slope k aux of V 1Approximately constant and can be expressed as:

[0064]

[0065]

[0066] Primary side current I p At time t 2 The current I p (t 2 ) can be expressed by the following formula. It can be seen that due to the drain-source capacitance C eq1 and C eq2 having small capacitance values, the change in the primary side current I p from time t 1 to time t 2 is extremely small. Therefore, the primary side current I p at time t 1 and time t 2 are nearly equal in magnitude.

[0067]

[0068] Charging stage two: At time t 2 , the body diode of the auxiliary switch M2 conducts. At this time, the auxiliary switch M2 is turned on, and the main switch M1 and the output diode Dr remain off. The magnetizing inductance L m of the transformer and the leakage inductance L k of the transformer charge the clamping capacitor C r through the auxiliary switch M2, and the voltage V cr of the clamping capacitor starts to rise. When the voltage V cr of the clamping capacitor rises to (1 + m)NV out , the output diode Dr conducts, and this stage ends. Denote this time as t 3 ; in this stage, the change in the voltage V cr is small. Therefore, the change in the magnitude of the primary side current I p is small, and it can be considered that the magnitude of the primary side current at time t 3 is approximately equal to I p (t 2 ). Therefore, the rising slope k aux of V 2 can be approximately expressed as:

[0069]

[0070]

[0071] It can be seen that since C r (at the nF or uF level) is much larger than C eq1 (at the pF level), therefore, k2 <<k 1 , it is possible to determine t 1 , k 2 according to the slope difference of 2 .

[0072] Charging stage three: At time t 3 , the output diode Dr conducts, the auxiliary switch M2 remains conducting, and the main switch M1 remains off. During this stage, the clamping capacitor C r is in series resonance with the equivalent leakage inductance L k to continue charging the clamping capacitor. The voltage V cr rises. When the primary current, i.e., the charging current I r of the clamping capacitor C p drops to zero, turn off the clamping auxiliary switch M2 to stop charging, and record this moment as t 4 . During the time from t 3 to t 4 , since Dr conducts, the output winding voltage is clamped to V out + V dr . V dr is the voltage of the output diode Dr. Considering that the transformer winding voltage is proportional to its turns ratio, the rising slope k aux of V 3 can be expressed as:

[0073]

[0074] where R dr represents the equivalent resistance of the output diode, and I s is the output diode current. Since the resistance R dr is very small, the slope k 3 is very small. Combining the analysis of the slopes of V aux in the above three charging stages, the slopes k 1 , k 2 and k 3 satisfy the condition k 1 >> k 2 > k 3 , thus generating a three-segment V aux voltage waveform with a significant slope change. It is possible to determine the time t 2 according to the slope difference between k 3 and k 3 .

[0075] At time t 3 , the second charging stage ends and the third charging stage starts. At the moment when the output diode Dr conducts, the output diode current I s = 0A and its rising slope dI s / d t= 0, the conduction voltage drop of the output diode Dr is equal to zero, and the parasitic resistance and parasitic leakage inductance voltage of the output circuit are both zero. At this moment, the output winding voltage is exactly equal to the output voltage. Here, define the time t 3 as T sample , this moment is the sampling moment proposed by this patent. Then at this moment, V aux voltage, namely V ref satisfies:

[0076] V ref = V aux (t 3 ) = V aux (T sample )

[0077] Refer to Figure 6 as the equivalent circuit diagram of the transformer operation at time t 3 , namely T sample . The voltage across the output winding N s is V s , the voltage across the auxiliary winding is V aux , the equivalent resistance of the output diode is R dr , the parasitic inductance of the output winding is L ks and the parasitic resistance of the circuit is R f . At this moment, according to the relationship between the turns ratio of the transformer and the voltage, the relational expression can be obtained:

[0078]

[0079] Since the output diode current I s (t) = 0A at this time, the conduction voltage of the output diode, the parasitic leakage inductance and the parasitic resistance of the output circuit are all zero. Therefore, by sampling the feedback voltage V sample of the auxiliary winding at time T aux and combining the above formula, the feedback voltage V ref of the output voltage can be obtained and satisfies at this moment:

[0080] V ref = V out / (N s / N aux )·(R 2 / (R 1 +R 2 ))

[0081] V out is the output voltage, V ref is the sampled voltage value of V sample at time T aux , N s / N aux is the turns ratio of the output winding and the auxiliary winding, R 1 , R2 is the voltage divider resistor on the auxiliary winding in the abstract figure. The output voltage V can be established by the above formula. out The output voltage feedback voltage V ref The relationship between.

[0082] Considering k 1 >>k 2 >k 3 , using T sample The time before and after the moment, k 2 , k 3 The slope difference is large, and we can get T sample The output voltage feedback voltage V at the time and its corresponding time ref . Traditional digital two-line sampling and other schemes can be used to sample Moment V aux Sampling to get V ref Based on this feedback signal, the real-time output voltage can be accurately calculated. The specific implementation steps of the sampling method are as follows:

[0083] The proposed sampling module, see Figure 5 for Figure 2 A circuit diagram of a sampling module in Figure 1. Figure 5 (a), the sampling module circuit includes two comparators, where V ref With V knee The two digital voltage changes are converted by DAC to obtain two analog voltages V with a fixed voltage difference △V. ref With V knee , V ref is the voltage sampling value at the previous moment, △V is the set fixed value; V after DAC conversion ref With V knee Connect the positive terminals of comparator 1 and comparator 2 respectively, and the auxiliary winding voltage V aux Connect the negative terminals of the two comparators. The output of comparator 1 and comparator 2 is V ref_comp With V knee_comp , if V ref Voltage greater than V aux voltage, then V ref_comp Set to 1, otherwise set to 0, V knee_comp Similarly, V ref_comp With V knee_comp Input to the △t calculation module.

[0084] See also Figure 5 (b) is the principle analysis diagram of the △t calculation module. Since V ref Voltage higher than V knee voltage, then V ref_comp The reset time will lag behind V knee_compAt the moment of setting to 0, V ref_comp The moment of setting to 0 lags behind V knee_comp The time interval of the moment of setting to 0 is defined as △t, and △t can be calculated by a counter. As Figure 5 shown, since V ref and V knee have a fixed voltage difference, when V ref exactly intersects the upsampling point of V aux , △t is a certain fixed value △tref. If the voltage of V ref is higher than the sampling point, △t is greater than △tref, and vice versa. The V ref adjustment module adjusts the magnitude of the voltage of V ref in real time according to the relationship between △t and △tref, so that V ref accurately follows the sampling point of V aux . At this time, the voltage of V ref is the required sampling voltage value.

[0085] The proposed PID control module, the input signal of this module is the output voltage feedback voltage V ref , and the output is the peak current target value I pi . This module obtains the peak current target value I ref through the analysis and calculation of V pi using the PID calculation method.

[0086] Auxiliary switch tube conduction time calculation module, the input signal of this module is the peak current target value I pi , and the output signal is the auxiliary switch tube conduction time control parameter T onsr . In order to meet the prerequisite conditions for the implementation of the sampling method in the sampling module, that is, when the main switch tube M1 is turned off, the clamping capacitor V cr <(1 + m)NV out , it is necessary to reasonably set the conduction time of the auxiliary switch tube.

[0087] Calculation of the conduction time of the auxiliary switch tube: During the conduction stage of the auxiliary switch tube, refer to Figure 4(d). During this stage, the clamping capacitor discharges, and the discharged charge quantity is Q 3 . Refer to Figure 3 . The physical meaning of the charge quantity of the clamping capacitor during charging and discharging is the integral of its charging current, the primary side current Ip, and time t, which is marked by the shaded part in the figure. At the same time, let the charging charge quantities in charging stage 2 and charging stage 3 be Q 1 and Q 2 respectively. The purpose of reasonably setting the conduction time of the auxiliary switch tube is to ensure that Q 3 = Q 1 +Q 2 , and Q 1 >0. Under this condition, V auxIt is possible to generate two stages, namely charging stage two and charging stage three, and obtain the two-stage switching moment, i.e., the sampling moment T sample , Q 1 Calculate:

[0088]

[0089]

[0090] Q 2 Calculate:

[0091]

[0092] Through the above calculation, the conduction time control parameter T of the auxiliary switch tube M2 can be obtained onsr When the following conditions are met, the prerequisite conditions of the sampling method in the sampling module can be satisfied, where N is the turns ratio N of the primary and secondary sides p : N s :

[0093]

[0094]

[0095] Therefore, when φ 0 takes zero, the initial value T can be preset onsr = π / 2√(L k C r ), that is, one-quarter of the resonance period. When the system is stable, in order to ensure the charge conservation of the clamping capacitor, T onsr is adaptively adjusted, and the prerequisite conditions for the implementation of the sampling method can be satisfied

[0096] The proposed switch tube control module, see Figure 2 , whose input signals are the conduction time control parameter T of the auxiliary switch tube onsr , the peak current target value I pi and the primary side peak current sampling value I pp . The switch tube control module contains a comparator. I pi is connected to the negative terminal of the comparator after being converted by DAC, and I pp is connected to the positive terminal of the comparator. When I pp rises to I pp ≥ I pi , the comparator output V p_comp is set to 1, otherwise it is set to 0. The output signals are the control signals duty and duty 1 for controlling the main switch tube M1 and the auxiliary switch tube M2 respectively

[0097] Method for generating duty cycle control signal of main switching transistor M1: Taking the PWM operating mode as an example, an internal timer counter_duty is used, which starts counting from 0, continues counting after being cleared to 0 when the count reaches Ts, where Ts is the switching period and is determined by the operating frequency. When counter_duty = 0, duty is set to 1 and the main switching transistor M1 conducts. When V p_comp = 1, the control signal duty is set to 0 and the main switching transistor M1 turns off until counter_duty counts up to Ts, is cleared, and then starts counting again. When counter_duty = 0, the control signal duty is set to 1 and the main switching transistor M1 conducts again. By repeating the above switching process, digital control of the main switching transistor M1 is achieved.

[0098] Method for generating duty cycle control signal of auxiliary switching transistor M2: Taking the PWM operating mode as an example, when the timer counter_duty = Ts - T 1 - Tn, the control signal duty onsr is set to 1 and the auxiliary switching transistor M2 conducts. When counter_duty = Ts - Tn, the control signal duty 1 is set to 0 and the auxiliary switching transistor M2 turns off, where Tn is the self-set digital value of the dead time duration. By repeating the above switching process, digital control of the auxiliary switching transistor M2 is achieved. 1 Repeating the calculations of the above-mentioned sampling module, conduction time calculation module of the auxiliary switching transistor, PID control module, and switching transistor control module enables the system to obtain good constant voltage control accuracy.

[0099]

[0100] In the present invention, a sampling point at a specific moment is found on the waveform of the auxiliary winding feedback voltage V aux . By sampling the voltage at this point in time of V aux , the accurate output voltage value at this time is deduced, and based on the analysis and calculation of this voltage value, control of the system is achieved, thereby achieving the purpose of output constant voltage control.

[0101] The above content is a further detailed description of the present invention in combination with specific preferred embodiments. It cannot be determined that the specific implementation of the present invention is only limited to these descriptions. There can be many variations in the present invention described herein, and such variations cannot deviate from the spirit and scope of the present invention artificially. Therefore, all changes obvious to those skilled in the art are included within the scope covered by this claim.​

Claims

1. A constant voltage control system for a primary-side feedback active-clamp flyback converter, which forms a closed loop with the topology circuit of the primary-side feedback active-clamp flyback converter. Characterized in that, It includes a sampling module, an auxiliary switch tube conduction time calculation module, a PID control module, and a switch tube control module; among them, The sampling module samples the auxiliary winding feedback voltage V at the moment when both the output diode and the auxiliary switch tube are conducting, aux obtaining the feedback voltage V ref and outputting it to the PID control module; The PID control module obtains the peak current target value I through the PID method pi , and the peak current target value I pi is output to the auxiliary switch tube conduction time calculation module and the switch tube control module; The input of the auxiliary switch tube conduction time calculation module is the peak current target value I pi , and the conduction time control parameter T of the auxiliary switch tube is designed and output through the slopes of different charging stages after the main switch tube M1 is turned off onsr to the switch tube control module; The input of the switching transistor control module is the conduction time control parameter T of the auxiliary switching transistor onsr and the peak current target value I pi , and outputs the duty cycle control signals for switching of the main switching transistor and the auxiliary switching transistor; When the main switch tube M1 of the primary-side feedback active-clamp flyback converter is turned off, the voltage V of the clamping capacitor cr needs to satisfy the condition V cr <(1 + m)NV out , where m = L k / L m , L k is the equivalent leakage inductance of the transformer, L m is the primary-side magnetizing inductance, N is the ratio of the number of turns of the primary winding to the number of turns of the secondary winding of the transformer, and V out is the output voltage; After the main switch tube M1 is turned off, it includes three charging stages: Charging Stage 1: When the main switch M1 is turned off, mark the current time as t 1 , the drain voltage V ds1 of the main switch M1 rises from zero to V in +V cr . When the body diode of the auxiliary switch M2 conducts, this stage ends, and mark the time at this moment as t 2 , V in is the voltage of the clamping capacitor, and V in is the DC voltage; Charging Stage 2: At time t 2 , the body diode of the auxiliary switch M2 conducts, and the main switch M1 and the output diode Dr remain off; the magnetizing inductor L of the transformer m and the leakage inductor L of the transformer k charge the clamping capacitor C through the auxiliary switch M2 r , and the voltage V of the clamping capacitor starts to rise. When the voltage V of the clamping capacitor cr rises to (1 + m)NV cr , the output diode Dr conducts, and this stage ends. Denote this moment as t out ; t 3 is the sampling moment T of the sampling module 3 ; sample ​ Charging stage three: At time t 3 , the output diode Dr conducts, the auxiliary switch M2 remains conducting, and the main switch M1 remains off; the clamping capacitor C r resonates in series with the equivalent leakage inductance L k to continue charging the clamping capacitor, and the voltage V cr increases. When the primary current, i.e., the charging current I r of the clamping capacitor C p drops to zero, turn off the clamping auxiliary switch M2 to stop charging, and record this moment as time t 4 .

2. The constant voltage control system for a primary-side feedback active-clamp flyback converter according to claim 1, Characterized in that, The slope of the first charging stage is designed as: Since C eq1 + C eq2 = C eq has a very small capacitance value, I p is approximately constant during the period from t 1 to t 2 , and the rising slope k aux of V 1 remains unchanged, expressed as: Among them, C eq1 and C eq2 are the drain-source capacitances of the main switch transistor and the auxiliary switch transistor respectively, and N aux is the auxiliary winding.

3. The constant voltage control system for a primary-side feedback active-clamp flyback converter according to claim 2, Characterized in that, The slope of the second charging stage is designed as: At this stage, V cr has a small voltage change, and the primary current I p has a small change in magnitude. At this stage, the magnitude of the primary current is always equal to I p (t 2 ). Therefore, the rising slope k aux of V 2 is expressed as: Since C r has a capacitance value much larger than that of C eq1 , thus k 2 << k 1 . According to the slope difference between k 1 and k 2 , determine the position at time t 2 .

4. The constant voltage control system for a primary-side feedback active-clamp flyback converter according to claim 3, Characterized in that, The slope of the third charging stage is designed as: At this stage, since the output diode Dr is turned on, the output winding voltage is clamped to V out +V dr , V dr is the voltage of the output diode Dr. Considering that the transformer winding voltage is equal to the ratio of its number of turns, the rising slope k aux of V 3 is: Where R dr represents the equivalent resistance of the output diode, and I s is the output diode current. Combining the analysis of the slopes of V aux in the above three charging stages, the slopes k 1 , k 2 and k 3 satisfy the condition k 1 >> k 2 > k 3 , thus generating a three-stage V aux voltage waveform with a significantly changing slope. According to the slope difference between k 2 and k 3 , the position of the t 3 moment is determined.

5. The constant voltage control system for a primary-side feedback active-clamp flyback converter according to claim 4, Characterized in that, The conduction time control parameter T of the auxiliary switch tube ons r satisfies:

6. The constant voltage control system for a primary-side feedback active-clamp flyback converter according to claim 1, Characterized in that, The sampling module includes two comparators, a DAC, a time interval calculation module, and an adjustment module; V ref is the voltage sampling value at the previous moment, V ref and V knee are two analog voltage quantities with a fixed voltage difference △V obtained after DAC conversion, V ref and V knee are respectively connected to the positive terminals of two comparators, and the auxiliary winding voltage V aux is connected to the negative terminals of the two comparators. The output results of comparator 1 and comparator 2 are V ref_comp and V knee_comp . If the voltage of V ref is greater than the voltage of V aux , then V ref_comp is set to 1, otherwise it is set to 0. Similarly for V knee_comp ; V ref_comp and V knee_comp are input to the time interval △t calculation module; The time interval is V ref_comp The zero setting moment lags behind V knee_comp The time interval of the zero setting moment, defined as △t, is calculated by a counter; When V ref exactly intersects the upsampling point V aux , △t is the expected value △tref. If the voltage of V ref is higher than the sampling point, then △t is greater than the expected value △tref, and vice versa. The adjustment module adjusts the magnitude of the voltage of V ref in real time according to the relationship between △t and △tref, so that V ref accurately follows the sampling point of V aux . At this time, the voltage of V ref is the required sampling voltage value.

7. The constant voltage control system for a primary-side feedback active-clamp flyback converter according to claim 1, Characterized in that, The switch tube control module includes a comparator. The peak current target value I pi is connected to the negative terminal of the comparator after being converted by the DAC. The sampled value I pp of the primary peak current is connected to the positive terminal of the comparator. When I pp rises to I pp ≥I pi , the result V p_comp of the comparator is set to 1, otherwise it is set to 0. Then, duty ratio control signals duty and duty 1 for controlling the switching of the main switch tube M1 and the auxiliary switch tube M2 are generated.

8. The constant voltage control system for a primary-side feedback active-clamp flyback converter according to claim 7, Characterized in that, For the PWM operating mode, the generation of the duty ratio control signals duty and duty for controlling the switching of the main switch M1 and the auxiliary switch M2 1 includes: The method for generating the duty ratio control signal duty of the main switching transistor M1 is as follows: An internal timer counter_duty starts counting from 0, continues to count after clearing to 0 when the count reaches Ts, where Ts is the switching period and is determined by the operating frequency; when counter_duty = 0, the control signal duty is set to 1 and the main switching transistor M1 conducts. When V p_comp = 1, the control signal duty is set to 0 and the main switching transistor M1 turns off. It continues until counter_duty counts to Ts, clears, and starts counting again. When counter_duty = 0, duty is set to 1 and the main switching transistor M1 conducts again. The above switching process is repeated to control the main switching transistor M1; Duty cycle control signal duty of the auxiliary switch tube M2 1 Generation method: When the timer counter_duty = Ts - T onsr - Tn, the control signal duty 1 is set to 1, and the auxiliary switch tube M2 is turned on. When counter_duty = Ts - Tn, the control signal duty 1 is set to 0, and the auxiliary switch tube M2 is turned off. Here, Tn is the self-set digital quantity of the dead time duration. Repeat the above switching process to control the auxiliary switch tube M2.

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