A thermally assisted magnetic device, storage and computing integrated array, and computing method

Abstract

The present invention relates to a thermally assisted magnetic device, a storage and computing integrated array, and a computing method, wherein the thermally assisted magnetic device includes a magnetic device and a heat-generating component; the heat-generating component surrounds the magnetic device and is arranged on a plane close to the free layer of the magnetic device and away from the reference layer; information writing can only be completed when a write current with a polarity matching the initial resistance state of the magnetic device is passed through the magnetic device and the heat-generating component is energized at the same time; after the heat-generating component is energized, the magnetic moment of the free layer can be more easily flipped, but it is not enough to affect the magnetic moment state of the reference layer, and the magnetic field generated by the heat-generating component does not affect the flipping of the magnetic moments of the free and reference layers. The present invention can realize low-power non-volatile information storage and multiple high-speed logic calculations under the same circuit architecture, reducing chip power consumption and cost, and improving overall computing power.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit technology, and in particular to a thermally assisted magnetic device, a storage and computing integrated array, and a computing method. Background Art

[0002] Modern computers often use the von Neumann architecture, in which the processor and memory are separate. When the processor is operating, it first reads data from the memory via a data bus, performs calculations, and then writes the results back to the memory via the data bus. In other words, data is constantly moving back and forth between the processor and memory via the data bus. Parasitic capacitance and resistance on the data bus increase data transmission delays and energy consumption. Furthermore, if computing speed is out of sync with storage speed, the slower speed will severely limit computing performance.

[0003] Over the past two decades, with the rapid advancement of integrated process technology, processor speeds have skyrocketed while memory capacity has significantly increased, but memory speed has not. This has led to processor performance improvements significantly faster than memory, and the mismatch between computing and storage speeds has become increasingly prominent—the "memory wall" problem. Furthermore, with the advent of 5G communication networks and the big data era, the transmission and processing of massive amounts of data pose significant challenges to the traditional von Neumann architecture. The power consumption of transmission has become an increasingly significant component of overall computing, creating an increasingly difficult problem—the "power wall" problem. To address these two issues, in addition to further optimizing the von Neumann architecture, researchers have begun exploring novel non-von Neumann architectures. Inspired by the way synapses in the human brain simultaneously perform both memory and computation, academia and industry are focusing on integrating computational functions within the memory itself, a concept known as integrated memory and computation. Initial proposals envisioned placing a small portion of computational units within or adjacent to the memory, for example, integrating SRAM and computational units on the same die. However, this approach has significant drawbacks, including volatility, relatively complex design, large memory unit area, high electrostatic power consumption, and low cost-effectiveness, making practical application difficult. Subsequently, the emergence of 3D stacked memory is expected to integrate memory and logic on different dies, but the feasibility of this solution is heavily dependent on the maturity of 3D stacking technology.

[0004] Recently, people have been looking at the emerging non-volatile memory - MRAM, which combines high-speed reading and writing (ns level), good fatigue performance (>10 12), high storage density and low electrostatic power consumption. MRAM achieves binary information storage by changing the direction of the free layer magnetic moment of its basic storage unit (such as magnetic tunnel junction and spin valve magnetic devices) to obtain two different resistance states. Based on the above resistance characteristics, the magnetic device can also perform certain logical functions and store the operation results in situ in the form of a new resistance state. This also means that calculation and storage can be implemented in the same storage unit, similar to a "synapse". So, how to realize multiple Boolean logic functions has undoubtedly become the research focus of non-volatile storage and computing integrated structures. At present, some Boolean logic implementation methods require initialization or require timing logic, which will lead to lengthy iterative processes or complex peripheral control circuits, which will seriously affect the system power consumption and computing speed. Therefore, it is of practical application significance to develop a storage and computing integrated array with controllable development costs, high integration, low power consumption, and simple Boolean logic implementation. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a thermally assisted magnetic device, a storage and computing integrated array, and an operation method, which can realize low-power non-volatile storage of information and multiple high-speed logic calculations under the same circuit architecture, effectively solving the "storage wall" and "power consumption wall" problems of the traditional von Neumann system architecture.

[0006] The technical solution adopted by the present invention to solve its technical problems is: providing a thermally assisted magnetic device, including a magnetic device and a heat-generating component; the magnetic device includes a buffer layer, a pinned layer, a reference layer, a barrier layer or a space layer, a free layer, a cover layer and a mask layer arranged in sequence from bottom to top; the heat-generating component surrounds the magnetic device and is arranged on a plane close to the free layer and away from the reference layer; information writing can only be completed when a write current with a polarity matching the initial resistance state of the magnetic device is passed through the magnetic device and the heat-generating component is energized at the same time; after the heat-generating component is energized, the magnetic moment of the free layer can be more easily flipped, but it is not enough to affect the magnetic moment state of the reference layer, and at the same time, the magnetic field generated by the heat-generating component does not affect the magnetic moment flipping of the free layer and the reference layer.

[0007] The reference layer and the free layer are made of magnetic materials, and the directions of the magnetic moments are parallel or perpendicular to the film; the barrier layer is made of non-magnetic insulating material; and the space layer is made of non-magnetic metal material.

[0008] The heat generating component is annular or elliptical.

[0009] When the heat generating component is elliptical, the diameter of the intersection of the ellipse and its minor axis is the smallest; or the intersection of the ellipse and its minor axis is close to the magnetic component.

[0010] The thermally assisted magnetic device includes a first input terminal, a second input terminal and a third input terminal. The first input terminal is connected to the heat-generating component, and the first input terminal presents a binary logic state according to the current value input to the heat-generating component; the second input terminal stores information for the magnetic device itself, and the second input terminal presents a binary logic state according to the relationship between the magnetic moment of the free layer and the magnetic moment of the reference layer; the third input terminal is connected to the magnetic device, and the third input terminal presents a binary logic state according to the direction of the current input to the magnetic device; the third input terminal is used as a control signal, and four Boolean logic operations of "AND", "OR", "NOT" and "XOR" are realized according to different operations on the first input terminal, the second input terminal and the third input terminal.

[0011] The logical expression of the thermally assisted magnetic device is: A is the value of the first input terminal, C is the value of the third input terminal, B i is the value of the second input terminal in the initial state, B i+1 is the value of the second input terminal after the logic operation.

[0012] The technical solution adopted by the present invention to solve its technical problems is: to provide a storage and computing integrated array based on the above-mentioned thermally assisted magnetic device, including a MOSFET, the drain of the MOSFET is connected to the lower surface of the thermally assisted magnetic device, the gate is connected to the word line, and the source is connected to the source line; the MOSFET and the thermally assisted magnetic device constitute a storage and computing integrated unit; a plurality of the storage and computing integrated units are arranged in an array form, the storage and computing integrated units located in the same column use the same word line and the same source line, and the word line is arranged in parallel with the source line; the storage and computing integrated units located in the same row use the same bit line and the same control line; the bit line, source line and word line are externally connected to a voltage source, the control line is externally connected to a current source, and the control line constitutes a heat-generating component in each thermally assisted magnetic device.

[0013] The technical solution adopted by the present invention to solve the technical problem is to provide a computing method for the above-mentioned storage and computing integrated array, including:

[0014] According to the address information, the address decoding circuit is used to select the storage and calculation integrated unit to perform the operation;

[0015] The logic selection module selects to execute a certain logic operation and controls the word line, source line, bit line and control line corresponding to the address to be powered on or grounded;

[0016] After the operation is completed, the bit line, word line, and source line corresponding to the address are set to high level, high level, and low level, respectively, so that the current flows from top to bottom through the thermally assisted magnetic device, and then passes through the readout amplifier to select the output Boolean logic; the readout amplifier includes a reference magnetic device, and the resistance state of the thermally assisted magnetic device is obtained through the signal amplification and comparison process.

[0017] The technical solution adopted by the present invention to solve its technical problems is: to provide a storage and computing integrated array based on the above-mentioned thermally assisted magnetic device, including a superconducting hotspot switch, which is located adjacent to the thermally assisted magnetic device and in the plane where the free layer is located; the upper surface and the lower surface of the thermally assisted magnetic device are both provided with bias lines, and the drain and source of the superconducting hotspot switch are provided with bias lines, and the bias lines of the thermally assisted magnetic device are connected to the bias lines of the superconducting hotspot switch to form an elliptical bias line, so that the thermally assisted magnetic device is connected in parallel with the superconducting hotspot switch, and the heat-generating component serves as the logic function input end and the gate of the superconducting hotspot switch, and the superconducting hotspot switch and the thermally assisted magnetic device constitute A storage and computing integrated unit; a plurality of the storage and computing integrated units are arranged in an array, the storage and computing integrated units in the same column use the same bias line, and the storage and computing integrated units in the same row use the same control line; the bias line and the control line are externally connected to a current source; the control line constitutes a heat-generating component in each thermally assisted magnetic device; when a first current is passed through the control line, it has no effect on the gate of the superconducting hotspot switch and the heat-generating component; when a second current is passed through the control line, it has an effect on the gate of the superconducting hotspot switch but has no effect on the heat-generating component; when a third current is passed through the control line, it has an effect on both the gate of the superconducting hotspot switch and the heat-generating component; the first current is smaller than the second current and smaller than the third current.

[0018] The technical solution adopted by the present invention to solve the technical problem is to provide a computing method for the above-mentioned storage and computing integrated array, including:

[0019] According to the address information, the address decoding circuit is used to select the storage and calculation integrated unit to perform the operation;

[0020] The logic selection module selects to execute a certain logic operation and controls the bias line and control line corresponding to the address to be energized or grounded;

[0021] After the operation is completed, a positive current and a second current are passed through the bias line and control line corresponding to the address, so that the current flows from top to bottom through the thermally assisted magnetic device, and then passes through the readout amplifier to select the output Boolean logic; the readout amplifier includes a reference magnetic device, and the resistance state of the thermally assisted magnetic device is obtained through the signal amplification and comparison process.

[0022] Beneficial effects

[0023] Due to the adoption of the above-mentioned technical solution, the present invention has the following advantages and positive effects compared with the prior art: The present invention adopts a heat-assisted magnetic device as the core device of the storage and computing integrated unit, which is composed of a magnetic device and a heat-generating component surrounding the magnetic device, close to the free layer and away from the reference layer plane. Its storage function is realized by the magnetic device, while the heat-generating component and the magnetic device store information, and the external current polarity serves as the input end to realize the four Boolean logics of "AND", "OR", "NOT" and "XOR". The present invention breaks the von Neumann architecture of separation of computing and storage, reduces chip power consumption and cost, improves overall computing power, and can realize low-power non-volatile information storage and multiple high-speed logic calculations under the same circuit architecture, effectively solving the "storage wall" and "power wall" problems of the traditional von Neumann architecture. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 is a schematic structural diagram of a heat-assisted magnetic device according to an embodiment of the present invention;

[0025] Figure 2 is a schematic diagram of the interlayer structure of a magnetic device in an embodiment of the present invention;

[0026] Figure 3 Schematic diagram of the topography design of the heat generating component in an embodiment of the present invention;

[0027] Figure 4 Schematic diagram of the storage function of a heat-assisted magnetic device according to an embodiment of the present invention;

[0028] Figure 5 is a schematic diagram of a logic function input terminal of a heat-assisted magnetic device according to an embodiment of the present invention;

[0029] Figure 6 is a logic state diagram of a heat-assisted magnetic device according to an embodiment of the present invention;

[0030] Figure 7 is a Karnaugh map of a thermally assisted magnetic device according to an embodiment of the present invention;

[0031] Figure 8 is a logic function diagram of a heat-assisted magnetic device according to an embodiment of the present invention;

[0032] Figure 9 Schematic diagram of a storage and computing integrated array based on CMOS technology according to an embodiment of the present invention;

[0033] Figure 10 Schematic diagram of a storage and computing integrated unit based on CMOS technology in an embodiment of the present invention;

[0034] Figure 11This is a schematic diagram of an AND logic operation performed by a CMOS-based storage and computing array according to an embodiment of the present invention;

[0035] Figure 12 This is a flow chart of a method for manufacturing a storage and computing integrated array based on a CMOS process according to an embodiment of the present invention;

[0036] Figure 13 Schematic diagram of a storage and computing integrated array based on cutting-edge superconducting technology according to an embodiment of the present invention;

[0037] Figure 14 Schematic diagram of a storage and computing integrated unit based on cutting-edge superconducting technology in an embodiment of the present invention;

[0038] Figure 15 is a schematic diagram of a superconducting hotspot switch in an embodiment of the present invention;

[0039] Figure 16 Schematic diagram of the working process of the superconducting hotspot switch in an embodiment of the present invention;

[0040] Figure 17 This is a schematic diagram of an AND logic operation performed by a storage and computing integrated array based on cutting-edge superconducting technology according to an embodiment of the present invention;

[0041] Figure 18 This is a flow chart of a method for preparing a storage and computing integrated array based on cutting-edge superconducting technology according to an embodiment of the present invention. DETAILED DESCRIPTION

[0042] Below in conjunction with specific embodiment, further set forth the present invention.Should be understood that these embodiments are only used to illustrate the present invention and are not used in limiting the scope of the present invention.In addition, should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms fall equally within the scope limited by the appended claims of the application.

[0043] The embodiment of the present invention relates to a thermally assisted magnetic device, which can be used as a core device of a storage and computing integrated unit, such as Figure 1 As shown, it includes a magnetic device 1 and a heat generating component 2.

[0044] Wherein, the magnetic device 1 is an MTJ or a spin valve, such as Figure 2As shown, a buffer layer 11, a pinned layer 12, a reference layer 13, a barrier layer or spacer layer 14, a free layer 15, a cap layer 16, and a hard mask layer 17 are sequentially arranged from bottom to top. The reference layer 13 and the free layer 15 are made of magnetic materials with magnetic moments parallel or perpendicular to the film surface direction. One or a combination of Co, Fe, Ni, Mn, Rh, Pd, Pt, Gd, Tb, Dy, Ho, Al, Si, Ga, Ge, and B can be selected. The barrier layer is made of a non-magnetic insulating material, such as MgO or Al2O3. The spacer layer is made of a non-magnetic metal material, such as Cr, Cu, Mo, Ru, Pd, Hf, Ta, W, Tb, Ir, or Pt. Its shape is not limited and can be designed in various ways. The conventional process is cylindrical.

[0045] The heat generating component 2 surrounds the magnetic device 1 and is arranged on a plane close to the free layer and away from the reference layer. Its material can be superconducting materials such as Nb, NbN, NbTi, Nb3Sn, high-temperature superconductors, etc., or metals such as Al, Cu, Pt, or alloys such as FeCrAl, NiCr, etc. The corresponding material is selected according to the size of the heating effect. Figure 3 As shown, there are multiple options for the shape of the heat-generating component: (a) Ring-shaped, the heat-generating component is as close to the magnetic device as possible, and the heating area is distributed around the periphery of the magnetic device. However, in this case, the magnetic field generated after the heat-generating component is energized will affect the storage and computing functions of the magnetic device. In order to weaken or avoid the effect of the magnetic field, the following heat-generating components with multi-point heating are designed, taking two-point heating as an example; (b) Oval, the heat-generating component has two positions as close to the magnetic device as possible; (c) Thinned version, based on the improvement of the elliptical heat-generating component, the width of the heat-generating component near the two heating positions is reduced, and the heat-generating effect is better than that of case (b); (d) Grooved version, based on the improvement of the elliptical heat-generating component, the heat-generating component near the two heating positions is reduced and closer to the magnetic device, and the heat-generating effect is better than that of case (b).

[0046] The storage function of the thermally assisted magnetic device of this embodiment is similar to that of MRAM, and both are completed by magnetic devices, such as Figure 4As shown, when the magnetic moments of the free layer 15 and the reference layer 13 are parallel, the resistance of the magnetic device is in a low-resistance state, representing a binary "0"; when the magnetic moments of the free layer 15 and the reference layer 13 are antiparallel, the resistance of the magnetic device is in a high-resistance state, representing a binary "1." The difference lies in the information writing process: the write current of a heat-assisted magnetic device is lower than that of an MRAM, which means that the write power consumption is lower. When the write current is applied alone, the resistance state of the magnetic device cannot change. Information writing can only be completed when a write current with a polarity matching the initial resistance state of the magnetic device is applied and the heat-generating component is simultaneously energized. When energized, the heat-generating component's function is to raise the temperature of the free layer, making it easier for the free layer's magnetic moment to flip, but not enough to affect the magnetic moment state of the reference layer. Furthermore, when energized, the magnetic field generated by the heat-generating component does not affect the magnetic moment flipping of the free and reference layers of the magnetic device. In other words, energizing the heat-generating component alone does not change the storage state of the heat-assisted magnetic device.

[0047] The heat-assisted magnetic device logic function of this embodiment uses the heat generating component, the magnetic device's own stored information, and the external current polarity as three input terminals, such as Figure 5 As shown, input terminal A: whether the heat-generating component is energized (appropriate current amplitude needs to be selected). For CMOS process, the heat-generating component is energized by current I3, that is, the heat generated is sufficient to raise the surrounding environment to the expected value, representing "1", and no current is energized by the heat-generating component, representing "0"; for superconducting process, the heat-generating component is energized by a larger current I3, representing "1", and the heat-generating component is energized by a smaller current I2, representing "0"; input terminal B: the magnetic device itself stores information, when the free layer magnetic moment is antiparallel to the reference layer, it represents "1", and when the free layer magnetic moment is parallel to the reference layer, it represents "0"; C: whether the current applied to the magnetic device is greater than zero. Greater than zero means that the current is from top to bottom, representing "1", and less than zero means that the current is from bottom to top, representing "0".

[0048] Based on the information writing principle of the thermally assisted magnetic device, there are only two cases in which the stored information of the thermally assisted magnetic device changes before and after the logic operation, namely (1) A=1, B i =1, C=1, B i+1 =0; (2) A = 1, B i =0, C=0, B i+1 =1(where B i Represents the information initially stored in the magnetic device, B i+1 represents the information stored in the magnetic device after the logical operation), so its logical state can be obtained (see Figure 6 ), and then obtain the logical formula After applying the Karnaugh map simplification, the logical formula becomes like Figure 7As shown. Using the input terminal C as the control signal, four Boolean logics of "AND", "OR", "NOT" and "XOR" can be realized according to different input operations, such as Figure 8 shown.

[0049] For CMOS standard logic process, the above-mentioned thermally assisted magnetic devices can be used to design a cost-controlled, low-power storage and computing integrated array, such as Figure 9 As shown, a bit line is set above the thermally assisted magnetic device, and a traditional MOSFET is configured below it. The drain, gate and source of the MOSFET are respectively connected to the lower surface of the thermally assisted magnetic device, the word line and the source line, so that the thermally assisted magnetic device is connected in series with the MOSFET. The above structure constitutes a storage and computing integrated unit, as shown in FIG. Figure 10 As shown. Multiple integrated storage and computing units are regularly arranged to form an array. When two integrated storage and computing units are arranged vertically, word lines are connected together, source lines are connected together, and word lines and source lines are arranged in parallel. When two integrated storage and computing units are arranged horizontally, bit lines are connected together, and control lines are connected together. The bit lines, source lines, and word lines are connected to an external voltage source, and the control lines are connected to an external current source. The control lines are composed of multiple heat-generating components and wires connecting the heat-generating components.

[0050] The CMOS-based storage and computing integrated array includes the following steps when performing calculations:

[0051] (1) Based on the address information, the address decoding circuit is used to select the storage and calculation unit to perform the operation;

[0052] (2) The logic selection module selects to execute a certain logic budget and controls the word line, source line, bit line, and control line corresponding to the address to be energized or grounded;

[0053] (If the "AND" logic is executed, the bit line and word line are set to high potential, and the source line is set to low potential, that is, the input terminal C = 1. At this time, although current flows from the selected thermally assisted magnetic device from top to bottom, it is not enough to cause the magnetic moment of the free layer of the thermally assisted magnetic device to flip. With input B i signal, we can get the output terminal B i+1 signal, complete the "AND" logic (see Figure 8 It is worth emphasizing that the above operation does not affect the storage information of the unselected storage and computing integrated unit. On the one hand, since the MOSFET configured under the unselected thermally assisted magnetic device is not turned on, no current flows through the device from top to bottom; on the other hand, whether the control line is energized or not, it does not affect the storage state of the unselected thermally assisted magnetic device. Figure 11 shown);

[0054] (3) After the operation is completed, the bit line, word line, and source line corresponding to the address are set to high level, high level, and low level respectively, so that the current flows from top to bottom through the thermally assisted magnetic device, and then through the readout amplifier, the Boolean logic is selected for output. The readout amplifier includes a reference magnetic device (the resistance state is known). Through the signal amplification and comparison process, it can be obtained whether the thermally assisted magnetic device is in a high resistance state or a low resistance state, that is, "1" or "0". Among them, the amplitude of the bit line high level is preferably a small value (such as 100mV, which is much smaller than the word line high level). The reason is that the voltage bias effect has a smaller impact on TMR, which is more conducive to improving the data readout speed. When the amplitude of the bit line and word line high levels are equal, the above function is still feasible, and the circuit design is simpler, but the readout speed will be sacrificed.

[0055] The preparation method of the memory-computing integrated array based on CMOS process is as follows: Figure 12 As shown in the figure, it is similar to the MRAM process and also requires standard CMOS front-end process and storage array back-end process. It only needs to add control line preparation process on the basis of MRAM, such as Figure 12 The five processes in bold are shown in Figure 2. It can be seen that the new integrated storage and computing array based on mature MRAM technology has a relatively simple process flow and controllable costs.

[0056] For cutting-edge superconducting logic technology, the above-mentioned thermally assisted magnetic devices can be used to design an ultra-low temperature (<10K), low-power storage and computing integrated array, such as Figure 13 Bias lines are set on the upper and lower surfaces of the thermally assisted magnetic device, and a superconducting hotspot switch is configured adjacent to the thermally assisted magnetic device and on the free layer plane. Bias lines are also set above the drain and source of the switch to form an elliptical bias line, so that the thermally assisted magnetic device is connected in parallel with the superconducting hotspot switch. The heat-generating component serves as both the logic function input terminal and the hotspot switch gate. The above structure constitutes a storage and computing integrated unit, as shown in FIG. Figure 14 As shown, Figure 14 In the figure, (a) is the left view, and (b) is the right view; multiple memory-computing integrated units are regularly arranged to form an array. When two memory-computing integrated units are arranged vertically, the bias line is connected to the bias line, and when two memory-computing integrated units are arranged horizontally, the control line is connected to the control line; the bias line and the control line are externally connected to a current source; the control line is composed of multiple heat-generating components and wires connecting the heat-generating components. The heat-generating component takes into account both the logic function input terminal and the gate of the hotspot switch. Its material can be selected from superconducting materials such as Nb, NbN, NbTi, Nb3Sn, and high-temperature superconductors. Its structure is similar to that of MOSFET, and it also has a source, a drain, and a gate, and its form is diverse, such as Figure 15As shown in the figure, (a) is H-type and (b) is X-type. The superconducting hotspot switch alone requires that the gate current be smaller than the current required by the heat-generating component in the heat-assisted magnetic device. That is, when the current on the control line is very small (I1), neither the gate nor the heat-generating component works. As the current increases to I2, only the gate works, while the heat-generating component still cannot raise the temperature around the free layer of the magnetic device to the temperature required for the magnetic moment reversal of the free layer. As the current continues to increase to I3, both the gate and the heat-generating component work.

[0057] Among them, the working process of the superconducting hotspot switch (taking positive current as an example) is as follows Figure 16 As shown in the figure, after the bias line is energized, a bias current will be generated in the bias line. (a) When the control line is not energized, the bias current flows entirely through the superconducting hotspot switch, and no current exists in the thermally assisted magnetic device. (b) When the control line is just energized and the current is equal to I2 or I3, a control current will be generated in the control line. After this current flows into the superconducting hotspot switch, a local Joule heat hotspot appears, and the resistance of the superconducting hotspot switch gradually increases. Therefore, the current flowing out of the superconducting hotspot switch gradually decreases, and a smaller write current flows into the thermally assisted magnetic device, but this write current is not enough to affect the resistance state of the thermally assisted magnetic device. (c) When the control line is energized for a period of time (ns to μs), the resistance of the superconducting hotspot switch (100kΩ to 100MΩ) is much larger than the resistance of the thermally assisted magnetic device, preferably more than 10 times. Therefore, compared with the write current flowing into the thermally assisted magnetic device, the current flowing out of the superconducting hotspot switch is very small and can be ignored. At this time, for the case where the current is equal to I2, only the gate control works, and the heating function of the heat-generating component fails, which can be used to output Boolean logic; for the case where the current is equal to I3, the gate control and the heating function of the heat-generating component work together, and the resistance state of the thermally assisted magnetic device will change from a high resistance state to a low resistance state.

[0058] The storage and computing array based on cutting-edge superconducting technology includes the following steps during operation:

[0059] (1) Based on the address information, the address decoding circuit is used to select the storage and calculation unit to perform the operation;

[0060] (2) The logic selection module selects to execute a certain logic budget and controls the bias line and control line corresponding to the address to be energized or grounded;

[0061] (If the "AND" logic is executed, a positive current is passed into the bias line. When the superconducting switch is turned off, it represents the input terminal C = 1. At this time, although there is current flowing from the top to the bottom of the selected thermally assisted magnetic device, it is not enough to cause the magnetic moment of the free layer of the thermally assisted magnetic device to flip. According to the input terminal With input B i signal, we can get the output terminal B i+1signal, complete the "AND" logic (see Figure 8 ). Among them, the two situations when the superconducting switch is turned off correspond to the control line being energized: (1) the control line is connected to I2, representing A=0; (2) the control line is connected to I3, representing A=1, which is different from the CMOS process. In addition, the storage and computing integrated arrays based on these two processes have the same logical relationship. It is worth emphasizing that the above operations do not affect the storage information of the unselected storage and computing integrated units, such as Figure 17 shown);

[0062] (3) After the operation is completed, the bias line and control line corresponding to the address are passed through the positive current and I2, so that the current flows from top to bottom through the thermally assisted magnetic device, and then through the readout amplifier to select the output Boolean logic. The readout amplifier includes a reference magnetic device (the resistance state is known). Through the signal amplification and comparison process, it can be obtained whether the thermally assisted magnetic device is in a high resistance state or a low resistance state, that is, "1" or "0". Among them, the bias line current amplitude is preferably a small value (such as 10μA) to reduce the risk of the readout operation interfering with the resistance state of the thermally assisted storage device.

[0063] The preparation method of the integrated storage and computing array based on cutting-edge superconducting technology is as follows: Figure 18 As shown, it is necessary to combine the MRAM-like preparation process with the superconducting logic process. Figure 18 The bold part is one of the core steps, which is the process of preparing heating components and superconducting logic switches.

[0064] It's not difficult to see that the present invention uses a thermally assisted magnetic device as the core component of the integrated storage and computing unit. The device consists of a magnetic device and a heat-generating component surrounding the magnetic device, located near the free layer and away from the reference layer plane. The magnetic device performs its storage function, while the heat-generating component and the magnetic device store information, and the polarity of the applied current serves as the input for implementing four Boolean logic functions: "AND," "OR," "NOT," and "XOR." This invention breaks the von Neumann architecture's separation of computing and storage, reduces chip power consumption and cost, and improves overall computing power. It can achieve both non-volatile information storage and high-speed logic computing within the same circuit architecture, effectively resolving the "storage wall" and "power wall" issues of the traditional von Neumann architecture.

Claims

1. A thermally assisted magnetic device, characterized in that: The invention comprises a magnetic device and a heat-generating component; the magnetic device comprises a buffer layer, a pinned layer, a reference layer, a barrier layer or a space layer, a free layer, a cover layer and a mask layer arranged in sequence from bottom to top; the heat-generating component surrounds the magnetic device and is arranged on a plane close to the free layer and away from the reference layer; information writing can only be completed when a write current with a polarity matching the initial resistance state of the magnetic device is passed through the magnetic device and the heat-generating component is energized at the same time; after the heat-generating component is energized, the magnetic moment of the free layer can be more easily flipped, but it is not enough to affect the magnetic moment state of the reference layer, and at the same time, the magnetic field generated by the heat-generating component does not affect the magnetic moment flipping of the free layer and the reference layer.

2. The thermally assisted magnetic device according to claim 1, wherein: The reference layer and the free layer are made of magnetic materials, and the directions of the magnetic moments are parallel or perpendicular to the film; the barrier layer is made of non-magnetic insulating material; and the space layer is made of non-magnetic metal material.

3. The thermally assisted magnetic device according to claim 1, wherein: The heat generating component is annular or elliptical.

4. The thermally assisted magnetic device according to claim 2, wherein: When the heat generating component is elliptical, the diameter of the intersection of the ellipse and its minor axis is the smallest; or the intersection of the ellipse and its minor axis is close to the magnetic component.

5. The heat-assisted magnetic device according to claim 1, wherein: comprising a first input terminal, a second input terminal and a third input terminal, wherein the first input terminal is connected to the heat generating component, and the first input terminal presents a binary logic state according to the current value input to the heat generating component; The second input terminal stores information of the magnetic device itself, and the second input terminal presents a binary logic state according to the relationship between the magnetic moment of the free layer and the magnetic moment of the reference layer; The third input terminal is connected to the magnetic device, and the third input terminal presents a binary logic state according to the direction of the current input to the magnetic device; the third input terminal is used as a control signal, and four Boolean logic operations of "AND", "OR", "NOT" and "XOR" are implemented according to different operations on the first input terminal, the second input terminal and the third input terminal.

6. The heat-assisted magnetic device according to claim 5, wherein: The logical expression is: B i+1 =AB i +AC, A is the value of the first input terminal, C is the value of the third input terminal, B i is the value of the second input terminal in the initial state, B i+1 is the value of the second input terminal after the logic operation.

7. A storage and computing integrated array based on the thermally assisted magnetic device according to any one of claims 1 to 6, characterized in that: It includes a MOSFET, the drain of which is connected to the lower surface of the thermally assisted magnetic device, the gate is connected to the word line, and the source is connected to the source line; the MOSFET and the thermally assisted magnetic device constitute a storage and computing integrated unit; a plurality of the storage and computing integrated units are arranged in an array, and the storage and computing integrated units located in the same column use the same word line and the same source line, and the word line is arranged in parallel with the source line; the storage and computing integrated units located in the same row use the same bit line and the same control line; the bit line, source line and word line are externally connected to a voltage source, the control line is externally connected to a current source, and the control line constitutes a heat-generating component in each thermally assisted magnetic device.

8. A computing method for a storage-computation integrated array as claimed in claim 7, characterized in that: include: According to the address information, the address decoding circuit is used to select the storage and calculation integrated unit to perform the operation; The logic selection module selects to execute a certain logic operation and controls the word line, source line, bit line and control line corresponding to the address to be powered on or grounded; After the operation is completed, the bit line, word line, and source line corresponding to the address are set to high level, high level, and low level respectively. The current is caused to flow from top to bottom through the thermally assisted magnetic device and then pass through a sense amplifier to select and output Boolean logic; the sense amplifier includes a reference magnetic device, and the resistance state of the thermally assisted magnetic device is obtained through a signal amplification and comparison process.

9. A storage and computing integrated array based on the thermally assisted magnetic device according to any one of claims 1 to 6, characterized in that: The invention comprises a superconducting hotspot switch, which is located adjacent to the thermally assisted magnetic device and in the plane where the free layer is located; the upper surface and the lower surface of the thermally assisted magnetic device are both provided with bias lines, the drain and the source of the superconducting hotspot switch are provided with bias lines, the bias lines of the thermally assisted magnetic device are connected with the bias lines of the superconducting hotspot switch to form an elliptical bias line, so that the thermally assisted magnetic device is connected in parallel with the superconducting hotspot switch, the heat-generating component serves as the logic function input end and the gate of the superconducting hotspot switch, the superconducting hotspot switch and the thermally assisted magnetic device constitute a storage and computing integrated unit; a plurality of the storage and computing integrated units are arranged in an array form. Arrangement, the storage and computing integrated units located in the same column use the same bias line, and the storage and computing integrated units located in the same row use the same control line; the bias line and the control line are externally connected to a current source; the control line constitutes a heat-generating component in each thermally assisted magnetic device; when the control line is passed through a first current, it has no effect on the gate of the superconducting hotspot switch and the heat-generating component; when the control line is passed through a second current, it has an effect on the gate of the superconducting hotspot switch, but has no effect on the heat-generating component; when the control line is passed through a third current, it has an effect on both the gate of the superconducting hotspot switch and the heat-generating component; the first current is smaller than the second current and smaller than the third current.

10. A computing method for a storage-computation-in-one array according to claim 9, characterized in that: include: According to the address information, the address decoding circuit is used to select the storage and calculation integrated unit to perform the operation; The logic selection module selects to execute a certain logic operation and controls the bias line and control line corresponding to the address to be energized or grounded; After the operation is completed, the bias line and the control line corresponding to the address are passed through the positive current and the second current, so that the current flows from top to bottom through the thermally assisted magnetic device, and then passes through the readout amplifier to select the output Boolean logic; The readout amplifier includes a reference magnetic device, and obtains the resistance state of the thermally assisted magnetic device through signal amplification and comparison processes.

Images