Signal processing methods, chips and transmitters

By introducing a control module into the signal processing chip, the CFR and DPD modules are intelligently controlled according to the gain mode and signal strength parameters of the output signal, which solves the problems of high power consumption and low efficiency in the existing technology, and achieves more efficient signal processing and improved output signal quality.

CN116055276BActive Publication Date: 2026-01-30伟光有限公司(CN)
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Patent Information

Application Number
CN202310018395.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-01-06
Publication Date
2026-01-30
Estimated Expiration
2043-01-06

AI Technical Summary

Technical Problem

Existing CFR technology solutions cannot accurately match the various gain modes of power amplifiers, resulting in increased chip power consumption and an inability to adapt to changes in different signal systems and frame structures, affecting the operating efficiency and output signal quality of power amplifiers.

Method used

The control module intelligently controls the switching of the CFR and DPD modules based on the gain mode and signal strength parameters of the output signal, dynamically adjusting the detection threshold to achieve refined control of peak clipping and pre-distortion processing.

Benefits of technology

It reduces the chip's power consumption, improves the power amplifier's efficiency, reduces the output signal's error vector amplitude and spectral degradation, and lowers group delay.

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Abstract

This application provides a signal processing method, a chip, and a transmitter. The method includes: determining whether to perform peak clipping and / or pre-distortion processing on a second input signal based at least on a first gain mode and a first signal strength parameter of a first output signal; the first output signal is the signal after peak clipping and / or pre-distortion processing of the first input signal, and the second input signal is a subsequent input signal of the first input signal. This application embodiment enables control of the switching of the CFR module and the DPD module, thereby reducing the chip's power consumption.
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Description

Technical Field

[0001] This application relates to the field of communication technology, including but not limited to signal processing methods, chips, and transmitters. Background Technology

[0002] Currently, with the continuous development of communication technology, Wi-Fi is facing increasingly higher requirements in various aspects. Because Wi-Fi signals exhibit a wide amplitude variation, they often have a high peak-to-average ratio (PAR). Consequently, the performance of the power amplifier (PA) is limited by the PAR; when the input signal PAR is too high, it can lead to leakage between adjacent channels and amplifier inefficiency. Crest factor reduction (CFR) technology can reduce the peak-to-average power of the signal while minimizing power leakage between adjacent channels.

[0003] In existing CFR technology solutions, the decision to perform CFR processing and digital pre-distortion (DPD) processing is usually made manually. This cannot accurately match the various gain modes of the power amplifier. As a result, when the transmit power of the input signal is in the linear region of the PA, the switching of the CFR module and DPD module cannot be controlled when performing CFR or DPD processing on the input signal, which increases the power consumption of the chip. Summary of the Invention

[0004] The signal processing method, chip, and transmitter provided in this application embodiment can control the switching of the CFR module and DPD module, thereby reducing the power consumption of the chip.

[0005] The technical solution of this application embodiment is implemented as follows:

[0006] This application provides a signal clipping processing method, including:

[0007] At least based on the first gain mode and the first signal strength parameter of the first output signal, it is determined whether to perform peak clipping and / or pre-distortion processing on the second input signal; the first output signal is the signal after peak clipping and / or pre-distortion processing on the first input signal, and the second input signal is the subsequent input signal of the first input signal.

[0008] This application provides a chip, the chip including a processor, the processor being configured to execute:

[0009] At least based on the first gain mode and the first signal strength parameter of the first output signal, it is determined whether to perform peak clipping and / or pre-distortion processing on the second input signal; the first output signal is the signal after peak clipping and / or pre-distortion processing on the first input signal, and the second input signal is the subsequent input signal of the first input signal.

[0010] This application provides a chip, which includes a control module, a CFR module, and a DPD module; the control module includes a comparison module and a threshold calculation module; wherein...

[0011] The comparison module is used to determine whether to perform peak clipping and / or pre-distortion processing on the second input signal based at least on the first gain mode and the first signal strength parameter of the first output signal; the first output signal is the signal after peak clipping and / or pre-distortion processing of the first input signal, and the second input signal is the subsequent input signal of the first input signal;

[0012] The threshold calculation module is used to determine an initial detection threshold based on the signal characteristic parameters of the second input signal; and to determine a target detection threshold based on the initial detection threshold and the power information of the first output signal.

[0013] The CFR module is used to perform peak clipping on the second input signal based on the target detection threshold when the enable signal sequence is in an enabled state, to obtain the first intermediate output signal.

[0014] The DPD module is used to amplify the power of the first intermediate output signal to obtain the second output signal when the enable signal sequence is in an enabled state.

[0015] This application provides a transmitter, which includes a chip, a power amplifier (PA), and an antenna; wherein...

[0016] The chip is configured to determine whether to perform peak clipping and / or pre-distortion processing on the second input signal based at least on the first gain mode and the first signal strength parameter of the first output signal; the first output signal is the signal after peak clipping and / or pre-distortion processing of the first input signal, and the second input signal is a subsequent input signal of the first input signal;

[0017] The PA is used to amplify the power of the second intermediate output signal to obtain the second output signal.

[0018] The antenna is used to transmit the second output signal to the target base station.

[0019] In this embodiment, a signal processing method is provided. On one hand, a control module determines whether to perform peak clipping and / or pre-distortion processing on a second input signal based on a first gain mode and a first signal strength parameter of a first output signal. Since peak clipping and / or pre-distortion processing of the second input signal is related to the first gain mode and the first signal strength parameter of the first output signal, control of the CFR module or DPD module can be achieved for different gain modes of the power amplifier. This reduces the chip's power consumption, thereby achieving power saving.

[0020] On the other hand, the control module determines whether to perform peak clipping and / or pre-distortion processing on the second input signal by using the first gain mode and the first signal strength parameter of the first output signal. This enables fine-grained control of the peak clipping module and the pre-distortion module, and allows control of the switching of the CFR module and the DPD module, thereby reducing the power consumption of the chip.

[0021] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit the embodiments of this application. Attached Figure Description

[0022] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the specification, serve to explain the technical solutions of this application. Obviously, the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0023] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily have to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the specific circumstances.

[0024] Figure 1 A schematic diagram of an optional signal processing architecture provided for embodiments of this application. Figure 1 ;

[0025] Figure 2 A schematic diagram of an optional signal processing architecture provided for embodiments of this application. Figure 2 ;

[0026] Figure 3 A flowchart illustrating an optional signal processing method provided in this application embodiment. Figure 1 ;

[0027] Figure 4A flowchart illustrating an optional signal processing method provided in this application embodiment. Figure 2 ;

[0028] Figure 5 A flowchart illustrating an optional signal processing method provided in this application embodiment. Figure 3 ;

[0029] Figure 6 A flowchart illustrating an optional signal processing method provided in this application embodiment. Figure 4 ;

[0030] Figure 7 A flowchart illustrating an optional signal processing method provided in this application embodiment. Figure 5 ;

[0031] Figure 8 A flowchart illustrating an optional signal processing method provided in this application embodiment. Figure 6 ;

[0032] Figure 9 A flowchart illustrating an optional signal processing method provided in this application embodiment. Figure 7 ;

[0033] Figure 10 A flowchart illustrating an optional signal processing method provided in this application embodiment. Figure 8 ;

[0034] Figure 11 A flowchart illustrating an optional signal processing method provided in this application embodiment. Figure 9 ;

[0035] Figure 12 A flowchart illustrating an optional signal processing method provided in this application embodiment. Figure 10 ;

[0036] Figure 13 A schematic diagram of an optional signal processing architecture provided for embodiments of this application. Figure 3 ;

[0037] Figure 14 A flowchart illustrating an optional signal processing method provided in this application embodiment. Figure 10 one;

[0038] Figure 15 A schematic diagram of an optional signal processing architecture provided for embodiments of this application. Figure 4 ;

[0039] Figure 16 A flowchart illustrating an optional signal processing method provided in this application embodiment. Figure 10 two;

[0040] Figure 17 A schematic diagram of an optional transmitter provided for an embodiment of this application;

[0041] Figure 18 This is a schematic diagram of an optional chip structure provided in an embodiment of this application. Detailed Implementation

[0042] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the specific technical solutions of this application will be further described in detail below with reference to the accompanying drawings of the embodiments of this application. The following embodiments are used to illustrate this application, but are not intended to limit the scope of this application.

[0043] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0044] In the following description, references to "some embodiments," "this embodiment," "this application embodiment," and examples, etc., describe a subset of all possible embodiments. However, it is understood that "some embodiments" may be the same subset or different subset of all possible embodiments and may be combined with each other without conflict.

[0045] If the application documents contain similar descriptions such as "first / second", the following explanation shall be added: In the following description, the terms "first / second / third" are used only to distinguish similar objects and do not represent a specific order of objects. It is understood that "first / second / third" may be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.

[0046] Currently, with the continuous development of communication technology, higher requirements are being placed on various indicators of Wi-Fi (wireless network communication technology). To support a larger number of users, meet greater throughput, and achieve better Quality of Service (QoS), the output power of transmitters is constantly increasing, and the number of carriers is also increasing. As a result, the amplitude variation range of Wi-Fi signals is large, often exhibiting high power average (PAR). Power amplifiers (PAs) perform best when the input signal remains within a bounded linear range; therefore, the performance of power amplifiers is limited by high PAR signals. Large peak values ​​(signals with large amplitudes) in the input signal cause the amplifier to enter the nonlinear region, leading to leakage between adjacent channels and amplifier inefficiency. Therefore, CFR (Constant Peak-to-Flat Power) technology is used to process and reduce the peak-to-average power of the signal while minimizing power leakage between adjacent channels.

[0047] Power amplifiers are commonly used in a variety of applications for various purposes, including applying gain to signals to generate amplified output signals. For example, cellular telephone communications, high-speed data communications, and other applications often include transmitters with power amplifiers. In some cases, it is desirable to ensure that the signal is amplified by the power amplifier without distortion. Due to the nonlinear characteristics of the power amplifier (PA), when the input signal causes the power amplifier to operate in the saturation region, predistortion techniques cannot further improve the linearity of the power amplifier. Therefore, practical systems generally employ a combination of CFR processing and digital predistortion (DPD) techniques, while peak clipping is a crucial factor in improving power amplifier efficiency.

[0048] CFR technology is a technique that reduces the peak-to-average power ratio of bandwidth digital signals. It can maximize the linearity of the power amplifier (PA), minimize power leakage in adjacent channels, and significantly improve the PA's operating efficiency.

[0049] The mainstream CFR (Cost Factor Reduction) schemes currently available generally include Peak Windowing Crest Factor Reduction (PW-CFR), Peak Cancellation Crest Factor Reduction (PC-CFR), and Noise Shaping Crest Factor Reduction (NS-CFR). Among these, PC-CFR, based on the principles of linear systems, generates a signal with the opposite envelope to the processed signal and superimposes it onto the original signal. This approach ensures minimal distortion caused by peak clipping and offers flexibility, supporting various peak clipping standards through the configuration of the filter used to generate the superimposed signal.

[0050] Figure 1 A schematic diagram of an optional signal processing architecture provided for embodiments of this application. Figure 1 ,like Figure 1 As shown, the signal peak-clipping architecture may include chip 10, power amplifier 20, and antenna 30. Chip 10 receives the input signal and performs a series of processing operations on it, including modulation, peak-clipping, and pre-distortion. The processed input signal is then transmitted to PA (power amplifier) ​​20. PA 20 amplifies the received input signal and transmits the amplified signal to antenna 30. Antenna 30 transmits the amplified output signal to the base station. Thus, chip 10, power amplifier 20, and antenna 30 complete the process of transmitting the input signal to the target base station.

[0051] In the embodiments of this application, the chip can be a baseband chip or a radio frequency chip.

[0052] like Figure 1 As shown, chip 10 includes a Digital Up Converter (DUC) module 11, a CFR module (also known as a peak clipping module) 12, and a DPD (Digital Pre-Distortion) module 13. It can be understood that the DUC module 11, CFR module 12, and DPD module (also known as a pre-distortion module) 13 can be integrated into chip 10. The CFR module 12 represents CFR processing (also known as peak clipping or peak factor reduction) of the signal. Figure 1 As can be seen, CFR module 12 is usually located after DUC module 11 and before DPD module 13.

[0053] In this embodiment, chip 10 may include multiple CFR modules, each of which can perform peak clipping on the input signal once. This application does not limit the number of CFR modules, and the specific number can be adjusted according to the actual situation.

[0054] In this embodiment, the CFR module is also referred to as a peak clipping module, CFR processing module, or peak factor reduction processing module.

[0055] Existing CFR (Continuous Feedback) solutions often suffer from two main drawbacks. Firstly, they typically require manual control of the CFR switch, lacking the ability to intelligently select between CFR mode (also known as CFR processing) and DPD mode (also known as DPD processing) based on the input signal's characteristic parameters. Secondly, they require pre-setting fixed threshold values ​​(also known as detection thresholds), which cannot be changed over extended periods, resulting in a cumbersome and inflexible approach. This leads to the following problems:

[0056] 1. Inability to precisely match PA and DPD algorithms: When a PA has multiple modes, the linear and non-linear regions differ in each mode. Using the same detection threshold will reduce PA efficiency. When the signal transmission power is low and within the PA's linear region, CFR and DPD are unnecessary. Enabling CFR or DPD will increase the overall power consumption of the transmitter.

[0057] 2. Inability to adapt to waveforms of different signal systems: Some signal systems have a low PAR (Parity Range), such as the 802.11b signal waveform where the amplitude remains constant. In such cases, CFR (Constant Frequency Registry) should not be used, otherwise the receiver may be unable to demodulate the signal. Here, "signal system" can be understood as a signal under different standards, such as LTE (long Term Evolution), GSM (Global System for Mobile Communications), and W-CDMA (Wideband Code Division Multiple Access). The PAR differs under different standards.

[0058] On the one hand, the PAR of a signal differs under different signal systems. If the threshold of the CFR (also known as the detection threshold or preset threshold) is fixed, it cannot adapt to the waveforms of different protocols. On the other hand, even for signals of the same protocol and with the same bandwidth, the PAR of the signal will be different due to the different data transmitted.

[0059] 3. Difficulty in matching different frame structures and bandwidths: When the bandwidth or frame structure of the signal transmitted by the transmitter changes, the CFR threshold should be adjusted accordingly to maximize the effectiveness of PA and DPD. For example, control signals and data signals have different frame structures, corresponding to different signal amplitudes and PAR values.

[0060] In summary, most existing CFR (Continuous Rate Detection) solutions fail to employ optimal matching strategies for different scenarios. They struggle to rapidly, in real-time, and dynamically adjust the detection threshold and intelligently control the switching of the CFR and DPD modules based on the input signal's characteristic parameters. This results in suboptimal CFR performance, impacting PA (Power Amplifier) ​​efficiency and consequently leading to deterioration in the output signal's Error Vector Magnitude (EVM) and spectral degradation. Furthermore, the inability to intelligently control CFR and DPD switching results in higher transmitter power consumption and higher output signal latency, further reducing PA efficiency.

[0061] Based on this, embodiments of this application provide a signal processing method that can improve the operating efficiency of a power amplifier. The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0062] Figure 2 A schematic diagram of an optional signal processing architecture provided for embodiments of this application. Figure 2 ,like Figure 2 As shown, Figure 2 As shown, the signal processing architecture may include chip 10, PA (power amplifier) ​​20, and antenna 30. Figure 1 Based on the signal processing architecture shown, a control module 14 has been added to chip 10.

[0063] In this embodiment, the control module 14 is used to determine the signal format of the current input signal and the Transport Signal Strength Indicator (TSSI) of the previous output signal. Figure 2 (Shown as TSSI) and the previous gain mode of the previous output signal ( Figure 2 (Indicated by PA_mode), the intelligent switching peak clipping processing module 12 and the DPD module 13 perform peak clipping processing. When the control module 14 determines to perform peak clipping processing on the current input signal, it sets the first enable signal to the enabled state (…). Figure 2 (Indicated by CFR_enable); when the control module 14 determines that no peak clipping is to be performed on the current input signal, the first enable signal is set to the disabled state; similarly, when the control module 14 determines that predistortion processing is to be performed on the current input signal, the second enable signal is set to the enabled state. Figure 2 (shown as DPD_enable); when the control module 14 determines that the current input signal will not be predistorted, the second enable signal will be set to disabled.

[0064] In this embodiment, the control module 14 is further configured to determine the bandwidth of the current input signal, the modulation scheme of the current input signal, and the gain of the digital front end (DFE) of the previous output signal. Figure 2 (shown as DFE_gain) and the previous first compensation value ( Figure 2 (Exampled by Thr_comp), determine the current detection threshold ( Figure 2 (As shown in Thr), thereby improving CFR performance.

[0065] In this embodiment, the control module 14 may include a comparison module and a threshold calculation module. The comparison module is also called a comparator or a TSSI comparator; the threshold calculation module is also called a detection threshold calculation module or a CFR threshold query and calculation module.

[0066] In this embodiment of the application, the comparison module in the control module 14 is used to compare the signal format of the current input signal and the transmission signal strength indication of the previous output signal. Figure 2 (Shown as TSSI) and the previous gain mode of the previous output signal ( Figure 2 (Indicated by PA_mode), the intelligent switching peak clipping processing module 12 and the DPD module 13 are used. The threshold calculation module in the control module 14 is used to calculate the threshold based on the bandwidth of the current input signal, the modulation method of the current input signal, and the digital front end of the previous output signal (…). Figure 2 (shown as DFE_gain) and the previous first compensation value ( Figure 2 (Exampled by Thr_comp), determine the current detection threshold ( Figure 2 (Indicated by Thr).

[0067] In this embodiment, the control module 14 can achieve precise control of the peak shaving module 12 and the DPD module 13, thereby achieving the purpose of saving power and reducing group latency.

[0068] In this embodiment, the DUC module 11, CFR module 12, DPD module 14 and control module 14 are integrated in the chip 10.

[0069] In this embodiment, the comparison module and the threshold calculation module are integrated in chip 10.

[0070] In this embodiment, the control module 14 can also be connected to the chip via hardware access. In this case, the control module 14 is an independent hardware module.

[0071] This application provides a signal processing method, such as... Figure 3 As shown, the method includes:

[0072] At least based on the first gain mode and the first signal strength parameter of the first output signal, it is determined whether to perform peak clipping and / or pre-distortion processing on the second input signal; the first output signal is the signal after peak clipping and / or pre-distortion processing on the first input signal, and the second input signal is the subsequent input signal of the first input signal.

[0073] In this embodiment, the comparison module (TSSI comparator) of the control module in the chip determines whether to perform peak clipping and / or pre-distortion processing on the second input signal based at least on the first gain mode and the first signal strength parameter of the first output signal.

[0074] In the embodiments of this application, such as Figure 3 As shown, the signal processing method includes S110 to S120:

[0075] S110. Generate an enable signal sequence based at least on the first gain mode and the first signal strength parameter of the first output signal; the first output signal is a signal after the first input signal has undergone peak clipping and / or pre-distortion processing.

[0076] In this embodiment, the comparison module (TSSI comparator) of the control module in the chip generates an enable signal sequence based at least on the first gain mode and the first signal strength parameter of the first output signal.

[0077] S120. Determine whether to perform peak clipping and / or pre-distortion processing on the second input signal based on the enable signal sequence; the second input signal is a subsequent input signal of the first input signal.

[0078] In this embodiment of the application, after the comparison module (TSSI comparator) of the control module in the chip generates an enable signal sequence based at least on the first gain mode and the first signal strength parameter of the first output signal, the comparison module determines whether to perform peak clipping and / or pre-distortion processing on the second input signal based on the enable signal sequence.

[0079] In some embodiments of this application, an enable signal sequence is generated based on a first gain mode and a first signal strength parameter. The enable signal sequence is used to indicate whether to perform peak clipping on the second input signal and / or whether to perform pre-distortion processing on the second input signal.

[0080] In this embodiment, the comparison module (TSSI comparator) of the control module in the chip determines the enable signal sequence based on the first gain mode and the first signal strength parameter of the first output signal.

[0081] In this embodiment, the comparison module of the control module integrated in the chip determines the enable signal sequence based on the first gain mode and the first signal strength parameter of the first output signal, and then sends the enable signal sequence to the peak clipping processing module and / or the DPD module.

[0082] In this embodiment of the application, before the chip performs peak clipping and / or pre-distortion processing on the received current input signal, the control module in the chip determines the current enable signal sequence based on the previous gain mode and the previous signal strength parameter of the previous output signal.

[0083] In this embodiment, the input signal received by the chip can be either a baseband signal or a modulated signal. The baseband signal is the raw electrical signal emitted by the information source (also called the transmitting terminal) without modulation (spectral shifting and transformation). Simply put, the baseband signal is the signal emitted by the terminal that directly expresses the information to be transmitted. The modulated signal is achieved by shifting multiple baseband signals to different carrier frequencies through modulation, thus realizing channel multiplexing. For example, a DUC module can convert baseband signals to intermediate frequency (IF) or high frequency (HF) signals. This embodiment does not impose any restrictions on the type of input signal; the specific type can be selected according to the actual application scenario.

[0084] In this embodiment of the application, the first output signal is the signal after the first input signal has undergone peak clipping and / or pre-distortion processing and power amplification processing.

[0085] In this embodiment, the first input signal is the previous input signal processed by the chip.

[0086] In this embodiment, the first gain mode is the gain mode corresponding to the first output signal obtained after the first input signal has undergone peak clipping and / or pre-distortion processing and power amplification processing.

[0087] In this embodiment, the first signal strength parameter is the signal strength parameter corresponding to the first output signal obtained after the first input signal has undergone peak clipping and / or pre-distortion processing and power amplification processing.

[0088] In this embodiment of the application, after the comparison module of the control module in the chip determines the enable signal sequence based on the first gain mode and the first signal strength parameter of the first output signal, the control module determines whether to perform peak clipping and / or pre-distortion processing on the second input signal based on the enable signal sequence, thereby determining the second output signal.

[0089] In this embodiment, if the control module determines that peak clipping is required for the second input signal based on the enable signal sequence, it sends the enable signal sequence to the peak clipping module, which then performs peak clipping on the received second input signal. Similarly, if the control module determines that predistortion processing is required for the second input signal based on the enable signal sequence, it sends the enable signal sequence to the DPD module (predistortion processing module), which then performs predistortion processing on the received input signal to obtain the second output signal.

[0090] In this embodiment of the application, the second input signal is a subsequent input signal of the first input signal.

[0091] In the embodiments of this application, the second input signal is the input signal that the chip is processing. It can be understood that the second input signal is the input signal after the first input signal.

[0092] In this embodiment, a signal processing method is provided. On one hand, a control module determines whether to perform peak clipping and / or pre-distortion processing on a second input signal based on a first gain mode and a first signal strength parameter of a first output signal. Since peak clipping and / or pre-distortion processing of the second input signal is related to the first gain mode and the first signal strength parameter of the first output signal, control of the CFR module or DPD module can be achieved for different gain modes of the power amplifier. This reduces the chip's power consumption, thereby achieving power saving.

[0093] On the other hand, the control module determines whether to perform peak clipping and / or pre-distortion processing on the second input signal by using the first gain mode and the first signal strength parameter of the first output signal. This enables fine-grained control of the peak clipping module and the pre-distortion module, and allows control of the switching of the CFR module and the DPD module, thereby reducing the power consumption of the chip.

[0094] On the other hand, the control module determines the enable signal sequence based on the first gain mode and the first signal strength parameter of the first output signal. Since the enable signal sequence is related to the first gain mode and the first signal strength parameter of the first output signal, different enable signal sequences can be determined for different gain modes of the power amplifier. The CFR module or DPD module can be controlled through the enable signal sequence, thereby reducing the power consumption of the chip and achieving the purpose of power saving.

[0095] On the other hand, the control module determines whether to perform peak clipping and / or pre-distortion processing on the second input signal based on the enable signal sequence, thereby determining the second output signal. By using the enable signal sequence to determine whether to perform peak clipping and / or pre-distortion processing on the second input signal, the control module achieves fine-grained control of the peak clipping and pre-distortion processing modules, enabling control of the switching of the CFR and DPD modules, thereby reducing the chip's power consumption.

[0096] In this embodiment, the control module determines whether to perform peak clipping and / or pre-distortion processing on the second input signal through an enable signal sequence, thereby achieving fine control of the peak clipping and pre-distortion processing modules and improving the operating efficiency of the power amplifier.

[0097] In this embodiment, by finely controlling the peak clipping module and the predistortion module, when the control module does not perform peak clipping and / or predistortion processing on the second input signal, the peak clipping module and / or predistortion module are in a non-working state. In this way, the power consumption of the chip can be reduced, thereby achieving the purpose of power saving.

[0098] In this embodiment, by finely controlling the peak clipping module and the predistortion module, when the control module does not perform peak clipping and / or predistortion processing on the second input signal, the peak clipping module and / or predistortion module do not process the second input signal. In this way, the time overhead required for peak clipping and / or predistortion processing is reduced, thereby achieving the purpose of reducing the group delay of the output signal.

[0099] In the embodiments of this application, by finely controlling the peak clipping processing module and the predistortion processing module, the operating efficiency of the power amplifier can be improved, the error vector magnitude (EVM) of the output signal can be increased, and problems such as the spectral degradation of the output signal can be reduced.

[0100] In some embodiments of this application, such as Figure 4 As shown, the signal processing method further includes S210 to S222:

[0101] S210. Generate an enable signal sequence based on the first gain mode and the first signal strength parameter. The enable signal sequence is used to indicate whether to perform peak clipping on the second input signal and / or whether to perform pre-distortion processing on the second input signal.

[0102] S221. When the enable signal sequence is in the enabled state, determine to perform peak clipping on the second input signal to obtain the first intermediate output signal, and determine to perform pre-distortion processing on the first intermediate output signal to obtain the second intermediate output signal.

[0103] In this embodiment, after the comparison module of the control module in the chip determines the enable signal sequence based on the first gain mode and the first signal strength parameter of the first output signal, the control module determines, based on the enable signal sequence, to perform peak clipping on the second input signal to obtain the first intermediate output signal; and determines to perform pre-distortion processing on the second input signal to obtain the second intermediate output signal.

[0104] In this embodiment, the enable signal sequence can simultaneously control the peak clipping module and the preprocessing module. When the enable signal sequence is enabled, the control module determines to perform peak clipping and pre-distortion processing on the second input signal. The control signal sends the enable signal sequence to the peak clipping module and the preprocessing module. First, the peak clipping module performs peak clipping on the second input signal according to the enable signal sequence in the enabled state to obtain a first intermediate output signal. Then, the peak clipping module sends the first intermediate output signal to the preprocessing module. Subsequently, the preprocessing module performs pre-distortion processing on the received first intermediate output signal according to the enable signal sequence in the enabled state to obtain a second intermediate output signal. Finally, the preprocessing module sends the second intermediate output signal to the PA (power amplifier) ​​module.

[0105] S222. The second intermediate output signal is amplified to obtain the second output signal.

[0106] In this embodiment, the control module determines, based on the enable signal sequence, to perform peak clipping on the second input signal to obtain a first intermediate output signal; and determines, after performing pre-distortion processing on the second input signal to obtain a second intermediate output signal, the PA (power amplifier) ​​module performs power amplification processing on the second intermediate output signal to obtain a second output signal.

[0107] In this embodiment, the predistortion processing module (DPD module) performs predistortion processing on the received first intermediate output signal to obtain the second intermediate output signal, and then sends the second intermediate output signal to the PA module. The PA module performs power amplification processing on the received second intermediate output signal to obtain the second output signal.

[0108] In some embodiments of this application, the enable signal sequence includes a first enable signal and a second enable signal;

[0109] In this embodiment, when the enable signal sequence includes a first enable signal and a second enable signal, the peak clipping module and the predistortion processing module can be controlled respectively. Specifically, the first enable signal controls the peak clipping module, and the second enable signal controls the predistortion processing module.

[0110] In some embodiments of this application, such as Figure 5 As shown, the signal processing method further includes S210 to S233:

[0111] S210. Generate an enable signal sequence based on the first gain mode and the first signal strength parameter. The enable signal sequence is used to indicate whether to perform peak clipping on the second input signal and / or whether to perform pre-distortion processing on the second input signal.

[0112] S231. When the first enable signal is enabled, determine to perform peak clipping on the second input signal to obtain the first intermediate output signal.

[0113] In this embodiment of the application, after the comparison module of the control module in the chip determines the first enable signal based on the first gain mode and the first signal strength parameter of the first output signal, the control module determines to perform peak clipping processing on the second input signal based on the first enable signal to obtain the first intermediate output signal.

[0114] In this embodiment, when the first enable signal is enabled, the control module determines to perform peak clipping on the second input signal. The control signal sends the first enable signal to the peak clipping module. First, the peak clipping module performs peak clipping on the second input signal according to the first enable signal in the enabled state to obtain a first intermediate output signal. Then, the peak clipping module sends the first intermediate output signal to the preprocessing module.

[0115] S232. When the second enable signal is enabled, determine to perform pre-distortion processing on the first intermediate output signal to obtain the second intermediate output signal.

[0116] In this embodiment of the application, after the comparison module of the control module in the chip determines the second enable signal based on the first gain mode and the first signal strength parameter of the first output signal, the control module determines to perform pre-distortion processing on the first intermediate output signal based on the second enable signal to obtain the second intermediate output signal.

[0117] In this embodiment, when the second enable signal is enabled, the control module determines to perform predistortion processing on the first intermediate output signal. The control signal sends the second enable signal to the predistortion processing module. First, the predistortion processing module performs predistortion processing on the received first intermediate output signal according to the first enable signal in the enabled state to obtain the second intermediate output signal. Then, the predistortion processing module sends the second intermediate output signal to the PA module.

[0118] S233. The second intermediate output signal is amplified to obtain the second output signal.

[0119] In this embodiment of the application, the PA (power amplifier) ​​module amplifies the power of the second intermediate output signal to obtain the second output signal.

[0120] In this embodiment, the predistortion processing module (DPD module) performs predistortion processing on the received first intermediate output signal to obtain the second intermediate output signal, and then sends the second intermediate output signal to the PA module. The PA module performs power amplification processing on the received second intermediate output signal to obtain the second output signal.

[0121] In some embodiments of this application, such as Figure 5 As shown, the signal processing method further includes S210 to S243:

[0122] S210. Generate an enable signal sequence based on the first gain mode and the first signal strength parameter. The enable signal sequence is used to indicate whether to perform peak clipping on the second input signal and / or whether to perform pre-distortion processing on the second input signal.

[0123] S241. When the first enable signal is disabled, disable the peak clipping process for the second input signal.

[0124] In this embodiment, after the comparison module of the control module in the chip determines the first enable signal based on the first gain mode and the first signal strength parameter of the first output signal, the control module determines whether to perform peak clipping on the second input signal based on the first enable signal. If the first enable signal is in an unenabled state, the peak clipping on the second input signal is turned off.

[0125] In this embodiment, when the first enable signal is disabled, the control module disables peak clipping processing on the second input signal. The control signal sends the first enable signal to the peak clipping processing module. First, based on the first enable signal being disabled, the peak clipping processing module does not perform peak clipping processing on the second input signal and directly sends the second input signal to the predistortion processing module.

[0126] S242. When the second enable signal is enabled, determine to perform pre-distortion processing on the second input signal to obtain the third intermediate output signal.

[0127] In this embodiment, after the comparison module of the control module in the chip determines the second enable signal based on the first gain mode and the first signal strength parameter of the first output signal, the control module determines to perform pre-distortion processing on the second input signal based on the second enable signal to obtain the third intermediate output signal.

[0128] In this embodiment, when the second enable signal is enabled, the control module determines to perform predistortion processing on the second input signal. The control signal sends the second enable signal to the predistortion processing module. First, the predistortion processing module performs predistortion processing on the received second input signal according to the second enable signal in the enabled state to obtain a third intermediate output signal. Then, the predistortion processing module sends the third intermediate output signal to the PA module.

[0129] S243. The third intermediate output signal is amplified to obtain the second output signal.

[0130] In this embodiment, the PA (power amplifier) ​​module amplifies the third intermediate output signal to obtain the second output signal.

[0131] In this embodiment, the predistortion processing module (DPD module) performs predistortion processing on the received first output signal to obtain a third intermediate output signal, and then sends the third intermediate output signal to the PA module. The PA module performs power amplification processing on the received third intermediate output signal to obtain a second output signal.

[0132] In some embodiments of this application, such as Figure 5 As shown, the signal processing method further includes S210 to S253:

[0133] S210. Generate an enable signal sequence based on the first gain mode and the first signal strength parameter. The enable signal sequence is used to indicate whether to perform peak clipping on the second input signal and / or whether to perform pre-distortion processing on the second input signal.

[0134] S251. When the first enable signal is enabled, determine to perform peak clipping on the second input signal to obtain the first intermediate output signal.

[0135] In this embodiment of the application, after the comparison module of the control module in the chip determines the first enable signal based on the first gain mode and the first signal strength parameter of the first output signal, the control module determines whether to perform peak clipping on the second input signal based on the first enable signal. If the first enable signal is enabled, the control module determines to perform peak clipping on the second input signal to obtain the first intermediate output signal.

[0136] In this embodiment, when the first enable signal is enabled, the control module determines to perform peak clipping processing on the second input signal. The control signal sends the first enable signal to the peak clipping processing module. First, the peak clipping processing module performs peak clipping processing on the second input signal according to the first enable signal in the enabled state to obtain a first intermediate output signal. Then, the peak clipping processing module sends the first intermediate output signal to the predistortion processing module.

[0137] S252. When the second enable signal is disabled, disable the pre-distortion processing of the first intermediate output signal.

[0138] In this embodiment, after the comparison module of the control module in the chip determines the second enable signal based on the first gain mode and the first signal strength parameter of the first output signal, the control module determines whether to perform pre-distortion processing on the first intermediate output signal based on the second enable signal. When the second enable signal is disabled, the control module disables the pre-distortion processing on the first intermediate output signal.

[0139] In this embodiment, when the second enable signal is disabled, the control module disables predistortion processing of the first intermediate output signal. The control signal sends the second enable signal to the predistortion processing module. Based on the second enable signal being disabled, the predistortion processing module does not perform predistortion processing on the received first intermediate output signal and directly sends the first intermediate output signal to the PA module.

[0140] S253. The first intermediate output signal is amplified to obtain the second output signal.

[0141] In this embodiment of the application, the PA (power amplifier) ​​module amplifies the power of the first intermediate output signal to obtain the second output signal.

[0142] In this embodiment, the predistortion processing module (DPD module) directly sends the received first intermediate output signal to the PA module, and the PA module performs power amplification processing on the received first intermediate output signal to obtain the second output signal.

[0143] In this embodiment, the control module determines whether to perform peak clipping and / or pre-distortion processing on the second input signal based on the enable signal sequence, thereby determining the second output signal. By using the enable signal sequence to determine whether to perform peak clipping and / or pre-distortion processing on the second input signal, the control module achieves fine-grained control of the peak clipping and pre-distortion processing modules, thereby improving the operating efficiency of the power amplifier.

[0144] On the other hand, when the control module does not perform peak clipping and / or pre-distortion processing on the second input signal, the peak clipping module and / or pre-distortion processing module are in a non-working state. In this way, the power consumption of the chip can be reduced, thereby achieving the purpose of saving power.

[0145] On the other hand, when the control module does not perform peak clipping and / or predistortion processing on the second input signal, the peak clipping module and / or predistortion module do not process the second input signal. In this way, the time overhead required for peak clipping and / or predistortion processing is reduced, thereby achieving the purpose of reducing the group delay of the output signal.

[0146] In some embodiments of this application, such as Figure 6 As shown, the signal processing method further includes S310 to S320:

[0147] S310, Obtain the signal format of the second input signal.

[0148] In this embodiment, before determining the enable signal sequence based on the first gain mode and the first signal strength parameter of the first output signal, the control module in the chip obtains the signal format of the second input signal.

[0149] In this embodiment of the application, the comparison module in the control module obtains the signal format of the second input signal.

[0150] In this embodiment, the second input signal is a subsequent input signal to the first input signal. It can be understood that the second input signal is the input signal the chip is currently processing, and the first input signal is the previous input signal processed by the chip.

[0151] In this embodiment, the signal format of the second input signal can be a frame structure of the input signal. The frame structure represents the time allocation relationship of the signal within a frame, specifically including the allocation relationship of time slots, code points, synchronization, and flag signals.

[0152] For example, signals with different functions have different signal formats. For instance, control signals and data signals have different signal formats. Signals from different systems also have different signal formats. For example, signals from different standards such as LTE, GSM, and WCDMA have different signal formats.

[0153] S320. Determine the target gain threshold based on the signal format of the second input signal.

[0154] In this embodiment of the application, after the comparison module in the control module obtains the signal format of the second input signal, the comparison module determines the target gain threshold based on the signal format of the second input signal.

[0155] In this embodiment of the application, the comparison module adjusts the initial gain threshold according to the signal format of the second input signal to determine the target gain threshold.

[0156] In this embodiment of the application, the initial gain threshold is preset and is related to the gain mode of the power amplifier module (PA module).

[0157] For example, if the gain modes of the power amplifier module (PA module) are a first target mode (High Gain), a second target mode (Middle Gain), and a third target mode (LOW Gain), then the first target mode corresponds to a first initial gain threshold, the second target mode corresponds to a second initial gain threshold, and the third target mode corresponds to a third initial gain threshold. The first initial gain threshold, the second initial gain threshold, and the third initial gain threshold respectively characterize the range of power range nonlinearity of the power amplifier module under the first target mode, the second target mode, and the third target mode.

[0158] For example, the comparison module adjusts the first initial gain threshold, the second initial gain threshold, and the third initial gain threshold according to the signal format of the second input signal to obtain the first gain threshold, the second gain threshold, and the third gain threshold.

[0159] In some embodiments of this application, such as Figure 7 As shown, S320 includes S321 to S322:

[0160] S321. Determine the peak-to-average power ratio (PAPR) of the second input signal based on the signal format of the second input signal.

[0161] In this embodiment of the application, before determining the enable signal sequence based on the first gain mode and the first signal strength parameter of the first output signal, the comparison module of the control module in the chip determines the peak-to-average power ratio of the second input signal based on the signal format of the second input signal.

[0162] In the embodiments of this application, the signal format of the second input signal is different, which indicates that the peak-to-average power ratio (PAR) of the second input signal is different. For example, signals of different systems have different PARs. For instance, the waveform amplitude of a signal using the 802.11b (a communication protocol) protocol is always constant, so the PAR of the 802.11b signal is small, approximately 1.

[0163] S322. Determine the target gain threshold based on the peak-to-average power ratio of the second input signal and the initial gain threshold; the target gain threshold includes at least one gain threshold; the number of at least one gain threshold is consistent with the number of gain modes included in the target gain mode; the target gain mode characterizes the gain mode corresponding to the power amplification processing.

[0164] In this embodiment of the application, after the comparison module of the control module in the chip determines the peak-to-average power ratio (PAPR) of the second input signal according to the signal format of the second input signal, the comparison module determines the target gain threshold according to the PAPR of the second input signal and the initial gain threshold.

[0165] In this embodiment of the application, the initial gain threshold is preset and is related to the gain mode of the power amplifier module (PA module).

[0166] In the embodiments of this application, the target gain mode characterizes the gain mode corresponding to the power amplification process. For example, the gain modes of the power amplification module (PA module) are a first target mode (High Gain), a second target mode (Middle Gain), and a third target mode (LOW Gain). Among them, the amplification gain of the first target mode is greater than the amplification gain of the second target mode, and the amplification gain of the second target mode is greater than the amplification gain of the third target mode.

[0167] In the embodiments of this application, the target gain threshold includes at least one gain threshold; the number of at least one gain threshold is consistent with the number of gain modes included in the target gain mode.

[0168] For example, the power amplifier module (PA module) has three gain modes: a first target mode (High Gain), a second target mode (Middle Gain), and a third target mode (LOW Gain). In this case, the target gain modes include the first target mode, the second target mode, and the third target mode. The first target mode corresponds to a first initial gain threshold, the second target mode corresponds to a second initial gain threshold, and the third target mode corresponds to a third initial gain threshold. The initial gain thresholds include the first initial gain threshold, the second initial gain threshold, and the third initial gain threshold. The target gain thresholds include the first target gain threshold, the second target gain threshold, and the third target gain threshold.

[0169] In some embodiments of this application, S322 includes S401 to S402:

[0170] S401. If the peak-to-average power ratio of the second input signal is less than or equal to the target threshold, then the initial gain threshold is increased according to the length of the first step to obtain the target gain threshold, so that the target gain threshold is higher than the initial gain threshold.

[0171] In this embodiment, the comparison module of the control module in the chip determines the peak-to-average power ratio (PAPR) of the second input signal based on its signal format. Then, the comparison module adjusts the initial gain threshold based on the PAPR and a target threshold to obtain the target gain threshold. If the PAPR of the second input signal is less than or equal to the target threshold, the comparison module increases the initial gain threshold by the step length to obtain the target gain threshold, making the target gain threshold higher than the initial gain threshold.

[0172] In this embodiment of the application, the target threshold is preset; for example, the target threshold is 5.

[0173] In this embodiment of the application, the length of the first step is preset, for example, the length of the first step is 8.

[0174] For example, if the peak-to-average power ratio of the second input signal is very small or constant, the comparison module sums the initial gain thresholds (first initial gain threshold, second initial gain threshold and third initial gain threshold) in the first step to obtain the target gain thresholds (first target gain threshold, second target gain threshold and third target gain threshold).

[0175] S402. If the peak-to-average power ratio of the second input signal is greater than the target threshold, then the initial gain threshold is determined as the target gain threshold.

[0176] In this embodiment of the application, if the peak-to-average power ratio of the second input signal is greater than the target threshold, the comparison module determines the initial gain threshold as the target gain threshold based on the first step length.

[0177] In this embodiment, the comparison module first determines the peak-to-average power ratio (PAPR) of the second input signal based on its signal format. Then, the comparison module adjusts the initial gain threshold based on the PAPR to obtain the target gain threshold. Determining the target gain threshold using the signal format of the second input signal allows for adaptation to input signals with different formats and frame structures. This enables precise control of the peak clipping and predistortion processing modules for different input signals, thereby achieving power saving and reduced group latency.

[0178] In some embodiments of this application, such as Figure 8 As shown, in Figure 3 Based on the signal processing method shown, the signal processing method further includes S510:

[0179] S510. Determine the enable signal sequence based on the first gain mode of the first output signal, the first signal strength parameter, and the target gain threshold.

[0180] In this embodiment, the comparison module of the control module in the chip determines the enable signal sequence based on the first gain mode of the first output signal, the first signal strength parameter, and the target gain threshold.

[0181] In this embodiment of the application, the first output signal is the signal after the first input signal has undergone peak clipping and / or pre-distortion processing and power amplification processing.

[0182] In this embodiment, the first input signal is the previous input signal processed by the chip.

[0183] In this embodiment, the first gain mode is the gain mode corresponding to the first output signal obtained after the first input signal has undergone peak clipping and / or predistortion processing and power amplification processing; the first signal strength parameter is the signal strength parameter corresponding to the first output signal obtained after the first input signal has undergone peak clipping and / or predistortion processing and power amplification processing.

[0184] In the embodiments of this application, the target gain threshold represents the gain threshold corresponding to the gain mode of the power amplification process, and the gain threshold represents the range of nonlinearity of the power range in the corresponding gain mode.

[0185] In some embodiments of this application, S510 includes S511 to S512:

[0186] S511. Determine the gain threshold corresponding to the first gain mode from the first gain threshold, the second gain threshold, and the third gain threshold.

[0187] In this embodiment of the application, the comparison module of the control module in the chip determines the gain threshold corresponding to the first gain mode from the first gain threshold, the second gain threshold, and the third gain threshold.

[0188] In the embodiments of this application, the first gain threshold, the second gain threshold, and the third gain threshold are target gain thresholds; the first gain threshold is greater than the second gain threshold, and the second gain threshold is greater than the third gain threshold.

[0189] S512. If the first signal strength parameter is greater than the gain threshold corresponding to the first gain mode, an enable signal sequence in the enabled state is obtained; if the first signal strength parameter is less than or equal to the gain threshold corresponding to the first gain mode, an enable signal sequence in the disabled state is obtained.

[0190] In this embodiment of the application, after the comparison module of the control module in the chip determines the gain threshold corresponding to the first gain mode from the first gain threshold, the second gain threshold and the third gain threshold, the comparison module determines the enable signal sequence based on the gain threshold corresponding to the first gain mode and the first signal strength parameter.

[0191] For example, the power amplifier module (PA module) has three gain modes: a first target mode (High Gain), a second target mode (Middle Gain), and a third target mode (LOW Gain). The amplification gain of the first target mode is greater than that of the second target mode, and the amplification gain of the second target mode is greater than that of the third target mode. The first target mode corresponds to a first gain threshold, the second target mode corresponds to a second gain threshold, and the third target mode corresponds to a third gain threshold. In this case, the target gain threshold includes the first gain threshold, the second gain threshold, and the third gain threshold.

[0192] For example, when the first gain mode is the first target mode, if the first signal strength parameter is greater than the first gain threshold, an enable signal sequence in the enabled state is obtained; if the first signal strength parameter is less than or equal to the first gain threshold, an enable signal sequence in the disabled state is obtained.

[0193] For example, when the first gain mode is the second target mode, if the first signal strength parameter is greater than the second gain threshold, an enable signal sequence in the enabled state is obtained; if the first signal strength parameter is less than or equal to the second gain threshold, an enable signal sequence in the disabled state is obtained.

[0194] For example, when the first gain mode is the third target mode, if the first signal strength parameter is greater than the third gain threshold, an enable signal sequence in the enabled state is obtained; if the first signal strength parameter is less than or equal to the third gain threshold, an enable signal sequence in the disabled state is obtained.

[0195] In some embodiments of this application, the enable signal sequence is a first enable signal, and the target gain threshold is a first target gain threshold.

[0196] In some embodiments of this application, S510 further includes S521 to S522:

[0197] S521. Determine the gain threshold corresponding to the first gain mode from the fourth gain threshold, the fifth gain threshold, and the sixth gain threshold.

[0198] In this embodiment of the application, the comparison module of the control module in the chip determines the gain threshold corresponding to the first gain mode from the fourth gain threshold, the fifth gain threshold and the sixth gain threshold.

[0199] In the embodiments of this application, the fourth gain threshold, the fifth gain threshold, and the sixth gain threshold are the first target gain thresholds; the fourth gain threshold is greater than the fifth gain threshold, and the fifth gain threshold is greater than the sixth gain threshold.

[0200] S522. If the first signal strength parameter is greater than the gain threshold corresponding to the first gain mode, a first enable signal in the enabled state is obtained; if the first signal strength parameter is less than or equal to the gain threshold corresponding to the first gain mode, a first enable signal in the disabled state is obtained.

[0201] In this embodiment, after the comparison module of the control module in the chip determines the gain threshold corresponding to the first gain mode from the fourth gain threshold, the fifth gain threshold and the sixth gain threshold, the comparison module determines the first enable signal based on the gain threshold corresponding to the first gain mode and the first signal strength parameter.

[0202] For example, the power amplifier module (PA module) has three gain modes: a first target mode (High Gain), a second target mode (Middle Gain), and a third target mode (LOW Gain). The amplification gain of the first target mode is greater than that of the second target mode, and the amplification gain of the second target mode is greater than that of the third target mode. The first target mode corresponds to a fourth gain threshold, the second target mode corresponds to a fifth gain threshold, and the third target mode corresponds to a sixth gain threshold. In this case, the target gain thresholds include the fourth, fifth, and sixth gain thresholds.

[0203] For example, when the first gain mode is the first target mode, if the first signal strength parameter is greater than the fourth gain threshold, a first enable signal in the enabled state is obtained; if the first signal strength parameter is less than or equal to the fourth gain threshold, a first enable signal in the disabled state is obtained.

[0204] For example, when the first gain mode is the second target mode, if the first signal strength parameter is greater than the fifth gain threshold, a first enable signal in the enabled state is obtained; if the first signal strength parameter is less than or equal to the fifth gain threshold, a first enable signal in the disabled state is obtained.

[0205] For example, when the first gain mode is the third target mode, if the first signal strength parameter is greater than the sixth gain threshold, a first enable signal in the enabled state is obtained; if the first signal strength parameter is less than or equal to the sixth gain threshold, a first enable signal in the disabled state is obtained.

[0206] In some embodiments of this application, the enable signal sequence is a second enable signal, and the target gain threshold is a second target gain threshold.

[0207] In some embodiments of this application, S510 further includes S531 to S532:

[0208] S531. Determine the gain threshold corresponding to the first gain mode from the seventh gain threshold, the eighth gain threshold, and the ninth gain threshold.

[0209] In this embodiment of the application, the comparison module of the control module in the chip determines the gain threshold corresponding to the first gain mode from the seventh gain threshold, the eighth gain threshold, and the ninth gain threshold.

[0210] In the embodiments of this application, the seventh gain threshold, the eighth gain threshold, and the ninth gain threshold are the second target gain thresholds; the seventh gain threshold is greater than the eighth gain threshold, and the eighth gain threshold is greater than the ninth gain threshold.

[0211] S532. If the first signal strength parameter is greater than the gain threshold corresponding to the first gain mode, a second enable signal in the enabled state is obtained; if the first signal strength parameter is less than or equal to the gain threshold corresponding to the first gain mode, a second enable signal in the disabled state is obtained.

[0212] In this embodiment of the application, after the comparison module of the control module in the chip determines the gain threshold corresponding to the first gain mode from the seventh gain threshold, the eighth gain threshold and the ninth gain threshold, the comparison module determines the second enable signal based on the gain threshold corresponding to the first gain mode and the first signal strength parameter.

[0213] For example, the power amplifier module (PA module) has three gain modes: a first target mode (High Gain), a second target mode (Middle Gain), and a third target mode (LOW Gain). The amplification gain of the first target mode is greater than that of the second target mode, and the amplification gain of the second target mode is greater than that of the third target mode. The first target mode corresponds to the seventh gain threshold, the second target mode corresponds to the eighth gain threshold, and the third target mode corresponds to the ninth gain threshold. In this case, the target gain thresholds include the seventh, eighth, and ninth gain thresholds.

[0214] For example, when the first gain mode is the first target mode, if the first signal strength parameter is greater than the seventh gain threshold, a second enable signal in the enabled state is obtained; if the first signal strength parameter is less than or equal to the seventh gain threshold, a second enable signal in the disabled state is obtained.

[0215] For example, when the first gain mode is the second target mode, if the first signal strength parameter is greater than the eighth gain threshold, a second enable signal in the enabled state is obtained; if the first signal strength parameter is less than or equal to the eighth gain threshold, a second enable signal in the disabled state is obtained.

[0216] For example, when the first gain mode is the third target mode, if the first signal strength parameter is greater than the ninth gain threshold, a second enable signal in the enabled state is obtained; if the first signal strength parameter is less than or equal to the ninth gain threshold, a second enable signal in the disabled state is obtained.

[0217] In some embodiments of this application, in Figure 4 Based on the signal processing method shown, such as Figure 9 As shown, the signal processing method also includes S610 to S640:

[0218] S610. When the enable signal sequence is in the enabled state, determine the initial detection threshold based on the signal characteristic parameters of the second input signal.

[0219] In this embodiment, the comparison module of the control module in the chip determines, based on the enable signal sequence, that the second input signal should be clipped after peak clipping when the enable signal sequence is in an enabled state. Then, the threshold calculation module determines the initial detection threshold based on the signal characteristic parameters of the second input signal.

[0220] In this embodiment of the application, the signal characteristic parameters of the second input signal are the signal parameters of the input signal.

[0221] In this embodiment of the application, the initial detection threshold is the initial detection threshold when peak clipping is performed.

[0222] In some embodiments of this application, the signal characteristic parameters of the second input signal include at least one of the following: the bandwidth of the second input signal, the modulation scheme of the second input signal, and the root mean square of the second input signal.

[0223] In this embodiment, the bandwidth of the second input signal represents the frequency band occupied by the input signal. For example, the bandwidth of the input signal is 20MHz, 40MHz, 80MHz, 160MHz, or 320MHz. The modulation method of the second input signal can be BPSK (Binary Phase Shift Keying), QPSK (Quadrature Phase Shift Keying), 16QAM (Quadrature Amplitude Modulation), 64QAM, 256QAM, 1024QAM, or 2048QAM. The root mean square (RMS) of the second input signal represents the square root of the average of the squares of the input signal. The RMS can indicate the signal transmission power capability.

[0224] In this embodiment, the detection threshold (Thr) during peak clipping is related to the root mean square (RMS) of the second input signal, the digital front-end gain (DFE) of the second input signal, and the expected peak-to-average power ratio (PAR) of the second input signal. The detection threshold (Thr) can be obtained by the following formula:

[0225] Thr = RMS(sig) * 10 PAR / 20 *10 DFE_GAIN / 20 (1)

[0226] Where Thr represents the detection threshold of the input signal, RMS(sig) represents the root mean square of the input signal (sig), PAR represents the expected peak-to-average power ratio of the input signal, and DFE_GAIN represents the digital front-end gain of the input signal.

[0227] In some embodiments of this application, such as Figure 10 As shown, S610 includes S611 to S613:

[0228] S611. Determine the first detection threshold based on the bandwidth of the second input signal.

[0229] In this embodiment of the application, the threshold calculation module of the control module in the chip determines the first detection threshold based on the bandwidth of the second input signal.

[0230] In this embodiment of the application, since the bandwidth of the second input signal and the modulation method of the second input signal affect the expected peak-to-average power ratio, the threshold calculation module determines the first detection threshold based on the root mean square of the second input signal and the expected peak-to-average power ratio of the second input signal.

[0231] In some embodiments of this application, S611 includes S711 to S712:

[0232] S711. In the first peak-to-average ratio set, determine the first target expected peak-to-average ratio corresponding to the bandwidth of the second input signal; the first peak-to-average ratio set includes at least one first expected peak-to-average ratio corresponding to a preset bandwidth.

[0233] In this embodiment of the application, the threshold calculation module determines the first target expected peak-to-average ratio corresponding to the bandwidth of the second input signal from the first peak-to-average ratio set.

[0234] In this embodiment, the first average peak-to-peak ratio (APPR) set includes at least one first expected APPR corresponding to a preset bandwidth. For example, the preset bandwidths are 20M, 40M, 80M, 160M, and 320M, and the first APPR set includes 7, 8, 9, 10, and 11. That is, the first expected APPR corresponding to a second input signal with a 20M bandwidth is 7, the first expected APPR corresponding to a second input signal with a 40M bandwidth is 8, the first expected APPR corresponding to a second input signal with a 80M bandwidth is 9, the first expected APPR corresponding to a second input signal with a 160M bandwidth is 10, and the first expected APPR corresponding to a second input signal with a 320M bandwidth is 11.

[0235] S712. Determine the first detection threshold based on the root mean square of the second input signal, the first target expected peak-to-average power ratio, and the target front-end gain; the target front-end gain is the front-end gain of the first input signal before it undergoes power amplification processing.

[0236] In this embodiment of the application, after the threshold calculation module determines the first target expected peak-to-average ratio corresponding to the bandwidth of the second input signal from the first peak-to-average ratio set, the threshold calculation module determines the first detection threshold based on the root mean square of the second input signal, the first target expected peak-to-average ratio, and the target front-end gain.

[0237] In this embodiment, the threshold calculation module determines the first detection threshold using formula (1) based on the root mean square of the second input signal, the expected peak-to-average power ratio of the first target, and the target front-end gain.

[0238] For example, if the bandwidth of the second input signal is 80MHz, the threshold calculation module determines, from the first set of peak-to-average power ratios (PAPRs), that the first target desired PPR corresponding to the bandwidth of the second input signal is 9. Then, based on the root mean square of the second input signal, the first target desired PPR of 9, and the target front-end gain, the first detection threshold (Thr) is obtained through formula (1). 80 ).

[0239] S612. Determine the second detection threshold according to the modulation method of the second input signal.

[0240] In this embodiment of the application, the threshold calculation module of the control module in the chip determines the second detection threshold according to the modulation method of the second input signal.

[0241] In this embodiment of the application, since the modulation method of the second input signal affects the expected peak-to-average power ratio, the threshold calculation module determines the second detection threshold based on the root mean square of the second input signal and the expected peak-to-average power ratio corresponding to the modulation method of the second input signal.

[0242] In some embodiments of this application, S612 includes S721 to S722:

[0243] S721. In the second peak-to-average power ratio (PAPR) set, determine the second target desired PAPR corresponding to the bandwidth of the second input signal; the second PAPR set includes at least one second desired PAPR corresponding to a preset modulation scheme.

[0244] In this embodiment of the application, the threshold calculation module determines the second target expected peak-to-average ratio corresponding to the modulation mode of the second input signal from the second peak-to-average ratio set.

[0245] In the embodiments of this application, the second peak-to-average power ratio (PAPR) set includes at least one second desired PAPR corresponding to a preset modulation scheme. For example, the preset modulation schemes are BPSK, QPSK, 16QAM, 64QAM, 256QAM, 1024QAM, and 2048QAM, and the second PAPR set includes 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, and 0.7. In other words, the second expected peak-to-average power ratio (PAPR) for the second input signal with BPSK modulation is 0.1, the second expected PAPR for the second input signal with QPSK modulation is 0.2, the second expected PAPR for the second input signal with 16QAM modulation is 0.3, the second expected PAPR for the second input signal with 64QAM modulation is 0.4, the second expected PAPR for the second input signal with 256QAM modulation is 0.5, the second expected PAPR for the second input signal with 1024QAM modulation is 0.6, and the second expected PAPR for the second input signal with 2048QAM modulation is 0.7.

[0246] S722. Determine the second detection threshold based on the root mean square of the second input signal, the first target expected peak-to-average power ratio, and the target front-end gain; the target front-end gain is the front-end gain of the first input signal before power amplification.

[0247] In this embodiment of the application, after the threshold calculation module determines the second target expected peak-to-average ratio corresponding to the bandwidth of the second input signal in the second peak-to-average ratio set, the threshold calculation module determines the second detection threshold based on the root mean square of the second input signal, the second target expected peak-to-average ratio, and the target front-end gain.

[0248] In this embodiment, the threshold calculation module determines the second detection threshold using formula (1) based on the root mean square of the second input signal, the expected peak-to-average power ratio of the second target, and the target front-end gain.

[0249] For example, if the modulation scheme of the second input signal is QPSK, the threshold calculation module determines that the second target expected peak-to-average ratio corresponding to the bandwidth of the second input signal is 0.2 from the second peak-to-average ratio set. Then, based on the root mean square of the second input signal, the second target expected peak-to-average ratio of 0.2, and the target front-end gain, the second detection threshold (Thr) is obtained through formula (1). QPSK ).

[0250] S613. Determine the initial detection threshold based on the first detection threshold and the second detection threshold.

[0251] In this embodiment of the application, the threshold calculation module of the control module in the chip determines the first detection threshold based on the bandwidth of the second input signal; after the threshold calculation module determines the second detection threshold based on the modulation method of the second input signal, the threshold calculation module determines the initial detection threshold based on the first detection threshold and the second detection threshold.

[0252] In some embodiments of this application, the first detection threshold and the second detection threshold are summed to obtain the initial detection threshold.

[0253] In this embodiment, the threshold calculation module of the control module in the chip sums the first detection threshold and the second detection threshold to obtain the initial detection threshold.

[0254] For example, the first detection threshold of the second input signal with a bandwidth of 80 MHz and a modulation scheme of QPSK is Thr. 80 The second detection threshold is Thr. QPSK At this point, the initial detection threshold for the second input signal is Thr. 80,QPSK =Thr 80 +Thr QPSK .

[0255] S620. Determine the target detection threshold based on the initial detection threshold and the power information of the first output signal.

[0256] In this embodiment of the application, after the threshold calculation module of the control module in the chip determines the initial detection threshold based on the signal characteristic parameters of the second input signal, the threshold calculation module determines the target detection threshold based on the initial detection threshold and the power information of the first output signal.

[0257] In this embodiment, the power information of the first output signal is the power information of the previous output signal. The power information of the first output signal can also be understood as the power information of the output power of the power amplifier module.

[0258] In this embodiment, the power information of the first output signal can be the peak value of the PA module's output power over a fixed time period. Alternatively, the power information of the first output signal can be the probability that the PA module's output power exceeds a preset power value over a fixed time period.

[0259] In some embodiments of this application, such as Figure 11 As shown, S620 includes S621 to S623:

[0260] S621. Determine the peak power of the first output signal based on the power information of the first output signal.

[0261] In this embodiment of the application, the threshold calculation module of the control module in the chip determines the peak power of the first output signal based on the power information of the first output signal.

[0262] In this embodiment, the threshold calculation module of the control module in the chip obtains the peak power of the first output signal or the probability value of the first output signal exceeding the preset power value based on the power information of the first output signal within a fixed time period.

[0263] S622. Determine the first compensation value based on the peak power of the first output signal.

[0264] In this embodiment, the threshold calculation module of the control module in the chip analyzes the working efficiency of the PA module based on the power peak value of the first output signal, thereby determining the first compensation value.

[0265] In some embodiments of this application, S622 includes S801 to S803:

[0266] S801. Obtain the second compensation value; the second compensation value is the compensation value when the first input signal is clipped.

[0267] In this embodiment, the threshold calculation module obtains the second compensation value.

[0268] In this embodiment, the second compensation value is the compensation value when the first input signal is clipped. That is, the second compensation value is the compensation value before the first compensation value.

[0269] S802. If the peak power of the first target output signal is greater than or equal to the first power threshold, the second compensation value is reduced according to the second step size to obtain the first compensation value, so that the first compensation value is less than the second compensation value.

[0270] In this embodiment, if the peak power of the first target output signal is greater than or equal to the first power threshold, the threshold calculation module reduces the second compensation value according to the second step size to obtain the first compensation value, making the first compensation value less than the second compensation value. That is, when the peak power of the first target output signal is large, the threshold calculation module reduces the second compensation value. It is understandable that when the threshold calculation module detects a large output power, the compensation threshold is a positive number.

[0271] S803. If the peak power of the first target output signal is less than the second power threshold, the second compensation value is increased according to the third step size to obtain the first compensation value, so that the first compensation value is greater than the second compensation value; the first power threshold is greater than the second power threshold.

[0272] In this embodiment, if the peak power of the first target output signal is less than the second power threshold, the threshold calculation module increases the second compensation value according to the third step size to obtain a first compensation value, making the first compensation value greater than the second compensation value. That is, when the peak power of the first target output signal is small, the threshold calculation module increases the second compensation value. It is understandable that when the threshold calculation module detects a large output power, the compensation threshold is positive. It is also understandable that when the threshold calculation module detects a large output power, the compensation threshold is negative.

[0273] S623. Determine the target detection threshold based on the initial detection threshold and the first compensation value.

[0274] In this embodiment, after determining the first compensation value based on the power peak value of the first output signal, the threshold calculation module adds the initial detection threshold and the first compensation value to obtain the target detection threshold.

[0275] S630. Based on the target detection threshold, the second input signal is processed to remove peaks, and the first intermediate output signal is obtained.

[0276] In this embodiment, after the control module in the chip determines the target detection threshold based on the initial detection threshold and the power information of the first output signal, the threshold calculation module performs peak clipping on the second input signal based on the target detection threshold to obtain the first intermediate output signal.

[0277] S640. When the enable signal sequence is in the enabled state, determine to perform pre-distortion processing on the first intermediate output signal to obtain the second intermediate output signal.

[0278] In this embodiment, the threshold calculation module of the control module in the chip performs peak clipping on the second input signal based on the target detection threshold to obtain the first intermediate output signal. Then, when the enable signal sequence is in the enabled state, the predistortion module in the chip performs predistortion processing on the first intermediate output signal to obtain the second intermediate output signal.

[0279] In this embodiment of the application, the first intermediate output signal is the output signal obtained after peak clipping of the second input signal.

[0280] In some embodiments of this application, such as Figure 12 As shown, S622 is followed by S910 to S930:

[0281] S910. Determine the first front-end gain of the first output signal based on the first input signal.

[0282] In this embodiment of the application, after determining the first compensation value based on the power peak value of the first output signal, the threshold calculation module of the control module in the chip determines the first front-end gain of the first target output signal based on the first input signal.

[0283] In this embodiment, the front-end gain will scale the input signal to different degrees. Therefore, the detection threshold needs to be compensated according to the front-end gain.

[0284] In this embodiment, the first front-end gain is the front-end gain corresponding to the first output signal. The front-end gain can be the scaling gain of the input signal caused by the circuit matching between the peak clipping module and the PA module. Alternatively, the front-end gain can also be the scaling gain of the input signal caused by the circuit matching between the peak clipping module and the predistortion processing module. This application does not impose any limitations on the front-end gain; it can be selected according to the actual application environment.

[0285] S920. Determine the third compensation value based on the first front-end gain and the target front-end gain.

[0286] In this embodiment of the application, after the threshold calculation module of the control module in the chip determines the first front-end gain of the first output signal based on the first input signal, the threshold calculation module determines the third compensation value based on the first front-end gain and the target front-end gain.

[0287] In the embodiments of this application, when the digital front-end (DFE) amplifies the input signal, the third compensation value is positive; when the digital front-end (DFE) amplifies the input signal, the third compensation value is negative.

[0288] In some embodiments of this application, S920 includes S921 to S922:

[0289] S921. Determine the front-end gain difference based on the first front-end gain and the target front-end gain.

[0290] In this embodiment, the threshold calculation module of the control module in the chip determines the front-end gain difference based on the first front-end gain and the target front-end gain.

[0291] In this embodiment of the application, the target front-end gain is preset and can be determined based on the signal scaling characteristics of the circuit device.

[0292] For example, if the target front-end gain is 2 and the first front-end gain of the first output signal is 4, then the front-end gain difference is 4-2=2.

[0293] S922. Determine the third compensation value based on the root mean square of the second input signal, the first target expected peak-to-average power ratio, and the front-end gain difference.

[0294] In this embodiment of the application, after the threshold calculation module of the control module in the chip determines the front-end gain difference based on the first front-end gain and the target front-end gain, the threshold calculation module determines the third compensation value based on the root mean square of the second input signal, the first target expected peak-to-average power ratio, and the front-end gain difference.

[0295] In this embodiment of the application, the threshold calculation module determines the third compensation value based on the root mean square of the second input signal, the first target expected peak-to-average power ratio, and the front-end gain difference using formula (1).

[0296] For example, if the bandwidth of the second input signal is 80MHz and the first target expected peak-to-average power ratio (PAPR) of the second input signal is 9, then based on the root mean square of the second input signal, the first target expected PAPR of 9, and the target front-end gain, the third detection threshold (Thr) is obtained through formula (1). DFE _ GAIN ).

[0297] S930. Determine the target detection threshold based on the initial detection threshold, the first compensation value, and the third compensation value.

[0298] In this embodiment, the threshold calculation module of the control module in the chip determines the target detection threshold based on the initial detection threshold, the first compensation value, and the third compensation value.

[0299] In some embodiments of this application, the initial detection threshold, the first compensation value, and the third compensation value are added together to obtain the target detection threshold.

[0300] In this embodiment, the threshold calculation module of the control module in the chip sums the initial detection threshold, the first compensation value, and the third compensation value to obtain the target detection threshold.

[0301] For example, the threshold calculation module first determines the first detection threshold Thr based on the bandwidth of the second input signal. BW Based on the modulation scheme of the second input signal, the second detection threshold Thr is determined. modulate Subsequently, the threshold calculation module determines the first compensation value Thr based on the peak power of the first output signal. comp Based on the first front-end gain and the target front-end gain, the second compensation value Thr is determined. DFE_GAIN Finally, the threshold calculation module will use the first detection threshold Thr... BW Second detection threshold Thr modulate First compensation value Thr comp Second compensation value Thr DFE_GAIN Summing yields the target front-end gain Thr = Thr BW +Thr modulate+Thr comp +Thr DFE_GAIN .

[0302] In some embodiments of this application, the second output signal is transmitted to the target base station via an antenna.

[0303] In this embodiment, the control module in the chip determines whether to perform peak clipping and / or pre-distortion processing on the second input signal based on the enable signal sequence. After determining the second output signal, the power amplifier module (PA module) sends the second output signal to the connecting wire and transmits the second output signal to the target base station through the antenna.

[0304] In this embodiment, the second output signal is the signal after the second input signal has undergone peak clipping and / or pre-distortion processing and power amplification processing.

[0305] In some embodiments of this application, the signal processing method further includes steps S130 to S140:

[0306] S130. Acquire the baseband signal and determine the baseband signal as the second input signal.

[0307] In this embodiment, the chip acquires the baseband signal sent by the signal source and sends the baseband signal as the first input signal to the amplitude and density calculation module.

[0308] In this embodiment, the baseband signal is the raw electrical signal emitted by the information source (also called the transmitting terminal) without modulation (spectral shifting and transformation). Simply put, the baseband signal is the signal emitted by the terminal that directly expresses the information to be transmitted.

[0309] S140. The acquired baseband signal is modulated to obtain a modulated signal, and the modulated signal is determined as the second input signal.

[0310] In this embodiment, the chip acquires the baseband signal sent by the signal source, modulates the acquired baseband signal to obtain a modulated signal, and sends the modulated signal as the first input signal to the amplitude and density calculation module.

[0311] In this embodiment, the modulation signal is achieved by shifting multiple baseband signals to different carrier frequencies through modulation, thereby realizing channel multiplexing. For example, a DUC module can convert the baseband signal to an intermediate frequency (IF) signal or a high frequency (HF) signal. This embodiment does not impose any restrictions on the type of input signal; the specific type can be selected according to the actual application scenario.

[0312] Figure 13 A schematic diagram of an optional signal processing architecture provided for embodiments of this application. Figure 3 ,like Figure 13 As shown, the signal processing architecture may include chip 10, PA (also known as power amplifier module) 20, and antenna 30. Chip 10 includes CFR module (peak clipping module) 12, DPD module (also known as predistortion module) 13, and control module 14. Among them, control module 14 includes comparison module (also known as TSSI comparator or comparator) 141, threshold calculation module 142, switch 143, and switch 144.

[0313] In this embodiment of the application, the comparison module (also known as a TSSI comparator or comparator) 141 is used to compare the signal format of the second input signal ( Figure 13 (shown as Format in the image) to determine the target gain threshold; the comparison module 141 is also used to determine the target gain threshold based on the first gain mode of the first output signal (shown as Format in the image); Figure 13 (shown as PA Mode), first signal strength parameter ( Figure 13 (shown as TSSI in the text) and target gain threshold ( Figure 13 (Shown as TSSI_T1, TSSI_T2, and TSSI_T3), the enable signal sequence is determined.

[0314] In this embodiment of the application, the threshold calculation module 142 is used to calculate the threshold based on the bandwidth of the second input signal ( Figure 13 (shown as Bandwidth in the image), the root mean square of the second input signal (...) Figure 13 (shown in RMS) and target front-end gain ( Figure 13 (shown as DFE Gain in the diagram) to determine a first detection threshold; the threshold calculation module 142 is also used to determine the first detection threshold based on the modulation scheme of the second input signal (…). Figure 13 (shown in Modulation) and the root mean square of the second input signal (RMS) Figure 13 (shown in RMS) and target front-end gain ( Figure 13 (shown as DFE Gain in the diagram) to determine a second detection threshold; the threshold calculation module 142 is also used to determine the second detection threshold based on the power peak value of the first output signal and the second compensation value of the first output signal (DFE Gain). Figure 13 (shown as Thr Comp in the diagram), determining a first compensation value. The threshold calculation module 142 is also used to determine the first compensation value based on the first front-end gain and the target front-end gain (…). Figure 13 The threshold calculation module 142 is further used to determine the target detection threshold (denoted as DFE Gain) based on the initial detection threshold, the first compensation value, and the third compensation value. Figure 13 (Indicated by Thr).

[0315] In this embodiment, switch 143 is used to switch itself to the off state when the enable signal sequence is detected to be in the off state, so that the input signal skips the threshold calculation process of threshold calculation module 142 and the peak clipping process of CFR module 12; when the enable signal sequence is detected to be in the enabled state, switch itself to the on state, so that the input signal sequentially undergoes the threshold calculation process of threshold calculation module 142 and the peak clipping process of CFR module 12.

[0316] In this embodiment, switch 144 is used to switch itself to the off state when the enable signal sequence is detected to be in the off state, so that the input signal skips the pre-distortion processing of DPD module 13; when the enable signal sequence is detected to be in the enabled state, it sets itself to the on state, so that the input signal undergoes the pre-distortion processing of DPD module 13.

[0317] In this embodiment of the application, the chip 10 may include two or more CFR modules 12 for performing peak clipping processing on the input signal two or more times.

[0318] In this embodiment, chip 10, PA20 and antenna 30 can be carried in a transmitter, enabling the transmitter to transmit signals.

[0319] In this embodiment, the CFR module 12, DPD module 13, and control module 14 are integrated in chip 10.

[0320] In this embodiment, the comparison module (also known as the TSSI comparator or comparator) 141 and the threshold calculation module 142 are integrated in the control module 14.

[0321] In this embodiment, the control module 14 can also be connected to the chip 10 via hardware access. In this case, the control module is set as an independent module in the transmitter.

[0322] In this embodiment, the control module 14 can also be integrated into another chip and connected to the chip 10 through the other chip, so that the control module 14 is connected to the chip 10.

[0323] In the embodiments of this application, using Figure 13 Taking the signal processing architecture shown as an example, such as Figure 14 As shown, the signal processing method includes S1010 to S1070:

[0324] S1010, The chip carried in the transmitter acquires the second input signal;

[0325] S1020: The comparison module integrated in the chip control module obtains the signal format of the second input signal and determines the peak-to-average power ratio of the second input signal;

[0326] S1030, The comparison module integrated in the chip control module determines the target gain threshold based on the peak-to-average power ratio of the second input signal and the initial gain threshold;

[0327] S1040, The comparison module integrated in the chip control module determines the enable signal sequence based on the first gain mode of the first output signal, the first signal strength parameter and the target gain threshold;

[0328] S1040 includes S1041 to S1042:

[0329] S1041. The comparison module determines the gain threshold corresponding to the first gain mode from the first gain threshold, the second gain threshold, and the third gain threshold.

[0330] S1042. If the first signal strength parameter is greater than the gain threshold corresponding to the first gain mode, the comparison module obtains the enable signal sequence in the enabled state; if the first signal strength parameter is less than or equal to the gain threshold corresponding to the first gain mode, the comparison module obtains the enable signal sequence in the disabled state.

[0331] Among them, the first gain threshold, the second gain threshold, and the third gain threshold are target gain thresholds; the first gain threshold is greater than the second gain threshold, and the second gain threshold is greater than the third gain threshold.

[0332] S1050: The CFR module integrated in the chip determines the peak clipping process of the second input signal based on the enable signal sequence to obtain the first intermediate output signal. The CFR module sends the first intermediate output signal to the DPD module.

[0333] S1050 includes S1051 to S1054:

[0334] S1051. When the enable signal sequence is in the enabled state, the threshold calculation module of the control module integrated in the chip determines the first detection threshold according to the bandwidth of the second input signal; determines the second detection threshold according to the modulation method of the second input signal; and determines the initial detection threshold according to the first detection threshold and the second detection threshold.

[0335] S1052. The threshold calculation module determines the peak power of the first output signal based on the power information of the first output signal; and determines the first compensation value based on the peak power of the first output signal.

[0336] S1053, The threshold calculation module determines the first front-end gain of the first output signal based on the first input signal; and determines the third compensation value based on the first front-end gain and the target front-end gain.

[0337] S1054. The threshold calculation module sums the initial detection threshold, the first compensation value, and the third compensation value to obtain the target detection threshold. The threshold calculation module then sends the target detection threshold to the CFR module.

[0338] Based on the target detection threshold, the S1055 and CFR modules perform peak clipping on the second input signal to obtain the first intermediate output signal, and then send the first intermediate output signal to the DPD module.

[0339] S1060, The DPD module integrated in the chip determines, based on the enable signal sequence, to perform pre-distortion processing on the first intermediate output signal to obtain the second intermediate output signal. The DPD module then sends the second intermediate output signal to the PA module carried in the transmitter.

[0340] S1070 The PA module carried on the transmitter amplifies the power of the second intermediate output signal to obtain the second output signal, and sends the second output signal to the antenna carried on the transmitter, and then sends the second output signal to the target base station through the antenna.

[0341] Figure 15 A schematic diagram of an optional signal processing architecture provided for embodiments of this application. Figure 4 ,like Figure 15 As shown, the signal processing architecture may include chip 10, PA (also known as power amplifier module) 20, and antenna 30. Chip 10 includes CFR module (peak clipping module) 12, DPD module (also known as predistortion module) 13, and control module 14. Among them, control module 14 includes comparison module (also known as TSSI comparator or comparator) 141, comparison module 145, threshold calculation module 142, switch 143, and switch 144.

[0342] In this embodiment of the application, the comparison module 141 is used to compare the signal format of the second input signal ( Figure 15 (shown as Format in the image) to determine the target gain threshold; the comparison module 141 is also used to determine the target gain threshold based on the first gain mode of the first output signal (shown as Format in the image); Figure 15 (shown as PA Mode), first signal strength parameter ( Figure 15 (shown as TSSI in the text) and the first target gain threshold ( Figure 15 (Shown as TSSI_T4, TSSI_T5, and TSSI_T6), the first enable signal is determined.

[0343] In this embodiment of the application, the comparison module 145 is used to compare the first gain mode of the first output signal ( Figure 15 (shown as PA Mode), first signal strength parameter ( Figure 15 (shown as TSSI) and the second target gain threshold ( Figure 15 (Shown as TSSI_T7, TSSI_T8, and TSSI_T9), the second enable signal is determined.

[0344] In this embodiment of the application, the threshold calculation module 142 is used to calculate the threshold based on the bandwidth of the second input signal ( Figure 15 (shown as Bandwidth in the image), the root mean square of the second input signal (...) Figure 15 (shown in RMS) and target front-end gain ( Figure 15 (shown as DFE Gain in the diagram) to determine a first detection threshold; the threshold calculation module 142 is also used to determine the first detection threshold based on the modulation scheme of the second input signal (…). Figure 15 (shown in Modulation) and the root mean square of the second input signal (RMS) Figure 15 (shown in RMS) and target front-end gain ( Figure 15 (shown as DFE Gain in the diagram) to determine a second detection threshold; the threshold calculation module 142 is also used to determine the second detection threshold based on the power peak value of the first output signal and the second compensation value of the first output signal (DFE Gain). Figure 15 (shown as Thr Comp in the diagram), determining a first compensation value. The threshold calculation module 142 is also used to determine the first compensation value based on the first front-end gain and the target front-end gain (…). Figure 15 The threshold calculation module 142 is further used to determine the target detection threshold (denoted as DFE Gain) based on the initial detection threshold, the first compensation value, and the third compensation value. Figure 15 (Indicated by Thr).

[0345] In this embodiment, switch 143 is used to switch itself to the off state when the first enable signal is detected to be in the off state, so that the input signal skips the threshold calculation process of threshold calculation module 142 and the peak clipping process of CFR module 12; when the first enable signal is detected to be in the enabled state, switch itself to the on state, so that the input signal sequentially undergoes the threshold calculation process of threshold calculation module 142 and the peak clipping process of CFR module 12.

[0346] In this embodiment, switch 144 is used to switch itself to the off state when the second enable signal is detected to be in the off state, so that the input signal skips the pre-distortion processing of DPD module 13; when the second enable signal is detected to be in the enable state, it switches itself to the on state, so that the input signal undergoes the pre-distortion processing of DPD module 13.

[0347] In the embodiments of this application, using Figure 15 Taking the signal processing architecture shown as an example, such as Figure 16 As shown, the signal processing method includes S2010 to S2080:

[0348] S2010, The chip carried in the transmitter acquires the second input signal;

[0349] S2020: The comparison module integrated in the chip control module obtains the signal format of the second input signal and determines the peak-to-average power ratio of the second input signal;

[0350] S2030, The comparison module integrated in the chip control module determines the target gain threshold based on the peak-to-average power ratio of the second input signal and the initial gain threshold;

[0351] S2040, the comparison module integrated in the chip control module determines the first enable signal based on the first gain mode of the first output signal, the first signal strength parameter and the first target gain threshold;

[0352] S2040 includes S2041 to S2042:

[0353] S2041. The comparison module determines the gain threshold corresponding to the first gain mode from the fourth gain threshold, the fifth gain threshold, and the sixth gain threshold.

[0354] S2042. If the first signal strength parameter is greater than the gain threshold corresponding to the first gain mode, the comparison module obtains the first enable signal in the enabled state; if the first signal strength parameter is less than or equal to the gain threshold corresponding to the first gain mode, the comparison module obtains the first enable signal in the disabled state.

[0355] Among them, the fourth gain threshold, the fifth gain threshold, and the sixth gain threshold are target gain thresholds; the fourth gain threshold is greater than the fifth gain threshold, and the fifth gain threshold is greater than the sixth gain threshold.

[0356] S2050, the comparison module integrated in the chip control module determines the second enable signal based on the first gain mode of the first output signal, the first signal strength parameter, and the second target gain threshold;

[0357] S2050 includes S2051 to S2052:

[0358] S2051. The comparison module determines the gain threshold corresponding to the first gain mode from the seventh gain threshold, the eighth gain threshold, and the ninth gain threshold.

[0359] S2052. If the first signal strength parameter is greater than the gain threshold corresponding to the first gain mode, the comparison module obtains a second enable signal in the enabled state; if the first signal strength parameter is less than or equal to the gain threshold corresponding to the first gain mode, the comparison module obtains a second enable signal in the disabled state.

[0360] Among them, the seventh gain threshold, the eighth gain threshold, and the ninth gain threshold are target gain thresholds; the seventh gain threshold is greater than the eighth gain threshold, and the eighth gain threshold is greater than the ninth gain threshold.

[0361] S2060, the CFR module integrated in the chip determines, based on the first enable signal, to perform peak clipping on the second input signal to obtain the first intermediate output signal, and sends the first intermediate output signal to the DPD module;

[0362] S2070, the DPD module integrated in the chip determines, based on the second enable signal, to perform pre-distortion processing on the first intermediate output signal to obtain the second intermediate output signal, and the DPD module sends the second intermediate output signal to the PA module carried in the transmitter;

[0363] S2080 The PA module carried on the transmitter amplifies the power of the second intermediate output signal to obtain the second output signal, and sends the second output signal to the antenna carried on the transmitter, and then sends the second output signal to the target base station through the antenna.

[0364] In this embodiment, the control module integrated in the chip determines whether to perform CFR (peak clipping) and DPD (distortion pre-distortion) processing on the input signal by judging whether the enable signal sequence is in an enabled state. When the enable signal sequence is in an enabled state, the control module determines to perform CFR and DPD processing on the input signal. When the enable signal sequence is in a disabled state, the control module determines not to perform CFR and DPD processing on the input signal. At this time, the CFR module and DPD module are in a non-operating state, which can reduce the power consumption of the chip or transmitter.

[0365] In this embodiment, when the enable signal sequence is in a disabled state, the control module determines that it will not perform CFR processing or DPD processing on the input signal. At this time, the CFR module and DPD module are in an inactive state. Since the CFR module and DPD module do not operate on the input, the control module directly transmits the input signal to the PA module, thereby effectively reducing the time overhead required for processing by the CFR module and DPD module, and thus reducing the group delay of the output signal.

[0366] In this embodiment, the control module can finely control the detection threshold of the CFR module. Based on the signal characteristics (signal characteristic parameters) of the current input signal and the output power (power information) of the previous output signal, the detection threshold of the CFR module is adjusted in real time. This allows for more precise control of the PAR and output power of the output signal, improving the PA's working efficiency and enabling the PA module to operate efficiently.

[0367] In this embodiment, compared to the prior art, a control module for the CFR module is added. On one hand, the control module selects whether to switch the CFR module and DPD module on and off based on the signal format, the PA's various gain modes, and the Transmit Signal Strength Index (TSSI) of the output signal, thereby achieving power saving and reducing group latency. On the other hand, the control module compensates for and adjusts the CFR module's threshold (detection threshold) in real time based on signal feedback information, thereby achieving precise control of the CFR module and improving the PA's operating efficiency.

[0368] In this embodiment, the control module compensates the detection threshold of the CFR module in real time based on the feedback information of the output signal. It can analyze the working efficiency of the PA by recording the peak value of the PA output power over a period of time, or by calculating the probability of exceeding a certain preset power value.

[0369] In the embodiments of this application, the signal processing methods involved in the above embodiments can be used not only in Wi-Fi communication, but also in other communication methods that require peak clipping by CFR modules. This application does not impose any restrictions on this, and the specific method can be selected according to the actual application scenario.

[0370] In this embodiment, the values ​​of PAR (Peak-to-Average Power Ratio) or RMS (Root Mean Square) for different input signals under different bandwidths and modulation methods are viewed using instruments. For products using the signal processing method in this embodiment, the PAR or RMS of different input signals will dynamically change with the different signals. For products not using the signal processing method in this embodiment, the PAR or RMS of different input signals remains constant most of the time.

[0371] In this embodiment, when the target detection threshold is continuously modified, the delay change of the output signal is observed using an instrument. For products using the signal processing method of this embodiment, when the target detection threshold is increased, the enable signal sequence of the CFR module and DPD module is in an enabled state, for example, the enable signal is set to 1. When the target detection threshold is decreased, the enable signal sequence of the CFR module and DPD module is in a disabled state, for example, the enable signal is set to 0. This can result in a large change in the group delay of the output signal. For products not using the signal processing method of this embodiment, the group delay of the output signal does not change when the target detection threshold changes.

[0372] In this embodiment of the application, the configuration information of the relevant signal processing method can be found by checking the configurable CFR register of the product to determine whether the signal processing method described in the above embodiment of the application is used.

[0373] In the embodiments of this application, any changes to the order, position, or number of iterations of the signal processing method proposed in the embodiments of this application should also fall within the scope of protection of this application.

[0374] In the embodiments of this application, the example of the control module is relatively simple. Simple modifications to the data of the control module, the use of similar formulas or concepts, etc. should fall within the protection scope of this application.

[0375] In the embodiments of this application, the peak clipping module mainly performs peak clipping on the input signal through PC-CFR. Other CFR schemes (PW-CFR, NS-CFR, etc.) that perform similar adaptive adjustments are also within the protection scope of this application.

[0376] It should be noted that although the steps of the method in this application are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in that specific order, or that all the steps shown must be performed to achieve the desired result. Additional or alternative steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps; or steps from different embodiments may be combined into a new technical solution.

[0377] This application provides a transmitter. Figure 17 A schematic diagram of an optional transmitter provided in an embodiment of this application is shown below. Figure 17 As shown, the transmitter 3000 provided in this embodiment includes a chip 3100, a PA 3200, and an antenna 3300; wherein,

[0378] The chip 3100 is used to determine whether to perform peak clipping and / or pre-distortion processing on the second input signal based at least on the first gain mode and the first signal strength parameter of the first output signal; the first output signal is the signal after peak clipping and / or pre-distortion processing of the first input signal, and the second input signal is the subsequent input signal of the first input signal.

[0379] The PA3200 is used to amplify the power of the second intermediate output signal to obtain the second output signal.

[0380] The antenna 3300 is used to transmit the second output signal to the target base station via the antenna.

[0381] In this embodiment, chip 3100 and chip 10 are the same; PA3200 and PA20 are the same; antenna 3300 and antenna 30 are the same.

[0382] This application provides a chip 3100, which includes a control module 3110, a CFR module 3120, and a DPD module 3130; wherein, the control module 3110 includes a comparison module 3111 and a threshold calculation module 3112.

[0383] In this embodiment, control module 3110 and control module 14 are the same; comparison module 3111, comparison module 141 and comparison module 145 are the same; threshold calculation module 3112 and threshold calculation module 142 are the same.

[0384] In this embodiment of the application, the comparison module 3111 is used to determine whether to perform peak clipping and / or pre-distortion processing on the second input signal based at least on the first gain mode and the first signal strength parameter of the first output signal; the first output signal is the signal after the first input signal has undergone peak clipping and / or pre-distortion processing, and the second input signal is the subsequent input signal of the first input signal.

[0385] In this embodiment of the application, the comparison module 3111 is further configured to generate an enable signal sequence based on the first gain mode and the first signal strength parameter, the enable signal sequence being used to indicate whether to perform peak clipping on the second input signal, and / or whether to perform pre-distortion processing on the second input signal.

[0386] In this embodiment of the application, the threshold calculation module 3112 is used to determine an initial detection threshold based on the signal characteristic parameters of the second input signal; and to determine a target detection threshold based on the initial detection threshold and the power information of the first output signal.

[0387] In this embodiment of the application, the CFR module 3120 is used to perform peak clipping on the second input signal based on the target detection threshold when the enable signal sequence is in an enabled state, to obtain a first intermediate output signal.

[0388] In this embodiment of the application, the DPD module 3130 is used to perform power amplification processing on the first intermediate output signal to obtain a second output signal when the enable signal sequence is in an enabled state.

[0389] In this embodiment of the application, the comparison module 3111 is further configured to determine, when the enable signal sequence is in an enabled state, to perform peak clipping on the second input signal to obtain a first intermediate output signal, and to determine to perform pre-distortion processing on the first intermediate output signal to obtain a second intermediate output signal.

[0390] In this embodiment of the application, the PA3200 is further used to perform power amplification processing on the second intermediate output signal to obtain the second output signal.

[0391] In this embodiment of the application, the comparison module 3111 is further configured to determine, when the first enable signal is enabled, to perform peak clipping on the second input signal to obtain a first intermediate output signal.

[0392] In this embodiment of the application, the comparison module 3111 is further configured to disable peak clipping processing on the second input signal when the first enable signal is in an disabled state.

[0393] In this embodiment of the application, the comparison module 3111 is further configured to determine, when the second enable signal is in an enabled state, to perform pre-distortion processing on the second input signal to obtain a third intermediate output signal.

[0394] In this embodiment of the application, the PA3200 is further used to perform power amplification processing on the third intermediate output signal to obtain a second output signal.

[0395] In this embodiment of the application, the comparison module 3111 is further configured to disable the pre-distortion processing of the first intermediate output signal when the second enable signal is in a disabled state.

[0396] In this embodiment of the application, the PA3200 is further used to perform power amplification processing on the first intermediate output signal to obtain a second output signal.

[0397] In this embodiment of the application, the comparison module 3111 is further configured to acquire the signal format of the second input signal and determine the target gain threshold based on the signal format of the second input signal.

[0398] In this embodiment of the application, the comparison module 3111 is further configured to determine the peak-to-average power ratio (PAPR) of the second input signal according to the signal format of the second input signal; and to determine the target gain threshold according to the PAPR of the second input signal and the initial gain threshold; the target gain threshold includes at least one gain threshold; the number of the at least one gain threshold is consistent with the number of gain modes included in the target gain mode; the target gain mode characterizes the gain mode corresponding to the power amplification processing.

[0399] In this embodiment of the application, the comparison module 3111 is further configured to: if the peak-to-average power ratio of the second input signal is less than or equal to the target threshold, increase the initial gain threshold according to the first step length to obtain the target gain threshold, such that the target gain threshold is higher than the initial gain threshold; if the peak-to-average power ratio of the second input signal is greater than the target threshold, determine the initial gain threshold as the target gain threshold.

[0400] In this embodiment of the application, the comparison module 3111 is further configured to determine the enable signal sequence based on the first gain mode of the first output signal, the first signal strength parameter and the target gain threshold.

[0401] In this embodiment of the application, the comparison module 3111 is further configured to determine the gain threshold corresponding to the first gain mode from the first gain threshold, the second gain threshold, and the third gain threshold; if the first signal strength parameter is greater than the gain threshold corresponding to the first gain mode, then the enable signal sequence in the enabled state is obtained; if the first signal strength parameter is less than or equal to the gain threshold corresponding to the first gain mode, then the enable signal sequence in the disabled state is obtained; the first gain threshold, the second gain threshold, and the third gain threshold are the target gain threshold; the first gain threshold is greater than the second gain threshold, and the second gain threshold is greater than the third gain threshold.

[0402] In this embodiment of the application, the comparison module 3111 is further configured to determine the gain threshold corresponding to the first gain mode from the fourth gain threshold, the fifth gain threshold, and the sixth gain threshold; if the first signal strength parameter is greater than the gain threshold corresponding to the first gain mode, then the first enable signal in the enabled state is obtained; if the first signal strength parameter is less than or equal to the gain threshold corresponding to the first gain mode, then the first enable signal in the disabled state is obtained; the fourth gain threshold, the fifth gain threshold, and the sixth gain threshold are the first target gain threshold; the fourth gain threshold is greater than the fifth gain threshold, and the fifth gain threshold is greater than the sixth gain threshold.

[0403] In this embodiment of the application, the comparison module 3111 is further configured to determine the gain threshold corresponding to the first gain mode from the seventh gain threshold, the eighth gain threshold, and the ninth gain threshold; if the first signal strength parameter is greater than the gain threshold corresponding to the first gain mode, then the second enable signal in the enabled state is obtained; if the first signal strength parameter is less than or equal to the gain threshold corresponding to the first gain mode, then the second enable signal in the disabled state is obtained; the seventh gain threshold, the eighth gain threshold, and the ninth gain threshold are the second target gain threshold; the seventh gain threshold is greater than the eighth gain threshold, and the eighth gain threshold is greater than the ninth gain threshold.

[0404] In this embodiment of the application, the threshold calculation module 3112 is used to determine an initial detection threshold based on the signal characteristic parameters of the second input signal; determine a target detection threshold based on the initial detection threshold and the power information of the first output signal; and perform peak clipping processing on the second input signal based on the target detection threshold to obtain the first intermediate output signal.

[0405] In this embodiment of the application, the signal characteristic parameters of the second input signal include at least one of the following: the bandwidth of the second input signal, the modulation scheme of the second input signal, and the root mean square of the second input signal.

[0406] In this embodiment of the application, the threshold calculation module 3112 is further configured to determine a first detection threshold based on the bandwidth of the second input signal; determine a second detection threshold based on the modulation scheme of the second input signal; and determine the initial detection threshold based on the first detection threshold and the second detection threshold.

[0407] In this embodiment of the application, the threshold calculation module 3112 is further configured to determine, in the first set of average-to-peak ratios, a first target expected peak-to-average ratio corresponding to the bandwidth of the second input signal; the first set of average-to-peak ratios includes at least one first expected average-to-peak ratio corresponding to a preset bandwidth; and to determine the first detection threshold based on the root mean square of the second input signal, the first target expected peak-to-average ratio, and the target front-end gain; the target front-end gain is the front-end gain of the first input signal before power amplification processing.

[0408] In this embodiment of the application, the threshold calculation module 3112 is further configured to determine, in the second set of average-to-peak ratios, a second target expected peak-to-average ratio corresponding to the bandwidth of the second input signal; the second set of average-to-peak ratios includes at least one second expected peak-to-average ratio corresponding to a preset modulation scheme; and to determine the second detection threshold based on the root mean square of the second input signal, the first target expected peak-to-average ratio, and the target front-end gain; the target front-end gain is the front-end gain of the first input signal before power amplification processing.

[0409] In this embodiment of the application, the threshold calculation module 3112 is further configured to sum the first detection threshold and the second detection threshold to obtain the initial detection threshold.

[0410] In this embodiment of the application, the threshold calculation module 3112 is further configured to determine the power peak value of the first output signal based on the power information of the first output signal; determine a first compensation value based on the power peak value of the first output signal; and determine the target detection threshold based on the initial detection threshold and the first compensation value.

[0411] In this embodiment, the threshold calculation module 3112 is further configured to obtain a second compensation value; the second compensation value is the compensation value when the first input signal is clipped; if the peak power of the first target output signal is greater than or equal to the first power threshold, the second compensation value is reduced according to the second step size to obtain the first compensation value, such that the first compensation value is less than the second compensation value; or, if the peak power of the first target output signal is less than the second power threshold, the second compensation value is increased according to the third step size to obtain the first compensation value, such that the first compensation value is greater than the second compensation value; the first power threshold is greater than the second power threshold.

[0412] In this embodiment of the application, the threshold calculation module 3112 is further configured to determine a first front-end gain of the first output signal based on the first input signal; determine a third compensation value based on the first front-end gain and the target front-end gain; and determine the target detection threshold based on the initial detection threshold, the first compensation value, and the third compensation value.

[0413] In this embodiment of the application, the threshold calculation module 3112 is further configured to determine the front-end gain difference based on the first front-end gain and the target front-end gain; and to determine the third compensation value based on the root mean square of the second input signal, the first target expected peak-to-average power ratio, and the front-end gain difference.

[0414] In this embodiment of the application, the threshold calculation module 3112 is further configured to sum the initial detection threshold, the first compensation value and the third compensation value to obtain the target detection threshold.

[0415] In this embodiment of the application, the chip 3100 is further configured to acquire a baseband signal and determine the baseband signal as the second input signal; or, to perform modulation processing on the acquired baseband signal to obtain a modulation signal and determine the modulation signal as the second input signal.

[0416] This application provides a chip, Figure 18 The following is a schematic diagram of an optional chip structure provided for an embodiment of this application, such as... Figure 18 As shown, the chip 3100 provided in this application embodiment includes a processor 3101.

[0417] In the embodiments of this application, the processor 3101 described above can be at least one of the following: Application-Specific Integrated Circuit (ASIC), Digital Signal Processor (DSP), Digital Signal Processing Device (DSPD), Programmable Logic Device (PLD), Field Programmable Gate Array (FPGA), Central Processing Unit (CPU), Controller, Microcontroller, and Microprocessor. It is understood that for different devices, the electronic device used to implement the above processor function can also be other types, and the embodiments of this application do not specifically limit it.

[0418] In this embodiment of the application, the processor 3101 is configured to determine whether to perform peak clipping and / or pre-distortion processing on the second input signal based at least on the first gain mode and the first signal strength parameter of the first output signal; the first output signal is the signal after the first input signal has undergone peak clipping and / or pre-distortion processing, and the second input signal is a subsequent input signal of the first input signal.

[0419] Furthermore, in the embodiments of this application, the functional modules can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional module.

[0420] If the integrated unit is implemented as a software functional module and is not sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this embodiment, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the method of this embodiment. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0421] It should be understood that the phrases "one embodiment," "an embodiment," or "some embodiments" mentioned throughout the specification mean that a specific feature, structure, or characteristic related to an embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment," "in one embodiment," or "in some embodiments" appearing throughout the specification do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above-described embodiments are merely for descriptive purposes and do not represent the superiority or inferiority of the embodiments. The descriptions of the various embodiments above tend to emphasize the differences between the various embodiments; their similarities or commonalities can be referred to mutually, and for the sake of brevity, they will not be repeated here.

[0422] The modules described above as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules. They may be located in one place or distributed across multiple network units. Some or all of the modules may be selected to achieve the purpose of this embodiment according to actual needs.

[0423] In addition, each functional module in the various embodiments of this application can be integrated into one processing unit, or each module can be a separate unit, or two or more modules can be integrated into one unit; the integrated modules can be implemented in hardware or in the form of hardware plus software functional units.

[0424] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as mobile storage devices, read-only memory (ROM), magnetic disks, or optical disks.

[0425] The methods disclosed in the several method embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments.

[0426] The features disclosed in the several product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.

[0427] The features disclosed in the several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain new method or device embodiments.

[0428] The above description is merely an embodiment of this application, but the protection scope of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the protection scope of this application. Therefore, the protection scope of this application should be determined by the protection scope of the claims.

Claims

1. A signal processing method, characterized by, The method comprises: determining whether to perform peak clipping processing and / or predistortion processing on a second input signal according to a first gain mode and a first signal strength parameter of a first output signal; the first output signal is a signal after the first input signal is subjected to peak clipping processing and / or predistortion processing, and the second input signal is a subsequent input signal of the first input signal; The method further comprises: determining an initial detection threshold according to a signal characteristic parameter of the second input signal; determining a target detection threshold according to the initial detection threshold and power information of the first output signal; performing peak clipping processing on the second input signal based on the target detection threshold to obtain a first intermediate output signal.

2. The method of claim 1, wherein, The method further comprises: generating an enable signal sequence based on the first gain mode and the first signal strength parameter, the enable signal sequence being used to indicate whether to perform peak clipping processing on the second input signal and / or whether to perform predistortion processing on the second input signal.

3. The method of claim 2, wherein, The method further comprises: in a case where the enable signal sequence is in an enabled state, determining to perform peak clipping processing on the second input signal to obtain a first intermediate output signal, and determining to perform predistortion processing on the first intermediate output signal to obtain a second intermediate output signal; performing power amplification processing on the second intermediate output signal to obtain a second output signal.

4. The method of claim 2, wherein, The enable signal sequence comprises a first enable signal and a second enable signal; the method further comprises: in a case where the first enable signal is in an enabled state, determining to perform peak clipping processing on the second input signal to obtain a first intermediate output signal; in a case where the second enable signal is in an enabled state, determining to perform predistortion processing on the first intermediate output signal to obtain a second intermediate output signal; performing power amplification processing on the second intermediate output signal to obtain a second output signal.

5. The method of claim 2, wherein, The enable signal sequence comprises a first enable signal and a second enable signal; the method further comprises: in a case where the first enable signal is in a disabled state, turning off the peak clipping processing on the second input signal; in a case where the second enable signal is in an enabled state, determining to perform predistortion processing on the second input signal to obtain a third intermediate output signal; performing power amplification processing on the third intermediate output signal to obtain a second output signal.

6. The method of claim 2, wherein, The enable signal sequence comprises a first enable signal and a second enable signal; the method further comprises: in a case where the first enable signal is in an enabled state, determining to perform peak clipping processing on the second input signal to obtain a first intermediate output signal; in a case where the second enable signal is in a disabled state, turning off the predistortion processing on the first intermediate output signal; performing power amplification processing on the first intermediate output signal to obtain a second output signal.

7. The method according to any one of claims 1 to 6, characterized in that, The method further comprises: obtaining a signal format of the second input signal; determining a target gain threshold according to the signal format of the second input signal.

8. The method of claim 7, wherein, The method further comprises: determining a signal peak-to-average ratio of the second input signal according to the signal format of the second input signal; determining the target gain threshold according to a signal peak-to-average ratio of the second input signal and an initial gain threshold; the target gain threshold comprises at least one gain threshold; a number of the at least one gain threshold is consistent with a number of gain modes contained in a target gain mode; the target gain mode represents a corresponding gain mode of the power amplification processing.

9. The method of claim 8, wherein, The method further comprises: if the signal peak-to-average ratio of the second input signal is less than or equal to a target threshold, increasing the initial gain threshold according to a first step to obtain the target gain threshold, so that the target gain threshold is higher than the initial gain threshold; if the signal peak-to-average ratio of the second input signal is greater than the target threshold, determining the initial gain threshold as the target gain threshold.

10. The method according to any one of claims 1 to 6, characterized in that, The method further comprises: determining an enabling signal sequence according to a first gain mode of the first output signal, a first signal intensity parameter and the target gain threshold.

11. The method of claim 10, wherein, The method further comprises: determining a gain threshold corresponding to the first gain mode from the first gain threshold, the second gain threshold and the third gain threshold; if the first signal intensity parameter is greater than the gain threshold corresponding to the first gain mode, obtaining the enabling signal sequence in an enabled state; if the first signal intensity parameter is less than or equal to the gain threshold corresponding to the first gain mode, obtaining the enabling signal sequence in a disabled state; the first gain threshold, the second gain threshold and the third gain threshold are the target gain threshold; the first gain threshold is greater than the second gain threshold, and the second gain threshold is greater than the third gain threshold.

12. The method of claim 10, wherein, The enabling signal sequence is a first enabling signal; the target gain threshold is a first target gain threshold; the method further comprises: determining a gain threshold corresponding to the first gain mode from a fourth gain threshold, a fifth gain threshold and a sixth gain threshold; if the first signal intensity parameter is greater than the gain threshold corresponding to the first gain mode, obtaining the first enabling signal in an enabled state; if the first signal intensity parameter is less than or equal to the gain threshold corresponding to the first gain mode, obtaining the first enabling signal in a disabled state; the fourth gain threshold, the fifth gain threshold and the sixth gain threshold are the first target gain threshold; the fourth gain threshold is greater than the fifth gain threshold, and the fifth gain threshold is greater than the sixth gain threshold.

13. The method of claim 10, wherein, The enabling signal sequence is a second enabling signal; the target gain threshold is a second target gain threshold; the method further comprises: determining a gain threshold corresponding to the first gain mode from a seventh gain threshold, an eighth gain threshold and a ninth gain threshold; if the first signal intensity parameter is greater than the gain threshold corresponding to the first gain mode, obtaining the second enabling signal in an enabled state; if the first signal intensity parameter is less than or equal to the gain threshold corresponding to the first gain mode, obtaining the second enabling signal in a disabled state; The seventh gain threshold, the eighth gain threshold and the ninth gain threshold are the second target gain threshold; the seventh gain threshold is greater than the eighth gain threshold, and the eighth gain threshold is greater than the ninth gain threshold.

14. The method of claim 1, wherein, The signal characteristic parameter of the second input signal comprises at least one of a bandwidth of the second input signal, a modulation mode of the second input signal and a signal root mean square of the second input signal.

15. The method of claim 14, wherein, The method further comprises: determining a first detection threshold according to the bandwidth of the second input signal; determining a second detection threshold according to the modulation mode of the second input signal; determining the initial detection threshold according to the first detection threshold and the second detection threshold.

16. The method of claim 15, wherein, The method further comprises: determining a first target expected peak-to-average ratio corresponding to the bandwidth of the second input signal in a first peak-to-average ratio set; the first peak-to-average ratio set comprises at least one first expected peak-to-average ratio corresponding to a preset bandwidth; determining the first detection threshold according to the signal root mean square of the second input signal, the first target expected peak-to-average ratio and a target front-end gain; the target front-end gain is a preset front-end gain before the first input signal is processed by power amplification.

17. The method of claim 16, wherein, The method further comprises: determining a second target expected peak-to-average ratio corresponding to the bandwidth of the second input signal in a second peak-to-average ratio set; the second peak-to-average ratio set comprises at least one second expected peak-to-average ratio corresponding to a preset modulation mode; determining the second detection threshold according to the signal root mean square of the second input signal, the first target expected peak-to-average ratio and a target front-end gain; the target front-end gain is a preset front-end gain before the first input signal is processed by power amplification.

18. The method according to any one of claims 15-17, characterized by, The method further comprises: summing the first detection threshold and the second detection threshold to obtain the initial detection threshold.

19. The method of claim 1, wherein, The method further comprises: determining a power peak value of the first output signal according to power information of the first output signal; determining a first compensation value according to the power peak value of the first output signal; determining the target detection threshold according to the initial detection threshold and the first compensation value.

20. The method of claim 19, wherein, The method further comprises: obtaining a second compensation value; the second compensation value is a compensation value when the first input signal is processed by clipping; if the power peak value of the first output signal is greater than or equal to a first power threshold, reducing the second compensation value according to a second step length to obtain the first compensation value, so that the first compensation value is less than the second compensation value; or if the power peak value of the first output signal is less than a second power threshold, increasing the second compensation value according to a third step length to obtain the first compensation value, so that the first compensation value is greater than the second compensation value; the first power threshold is greater than the second power threshold.

21. The method of claim 19 or 20, wherein, The method further comprises: determining a first front-end gain of the first output signal according to the first input signal; determining a third compensation value according to the first front-end gain and a target front-end gain; The target detection threshold is determined according to the initial detection threshold, the first compensation value and the third compensation value.

22. The method of claim 21, wherein, The method further comprises: A front-end gain difference value is determined according to the first front-end gain and a target front-end gain; The third compensation value is determined according to a signal root mean square of the second input signal, a first target peak-to-average ratio and the front-end gain difference value; The initial detection threshold, the first compensation value and the third compensation value are summed to obtain the target detection threshold.

23. The method of claim 1, wherein, The method further comprises: A second output signal is transmitted to a target base station through an antenna.

24. The method of claim 1, wherein, The method further comprises: A baseband signal is acquired, and the baseband signal is determined as the second input signal; or The acquired baseband signal is modulated to obtain a modulated signal, and the modulated signal is determined as the second input signal.

25. A chip, characterized by The chip comprises a processor configured to perform: Whether to perform peak clipping processing and / or pre-distortion processing on a second input signal is determined according to at least a first gain mode and a first signal intensity parameter of a first output signal; the first output signal is a signal after the first input signal is subjected to peak clipping processing and / or pre-distortion processing, and the second input signal is a subsequent input signal of the first input signal; An initial detection threshold is determined according to a signal characteristic parameter of the second input signal; A target detection threshold is determined according to the initial detection threshold and power information of the first output signal; Peak clipping processing is performed on the second input signal based on the target detection threshold to obtain a first intermediate output signal.

26. A chip, characterized by The chip comprises a control module, a CFR module and a DPD module; the control module comprises a comparison module and a threshold calculation module; wherein Whether to perform peak clipping processing and / or pre-distortion processing on a second input signal is determined according to at least a first gain mode and a first signal intensity parameter of a first output signal by the comparison module; the first output signal is a signal after the first input signal is subjected to peak clipping processing and / or pre-distortion processing, and the second input signal is a subsequent input signal of the first input signal; An initial detection threshold is determined according to a signal characteristic parameter of the second input signal by the threshold calculation module; a target detection threshold is determined according to the initial detection threshold and power information of the first output signal; Peak clipping processing is performed on the second input signal based on the target detection threshold by the CFR module to obtain a first intermediate output signal when an enable signal sequence is in an enabled state; Power amplification processing is performed on the first intermediate output signal by the DPD module to obtain a second output signal when the enable signal sequence is in the enabled state.

27. A transmitter, comprising: The transmitter comprises a chip, a PA and an antenna; wherein The chip is configured to determine whether to perform peak clipping processing and / or predistortion processing on a second input signal according to a first gain mode and a first signal strength parameter of a first output signal; the first output signal is a signal after the first input signal is subjected to the peak clipping processing and / or the predistortion processing; the second input signal is a subsequent input signal of the first input signal; determine an initial detection threshold according to a signal characteristic parameter of the second input signal; determine a target detection threshold according to the initial detection threshold and power information of the first output signal; perform peak clipping processing on the second input signal based on the target detection threshold to obtain a first intermediate output signal. The PA is configured to perform power amplification processing on a second intermediate output signal to obtain a second output signal; wherein the second intermediate output signal is obtained by performing predistortion processing on the first intermediate output signal when a second enable signal is in an enabled state. The antenna is configured to transmit the second output signal to a target base station through the antenna.

Citation Information

Patent Citations

  • Monitoring systems and methods for radios implemented with digital predistortion

    US20200169334A1