A Gallium Nitride power transistor drive circuit

Abstract

The present application relates to a gallium nitride power transistor drive circuit, including a drive module configured to charge or discharge the control electrode of the gallium nitride power transistor and control the gate voltage level of the gallium nitride power transistor (Q1); wherein the drive module includes a first drive transistor (Q2), whose control electrode is configured to receive a fixed reference voltage, whose first pole is configured to receive a periodic drive signal, and whose second pole is coupled to the control electrode of the gallium nitride power transistor, and wherein the first drive transistor is a gallium nitride transistor; wherein the high-level value of the drive signal is greater than or equal to the target operating voltage of the gallium nitride power transistor; and the difference between the maximum withstand voltage of the control electrode of the first drive transistor and its threshold voltage is greater than or equal to the target operating voltage of the gallium nitride power transistor.

Description

Technical Field

[0001] The present invention relates to a driving circuit, and particularly to a gallium nitride power transistor driving circuit. Background Art

[0002] Gallium nitride (GaN) power transistors, as a new class of power switching devices, offer excellent high-frequency switching speeds. This is due to their gate charge × on-resistance (Qg·Ron) characteristics being much lower than those of traditional silicon (Si) devices. Compared with silicon (Si) devices that typically have a switching frequency below 200 kHz, gallium nitride (GaN) power transistors can operate at frequencies above 10 MHz.

[0003] However, the high-frequency variations and small gate voltage range of gallium nitride (GaN) power transistors pose new challenges to the circuits driving them. For traditional silicon (Si) power device drivers, the gate voltage driving range is mostly designed to be 0 - 20 V, providing a voltage higher than the range that the gate voltage of gallium nitride (GaN) power transistors can withstand (0 - 7 V). Moreover, under high-speed and high-frequency operating conditions, various parasitic parameters can cause instability of the driving signal.

[0004] The prior art usually uses two approaches to solve the above problems: The first approach is to connect a gallium nitride (GaN) power transistor in series with a silicon (Si) low-voltage power transistor, and the driving circuit directly drives the silicon (Si) low-voltage power transistor to achieve switching. This approach allows the direct use of traditional silicon (Si) drivers to control the switching of this series circuit; the other approach is an integrated circuit based on silicon (Si) material or gallium nitride (GaN) material itself to provide a driving signal near the gallium nitride (GaN) power transistor.

[0005] These two approaches each have their limitations: The first approach, due to the introduction of a silicon (Si) transistor in the main power link, results in the overall operating frequency and on-resistance being worse than those of pure gallium nitride (GaN) transistors; the implementation of the second approach is usually relatively complex and costly. Especially for an integrated circuit driver based on gallium nitride (GaN) material, it is equivalent to introducing an additional set of driving circuits in the control link, coexisting with traditional silicon (Si) drivers, which is a waste in terms of cost and static power consumption.

[0006] The common driving method of the above second approach is based on the structure of a totem-pole circuit and a voltage source. Figure 1 Shown is the circuit diagram of an existing gallium nitride power transistor driving circuit. As Figure 1 shown, where Q0 is the power transistor to be driven, Q HS is the upper transistor of the totem-pole circuit, Q LSis the lower transistor of the totem-pole circuit, and SGND and PGND are the signal ground and the power ground respectively. Specifically, a stable voltage source DC is provided by the circuit, and a pair of switching transistors Q HS and Q LS in the totem-pole circuit are used. Under the control of the gate voltage DRV1 of the two, the connection between the voltage source DC and the gate of Q0 is alternately turned on and off, achieving the effect of turning on and off Q0.

[0007] When this structure is applied to drive a gallium nitride (GaN) power transistor, there is a major drawback: the stable voltage source required by the gallium nitride (GaN) power transistor is easily interfered by large signals on the power link when the circuit operates at high frequencies. If the gate voltage V HS transmitted through Q G0 exceeds the tolerance voltage of the gate of the gallium nitride (GaN) power transistor, it is easy to cause damage to the gallium nitride (GaN) power transistor. If the V HS transmitted through Q G0 is lower than the voltage required for the operation of the gallium nitride (GaN) power transistor, the gallium nitride (GaN) power transistor cannot work properly. To solve this problem, a dedicated circuit is usually required to assist Figure 1 to keep the voltage at the output end of the voltage source stable.

[0008] To solve the above problems, a drive circuit is needed that can still stably provide the required operating voltage for the gallium nitride (GaN) power transistor when operating at high frequencies. Summary of the Invention

[0009] In view of the technical problems existing in the prior art, the present application proposes a drive circuit for a gallium nitride power transistor, including a drive module configured to charge or discharge the control electrode of the gallium nitride power transistor and control the gate voltage level of the gallium nitride power transistor (Q1); wherein the drive module includes a first drive transistor (Q2), whose control electrode is configured to receive a fixed reference voltage, whose first pole is configured to receive a periodic drive signal, and whose second pole is coupled to the control electrode of the gallium nitride power transistor, and wherein the first drive transistor is a gallium nitride transistor; wherein the high level value of the drive signal is greater than or equal to the target operating voltage of the gallium nitride power transistor; and the difference between the maximum tolerance voltage of the control electrode of the first drive transistor and its threshold voltage is greater than or equal to the target operating voltage of the gallium nitride power transistor.

[0010] Particularly, for the drive circuit described above, the drive module further includes a first resistor (R1) connected in series to the first pole of the first drive transistor.

[0011] Specifically, for the driving circuit, the driving module further includes an RCD network connected in series to the first pole of the first driving transistor, where the RCD network includes three parallel branches configured to receive the periodic driving signal. The first branch includes a first diode (D3) and a second resistor (R3) connected in series, where the anode of the first diode (D3) is coupled to one end of the second resistor (R3), and the cathode receives the periodic driving signal; the second branch includes a third resistor (R2); the third branch includes a first capacitor (C2).

[0012] Specifically, for the driving circuit, the driving module further includes a second driving transistor (Q3), whose type is complementary to that of the first driving transistor and is a depletion-type transistor. Its second pole is coupled to the second pole of the first driving transistor, its first pole is grounded, and its control pole is configured to receive the periodic driving signal; the difference between the high level of the driving signal and the threshold voltage of the second driving transistor is greater than the difference between the reference voltage and the threshold voltage of the first driving transistor.

[0013] Specifically, for the driving circuit, the driving module further includes a third driving transistor (Q4), whose type is complementary to that of the first driving transistor and is an enhancement-type transistor; its second pole is coupled to the second pole of the first driving transistor, its first pole is grounded, its control pole is configured to receive the periodic driving signal, and its substrate is configured to receive the reference voltage; the difference between the high level of the driving signal and the effective threshold voltage of the third driving transistor is greater than the difference between the reference signal and the threshold voltage of the first driving transistor.

[0014] Specifically, the driving circuit further includes a pulse signal generation module configured to provide the periodic driving signal to the driving module.

[0015] Specifically, the driving circuit further includes a reference voltage generation module. The reference voltage generation module includes a second capacitor (C1) and a second diode (D2) connected in parallel between the control pole of the first driving transistor (Q2) and the signal ground. The anode of the second diode (D2) is coupled to the signal ground, and the cathode is coupled to the control pole of the first driving transistor (Q2). The reference voltage generation module is configured to provide the fixed reference voltage to the driving module.

[0016] This application also proposes a method for driving a gallium nitride power transistor, including charging and / or discharging the gate of the gallium nitride power transistor using an equivalent controllable current source, and determining the gate voltage level of the gallium nitride power transistor using a fixed reference voltage independent of the equivalent controllable current source.

[0017] The present application also provides an electronic device for driving a gallium nitride power transistor, including the driving circuit and the gallium nitride power transistor as described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Next, preferred embodiments of the present invention will be further described in detail with reference to the accompanying drawings, where:

[0019] Figure 1 is a circuit diagram of an existing driving circuit for a gallium nitride power transistor;

[0020] FIG. 2(a) is a schematic structural diagram of a gallium nitride power transistor driving circuit charging the gate of the power transistor according to an embodiment of the present application;

[0021] FIG. 2(b) is a schematic structural diagram of a gallium nitride power transistor driving circuit discharging the gate of the power transistor according to an embodiment of the present application;

[0022] Figure 3 is a modular structure diagram of a gallium nitride power transistor driving circuit according to an embodiment of the present application;

[0023] Figure 4 is a circuit diagram of a gallium nitride power transistor driving circuit according to an embodiment of the present application;

[0024] Figure 5 is a circuit diagram of a gallium nitride power transistor driving circuit according to an embodiment of the present application;

[0025] FIG. 6(a) is a circuit diagram of a gallium nitride power transistor driving circuit according to an embodiment of the present application;

[0026] FIG. 6(b) is a schematic diagram of the gate voltage and charging current timing during the turn-on process of the gallium nitride power transistor in FIG. 6(a);

[0027] And,

[0028] Figure 7 is a circuit diagram of a gallium nitride power transistor driving circuit according to an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0029] The following will describe in detail the exemplary embodiments of the present application with reference to the accompanying drawings. It should be noted that unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions, and numerical values set forth in these embodiments do not limit the scope of the present application.

[0030] The following description of at least one exemplary embodiment is actually merely illustrative and not intended as any limitation on the present application or its application or use.

[0031] Techniques, methods, and equipment known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered as part of the specification.

[0032] In all examples shown and discussed herein, any specific values should be construed as merely exemplary and not as a limitation. Thus, other examples of the exemplary embodiments may have different values.

[0033] It should be noted that like reference numerals and letters denote like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures. First, some terms are explained: The transistor in this application can be a transistor of any structure, such as a bipolar junction transistor (BJT) or a field effect transistor (FET). When the transistor is a bipolar junction transistor, its control electrode refers to the base of the bipolar junction transistor, the first electrode can be the collector or emitter of the bipolar junction transistor, and the corresponding second electrode can be the emitter or collector of the bipolar junction transistor. In actual application, the "emitter" and "collector" can be interchanged according to the signal flow direction; when the transistor is a field effect transistor, its control electrode refers to the gate of the field effect transistor, the first electrode can be the drain or source of the field effect transistor, and the corresponding second electrode can be the source or drain of the field effect transistor. In actual application, the "source" and "drain" can be interchanged according to the signal flow direction.

[0034] In this application, the gallium nitride (GaN) power transistor can be, for example, a HEMT, and the transistor in the drive circuit can be a MOS or bipolar junction transistor.

[0035] In order to obtain a drive circuit that can stably provide the required operating voltage for a gallium nitride (GaN) power transistor during high-frequency operation, this application proposes a drive circuit based on a current source structure.

[0036] Figure 2(a) shows the schematic structural diagram of a gallium nitride (GaN) power transistor drive circuit charging the gate of the power transistor according to an embodiment of this application; Figure 2(b) shows the schematic structural diagram of a gallium nitride (GaN) power transistor drive circuit discharging the gate of the power transistor according to an embodiment of this application. Where Q1 is the gallium nitride (GaN) power transistor to be driven, and its gate voltage is V G , and its target operating voltage is V GTarget ; V i is the control voltage of the equivalent current source; V busis the bus voltage of the power link; DRV2 is a drive signal, which can come from a conventional silicon (Si) transistor driver. According to one embodiment, the low level of DRV2 can be 0V, and the high level can be 8V to 15V. In different embodiments, the high level of DRV2 can be higher, but must not be lower than the target operating voltage V of Q1 GTarget . The equivalent current source control voltage V i can be configured to determine the voltage level of the gate of Q1. D1 is a clamping diode, configured to maintain the stability of the equivalent current source control voltage V i . SGND and PGND are the signal ground and the power ground respectively.

[0037] As Figure 2(a) and 2(b) shown, in the above structure, the charging and / or discharging of the gate of the driven gallium nitride (GaN) power transistor Q1 can be achieved by an equivalent controllable current source. During the process of driving Q1 to work, since the equivalent current source only determines whether there is current to charge or discharge the gate of Q1, but does not responsible for determining the magnitude of the gate voltage V G of Q1. Therefore, in the circuit structure involved in this application, it is not necessary to clamp and control the high level voltage of the drive signal DRV2 not to exceed the gate withstand voltage V m1 of Q1, but to clamp and control the equivalent current source control voltage V i . When V i is lower than the turn-on voltage of the variable current source, the charging current stops and the charging of Q1 is completed. Thus, whether it is the noise in the drive signal DRV2 or the crosstalk of V G caused by the change of the power link load voltage, it has little impact on the charging of the gate of Q1.

[0038] Similarly, when Q1 discharges, it can also be regarded as being achieved through an equivalent controllable current source.

[0039] Figure 3 shown is the modular structure diagram of a gallium nitride (GaN) power transistor drive circuit according to an embodiment of the present application. The drive circuit consists of four modules, including: a pulse signal generation module 301, a reference voltage generation module 302, a drive module 303, and a power transistor module 304.

[0040] According to one embodiment, the pulse signal generation module 301 can include a conventional silicon (Si) MOS driver (not shown), configured to provide the drive signal DRV2 to the drive module 303.

[0041] According to one embodiment, the reference voltage generation module 302 can be configured to provide the reference voltage V gate .

[0042] According to one embodiment, the driving module 303 includes a core driving link, and SGND is the signal ground.

[0043] According to one embodiment, the power transistor module 304 may include a gallium nitride (GaN) power transistor to be driven and related power links. PGND is the power ground, and V bus is the bus voltage of the power link.

[0044] As Figure 4 shown is a circuit diagram of a gallium nitride (GaN) power transistor driving circuit according to an embodiment of the present application, which may include a pulse signal generation module 401, a reference voltage generation module 402, a driving module 403, and a power transistor module 404.

[0045] According to one embodiment, the reference voltage generation module 402 may include a capacitor C1 and a diode D2 connected in parallel between the gate of the driving transistor Q2 in the driving module 403 and the signal ground SGND. The anode of the diode D2 may be coupled to the signal ground SGND, and the cathode may be coupled to the gate of Q2. The purpose of setting this module is to provide a stable reference voltage V gate ; optionally, the reference voltage generation module may also include a DC voltage source, or a reference voltage chip, or include a low-dropout regulator (LDO) chip to provide a stable reference voltage V gate . According to other embodiments, the gate of Q2 may also be directly grounded, and a corresponding Q2 with a negative threshold voltage may be selected to implement V GTarget .

[0046] According to one embodiment, the driving module 403 may include an N-type gallium nitride (GaN) signal transistor Q2 as the driving transistor, and optionally, may include a current-limiting resistor R1 connected in series between the output terminal of the pulse signal generation module 401 and the drain of the driving transistor Q2.

[0047] According to one embodiment, the power transistor module 404 may include at least one gallium nitride (GaN) power transistor Q1 to be driven. Q1 is a gallium nitride (GaN) power transistor capable of carrying large current and high power. Generally speaking, the requirement for the current-carrying capacity of the driving transistor Q2 is lower than that of Q1.

[0048] As Figure 4 shown, the gate of Q2 is coupled to the output terminal of the reference voltage generation module to receive the reference voltage V gate , the drain of Q2 may be configured in series with R1 to receive the driving signal DRV2, and the source of Q2 may be coupled to the gate of Q1 to be configured to provide the gate voltage V G .

[0049] According to the characteristics of Q1, when V G is 0V, Q1 is turned off; the threshold voltage V TQ1 of Q1 can be between 5V and 6V. When V G is greater than or equal to the threshold voltage V TQ1 of Q1, Q1 is turned on.

[0050] According to one embodiment, the driving transistor Q2 adopted in the present application has a relatively low or negative threshold voltage, for example, between -6V and 1.5V. At the same time, Q2 must satisfy that the difference between its gate withstand voltage V m2 and the threshold voltage V TQ2 is not less than the target operating voltage V GTarget of Q1,

[0051] that is: V m2 - V TQ2 ≥V GTarget (1)

[0052] Figure 4 The working principle of the driving circuit shown is as follows (taking the threshold voltage V TQ1 of Q1 as 6V and the threshold voltage V TQ2 of Q2 as 1V as an example):

[0053] - First, the reference voltage generation module 402 generates a relatively stable reference voltage V gate , for example, it can be 7V, so that Q2 is always in the conducting state.

[0054] - Therefore, when DRV2 is at a low level (i.e., V DRV2低 = 0), although Q2 is in the conducting state, the current I DRV2 = 0, so V G = 0, and Q1 is turned off.

[0055] - When DRV2 jumps to a high level, for example, V DRV2高 is between 8V and 15V (in actual applications, the high level of DRV2 can be higher, but it must not be lower than the target operating voltage V GTarget of Q1). At this time, since V gate is greater than V TQ2 (for example, 1V), Q2 is still in the conducting state. According to the formula

[0056] V G ≤V gate - V TQ2 (2)

[0057] The gate voltage V G of Q1 can rise to around 6V, which is higher than V TQ1 , so Q1 is turned on.

[0058] - When DRV2 jumps back to a low level (i.e., V DRV2低 = 0), the gate of Q1 discharges through the reverse conduction of Q2 until V G drops to 0V, causing the transistor Q1 to turn off.

[0059] According to one embodiment, R1 in the driving module 403 is related to the charging speed of the driving circuit, and different resistance values of R1 can be replaced according to the actual application's need for the charging speed. Optionally, the driving module 403 may not include R1.

[0060] If the model of Q1 is determined, then its target operating voltage V GTarget is determined, and V gate is known. Then, the driving transistors Q2 need to be selected according to these two voltages. Q2 should have a threshold voltage that can satisfy formula (2).

[0061] According to one embodiment, if the model of Q1 is determined, then its target operating voltage V GTarget is determined. According to formula (2) and the characteristics of V G , the threshold voltage V TQ2 equal to -V GTarget of the driving transistor Q2 is selected. At this time, the reference voltage module 402 can be directly connected to the signal ground SGND.

[0062] The above circuit provides a stable reference voltage for the gate of Q2. No matter how the high-level voltage of the driving signal DRV2 coupled to the drain of Q2 changes, the gate of the gallium nitride (GaN) power transistor Q1 can obtain a stable driving voltage.

[0063] In the existing driving circuit, when Q0 is turned on, a stable driving signal needs to be maintained at the drain of the driving transistor. This is because when the circuit operates at high frequencies, the driving signal is easily interfered by the large signals on the power link. This requires constructing a very complex circuit structure to achieve this goal.

[0064] In the driving scheme of the present application, the reference voltage generation module required to maintain the gate voltage of the driving transistor at a stable level can be very simple. At the same time, the requirements for the pulse signal generation module that generates the driving signal DRV2 are not very high. The high level of the driving signal DRV2 it generates does not need to be as stable as required by the existing driving circuit because the value of the gate voltage V G of the gallium nitride (GaN) power transistor Q1 is independent of DRV2. The driving circuit structure proposed in the present application is simpler, easier to implement, and has lower costs.

[0065] Figure 5The figure shows a circuit diagram of a gallium nitride (GaN) power transistor drive circuit according to an embodiment of the present application. Compared with Figure 4 the circuit shown, Figure 5 the circuit shown includes a drive module 503, in which R1 in 503 is replaced by a more complex diode-capacitor-resistor (RCD) network.

[0066] According to an embodiment, this RCD network may include three branches connected in parallel between the output terminal of the pulse signal generation module 501 and the drain of the drive transistor Q2. The first branch may include a diode D3 and a resistor R3 connected in series, where the anode of the diode D3 is coupled to one end of R3 and the cathode is coupled to the output terminal of the pulse signal generation module 501. According to an embodiment, the second branch may include a resistor R2. According to an embodiment, the third branch may include a capacitor C2.

[0067] Compared with Figure 4 R1 in the drive module 403 shown, the above RCD network can more accurately adjust the charging and discharging speed of the drive circuit and adjust the dynamic waveform of V G during the discharging process according to the specific requirements of the drive circuit.

[0068] Optionally, Figure 5 the RCD network shown can also be coupled between the source of the drive transistor Q2 and the gate of the gallium nitride (GaN) power transistor Q1 (not shown).

[0069] According to different embodiments, the RCD network may also have other known structures.

[0070] Figure 6(a) shows a circuit diagram of a gallium nitride (GaN) power transistor drive circuit according to another embodiment of the present application. Figure 6(b) shows a timing diagram of the gate voltage V G and the charging current I DRV2 during the turn-on process of the gallium nitride (GaN) power transistor shown in Figure 6(a).

[0071] The gallium nitride (GaN) power transistor drive circuit shown in Figure 6(a) similarly includes a pulse signal generation module 601, a reference voltage generation module 602, a drive module 603, and a power transistor module 604.

[0072] Compared with Figure 4 the drive module 403 in the circuit shown, the drive module 603 adds a drive transistor Q3 connected in series with the drive transistor Q2. Q3 is a depletion-mode P-type transistor with a threshold voltage of V TQ3Optionally, the driving transistor Q3 can be made of silicon (Si), germanium (Ge), or other materials. The gate of Q3 is coupled to the output terminal of the driving voltage generation module 601 to receive the driving voltage DRV2. The source of Q3 is coupled to the source of Q2 and the gate of Q1, configured as a discharge branch for the gate of Q1, and the drain of Q3 is connected to the signal ground SGND.

[0073] The operating principle of the driving circuit shown in Fig. 6(a) is as follows (here, still taking the threshold voltage V TQ1 of Q1 as 6V and the threshold voltage V TQ2 of Q2 as 1V as an example):

[0074] - First, the reference voltage generation module 602 generates a relatively stable reference voltage V gate , for example, it can be 7V, making Q2 in a conducting state.

[0075] - When DRV2 is at a low level (i.e., V DRV2低 = 0), Q3 conducts, but the current I DRV2 = 0, so V G = 0, and Q1 turns off.

[0076] - When DRV2 jumps to a high level, for example, between 8V and 15V (in actual applications, the high level of DRV2 can be higher, but it must not be lower than the target operating voltage V GTarget of Q1), Q3 becomes in an off state, and Q2 is still in a conducting state. According to the formula V G ≤ V gate - V TQ2 (2), the gate voltage V G of Q1 can rise to around 6V, so Q1 is turned on. That is, in actual use, when Q1 is charging, Q2 conducts and Q3 disconnects in the driving circuit. As shown in Fig. 6(b), during the charging process of Q1, as long as the forward current I DRV2 (the current flowing from the pulse signal generation module to the driving module) of Q2 is not zero, it will continuously charge the gate of Q1. Although I DRV2 is decreasing, due to the properties of Q1, after the charging reaches a certain level, its gate voltage will remain flat for a period of time and then continue to rise.

[0077] - When DRV2 jumps back to a low level (i.e., V DRV2低 = 0), both Q2 and Q3 are in a conducting state, and the gate of Q1 can be discharged through two paths of Q2 and Q3. According to one embodiment, by adjusting the impedance of the Q3 branch, the discharge speed of the gate of Q1 can be adjusted. According to one embodiment, the Q3 branch can provide a faster discharge speed than the Q2 branch.

[0078] According to another embodiment, the driving transistor Q3 can be a depletion-type P-type transistor, that is, the threshold voltage V of Q3 TQ3 > 0, so as to ensure that Q3 is in the conducting state when DRV2 is at a low level. At the same time, it is also necessary to ensure that when DRV2 is at a high level:

[0079] V DRV2高 -V TQ3 > V gate –V TQ2 (3)

[0080] In this way, it can be ensured that when DRV2 is at a high level, Q3 is in the off state, that is:

[0081] 0 < V TQ3 < V DRV2高 -V gate +V TQ2 (4)

[0082] According to an embodiment, the on / off of the driving transistor Q3 can also be controlled by another external signal.

[0083] As Figure 7 shown is the circuit diagram of a gallium nitride (GaN) power transistor driving circuit according to an embodiment of the present application. It may include a pulse signal generation module 701, a reference voltage generation module 702, a driving module 703, and a power transistor module 704. Compared with the circuit shown in FIG. 6(a), the driving module 703 replaces the driving transistor Q3 with a driving transistor Q4. Q4 can be an enhancement-type P-type transistor, and its threshold voltage is V TQ4 , and its effective threshold voltage is V TQ4_Eff . Optionally, the transistor can be made of silicon (Si), germanium (Ge), or other materials. The substrate of Q4 is coupled to the output terminal of the reference voltage generation module 702 and is configured to receive the reference voltage V gate , the gate of Q4 is coupled to the output terminal of the pulse signal generation module 701 and is configured to receive the driving signal DRV2, the source of Q4 is coupled to the gate of Q1, and is configured as a discharge branch of the gate of Q1 when conducting, and the drain of Q4 is connected to the signal ground SGND.

[0084] According to another embodiment, Q4 can be an enhancement-type P-type transistor, and its threshold voltage V TQ4 is negative, and its effective threshold voltage V TQ4_Eff is:

[0085]

[0086] where is the substrate coefficient, and φs is the surface potential.

[0087] Figure 7The working principle of the shown drive circuit is as follows (taking the reference voltage V gate as 6V as an example):

[0088] - First, the reference voltage generation module 702 generates a relatively stable reference voltage V gate , making Q2 in the conducting state.

[0089] - When DRV2 is at a low level (i.e., V DRV2低 = 0), Q4 conducts, but the current I DRV2 = 0, so V G = 0, and Q1 turns off.

[0090] - When DRV2 jumps to a high level (for example, V DRV2高 is 12V. In actual applications, the high level of DRV2 can be higher, but it must not be lower than the target operating voltage V GTarget of Q1), according to the formula V G ≤=V gate -V TQ2 (2) and formula (5), V G -V gate ≤-V TQ2 is small. At this time, V TQ4_Eff is close to V TQ4 and is negative. Q4 changes to the off state, and Q2 remains in the conducting state. According to formula (2), the gate voltage V G of Q1 can rise to near V GTarget . Therefore, Q1 is turned on. That is, in actual use, when Q1 is charging, Q2 in the drive circuit conducts and Q4 is disconnected.

[0091] - When DRV2 jumps back to a low level (i.e., V DRV2低 = 0), according to formula (2) and formula (5), V G -V gate ≤-6V, V TQ4_Eff is positive, Q4 conducts. At this time, both Q2 and Q4 are in the conducting state, and the gate of Q1 can discharge through two paths of Q2 and Q4.

[0092] Figure 7 The shown drive circuit allows the use of an enhancement-mode P-type transistor with a threshold voltage V TQ4 being negative, and such a device is easier to obtain and has a lower cost than the depletion-mode P-type transistor Q3 in the circuit shown in Fig. 6(a).

[0093] The present application also provides a method for driving a gallium nitride (GaN) power transistor, including charging and / or discharging the gate of the gallium nitride (GaN) power transistor by using an equivalent controllable current source, and determining the gate voltage level of the gallium nitride (GaN) power transistor by using a fixed reference voltage independent of the equivalent controllable current source.

[0094] The present application also provides an electronic device, including the gallium nitride (GaN) power transistor driving circuit and the gallium nitride (GaN) power transistor as described above.

[0095] The above embodiments are only for illustrating the present invention, rather than limiting the present invention. Those of ordinary skill in the relevant technical field can also make various changes and modifications without departing from the scope of the present invention. Therefore, all equivalent technical solutions should also fall within the scope of the disclosure of the present invention.

Claims

1. A gallium nitride power transistor drive circuit, comprising a drive module configured to charge or discharge a control electrode of the gallium nitride power transistor and control a gate voltage level of the gallium nitride power transistor (Q1); wherein the drive module includes a first drive transistor (Q2), a control electrode of which is configured to receive a fixed reference voltage, a first pole of which is configured to receive a periodic drive signal, and a second pole of which is coupled to the control electrode of the gallium nitride power transistor, and wherein the first drive transistor is a gallium nitride transistor; wherein a high level value of the drive signal is greater than or equal to a target operating voltage of the gallium nitride power transistor; and a difference between a maximum withstand voltage of the control electrode of the first drive transistor and its threshold voltage is greater than or equal to the target operating voltage of the gallium nitride power transistor.

2. The drive circuit according to claim 1, wherein the drive module further includes a first resistor (R1) connected in series to the first pole of the first drive transistor.

3. The drive circuit according to claim 1, wherein the drive module further includes an RCD network connected in series to the first pole of the first drive transistor, and wherein the RCD network includes three parallel branches configured to receive the periodic drive signal, wherein a first branch includes a first diode (D3) and a second resistor (R3) connected in series, an anode of the first diode (D3) is coupled to one end of the second resistor (R3), and a cathode receives the periodic drive signal; a second branch includes a third resistor (R2); and a third branch includes a first capacitor (C2).

4. The drive circuit according to claim 1, wherein the drive module further includes a second drive transistor (Q3), a type of which is complementary to a type of the first drive transistor and is a depletion-type transistor, a second pole of which is coupled to the second pole of the first drive transistor, a first pole of which is grounded, and a control electrode of which is configured to receive the periodic drive signal; wherein a difference between a high level of the drive signal and a threshold voltage of the second drive transistor is greater than a difference between the reference voltage and the threshold voltage of the first drive transistor.

5. The drive circuit according to claim 1, the drive module further includes a third drive transistor (Q4), a type of which is complementary to a type of the first drive transistor and is an enhancement-type transistor; Its second pole is coupled to the second pole of the first driving transistor, its first pole is grounded, its control pole is configured to receive the periodic driving signal, and its substrate is configured to receive the reference voltage; Wherein the difference between the high level of the driving signal and the effective threshold voltage of the third driving transistor is greater than the difference between the reference voltage and the threshold voltage of the first driving transistor.

6. The drive circuit according to claim 1, further including a pulse signal generation module configured to provide the periodic drive signal to the drive module.

7. The drive circuit according to claim 1 further includes a reference voltage generation module. The reference voltage generation module includes a second capacitor (C1) and a second diode (D2) connected in parallel between the control electrode of the first drive transistor (Q2) and the signal ground. The anode of the second diode (D2) is coupled to the signal ground, and the cathode is coupled to the control electrode of the first drive transistor (Q2). The reference voltage generation module is configured to provide the fixed reference voltage to the drive module.

8. A method for driving a gallium nitride power transistor, which is executed by the gallium nitride power transistor drive circuit according to any one of claims 1-7, includes charging and / or discharging the gate of the gallium nitride power transistor using an equivalent controllable current source, and determining the gate voltage level of the gallium nitride power transistor using a fixed reference voltage independent of the equivalent controllable current source.

9. An electronic device for driving a gallium nitride power transistor includes the drive circuit according to any one of claims 1-7 and a gallium nitride power transistor.

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