A processing method of a circuit board and a circuit board
By patterning and laminating the copper foil of the circuit board to form an insulating layer, combining dry film to control the thickness and etching of the conductive metal layer, the problem of copper extreme difference on the electroplating layer is solved, and high-precision processing and signal transmission control of the circuit board are realized.
Patent Information
- Application Number
- CN202111308437.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-11-05
- Publication Date
- 2025-08-01
- Estimated Expiration
- 2041-11-05
AI Technical Summary
The processing method of circuit boards in the prior art leads to excessive copper difference on the electroplating layer, affecting the accuracy of the electroplating layer production, and it is difficult to meet the control requirements of high-speed transmission line impedance and signal transmission loss.
By patterning each copper foil and laminating the patterned copper foil to form an insulating layer, after forming the core plate, a conductive metal layer is formed on the core plate and the hole walls of the through holes, and a set line layer is formed by controlling the thickness of the conductive metal layer through the dry film and etching to form a set line layer, avoiding the use of addition and subtraction methods.
High-precision control of electroplating lines is realized, the difference in surface copper uniformity is reduced, and the control needs of impedance and signal transmission losses of high-speed transmission lines are met, and the processing process is simplified and costs are reduced.
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Figure CN116095986B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of circuit boards, and particularly to a processing method and a circuit board for a circuit board. Background Art
[0002] As an important electronic connector, printed circuit boards are used in almost all electronic products and are regarded as the "mother of electronic system products". With the wide application of 5G communication, the requirements for data transmission capacity and quality are getting higher and higher, and the impedance control and loss control of the plating layer for multi-layer printed circuit boards are becoming more and more stringent. Among them, the production of conventional multi-layer printed circuit boards usually includes processes such as multi-layer board lamination, through-hole drilling of multi-layer boards, hole metallization, and production of outer-layer circuits of multi-layer boards.
[0003] However, in the process of manufacturing conventional multi-layer boards, in order to metallize the hole walls, it is usually necessary to electroplate hole copper and surface copper, and increase the surface copper thickness of the plating layer by the additive method, and then reduce the copper thickness of the plating layer to the target copper thickness by the subtractive method, and finally perform pattern production. Since the additive method and the subtractive method will inevitably cause differences in the uniformity of surface copper during the control of surface copper, especially in additive electroplating, the surface copper range can usually reach 8-10 microns.
[0004] When the surface copper range of the plating layer is too large, it will further affect the accuracy of the production of the plating layer circuit. Especially for products with high-speed impedance and signal transmission requirements, the uniformity of the electroplated surface copper is the most critical influencing factor, which will make it difficult to control the impedance of high-speed transmission lines and the signal transmission loss to meet the product requirements of customers. Summary of the Invention
[0005] This application provides a processing method and a circuit board for a circuit board to solve the problem that the processing method of the circuit board in the prior art will cause the surface copper range of the plating layer to be too large, affecting the accuracy of the production of the plating layer circuit, so that it is difficult to control the impedance of high-speed transmission lines and the signal transmission loss to meet the product requirements of customers.
[0006] To solve the above technical problems, a technical solution adopted by this application is: to provide a processing method for a circuit board, wherein the processing method for the circuit board includes: providing at least two copper foils, patterning each copper foil; laminating the at least two patterned copper foils and forming an insulating layer between every two adjacent patterned copper foils to obtain a core board; forming through-holes on the core board; forming a first conductive metal layer on the core board and the hole walls of the through-holes; pasting a dry film on the first conductive metal layer; wherein, part of the structure of the dry film facing the positions of the through-holes and the areas on the first conductive metal layer where pads are to be formed is removed; forming a second conductive metal layer on the first conductive metal layer facing the removed part of the dry film; removing the dry film to pattern the first conductive metal layer and the second conductive metal layer to form a set circuit layer.
[0007] Among them, providing at least two copper foils, the step of patterning each copper foil includes: providing at least two copper foils and at least two support substrates, and correspondingly attaching each copper foil to one of the support substrates to pattern each copper foil; the step of laminating at least two patterned copper foils and forming an insulating layer between every two adjacent patterned copper foils to obtain a core board includes: laminating at least two patterned copper foils and the corresponding support substrates, removing the support substrates, and forming an insulating layer between every two adjacent patterned copper foils to obtain a core board.
[0008] Among them, the step of laminating at least two patterned copper foils and the corresponding support substrates, removing the support substrates, and forming an insulating layer between every two adjacent patterned copper foils to obtain a core board includes: laminating at least two patterned copper foils and the corresponding support substrates; heating and removing the support substrates, and filling insulating materials between every two adjacent patterned copper foils and in the gaps formed by each patterned copper foil to form an insulating layer, thereby obtaining a core board.
[0009] Among them, the step of forming a first conductive metal layer on the core board and the hole walls of the through holes includes: forming a first conductive metal layer with a thickness of 1 - 2 microns on the core board and the hole walls of the through holes.
[0010] Among them, the step of forming a second conductive metal layer on the first conductive metal layer opposite to the removed part of the dry film includes: forming a second conductive metal layer on the first conductive metal layer opposite to the removed part of the dry film, and making the thickness of the second conductive metal layer 2 - 3 microns greater than the set copper thickness.
[0011] Among them, the step of removing the dry film to pattern the first conductive metal layer and the second conductive metal layer to form a set line layer includes: removing the dry film to etch the first conductive metal layer and the second conductive metal layer, and removing the first conductive metal layer opposite to the covered area of the dry film to form a set line layer.
[0012] Among them, the step of removing the dry film to etch the first conductive metal layer and the second conductive metal layer, and removing the first conductive metal layer opposite to the covered area of the dry film to form a set line layer includes: removing the dry film to etch the first conductive metal layer and the second conductive metal layer, and ensuring that the etching thickness is 3 - 4 microns, so as to remove the first conductive metal layer opposite to the covered area of the dry film and form a set line layer.
[0013] Among them, the step of forming a first conductive metal layer on the core board and the hole walls of the through holes includes: successively carrying out electroless copper plating and electroplating on the core board to form a first conductive metal layer on the core board and the hole walls of the through holes.
[0014] After the step of removing the dry film and patterning the first conductive metal layer and the second conductive metal layer to form a set of circuit layers, the method further includes: forming a solder mask layer on the core board formed with the set of circuit layers.
[0015] To solve the above technical problems, another technical solution adopted in this application is: providing a circuit board, where the circuit board is obtained by the processing method of the circuit board as described in any one of the above.
[0016] The beneficial effects of this application are as follows: Different from the prior art, the processing method of the circuit board in this application patterns each copper foil and directly laminates at least two patterned copper foils to form corresponding insulating layers, thereby obtaining a core board with both inner and outer layer circuits fabricated. Then, a first conductive layer is formed by drilling and through-hole metallization, and a second conductive metal layer is formed at positions where the outer layer circuit is not required to be formed by pasting a dry film. After removing the dry film, the outer layer circuit layer of the core board can be engraved again by patterning the first conductive metal layer and the second conductive metal layer. Therefore, it can effectively avoid completing the fabrication of the outer layer pattern of the core board by the additive method and the subtractive method, and thus can effectively reduce the influence of full-panel copper plating and copper reduction on the copper uniformity of the plating layer, and further achieve high-precision control of the plating layer circuit. This also enables the impedance control of high-speed transmission lines and the loss control of signal transmission to meet the product requirements of customers. Description of the Drawings
[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of this application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings, where:
[0018] Figure 1a is a flowchart of the first embodiment of the processing method of the circuit board of this application;
[0019] Figures 1b - 1h is Figure 1a a schematic structural diagram of an implementation manner corresponding to S11 - S17 in
[0020] Figure 2 is a flowchart of the second embodiment of the processing method of the circuit board of this application;
[0021] Figure 3 is Figure 2 a flowchart of an embodiment corresponding to S22 in Detailed Embodiments
[0022] To make the technical problems solved by this application, the technical solutions adopted, and the achieved technical effects clearer, the technical solutions of the embodiments of this application will be further described in detail below with reference to the accompanying drawings.
[0023] Referring to "embodiment" herein means that the specific features, structures, or characteristics described in connection with the embodiment may be included in at least one embodiment of this application. The phrase appears at various positions in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art explicitly and implicitly understand that the embodiments described herein may be combined with other embodiments.
[0024] Please refer to Figure 1a , Figure 1a which is a schematic flowchart of the first embodiment of the processing method of the circuit board of this application. This embodiment includes the following steps:
[0025] S11: Provide at least two copper foils and pattern each copper foil.
[0026] It can be understood that in the production of circuit board lines, usually the copper foil 1011 or the copper-clad laminate is etched to be able to form the designed circuit layer correspondingly.
[0027] Specifically, as Figure 1b shown, the at least two provided copper foils 1011 are respectively attached to a carrier or a special support substrate, so as to be able to pattern each copper foil 1011 respectively, and complete the production of the corresponding set circuit layer of each copper foil 1011 or copper-clad laminate in the final finished circuit board prior to lamination.
[0028] For convenience of description, taking the number of the copper foils 1011 as 4 as an example for illustration, and in other embodiments, the number of the copper foils 1011 can also be any reasonable number such as 2, 3, or 5, etc., and this application does not make any limitation thereto.
[0029] S12: Laminate the at least two patterned copper foils and form an insulating layer between every two adjacent patterned copper foils to obtain a core board.
[0030] Further, as Figure 1b and Figure 1c shown, laminate the at least two copper foils 1011 that have been patterned and produced. For example, after sandwiching an insulating material layer such as an insulating resin or a prepreg between every two adjacent patterned copper foils 1011, perform hot pressing so that an insulating layer 1012 is formed correspondingly between every two adjacent patterned copper foils 1011, and make the insulating layer 1012 melt and fill into the voids formed when each copper foil 1011 is patterned to obtain the corresponding multi-layer core board 101.
[0031] S13: Form vias on the core board.
[0032] Specifically, as Figure 1d shown, drill holes in the laminated core board 101. For example, form vias 102 on the core board 101 by any reasonable method such as laser drilling or mechanical drilling.
[0033] S14: Form a first conductive metal layer on the core board and the hole walls of the vias.
[0034] Furthermore, as Figure 1e shown, obtain an electroplated layer, that is, a first conductive metal layer 103, on the opposite two side surfaces of the core board 101 and the hole walls of the vias 102 by any reasonable process such as electroless plating and electroplating.
[0035] S15: Stick a dry film on the first conductive metal layer.
[0036] Even further, as Figure 1f shown, stick a dry film 104 on the formed first conductive metal layer 103. Among them, the dry film 104 can be specifically understood as an anti-electroplating dry film 104, so as to avoid the part of the first conductive metal layer 103 covered by the dry film 104 from synchronously forming a corresponding electroplated layer with another part of the first conductive metal layer 103 not covered by the dry film 104 during the full-board electroplating of the core board 101.
[0037] Specifically, the part of the dry film 104 corresponding to the position area of the via 102 and the pad to be formed on the first conductive metal layer 103 is removed, that is, the area of the first conductive metal layer 103 where the circuit layer is pre-formed is covered by the dry film 104, while the position area of the first conductive metal layer 103 corresponding to the via 102 and the subsequent pads to be formed is not covered and is exposed.
[0038] S16: Form a second conductive metal layer on the first conductive metal layer opposite to the removed part of the dry film.
[0039] Specifically, as Figure 1g shown, electroplate the core board 101 with the first conductive metal layer 103 formed thereon again, so as to form a second conductive metal layer 105 on the first conductive metal layer 103 opposite to the removed part of the dry film 104. That is, the part covered by the dry film 104 is not affected by this electroplating, and the second conductive metal layer 105 is only formed on the hole walls of the vias 102 of the core board 101 and the first conductive metal layer 103 corresponding to the positions where the pads are to be formed.
[0040] S17: Remove the dry film to pattern the first conductive metal layer and the second conductive metal layer to form a set circuit layer.
[0041] Further, as Figure 1h shown, the dry film 104 is removed, that is, the dry film 104 attached to the outer side of the core board 101 is torn off, so as to pattern the newly exposed portions of the first conductive metal layer 103 and the second conductive metal layer 105. For example, the first conductive metal layer 103 and the second conductive metal layer 105 are micro-etched, and it is ensured that the amount of this micro-etching is the thickness of the first conductive metal layer 103, so as to correspondingly remove the portions of the first conductive metal layer 103 formed on the opposite side surfaces of the core board 101, and retain another portion of the first conductive metal layer 103 on the hole wall of the through hole 102 of the core board 101 and at the position where the pads are intended to be formed, that is, another portion of the first conductive metal layer 103 on which the second conductive metal layer 105 is correspondingly formed is retained, and the circuit layer pre-fabricated on the outermost copper foil 1011 in the core board 101 is exposed again, that is, the set circuit layer is set.
[0042] In another embodiment, after removing the dry film 104, the amount of micro-etching corresponding to the whole-board micro-etching of the first conductive metal layer 103 and the second conductive metal layer 105 can also be greater than the thickness of the first conductive metal layer 103 but less than the sum of the thickness of the first conductive metal layer 103 and the outermost copper foil 1011 of the core board 101, so as to be able to expose again the circuit layer pre-fabricated on the outermost copper foil 1011 in the core board 101, and further etch off a part of the core board 101 from the outermost side to obtain the set circuit layer. And the thickness of the set circuit layer is not less than or slightly less than the thickness of the outermost electroplated layer in the circuit board in the conventional process, and specifically can be any reasonable thickness that can meet the basic circuit logic function, so as not to affect the functional use of the final product, and the present application does not limit this.
[0043] It can be understood that by the method of obtaining the outer-layer circuit of the core board 101 through whole-board micro-etching of the first conductive metal layer 103 and the second conductive metal layer 105, it is obvious that the process flow in the conventional circuit board processing, which also needs to reduce the copper thickness of the corresponding electroplated layer to the target copper thickness by the additive method and the subtractive method to meet the graphic manufacturing requirements, can be effectively avoided, and the problem of the difference in surface copper uniformity inevitably caused by the additive method and the subtractive method in the process of controlling the surface copper can also be effectively avoided, and the corresponding implementation cost is also reduced.
[0044] It should be noted that the additive method specifically refers to a method of selectively depositing a conductive metal on the surface of an insulating substrate to form a conductive pattern. And the subtractive method generally refers to the etching method: using a chemical etching method to subtract the unnecessary copper foil 1011; or, the engraving method: using a mechanical processing method to remove the unnecessary copper foil 1011.
[0045] And since a first conductive metal layer 103 and a second conductive metal layer 105 are correspondingly formed in the position area on the core board 101 where pads are to be made, during the overall board etching for forming the set circuit layer, a conductive part 106 will still protrude and form in this position area, so that it can be used as the pad of the final finished circuit board without the need to make pads additionally, thus effectively simplifying the entire manufacturing process of the circuit board and reducing the processing cost.
[0046] Further, in an embodiment, the above S14 may specifically further include: forming a first conductive metal layer 103 with a thickness of 1-2 microns on the core board 101 and the hole walls of the vias 102.
[0047] It can be understood that, based on the overall consideration of subsequently forming a second conductive metal layer 105 on the first conductive metal layer 103 and etching away part of the first conductive metal layer 103, when initially forming the first conductive metal layer 103 on the core board 101 and the hole walls of the vias 102, the thickness of the first conductive metal layer 103 formed this time can be controlled by corresponding processes to be 1-2 microns.
[0048] Further, in an embodiment, the above S16 may specifically further include: forming a second conductive metal layer 105 on the first conductive metal layer 103 opposite to the removed part of the dry film 104, and making the thickness of the second conductive metal layer 105 2-3 microns greater than the set copper thickness.
[0049] It can be understood that, in order to leave a margin for subsequently etching to obtain the set circuit layer, during the process of forming the second conductive metal layer 105, after the thickness of the second conductive metal layer 105 reaches the set copper thickness, a copper thickness compensation value of 2-3 microns needs to be added on the basis of the set copper thickness.
[0050] Among them, the set copper thickness can be specifically understood as the target thickness of the electroplated layer closest to the outside of the circuit board in the conventional circuit board process.
[0051] Further, in an embodiment, the above S17 may specifically further include: removing the dry film 104 to etch the first conductive metal layer 103 and the second conductive metal layer 105, and removing the first conductive metal layer 103 opposite to the covered area of the dry film 104 to form the set circuit layer.
[0052] Specifically, after removing the dry film 104, the first conductive metal layer 103 and the second conductive metal layer 105 can be etched, and it is ensured that the etching amount this time is equal to the thickness of the first conductive metal layer 103, so as to be able to remove the first conductive metal layer 103 opposite to the covered area of the dry film 104, and expose again the circuit layer pre-made on the outermost copper foil 1011 in the core board 101, that is, the set circuit layer.
[0053] Further, in one embodiment, S17 may specifically further include: removing the dry film 104 to etch the first conductive metal layer 103 and the second conductive metal layer 105, and ensuring that the etching thickness is 3-4 microns, so as to remove the first conductive metal layer 103 in the covered area of the dry film 104 to form a set circuit layer.
[0054] It can be understood that, in this embodiment, the thickness of the first conductive metal layer 103 may specifically be 1-2 microns. When the etching thickness corresponding to the etching of the first conductive metal layer 103 and the second conductive metal layer 105 after removing the dry film 104 is 3-4 microns, a part of the first conductive metal layer 103 in the covered area of the dry film 104 can be removed, and a part of the core board 101 can be further etched off from the outermost side, while retaining a part of the thickness of the outermost copper foil 1011 to obtain a set circuit layer.
[0055] Further, in one embodiment, S14 may specifically further include: performing electroless copper plating and electroplating on the core board 101 in sequence to form a first conductive metal layer 103 on the core board 101 and the hole walls of the through holes 102.
[0056] It can be understood that the first conductive metal layer 103 formed on the core board 101 and the hole walls of the through holes 102 can specifically be obtained through any reasonable process flow such as electroless copper plating and electroplating.
[0057] Further, in one embodiment, after S17, it may specifically further include: forming a solder mask layer on the core board 101 formed with the set circuit layer.
[0058] It can be understood that after manufacturing the set circuit layer on the outermost side of the core board 101, in order to protect the outermost set circuit layer, it is also necessary to further form a solder mask layer on the outermost side of the core board 101 to cover the set circuit layer, but at the same time, the conductive part 106 protruding from the set circuit layer needs to be exposed as the outer solder pad of the core board 101.
[0059] Further, in one embodiment, after S17, it may specifically further include: filling the through hole 102 with resin to fill the entire through hole 102.
[0060] In the above solution, after patterning each copper foil 1011 and directly laminating at least two patterned copper foils 1011 to form the corresponding insulating layer 1012, a core board 101 with both inner and outer layer circuits fabricated is obtained. Then, holes are drilled and metallized to form a first conductive layer, and a second conductive metal layer 105 is formed at positions where the outer layer circuit does not need to be formed by applying a dry film 104. After removing the dry film 104, the outer layer circuit layer of the core board 101 can be engraved again by patterning the first conductive metal layer 103 and the second conductive metal layer 105. Thus, it is possible to effectively avoid fabricating the outer layer pattern of the core board 101 by the additive method and the subtractive method. Therefore, it is also possible to effectively reduce the influence of full-panel copper plating and copper reduction on the copper uniformity of the electroplated layer, and further achieve high-precision control of the electroplated layer circuit. This also enables the impedance control of high-speed transmission lines and the loss control of signal transmission to meet the product requirements of customers.
[0061] Please refer to Figure 2 , Figure 2 which is a schematic flow chart of the second embodiment of the processing method of the circuit board of the present application. The processing method of the circuit board in this embodiment is Figure 1a a schematic flow chart of a refined embodiment of the processing method of the circuit board in
[0062] S21: Provide at least two copper foils and at least two support substrates, and attach each copper foil to one of the support substrates correspondingly to pattern each copper foil.
[0063] Specifically, provide at least two copper foils and at least two support substrates with the same quantity, attach each copper foil to one of the support substrates correspondingly, and pattern each copper foil, so as to complete the fabrication of the set circuit layer corresponding to each copper foil or copper clad laminate in the final finished circuit board prior to lamination.
[0064] Among them, the thickness of the copper foil is specifically the thickness of each conventional circuit layer in the finished circuit board.
[0065] S22: Laminating at least two patterned copper foils and the corresponding support substrates, and removing the support substrates to form an insulating layer between every two adjacent patterned copper foils to obtain a core board.
[0066] Furthermore, stack at least two patterned copper foils and the corresponding support substrates, and ensure that there is one support substrate between every two adjacent patterned copper foils for hot pressing.
[0067] Among them, the support substrate is specifically made of a reinforcing material, and the adhesive that combines the copper foil with the reinforcing material is solid at room temperature. After being heated at high temperature, the bonding force between the copper foil and the reinforcing material will decrease, so that the copper foil and the support substrate are separated from each other, and no residue remains on the surface of the copper foil.
[0068] It can be understood that when laminating at least two patterned copper foils by heating, the support substrate will gradually fall off, so that a molten insulating material, such as any reasonable insulating material such as insulating resin, can be correspondingly filled between every two adjacent patterned copper foils to form an insulating layer correspondingly, so as to obtain a core board.
[0069] S23: Form vias on the core board.
[0070] S24: Form a first conductive metal layer on the core board and the hole walls of the vias.
[0071] S25: Stick a dry film on the first conductive metal layer.
[0072] S26: Form a second conductive metal layer on the first conductive metal layer opposite to the removed part of the dry film.
[0073] S27: Remove the dry film to pattern the first conductive metal layer and the second conductive metal layer to form a set wiring layer.
[0074] Among them, S23, S24, S25, S26 and S27 are the same as Figure 1a S13, S14, S15, S16 and S17 in. For details, please refer to S13, S14, S15, S16 and S17 and their related text descriptions, which will not be repeated here.
[0075] Please refer to Figure 3 , Figure 3 is Figure 2 The flow schematic diagram of an embodiment of S22 in. In an embodiment, the second embodiment of the processing method of the circuit board of the present application further includes some more specific steps in addition to the above S21-S27. Specifically, the above S22 may specifically further include the following steps:
[0076] S221: Laminating at least two patterned copper foils and the corresponding support substrate.
[0077] Specifically, at least two patterned copper foils and the corresponding support substrate are stacked, and it is ensured that there is a support substrate corresponding to every two adjacent patterned copper foils for hot pressing.
[0078] S222: Remove the support substrate by heating, and fill an insulating material between every two adjacent patterned copper foils and in the voids formed by each patterned copper foil to form an insulating layer, thereby obtaining a core board.
[0079] Further, remove the support substrate by heating, and synchronously fill an insulating material in a molten state, such as any reasonable insulating material like insulating resin, between every two adjacent patterned copper foils and in the voids formed by each patterned copper foil, and correspondingly form an insulating layer to obtain a core board.
[0080] Based on the overall inventive concept, the present application also provides a circuit board, wherein the circuit board is obtained by the processing method of the circuit board described in any one of the above.
[0081] Different from the prior art, the processing method of the circuit board in the present application patterns each copper foil and directly laminates at least two patterned copper foils to form a corresponding insulating layer, and then obtains a core board with the inner and outer layer circuits both fabricated. Then, drill holes and perform hole metallization to form a first conductive layer, and form a second conductive metal layer at the positions where the outer layer circuits do not need to be formed by pasting a dry film. After removing the dry film, the outer layer circuit layer of the core board can be engraved again by patterning the first conductive metal layer and the second conductive metal layer. Thus, it can effectively avoid completing the pattern fabrication of the outer layer of the core board by the additive method and the subtractive method. Therefore, it can also effectively reduce the influence of full-panel copper plating and copper reduction on the copper uniformity of the electroplated layer, and further achieve high-precision control of the electroplated layer circuit. Also, it enables the impedance control of high-speed transmission lines and the loss control of signal transmission to meet the product requirements of customers.
[0082] The above are only the embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall be similarly included in the patent protection scope of the present application.
Claims
1. A processing method for a circuit board, characterized in that, The processing method of the circuit board includes: Providing at least two copper foils and patterning each of the copper foils; Laminating the at least two patterned copper foils and forming an insulating layer between every two adjacent patterned copper foils to obtain a core board; Forming vias on the core board; Forming a first conductive metal layer on the core board and the hole walls of the vias; Laying a dry film on the first conductive metal layer; wherein, a part of the structure of the dry film facing the positions of the vias and the areas on the first conductive metal layer where pads are to be formed is removed; Forming a second conductive metal layer on the first conductive metal layer facing the removed part of the dry film, and making the thickness of the second conductive metal layer 2 - 3 microns greater than the set copper thickness; wherein, the set copper thickness is the target thickness of the outermost plating layer of the circuit board; Removing the dry film to pattern the first conductive metal layer and the second conductive metal layer to form a set circuit layer; wherein, the step of patterning the first conductive metal layer and the second conductive metal layer includes: micro-etching the first conductive metal layer and the second conductive metal layer, and ensuring that the amount of micro-etching is greater than the thickness of the first conductive metal layer but less than the sum of the thicknesses of the first conductive metal layer and the outermost copper foil of the core board, so as to expose the pre-fabricated circuit layer of the outermost copper foil of the core board.
2. The processing method of the circuit board according to claim 1, characterized in that The step of providing at least two copper foils and patterning each of the copper foils includes: Providing at least two copper foils and at least two supporting substrates, and correspondingly attaching each copper foil to one of the supporting substrates to pattern each copper foil; The step of laminating the at least two patterned copper foils and forming an insulating layer between every two adjacent patterned copper foils to obtain a core board includes: Laminating the at least two patterned copper foils and the corresponding supporting substrates, removing the supporting substrates, and forming the insulating layer between every two adjacent patterned copper foils to obtain the core board.
3. The processing method of the circuit board according to claim 2, wherein The step of laminating the at least two patterned copper foils and the corresponding supporting substrates, removing the supporting substrates, and forming the insulating layer between every two adjacent patterned copper foils to obtain the core board includes: Laminating the at least two patterned copper foils and the corresponding supporting substrates; Heating and removing the supporting substrates, and filling insulating materials between every two adjacent patterned copper foils and in the voids formed by each patterned copper foil to form the insulating layer, thereby obtaining the core board.
4. The processing method of the circuit board according to claim 1, characterized in that, The step of forming a first conductive metal layer on the core board and the hole walls of the vias includes: Forming the first conductive metal layer with a thickness of 1 - 2 microns on the core board and the hole walls of the vias.
5. The processing method of the circuit board according to claim 1, characterized in that The step of removing the dry film to pattern the first conductive metal layer and the second conductive metal layer to form a set circuit layer includes: Removing the dry film to etch the first conductive metal layer and the second conductive metal layer, and removing the first conductive metal layer facing the covered area of the dry film to form the set circuit layer.
6. The processing method of the circuit board according to claim 5, characterized in that The step of removing the dry film to etch the first conductive metal layer and the second conductive metal layer and removing the first conductive metal layer in the covered area of the dry film to form the set circuit layer includes: Remove the dry film to etch the first conductive metal layer and the second conductive metal layer, and ensure that the etching thickness is 3-4 microns, so as to remove the first conductive metal layer in the covered area of the dry film and form the set circuit layer.
7. The processing method of the circuit board according to claim 1, characterized in that, The step of forming the first conductive metal layer on the core board and the hole walls of the through holes includes: Perform electroless copper plating and electroplating on the core board in sequence to form the first conductive metal layer on the core board and the hole walls of the through holes.
8. The processing method of the circuit board according to claim 1, characterized in that After the step of removing the dry film to pattern the first conductive metal layer and the second conductive metal layer to form the set circuit layer, it further includes: Form a solder resist layer on the core board formed with the set circuit layer.
9. A circuit board, characterized in that, The circuit board is obtained by the processing method of the circuit board according to any one of claims 1-8.
Citation Information
Patent Citations
Printed circuit board and manufacturing method thereof
KR1020100000130A
Method of manufacturing a multi-layer wiring board using a metal member having a rough surface
US20080128288A1