Atomizing chip and preparation method thereof

Abstract

The application provides an atomization chip and a preparation method thereof. The atomization chip comprises: a substrate comprising a single crystal silicon layer and an insulating layer; a first electrode located on the surface of the substrate; a piezoelectric film layer located on the surface of the first electrode; a second electrode located on the surface of the piezoelectric film layer; a polysilicon layer located on the surface of the second electrode, and the first electrode, the piezoelectric film layer, the second electrode and the polysilicon layer form a piezoelectric ultrasonic actuator, or the first electrode, the second electrode, the single crystal silicon layer, the polysilicon layer and a capacitor gap form a capacitive ultrasonic actuator, and the frequency of the ultrasonic actuator is adjusted through the thickness of the polysilicon layer; a heater located on the surface of the substrate or the surface of the ultrasonic actuator, and the heater is provided with heater electrodes at both ends; and a liquid channel arranged in an array on the surface of the atomization chip. The above technical scheme combines ultrasonic atomization and heating atomization, reduces the ultrasonic atomization frequency to reduce power consumption, and reduces the heating temperature to avoid high-temperature hazards.

Description

Technical Field

[0001] This invention relates to the field of atomizers, and more particularly to an atomizing chip and its preparation method. Background Technology

[0002] Atomizers are devices that heat stored atomizable substances to form an atomized state. They are commonly used in electronic cigarettes and atomized drug delivery.

[0003] Currently, common atomizers include electrically heated atomizers and ultrasonic atomizers. Electrically heated atomizers require a heating element to convert electrical energy into heat energy and transfer that heat to the e-liquid, causing it to atomize. While electric heating can quickly heat the e-liquid to form an aerosol, due to the atomizer's structure and materials, it can cause localized overheating of the heating coil, or even dry burning, producing odors and harmful substances, which can affect the atomizer's lifespan in the long run. Furthermore, the atomization output of electrically heated atomizers is uncontrollable and cannot achieve precise volume control. Ultrasonic atomizers, while offering controllable atomization output, often require high-frequency oscillation to achieve atomization, resulting in higher energy consumption.

[0004] Therefore, providing an atomizer with controllable atomization volume, low temperature, and low power consumption is a problem that needs to be solved at present. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide an atomizer with controllable atomization amount, low temperature and low power consumption, and to provide an atomizing chip and its preparation method.

[0006] To address the aforementioned problems, this invention provides an atomizing chip, comprising: a substrate, the substrate further comprising a monocrystalline silicon layer and an insulating layer; a first electrode disposed on the surface of the substrate; a piezoelectric thin film layer disposed on the surface of the first electrode; a second electrode disposed on the surface of the piezoelectric thin film layer; a polycrystalline silicon layer disposed on the surface of the second electrode, wherein the first electrode, the piezoelectric thin film layer, the second electrode, and the polycrystalline silicon layer constitute a piezoelectric ultrasonic actuator, and the frequency of the piezoelectric ultrasonic actuator is adjusted by the thickness of the polycrystalline silicon layer; a heater located on the surface of the substrate or the surface of the piezoelectric ultrasonic actuator, wherein heater electrodes are disposed at both ends of the heater; and liquid channels, the liquid channels being arranged in an array on the surface of the atomizing chip for transporting liquid to be atomized.

[0007] To address the aforementioned problems, this invention provides an atomizing chip, comprising: a substrate, the substrate further comprising a monocrystalline silicon layer and an insulating layer, wherein the insulating layer is located at both ends of the monocrystalline silicon layer; a first electrode, the first electrode being disposed on the surface of the two ends of the substrate and located on the same plane as the insulating layer; a second electrode, the second electrode being disposed on the surface of the insulating layer and forming a capacitive gap with the middle region of the substrate; a polycrystalline silicon layer, disposed on the surface of the second electrode, wherein the first electrode, the second electrode, the monocrystalline silicon layer, and the polycrystalline silicon layer constitute a capacitive ultrasonic actuator, and the frequency of the capacitive ultrasonic actuator is adjusted by the thickness of the polycrystalline silicon layer; a heater, disposed on the surface of the polycrystalline silicon layer, wherein heater electrodes are disposed at both ends of the heater; and liquid channels, arranged in an array on the surface of the atomizing chip and surrounded by the heater in a serpentine pattern.

[0008] To address the aforementioned problems, this invention provides a method for fabricating an atomizing chip, comprising the following steps: providing a substrate, the substrate comprising a monocrystalline silicon layer and an insulating layer; sequentially forming a first electrode, a piezoelectric thin film layer, a second electrode, and a polycrystalline silicon layer on the surface of the substrate, wherein the first electrode, the piezoelectric thin film layer, the second electrode, and the polycrystalline silicon layer constitute a piezoelectric ultrasonic actuator; forming a metal layer on the surface of the polycrystalline silicon as a heater; and etching the substrate and the piezoelectric ultrasonic actuator to form a liquid channel.

[0009] To address the aforementioned problems, this invention provides a method for fabricating an atomizing chip, comprising the following steps: providing a substrate, the substrate comprising a monocrystalline silicon layer and an insulating layer; sequentially forming a support layer, a first electrode, a piezoelectric thin film layer, a second electrode, and a polycrystalline silicon layer on the surface of the substrate, wherein the first electrode, the piezoelectric thin film layer, the second electrode, and the polycrystalline silicon layer constitute a piezoelectric ultrasonic actuator; etching the middle region of the polycrystalline silicon layer, the second electrode, and the piezoelectric thin film layer, retaining the two end regions; etching the first electrode and the support layer, the etched holes serving as liquid channels, and the first electrode in the middle region serving as a heater.

[0010] To address the aforementioned problems, this invention provides a method for fabricating an atomizing chip, comprising the following steps: providing a substrate, the substrate comprising a monocrystalline silicon layer and an insulating layer; sequentially forming a second electrode and a polycrystalline silicon layer on the substrate; etching the insulating layer, the second electrode, and the polycrystalline silicon layer to form an array of holes, the holes serving as liquid channels and exposing both ends of the monocrystalline silicon layer; simultaneously forming metal layers on the surfaces of the monocrystalline silicon layer and the polycrystalline silicon layer, the metal layer on the surface of the monocrystalline silicon layer serving as a first electrode, and the metal layer on the surface of the polycrystalline silicon layer serving as a heater; etching the monocrystalline silicon layer to divide the substrate into a middle region and two end regions; etching the insulating layer in the middle region of the substrate to form a capacitance gap between the second electrode and the monocrystalline silicon layer, wherein the first electrode, the second electrode, the monocrystalline silicon layer, the polycrystalline silicon layer, and the capacitance gap constitute a capacitive ultrasonic actuator.

[0011] The above technical solution combines ultrasonic atomization and heating atomization to achieve controllable atomization amount, reduce the frequency of ultrasonic atomization, reduce power consumption, reduce heating temperature, and avoid the hidden dangers caused by high temperature. Attached Figure Description

[0012] Appendix Figure 1A The diagram shown is a structural schematic of an embodiment of the atomizing chip described in this invention.

[0013] Appendix Figure 1B For the appendix Figure 1A A cross-sectional view along the AA' direction.

[0014] Appendix Figure 2A The diagram shown is a structural schematic of an embodiment of the atomizing chip described in this invention.

[0015] Appendix Figure 2B For the appendix Figure 2A A cross-sectional view along the BB' direction.

[0016] Appendix Figure 3 The diagram shown is a structural schematic of an embodiment of the atomizing chip described in this invention.

[0017] Appendix Figure 4 The diagram shows a flowchart of one embodiment of the atomizing chip preparation method of the present invention.

[0018] Appendix Figures 5A-5C The diagram shown is a process flow chart of an embodiment of the atomizing chip fabrication method of the present invention.

[0019] Appendix Figure 6 The diagram shows a flowchart of one embodiment of the atomizing chip preparation method of the present invention.

[0020] Appendix Figures 7A-7DThe diagram shown is a process flow chart of an embodiment of the atomizing chip fabrication method of the present invention.

[0021] Appendix Figure 8 The diagram shows a flowchart of one embodiment of the atomizing chip preparation method of the present invention.

[0022] Appendix Figures 9A-9D The diagram shown is a process flow chart of an embodiment of the atomizing chip fabrication method of the present invention. Detailed Implementation

[0023] The specific embodiments of the atomizing chip and its preparation method provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0024] Appendix Figure 1A The diagram shown is a structural schematic of one embodiment of the atomizing chip described in this invention. (See attached diagram.) Figure 1B For the appendix Figure 1A Sectional view along the AA' direction. (Refer to attached reference.) Figure 1A and appendix Figure 1B The atomizing chip includes a substrate 10, an ultrasonic actuator 11, a heater 12, and liquid channels 13. The substrate 10 further includes a monocrystalline silicon layer 101 and an insulating layer 102. The ultrasonic actuator 11 is a piezoelectric ultrasonic actuator disposed on the surface of the substrate 10, and further includes a first electrode 111, a second electrode 112, a polycrystalline silicon layer 113, and a piezoelectric thin film layer 114. The heater 12 is located on the surface of the ultrasonic actuator 11, and heater electrodes 121 are disposed at both ends of the heater 12. The liquid channels 13 are arranged in an array on the surface of the atomizing chip for transporting the liquid to be atomized.

[0025] In one embodiment, the substrate 10 comprises a single-crystal silicon layer 101 and an insulating layer 102 located on the surface of the single-crystal silicon layer 101, and a subsequent film layer is disposed on the surface of the insulating layer 102. The single-crystal silicon layer 101 is used to connect to external circuits. The insulating layer 102 is a silicon dioxide layer.

[0026] In one embodiment, the first electrode 111 is located on the surface of the substrate 10, i.e., the surface of the insulating layer 102; the piezoelectric thin film layer 114 is located on the surface of the first electrode 111; the second electrode 112 is located on the surface of the piezoelectric thin film layer 114; and the polycrystalline silicon layer 113 is located on the surface of the second electrode 112. The first electrode 111, the piezoelectric thin film layer 114, the second electrode 112, and the polycrystalline silicon layer 113 constitute a piezoelectric ultrasonic actuator, and the frequency of the piezoelectric ultrasonic actuator is adjusted by the thickness of the polycrystalline silicon layer 113.

[0027] As one embodiment, the heater 12 is located on the surface of the polycrystalline silicon layer 113 and serpentinely surrounds the liquid channel 13.

[0028] The above technical solution combines ultrasonic atomization and heating atomization to achieve controllable atomization amount, reduce the frequency of ultrasonic atomization, reduce power consumption, reduce heating temperature, and avoid the hidden dangers caused by high temperature.

[0029] Appendix Figure 2A The diagram shown is a structural schematic of one embodiment of the atomizing chip described in this invention. (See attached diagram.) Figure 2B For the appendix Figure 2A A cross-sectional view along the BB' direction. In one embodiment, the atomizing chip includes a substrate 10, an ultrasonic actuator 11, a heater 12, and liquid channels 13. The substrate 10 further includes a monocrystalline silicon layer 101 and an insulating layer 102. The ultrasonic actuator 11 is a piezoelectric ultrasonic actuator disposed on the surface of the substrate 10, and the ultrasonic actuator 11 further includes a first electrode 111, a second electrode 112, a polycrystalline silicon layer 113, and a piezoelectric thin film layer 114. A support layer 103 is also disposed between the substrate 10 and the ultrasonic actuator 11. The heater 12 is located on the surface of the support layer 103, and heater electrodes 121 are disposed at both ends of the heater 12. The liquid channels 13 are arranged in an array on the surface of the atomizing chip for transporting the liquid to be atomized.

[0030] As one embodiment, the substrate 10 includes a middle region and two end regions, the ultrasonic actuator 11 is located on the surface of the two end regions of the substrate 10, and the heater 12 is located on the surface of the middle region of the substrate 10 and serpentinely surrounds the liquid channel 13.

[0031] In one embodiment, the substrate 10 comprises a monocrystalline silicon layer 101 and an insulating layer 102 located on the surface of the monocrystalline silicon layer 101. Subsequent film layers are disposed on the surface of the substrate 10 and the insulating layer 102. The monocrystalline silicon layer 101 is used to connect to external circuitry. The insulating layer 102 is a silicon dioxide layer. Furthermore, a support layer 103 is further disposed on the surface of the insulating layer 102 on the substrate 10. The support layer is a silicon nitride layer. The support layer 103 is used to support the heater 12 and insulate the heater 12 from other structures.

[0032] In one embodiment, the first electrode 111 is located on the surface of the substrate 10, i.e., the surface of the insulating layer 102; the piezoelectric thin film layer 114 is located on the surface of the first electrode 111; the second electrode 112 is located on the surface of the piezoelectric thin film layer 114; and the polycrystalline silicon layer 113 is located on the surface of the second electrode 112. The first electrode 111, the piezoelectric thin film layer 114, the second electrode 112, and the polycrystalline silicon layer 113 constitute a piezoelectric ultrasonic actuator, and the frequency of the piezoelectric ultrasonic actuator is adjusted by the thickness of the polycrystalline silicon layer 113.

[0033] As one embodiment, the heater 12 is located on the surface of the support layer 103 of the substrate 10 and serpentinely surrounds the liquid channel 13.

[0034] The above technical solution combines ultrasonic atomization and heating atomization to achieve controllable atomization amount, reduce the frequency of ultrasonic atomization, reduce power consumption, reduce heating temperature, and avoid the hidden dangers caused by high temperature.

[0035] Appendix Figure 3 The diagram shows a structural schematic of an embodiment of the atomizing chip of the present invention. In one embodiment, the atomizing chip includes a substrate 10, an ultrasonic actuator, a heater 12, and a liquid channel 13. The substrate 10 further includes a monocrystalline silicon layer 101 and an insulating layer 102, with the insulating layer 102 located at both ends of the monocrystalline silicon layer 101. A first electrode 111 is disposed on the surface of both ends of the monocrystalline silicon layer 101 and is located on the same plane as the insulating layer 102. A second electrode 112 is disposed on the surface of the insulating layer 102 and forms a capacitive gap with the middle region of the monocrystalline silicon layer 101. A polycrystalline silicon layer 113 is disposed on the surface of the second electrode 112, and the first electrode 111, the second electrode 112, the monocrystalline silicon layer 101, and the polycrystalline silicon layer 113 constitute a capacitive ultrasonic actuator, and the frequency of the capacitive ultrasonic actuator is adjusted by the thickness of the polycrystalline silicon layer 113. Heater 12 is disposed on the surface of the polycrystalline silicon layer 113, and heater electrodes (not shown) are disposed at both ends of heater 12. Liquid channels 13 are arranged in an array on the surface of the atomizing chip and are surrounded by heater 12 in a serpentine pattern.

[0036] In one embodiment, the substrate comprises a monocrystalline silicon layer 101 and an insulating layer 102 located on the surface of the monocrystalline silicon layer 101, and a subsequent film layer is disposed on the surface of the insulating layer 102. The monocrystalline silicon layer 101 is used to connect to external circuits. The insulating layer 102 is a silicon dioxide layer.

[0037] As one embodiment, the first electrode 111 is located at both ends of the surface of the exposed monocrystalline silicon layer 101 on the substrate; the two end regions of the second electrode 112 are located on the surface of the insulating layer 102 of the substrate, and the middle region of the second electrode 112 forms a capacitive gap with the exposed monocrystalline silicon layer 101; the polycrystalline silicon layer 113 is located on the surface of the second electrode 112.

[0038] As one embodiment, the heater 12 is located on the surface of the polycrystalline silicon layer 113 and serpentinely passes through the liquid channel 13.

[0039] The above technical solution combines ultrasonic atomization and heating atomization to achieve controllable atomization amount, reduce the frequency of ultrasonic atomization, reduce power consumption, reduce heating temperature, and avoid the hidden dangers caused by high temperature.

[0040] Based on the same inventive concept, the present invention also provides a method for preparing an atomizing chip.

[0041] Appendix Figure 4 The diagram shows a structural schematic of an embodiment of the atomizing chip of the present invention, including the following steps: Step S41, providing a substrate, the substrate including monocrystalline silicon and an insulating layer; Step S42, sequentially forming a first electrode, a piezoelectric thin film layer, a second electrode, and a polycrystalline silicon layer on the surface of the substrate, the first electrode, the piezoelectric thin film layer, the second electrode, and the polycrystalline silicon layer constituting a piezoelectric ultrasonic actuator; Step S43, forming a metal layer on the surface of the polycrystalline silicon as a heater; Step S44, etching the substrate and the piezoelectric ultrasonic actuator to form a liquid channel.

[0042] Appendix Figures 5A-5C The diagram shown is a process flow chart of one embodiment of the atomizing chip fabrication method of the present invention. (See attached diagram.) Figures 5A-5C The attached image shows... Figure 1A and appendix Figure 1B The process diagram of the implementation steps of the illustrated embodiment.

[0043] Refer to step S41 and appendix Figure 5A A substrate 10 is provided, the substrate 10 including a monocrystalline silicon layer 101 and an insulating layer 102. A subsequent film layer is disposed on the surface of the insulating layer 102. The monocrystalline silicon layer 101 is used for connecting external circuits. The insulating layer 102 is a silicon dioxide layer.

[0044] Refer to step S42 and appendix Figure 5BA first electrode 111, a piezoelectric thin film layer 114, a second electrode 112, and a polycrystalline silicon layer 113 are sequentially formed on the surface of the substrate 10. These components constitute a piezoelectric ultrasonic actuator. In one specific embodiment, the first electrode 111 is formed on the surface of the insulating layer 102 of the substrate 10; a piezoelectric thin film layer 114 is formed on the surface of the first electrode 111; a second electrode 112 is formed on the surface of the piezoelectric thin film layer 114; and a polycrystalline silicon layer 113 is formed on the surface of the second electrode 112. The materials used to form the first electrode 111 and the second electrode 112 are metals. The material used to form the piezoelectric thin film layer 114 is PZT or AlN.

[0045] Refer to step S43 and appendix Figure 5C A metal layer is formed on the surface of the polysilicon 113 to serve as a heater 12. In one specific embodiment, forming the heater 12 further includes the following steps: depositing a metal layer on the surface of the polysilicon layer 113 using a vapor deposition method to form a serpentine heater 12; and forming heater electrodes (not shown) at both ends of the heater 12. The heater 12 is serpentine and surrounds the liquid channel 13, with heater electrodes (not shown) at both ends.

[0046] Refer to step S44 and appendix Figure 1B The substrate 10 and the piezoelectric ultrasonic actuator are etched to form a liquid channel 13. In one specific embodiment, forming the liquid channel 13 further includes the following steps: etching the first electrode 111, the piezoelectric thin film layer 114, the second electrode 112, and the polysilicon layer 113 to form an array of liquid channels 13.

[0047] As one embodiment, the method further includes etching the middle region of the substrate 10 and retaining the regions at both ends of the substrate 10.

[0048] After completing the above steps, you will obtain the attached document. Figure 1B The atomizing chip shown.

[0049] The above technical solution combines ultrasonic atomization and heating atomization to achieve controllable atomization amount, reduce the frequency of ultrasonic atomization, reduce power consumption, reduce heating temperature, and avoid the hidden dangers caused by high temperature.

[0050] Appendix Figure 6The diagram shows a structural schematic of an embodiment of the atomizing chip of the present invention, including the following steps: Step S61, providing a substrate, the substrate including monocrystalline silicon and an insulating layer; Step S62, sequentially forming a support layer, a first electrode, a piezoelectric thin film layer, a second electrode, and a polycrystalline silicon layer on the surface of the substrate, the first electrode, the piezoelectric thin film layer, the second electrode, and the polycrystalline silicon layer constituting a piezoelectric ultrasonic actuator; Step S63, etching the middle region of the polycrystalline silicon layer, the second electrode, and the piezoelectric thin film layer, retaining the two end regions; Step S64, etching the first electrode and the support layer, the etched holes serving as liquid channels, and the first electrode in the middle region serving as a heater.

[0051] Appendix Figures 7A-7D The diagram shown is a process flow chart of one embodiment of the atomizing chip fabrication method of the present invention. (See attached diagram.) Figures 7A-7D The attached image shows... Figure 2A and appendix Figure 2B The process diagram of the implementation steps of the illustrated embodiment.

[0052] Refer to step S61 and appendix Figure 7A A substrate 10 is provided, the substrate 10 including a monocrystalline silicon layer 101 and an insulating layer 102. A subsequent film layer is disposed on the surface of the insulating layer 102. The monocrystalline silicon layer 101 is used for connecting external circuits. The insulating layer 102 is a silicon dioxide layer.

[0053] Refer to step S62 and appendix Figure 7B A support layer 103, a first electrode 111, a piezoelectric thin film layer 114, a second electrode 112, and a polycrystalline silicon layer 113 are sequentially formed on the surface of the substrate 10. The first electrode 111, the piezoelectric thin film layer 114, the second electrode 112, and the polycrystalline silicon layer 113 constitute a piezoelectric ultrasonic actuator. In one specific embodiment, a support layer 103 is formed on the surface of the insulating layer 102 of the substrate 10; a first electrode 111 is formed on the surface of the support layer 103; a piezoelectric thin film layer 114 is formed on the surface of the first electrode 111; a second electrode 112 is formed on the surface of the piezoelectric thin film layer 114; and a polycrystalline silicon layer 113 is formed on the surface of the second electrode 112. The support layer is a silicon nitride layer. The materials forming the first electrode 111 and the second electrode 112 are metals. The materials forming the piezoelectric thin film layer 114 are PZT or AlN. The support layer 103 serves to support the heater 12 and insulate the heater 12 from other structures.

[0054] Refer to step S63 and appendix Figure 7CThe middle region of the polysilicon layer 113, the second electrode 112, and the piezoelectric thin film layer 114 is etched, while the two end regions are retained. In one specific embodiment, the middle region of the piezoelectric thin film layer 114, the second electrode 112, and the polysilicon layer 113 is etched to expose the first electrode 111.

[0055] Refer to step S64 and the appendix. Figure 7D The first electrode 111 and the support layer 103 are etched, and the etched holes serve as liquid channels 13. The first electrode 111 in the middle region serves as a heater 12. Heater electrodes (not shown) are formed at both ends of the heater 12.

[0056] As one embodiment, the method further includes etching the middle region of the substrate 10 and retaining the regions at both ends of the substrate 10.

[0057] After completing the above steps, you will obtain the attached document. Figure 2B The atomizing chip shown.

[0058] The above technical solution combines ultrasonic atomization and heating atomization to achieve controllable atomization amount, reduce the frequency of ultrasonic atomization, reduce power consumption, reduce heating temperature, and avoid the hidden dangers caused by high temperature.

[0059] Appendix Figure 8 The diagram shows a structural schematic of an embodiment of the atomizing chip of the present invention, including the following steps: Step S81, providing a substrate, the substrate including monocrystalline silicon and an insulating layer; Step S82, sequentially forming a second electrode and a polycrystalline silicon layer on the substrate; Step S83, etching the insulating layer, the second electrode and the polycrystalline silicon layer to form an array of holes, the holes serving as liquid channels and exposing both ends of the monocrystalline silicon layer; Step S84, simultaneously forming metal layers on the surfaces of the monocrystalline silicon layer and the polycrystalline silicon layer, the metal layer on the surface of the monocrystalline silicon layer serving as a first electrode, and the metal layer on the surface of the polycrystalline silicon layer serving as a heater; Step S85, etching the monocrystalline silicon layer to divide the substrate into a middle region and two end regions; Step S86, etching the insulating layer in the middle region of the substrate to form a capacitor gap between the second electrode and the monocrystalline silicon layer, the first electrode, the second electrode, the monocrystalline silicon layer, the polycrystalline silicon layer and the capacitor gap constituting a capacitive ultrasonic actuator.

[0060] Appendix Figures 9A-9D The diagram shown is a process flow chart of one embodiment of the atomizing chip fabrication method of the present invention. (See attached diagram.) Figures 9A-9D The attached image shows... Figure 3 The process diagram of the implementation steps of the illustrated embodiment.

[0061] Refer to step S81 and appendix Figure 9AA substrate is provided, the substrate comprising a monocrystalline silicon layer 101 and an insulating layer 102. A subsequent film layer is disposed on the surface of the insulating layer 102. The monocrystalline silicon layer 101 is used for connecting external circuitry. The insulating layer 102 is a silicon dioxide layer.

[0062] Refer to step S82 and appendix Figure 9B A second electrode 112 and a polycrystalline silicon layer 113 are sequentially formed on the substrate. In one specific embodiment, the second electrode 112 is formed on the surface of the substrate insulating layer 102; a polycrystalline silicon layer 113 is formed on the surface of the second electrode 112. The material forming the second electrode 112 is a metal.

[0063] Refer to step S83 and appendix Figure 9C The insulating layer 102, the second electrode 112, and the polycrystalline silicon layer 113 are etched to form an array of holes, which serve as liquid channels 13 and expose the two ends of the monocrystalline silicon layer 101. The material forming the second electrode 112 is a metal.

[0064] Refer to step S84 and appendix Figure 9D Metal layers are simultaneously formed on the surfaces of the monocrystalline silicon layer 101 and the polycrystalline silicon layer 113. The metal layer on the surface of the monocrystalline silicon layer 101 serves as the first electrode 111, and the metal layer on the surface of the polycrystalline silicon layer 113 serves as the heater 12. The heater 12 is serpentine and surrounds the liquid channel 13, with heater electrodes (not shown) at both ends.

[0065] Refer to steps S85 to S86 and the appendix. Figure 3 The monocrystalline silicon layer 101 is etched to divide the substrate into a middle region and two end regions. The insulating layer 102 in the middle region of the substrate is etched to form a capacitive gap between the second electrode 112 and the monocrystalline silicon layer 101. The first electrode 111, the second electrode 112, the monocrystalline silicon layer 101, the polycrystalline silicon layer 113, and the capacitive gap together constitute a capacitive ultrasonic actuator. The channel created by etching the substrate, together with the holes formed by etching the insulating layer 102, the second electrode 112, and the polycrystalline silicon layer 113, together constitute a liquid channel 13. The first electrode 111, the second electrode 112, the polycrystalline silicon layer 113, and the capacitor formed by the second electrode 112 and the monocrystalline silicon layer 101 together constitute a capacitive ultrasonic actuator.

[0066] After completing the above steps, you will obtain the attached document. Figure 3 The atomizing chip shown.

[0067] The above technical solution combines ultrasonic atomization and heating atomization to achieve controllable atomization amount, reduce the frequency of ultrasonic atomization, reduce power consumption, reduce heating temperature, and avoid the hidden dangers caused by high temperature.

[0068] The above description is only a preferred embodiment of the present invention. It should be noted that those skilled in the art can make several improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. An atomizing chip, characterized in that, include: Substrate, the substrate further comprising a monocrystalline silicon layer and an insulating layer; A first electrode is disposed on the surface of the substrate; A piezoelectric thin film layer is disposed on the surface of the first electrode; The second electrode is disposed on the surface of the piezoelectric thin film layer; A polycrystalline silicon layer is disposed on the surface of the second electrode. The first electrode, the piezoelectric thin film layer, the second electrode, and the polycrystalline silicon layer constitute a piezoelectric ultrasonic actuator, and the frequency of the piezoelectric ultrasonic actuator is adjusted by the thickness of the polycrystalline silicon layer. A heater is formed on the surface of the substrate or the surface of the piezoelectric ultrasonic actuator by thin film deposition. The heater is serpentine and has heater electrodes at both ends. as well as A liquid channel array is arranged on the surface of the atomizing chip for transporting the liquid to be atomized, and a heater surrounds the liquid channel.

2. The atomizing chip according to claim 1, characterized in that, The heater is located on the surface of the polycrystalline silicon layer.

3. The atomizing chip according to claim 1, characterized in that, The substrate includes a middle region and two end regions. The piezoelectric ultrasonic actuator is located on the surface of the two end regions of the substrate, and the heater is located on the surface of the middle region of the substrate.

4. The atomizing chip according to claim 3, characterized in that, A support layer is also provided on the surface of the substrate to support the heater.

5. An atomizing chip, characterized in that, include: The substrate further includes a monocrystalline silicon layer and an insulating layer, wherein the insulating layer is located at both ends of the monocrystalline silicon layer; The first electrode is disposed on the surface of the regions at both ends of the single crystal silicon layer and is located on the same plane as the insulating layer; The second electrode has two end regions disposed on the surface of the insulating layer, and the middle region of the second electrode forms a capacitive gap with the middle region of the single crystal silicon layer. A polycrystalline silicon layer is disposed on the surface of the second electrode, and the first electrode, the second electrode, the monocrystalline silicon layer, and the polycrystalline silicon layer constitute a capacitive ultrasonic actuator, and the frequency of the capacitive ultrasonic actuator is adjusted by the thickness of the polycrystalline silicon layer. A heater is formed on the surface of the polycrystalline silicon layer by thin film deposition, and heater electrodes are provided at both ends of the heater; Liquid channels are arranged in an array on the surface of the atomizing chip and are surrounded by the heater in a serpentine pattern.

6. A method for preparing an atomizing chip, characterized in that, Includes the following steps: A substrate is provided, the substrate comprising a monocrystalline silicon layer and an insulating layer; A first electrode, a piezoelectric thin film layer, a second electrode, and a polycrystalline silicon layer are sequentially formed on the surface of the substrate. The first electrode, the piezoelectric thin film layer, the second electrode, and the polycrystalline silicon layer constitute a piezoelectric ultrasonic actuator. A metal layer is formed on the surface of the polycrystalline silicon to serve as a heater. The heater is serpentine and has heater electrodes at both ends. The substrate and the piezoelectric ultrasonic actuator are etched to form a liquid channel, and the heater surrounds the liquid channel.

7. The method according to claim 6, characterized in that, It also includes the steps of etching the middle region of the substrate and retaining the regions at both ends of the substrate.

8. A method for preparing an atomizing chip, characterized in that, Includes the following steps: A substrate is provided, the substrate comprising a monocrystalline silicon layer and an insulating layer; A support layer, a first electrode, a piezoelectric thin film layer, a second electrode, and a polycrystalline silicon layer are sequentially formed on the surface of the substrate. The first electrode, the piezoelectric thin film layer, the second electrode, and the polycrystalline silicon layer constitute a piezoelectric ultrasonic actuator. The polysilicon layer, the second electrode, and the middle region of the piezoelectric thin film layer are etched, while the two end regions are preserved, and the first electrode is exposed. The first electrode and the support layer are etched, and the etched holes serve as liquid channels. The first electrode in the middle region serves as a heater. The heater is serpentine and surrounds the liquid channel, and heater electrodes are provided at both ends.

9. The method according to claim 8, characterized in that, It also includes the steps of etching the middle region of the substrate and retaining the regions at both ends of the substrate.

10. A method for preparing an atomizing chip, characterized in that, Includes the following steps: A substrate is provided, the substrate comprising a monocrystalline silicon layer and an insulating layer; A second electrode and a polycrystalline silicon layer are sequentially formed on the substrate; The insulating layer, the second electrode, and the polysilicon layer are etched to form an array of holes, which serve as liquid channels and expose the two ends of the monocrystalline silicon layer. A metal layer is formed simultaneously on the surfaces of the monocrystalline silicon layer and the polycrystalline silicon layer. The metal layer on the surface of the monocrystalline silicon layer serves as the first electrode, and the metal layer on the surface of the polycrystalline silicon layer serves as the heater. The heater is serpentine and surrounds the liquid channel, with heater electrodes at both ends. The single-crystal silicon layer is etched to divide the substrate into a middle region and two end regions; The insulating layer in the middle region of the substrate is etched to form a capacitance gap between the middle region of the second electrode and the middle region of the monocrystalline silicon layer. The first electrode, the second electrode, the monocrystalline silicon layer, the polycrystalline silicon layer and the capacitance gap constitute a capacitive ultrasonic actuator.

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