Power-down control circuit, method and computer device

Abstract

The application relates to a power-off control circuit, a method and a computer device. The power-off control circuit comprises a voltage detection circuit and a control circuit. The voltage detection circuit is connected with the power supply and the control circuit respectively, and the control circuit is connected with each chip power module. The voltage detection circuit is used for outputting a trigger signal to the control circuit when detecting that the output voltage of the power supply drops to a preset voltage threshold value. The output voltage of the power supply is used for providing an input voltage to the chip power module, and the preset voltage threshold value is not less than the minimum working voltage of the chip power module. The control circuit is used for controlling each chip power module to power off according to a preset power-off time sequence according to the trigger signal. According to the trigger signal received by the control circuit, each chip power module which can normally work is controlled to power off according to the preset power-off time sequence, so that safe power-off control can be realized, and the problems that the chip works abnormally or even the chip is burned in the traditional method can be avoided.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electrical control, in particular to a power-off control circuit, method and computer equipment. BACKGROUND

[0002] With the continuous development of PCIE (peripheral component interconnect express) related technology, PCIE board cards are widely used. Many chips on the PCIE board card have preset power supply timing requirements for power supply, that is, when starting the computer equipment (i.e. power-on process) or closing the computer equipment (i.e. power-off or power-down process), the power supply of the chip needs to be controlled to be turned on or off according to a certain timing.

[0003] In the process of controlling the power-off of the chip power supply in the traditional method, the chip power supply can only be controlled to be powered off at the same time. Therefore, using the traditional method to control the power-off process of the chip power supply may cause the chip to work abnormally, and even cause the chip to be burned out. SUMMARY

[0004] Therefore, it is necessary to provide a power-off control circuit, method and computer equipment capable of safely performing power-off control in view of the above technical problems.

[0005] In a first aspect, the present application provides a power-off control circuit. The power-off control circuit comprises a voltage detection circuit and a control circuit; the voltage detection circuit is connected with a power supply and the control circuit respectively, and the control circuit is connected with each chip power supply module respectively;

[0006] The voltage detection circuit is configured to output a trigger signal to the control circuit when detecting that the output voltage of the power supply drops to a preset voltage threshold value; the output voltage of the power supply is used to provide an input voltage to the chip power supply module, and the preset voltage threshold value is not less than the minimum working voltage of the chip power supply module.

[0007] The control circuit is configured to control each chip power supply module to power off according to a preset power-off timing based on the trigger signal.

[0008] In the embodiment of the present application, a preset voltage threshold value not less than the minimum working voltage of the chip power module is set in advance, and the voltage detection circuit outputs a trigger signal to the control circuit when detecting that the output voltage of the power supply drops to the preset voltage threshold value. Since the output voltage of the power supply is used to provide an input voltage to the chip power module, at this time, the input voltage of the chip power module is greater than or equal to the minimum working voltage of the chip power module. Therefore, the chip power module can work normally. Then, the control circuit can control each chip power module to power down according to the preset power-down sequence according to the received trigger signal, so as to safely realize power-down control and avoid the problems of abnormal chip working or even chip burning caused by the traditional method. In addition, the power-down control circuit in the embodiment of the present application can be applied to different mainboards, and has no limitation on the type and number of chips on the PCIE board card. Therefore, by using the above power-down control circuit, the safety and stability of the chip power supply power-down control on the PCIE board card can be improved, and the product quality of the PCIE board card can be improved, so as to improve the product competitiveness related to the PCIE board card.

[0009] In one of the embodiments, the voltage detection circuit includes at least two voltage detection sub-circuits connected in parallel with each other, each of the voltage detection sub-circuits is connected with the control circuit, and different voltage detection sub-circuits are connected with different voltage output terminals of the power supply; the voltage output terminal is used to provide the output voltage of the power supply to the voltage detection sub-circuit.

[0010] The control circuit is used to control each chip power module to power down according to the preset power-down sequence according to the trigger signal when receiving the trigger signal output by at least one voltage detection sub-circuit.

[0011] In the embodiment of the present application, the voltage detection circuit includes at least two voltage detection sub-circuits connected in parallel with each other, each voltage detection sub-circuit is connected with the control circuit, and different voltage detection sub-circuits are connected with different voltage output terminals of the power supply. Since the voltage detection circuit includes at least two voltage detection sub-circuits connected in parallel with each other, when receiving the trigger signal output by at least one voltage detection sub-circuit, the control circuit can control each chip power module to power down according to the preset power-down sequence according to the trigger signal, so as to safely realize power-down control and avoid the problems of abnormal chip working or even chip burning caused by the traditional method.

[0012] In one of the embodiments, the voltage detection sub-circuit includes a voltage division circuit and a power management circuit; the voltage division circuit is connected with the power supply and the power management circuit respectively, the power management circuit is connected with the control circuit; and the trigger signal includes a reset signal.

[0013] The voltage dividing circuit is configured to divide the output voltage of the power supply and transmit the divided voltage to the power management circuit.

[0014] The power management circuit is configured to send a reset signal to a signal input end of the control circuit through a reset port of the power management circuit when detecting that the divided voltage drops to a preset voltage threshold.

[0015] In the embodiments, the voltage detection sub-circuit includes a voltage dividing circuit and a power management circuit. The voltage dividing circuit is connected with the power supply and the power management circuit respectively, and the power management circuit is connected with the control circuit. The voltage dividing circuit can divide the output voltage of the power supply and transmit the divided voltage to the power management circuit. Then, when detecting that the divided voltage drops to a preset voltage threshold, the power management circuit can send a reset signal to the signal input end of the control circuit through the reset port of the power management circuit.

[0016] In one of the embodiments, the voltage dividing circuit includes a first resistor and a second resistor. A first end of the first resistor is connected with the power supply, and a second end of the first resistor is connected with a first end of the second resistor. A second end of the second resistor is grounded.

[0017] The second end of the first resistor is connected with an input end of the power management circuit, and the second end of the second resistor is connected with a ground end of the power management circuit.

[0018] In the embodiments, the voltage dividing circuit includes a first resistor and a second resistor. The first resistor and the second resistor of the voltage dividing circuit can divide the output voltage of the power supply. The voltage dividing circuit is connected with the power management circuit, so that when detecting that the divided voltage drops to a preset voltage threshold, the power management circuit can send a reset signal to the control circuit through the reset port of the power management circuit.

[0019] In one of the embodiments, the voltage dividing circuit further includes a capacitor. The capacitor is connected with the second resistor in parallel. A first end of the capacitor is connected with the input end of the power management circuit, and a second end of the capacitor is connected with the ground end of the power management circuit.

[0020] In the embodiments, the voltage dividing circuit further includes a capacitor. The capacitor of the voltage dividing circuit can filter out noise to avoid noise interference of the circuit caused by the power supply. The voltage dividing circuit is connected with the power management circuit, so that when detecting that the divided voltage drops to a preset voltage threshold, the power management circuit can send a reset signal to the control circuit through the reset port of the power management circuit.

[0021] In one of the embodiments, the power-off control circuit further comprises an input circuit, and the at least two voltage detection sub-circuits in parallel with each other comprise a first voltage detection sub-circuit and a second voltage detection sub-circuit.

[0022] The first input terminal of the input circuit is connected with the first voltage detection sub-circuit, and the first input voltage is provided to the first voltage detection sub-circuit.

[0023] The second input terminal of the input circuit is connected with the second voltage detection sub-circuit and the chip power module, and the second input voltage is provided to the second voltage detection sub-circuit and the chip power module.

[0024] The third input terminal of the input circuit is connected with the voltage input terminal of the control circuit, and the third input voltage is provided to the voltage input terminal of the control circuit.

[0025] In the embodiments, the power-off control circuit further comprises an input circuit, and through the input circuit, different input voltages can be provided to the first voltage detection sub-circuit, the second voltage detection sub-circuit, the chip power module and the control circuit, respectively, so that the chip power module can be controlled to power off according to the power-off of the input voltages in the input circuit.

[0026] In one of the embodiments, the chip power module comprises a power conversion circuit and a chip power supply, the power conversion circuit is connected with the chip power supply, and the control circuit comprises a plurality of signal output terminals, each of which is connected with each power conversion circuit in the plurality of chip power modules.

[0027] The control circuit is configured to control each signal output terminal to send a control signal to the power conversion circuit in sequence according to the preset power-off sequence based on the trigger signal.

[0028] The power conversion circuit is configured to control the corresponding chip power supply to power off based on the control signal when the control signal is received.

[0029] In the embodiments, the chip power module comprises a power conversion circuit and a chip power supply, the power conversion circuit is connected with the chip power supply, and the control circuit comprises a plurality of signal output terminals, each of which is connected with each power conversion circuit in the plurality of chip power modules. According to the trigger signal, the control circuit can control each signal output terminal to send a control signal to the power conversion circuit in sequence according to the preset power-off sequence, and then the power conversion circuit can control the corresponding chip power supply to power off based on the received control signal.

[0030] In a second aspect, the application further provides a power-off control method applied to the power-off control circuit in any one of the embodiments of the first aspect. The method comprises:

[0031] Receive a power-down control request, and control the voltage detection circuit to detect the output voltage of the power supply according to the power-down control request;

[0032] When the output voltage of the power supply is detected to drop to a preset voltage threshold, a trigger signal is output to the control circuit through the voltage detection circuit; the output voltage of the power supply is used to provide input voltage to the chip power module, and the preset voltage threshold is not less than the minimum operating voltage of the chip power module;

[0033] The control circuit controls each chip power module to power down according to a preset power-down sequence based on the trigger signal.

[0034] In this embodiment, firstly, a power-down control request is received, and the voltage detection circuit is controlled to detect the output voltage of the power supply according to the power-down control request. Secondly, a preset voltage threshold value, which is not less than the minimum operating voltage of the chip power module, is pre-set. When the output voltage of the power supply is detected to drop to the preset voltage threshold value, a trigger signal is output to the control circuit through the voltage detection circuit. Since the output voltage of the power supply is used to provide input voltage to the chip power module, the input voltage of the chip power module at this time is greater than or equal to the minimum operating voltage of the chip power module. Therefore, the chip power module can operate normally. Then, through the control circuit, each normally functioning chip power module can be controlled to power down according to a preset power-down sequence based on the received trigger signal, thereby safely achieving power-down control and avoiding the problems that may occur in traditional methods, such as abnormal chip operation or even chip burnout.

[0035] In one embodiment, the voltage detection circuit includes at least two voltage detection sub-circuits connected in parallel, each of which is connected to the control circuit, and different voltage detection sub-circuits are connected to different voltage output terminals of the power supply; the voltage output terminal is used to provide the output voltage of the power supply to the voltage detection sub-circuit.

[0036] The step of controlling the voltage detection circuit to detect the output voltage of the power supply according to the power-down control request includes:

[0037] According to the power-down control request, control the at least two parallel voltage detection sub-circuits to detect the output voltage of the power supply;

[0038] The step of outputting a trigger signal to the control circuit through the voltage detection circuit when the output voltage of the power supply drops to a preset voltage threshold includes:

[0039] When the output voltage of the power supply detected by at least one of the voltage detection sub-circuits drops to the preset voltage threshold, the voltage detection sub-circuit outputs a trigger signal to the control circuit.

[0040] In the embodiments of the present application, at least two voltage detection sub-circuits are controlled to detect the output voltage of the power supply according to a power-off control request. When the output voltage of the power supply detected by at least one of the voltage detection sub-circuits drops to the preset voltage threshold, the voltage detection sub-circuit outputs a trigger signal to the control circuit. Since the voltage detection circuit includes at least two voltage detection sub-circuits, the power-off control circuit can control each chip power module to power off according to the preset power-off sequence through the voltage detection sub-circuit that outputs the trigger signal first.

[0041] In a third aspect, the present application further provides a computer device. The computer device includes a memory and a processor, the memory stores a computer program, and the processor implements the steps of the method in any one of the embodiments of the first aspect when executing the computer program.

[0042] The power-off control circuit, method and computer device described above, the power-off control circuit includes a voltage detection circuit and a control circuit; the voltage detection circuit is connected with the power supply and the control circuit respectively, and the control circuit is connected with each chip power module respectively; the voltage detection circuit is configured to output a trigger signal to the control circuit when detecting that the output voltage of the power supply drops to a preset voltage threshold; the output voltage of the power supply is used to provide an input voltage to the chip power module, and the preset voltage threshold is not less than the minimum working voltage of the chip power module; and the control circuit is configured to control each chip power module to power off according to a preset power-off sequence according to the trigger signal. The preset voltage threshold of the present application is not less than the minimum working voltage of the chip power module, and the voltage detection circuit can output a trigger signal to the control circuit when detecting that the output voltage of the power supply drops to the preset voltage threshold. Since the output voltage of the power supply is used to provide an input voltage to the chip power module, the input voltage of the chip power module at this time is greater than or equal to the minimum working voltage of the chip power module. Therefore, the chip power module can work normally. Then, the control circuit can control each chip power module that can work normally to power off according to the preset power-off sequence according to the received trigger signal, so that the power-off control can be safely realized, and the problems of abnormal chip working or even chip burning caused by the traditional method can be avoided. BRIEF DESCRIPTION OF DRAWINGS

[0043] Figure 1 FIG. 1 is a structural schematic diagram of a power-off control circuit in one embodiment of the present application;

[0044] Figure 2 FIG. 2 is a structural schematic diagram of a voltage detection circuit in one embodiment of the present application;

[0045] Figure 3 Structure diagram of voltage detection sub-circuit in one embodiment;

[0046] Figure 4 Connection diagram of voltage detection sub-circuit in one embodiment;

[0047] Figure 5 Structure diagram of power-down control circuit including input circuit in one embodiment;

[0048] Figure 6 Structure diagram of chip power module in one embodiment;

[0049] Figure 7 Connection diagram of power-down control circuit in one specific embodiment;

[0050] Figure 8 Flow diagram of power-down control method in one embodiment;

[0051] Figure 9 Internal structure diagram of computer device in one embodiment.

[0052] Explanation of reference signs:

[0053] 100: power-down control circuit; 200: power supply; 300: chip power module;

[0054] 120: voltage detection circuit; 140: control circuit; 160: input circuit;

[0055] 122: voltage detection sub-circuit; 122a: voltage dividing circuit; 122b: power management circuit;

[0056] R1: first resistor; R2: second resistor; C: capacitor;

[0057] VDD: input terminal; GND: ground terminal; RESET: reset port;

[0058] V1: first input terminal; V2: second input terminal; V3: third input terminal;

[0059] 124: first voltage detection sub-circuit; 126: second voltage detection sub-circuit;

[0060] 124a: voltage dividing circuit of first voltage detection sub-circuit 124; C1: first capacitor;

[0061] 124b: power management circuit of first voltage detection sub-circuit 124;

[0062] 126a: voltage dividing circuit of second voltage detection sub-circuit 126; C2: second capacitor;

[0063] R3: third resistor; R4: fourth resistor;

[0064] 126b: power management circuit of the second voltage detection sub-circuit 126;

[0065] 320: power conversion circuit; 340: chip power supply. DETAILED DESCRIPTION

[0066] In order to make the purpose, technical solutions and advantages of the present application more clear, the present application is further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application.

[0067] With the continuous development of PCIE (peripheral component interconnect express) related technology, PCIE board cards are widely used. Many chips on the PCIE board card have preset power sequence requirements for power supply, that is, when starting the power-consuming device (i.e., the power-on process) or closing the power-consuming device (i.e., the power-off or power-down process), the power supply of the chip needs to be controlled to turn on or off according to a certain time sequence.

[0068] In the traditional method, the +12V power supply and +3.3V power supply on the PCIE board card gold finger are connected with the GPIO pin input port of the CPLD chip, and the GPIO pin output port of the CPLD chip is connected with the enable pin of the DC-DC power conversion module. And the GPIO pin is programmed by the CPLD chip, so that the chip power supply is controlled by the DC-DC power conversion module to be powered off according to the preset power sequence. Among them, the DC-DC power conversion module is powered by the +12V power supply on the PCIE board card gold finger. And the working voltage of the DC-DC power conversion module needs to be higher than the standard voltage, which is higher than the voltage that the CPLD chip can detect after the +12V power supply is powered off. That is, if the working voltage of the DC-DC power conversion module is lower than the standard voltage, the chip power supply cannot be controlled by the DC-DC power conversion module to be powered off according to the preset power sequence, but only can be controlled to be powered off at the same time. Among them, the chip power supply is the power supply for supplying power to different chips.

[0069] However, when the electrical equipment is powered off or enters the sleep mode (i.e. the power-down or power-off process), the +12V power supply and the +3.3V power supply on the PCIE card gold finger will start to power down at the same time. At this time, the CPLD chip cannot monitor the power-down process of the +12V power supply and the +3.3V power supply, and can only receive the power-down signal when the +12V power supply and the +3.3V power supply are powered down to the voltage that can be detected by the CPLD chip. At the time when the voltage is powered down to the voltage that can be detected by the CPLD chip, the working voltage of the DC-DC power conversion module has already been lower than the standard voltage. Therefore, at this time in the process of powering down the chip power supply, the chip power supply cannot be controlled to be powered down in sequence according to the preset power supply timing through the power conversion module, but can only be controlled to be powered down at the same time. Therefore, using the traditional method to control the power-down process of the chip power supply may cause the chip to work abnormally, and even cause the chip to be burned out.

[0070] Therefore, it is necessary to provide a power-down control circuit capable of safely performing power-down control in view of the above technical problems. In one embodiment, a power-down control circuit is provided, which comprises: a voltage detection circuit and a control circuit; the voltage detection circuit is connected with the power supply and the control circuit respectively, and the control circuit is connected with each chip power supply module respectively;

[0071] The voltage detection circuit is configured to output a trigger signal to the control circuit when detecting that the output voltage of the power supply drops to a preset voltage threshold value; the output voltage of the power supply is used to provide an input voltage to the chip power supply module, and the preset voltage threshold value is not less than the minimum working voltage of the chip power supply module;

[0072] The control circuit is configured to control each chip power supply module to power down according to a preset power-down timing according to the trigger signal.

[0073] Specifically, as shown in FIG. 1, Figure 1 Figure 1 ​Fig. 1 is a schematic diagram of a power-off control circuit according to an embodiment. The power-off control circuit 100 comprises a voltage detection circuit 120 and a control circuit 140. The voltage detection circuit 120 is connected to a power supply 200 and the control circuit 140, respectively. The control circuit 140 is connected to chip power supply modules 300. The voltage detection circuit 120 is configured to output a trigger signal to the control circuit 140 when detecting that the output voltage of the power supply 200 drops to a preset voltage threshold. The control circuit 140 is configured to control the chip power supply modules 300 to power off according to a preset power-off sequence based on the trigger signal. The power supply 200 refers to a power supply on an electrical device. When the electrical device is powered off or enters a sleep mode (i.e. a power-off or power-down process), the voltage of the power supply on the electrical device will drop. The output voltage of the power supply 200 is used to provide an input voltage to the chip power supply modules 300. The preset voltage threshold is not less than the minimum working voltage of the chip power supply modules 300. The trigger signal is used to indicate that the power supply 200 is powering down, and at this time, the power supply voltage in the power-down process is not less than the minimum working voltage of the chip power supply modules 300, i.e. at this time, the chip power supply modules 300 can work normally. The preset power-off sequence is a time sequence of the chip power supply modules 300 powering off, which is set in the control circuit 140 in advance. The chip power supply refers to a power supply for supplying power to different chips.

[0074] The power-off control circuit includes a voltage detection circuit and a control circuit; the voltage detection circuit is connected with the power supply and the control circuit respectively, and the control circuit is connected with each chip power module respectively; the voltage detection circuit is configured to output a trigger signal to the control circuit when detecting that the output voltage of the power supply drops to a preset voltage threshold; the output voltage of the power supply is used to provide an input voltage for the chip power module, and the preset voltage threshold is not less than the minimum working voltage of the chip power module; and the control circuit is configured to control each chip power module to power off according to a preset power-off sequence based on the trigger signal. The preset voltage threshold of the present application is not less than the minimum working voltage of the chip power module, and the voltage detection circuit can output a trigger signal to the control circuit when detecting that the output voltage of the power supply drops to the preset voltage threshold. Since the output voltage of the power supply is used to provide an input voltage for the chip power module, the input voltage of the chip power module at this time is greater than or equal to the minimum working voltage of the chip power module. Therefore, the chip power module can work normally. Then, the control circuit can control each chip power module that can work normally to power off according to the received trigger signal, thereby safely realizing power-off control and avoiding the problems of chip working abnormally and even chip being burned caused by the traditional method. In addition, the power-off control circuit in the present application can be applied to different mainboards, and the type and quantity of chips on the PCIE board card are not limited. Therefore, the above power-off control circuit can not only improve the safety and stability of the chip power supply power-off control on the PCIE board card, but also improve the product quality of the PCIE board card, thereby improving the product competitiveness related to the PCIE board card.

[0075] In one embodiment, the voltage detection circuit includes at least two mutually parallel voltage detection sub-circuits, each voltage detection sub-circuit being connected with the control circuit, and different voltage detection sub-circuits being connected with different voltage output ends of the power supply; the voltage output end is used to provide the output voltage of the power supply to the voltage detection sub-circuit.

[0076] The control circuit is configured to control each chip power module to power off according to a preset power-off sequence based on the trigger signal when receiving the trigger signal output by at least one voltage detection sub-circuit.

[0077] Specifically, as shown in Figure 2 , the voltage detection circuit includes at least two mutually parallel voltage detection sub-circuits, each voltage detection sub-circuit being connected with the control circuit, and different voltage detection sub-circuits being connected with different voltage output ends of the power supply; the voltage output end is used to provide the output voltage of the power supply to the voltage detection sub-circuit. Figure 2Fig. 1 is a schematic diagram of a voltage detection circuit according to an embodiment of the present application. The voltage detection circuit 120 includes at least two voltage detection sub-circuits 122 connected in parallel. Each voltage detection sub-circuit 122 is connected to a control circuit 140. Since the power supply 200 includes different output voltages, different voltage detection sub-circuits 122 are connected to different output voltages of the power supply 200. The control circuit 140 is configured to control the chip power supply modules 300 to power off according to a preset power-off sequence upon receiving a trigger signal output by at least one voltage detection sub-circuit 122. For example, in a case where the at least two voltage detection sub-circuits 122 include two voltage detection sub-circuits 122, the control circuit 140 can control the chip power supply modules 300 to power off according to the preset power-off sequence upon receiving a trigger signal output by a first voltage detection sub-circuit 122, or the control circuit 140 can control the chip power supply modules 300 to power off according to the preset power-off sequence upon receiving a trigger signal output by a second voltage detection sub-circuit 122. In the embodiment of the present application, the voltage detection sub-circuit 122 that outputs the trigger signal first controls the chip power supply modules 300 to power off according to the preset power-off sequence.

[0078] In the embodiment of the present application, the voltage detection circuit includes at least two voltage detection sub-circuits connected in parallel, each voltage detection sub-circuit is connected to a control circuit, and different voltage detection sub-circuits are connected to different voltage output terminals of a power supply. The voltage output terminal is configured to provide an output voltage of the power supply to the voltage detection sub-circuit. Since the voltage detection circuit includes at least two voltage detection sub-circuits connected in parallel, upon receiving a trigger signal output by at least one voltage detection sub-circuit, the control circuit can control the chip power supply modules to power off according to the trigger signal, thereby safely realizing power-off control and avoiding problems such as abnormal chip operation or even chip burning that can occur in traditional methods.

[0079] In one embodiment, the voltage detection sub-circuit includes a voltage dividing circuit and a power management circuit. The voltage dividing circuit is connected to the power supply and the power management circuit, and the power management circuit is connected to the control circuit. The trigger signal includes a reset signal.

[0080] The voltage dividing circuit is configured to divide the output voltage of the power supply and transmit the divided voltage to the power management circuit.

[0081] The power management circuit is configured to send a reset signal to a signal input terminal of the control circuit through a reset port of the power management circuit when detecting that the divided voltage drops to a preset voltage threshold.

[0082] Specifically, as shown in Fig. 2, the voltage detection circuit 120 includes two voltage detection sub-circuits 122 connected in parallel. Each voltage detection sub-circuit 122 is connected to a control circuit 140. The control circuit 140 is configured to control the chip power supply modules 300 to power off according to a preset power-off sequence upon receiving a trigger signal output by at least one voltage detection sub-circuit 122. For example, in a case where the at least two voltage detection sub-circuits 122 include two voltage detection sub-circuits 122, the control circuit 140 can control the chip power supply modules 300 to power off according to the preset power-off sequence upon receiving a trigger signal output by a first voltage detection sub-circuit 122, or the control circuit 140 can control the chip power supply modules 300 to power off according to the preset power-off sequence upon receiving a trigger signal output by a second voltage detection sub-circuit 122. In the embodiment of the present application, the voltage detection sub-circuit 122 that outputs the trigger signal first controls the chip power supply modules 300 to power off according to the preset power-off sequence. Figure 3 Figure 3 ​Fig. 1 is a schematic diagram of a voltage detection sub-circuit in one embodiment. The voltage detection sub-circuit 122 includes a voltage dividing circuit 122a and a power management circuit 122b. One end of the voltage dividing circuit 122a is connected to the power supply 200, the other end of the voltage dividing circuit 122a is connected to one end of the power management circuit 122b, and the other end of the power management circuit 122b is connected to the control circuit 140. The voltage dividing circuit 122a is configured to divide the output voltage of the power supply and transmit the divided voltage to the power management circuit 122b. The power management circuit 122b is configured to send a reset signal to the signal input end of the control circuit 140 through the reset port of the power management circuit 122b when the divided voltage is detected to drop to a preset voltage threshold. The trigger signal includes the reset signal. The reset signal is used to indicate that the power supply 200 is powering off, and the power supply voltage during the powering off is not less than the minimum working voltage of the chip power module 300, i.e., the chip power module 300 can work normally at this time. For example, the power management circuit 122b can include a power management chip, such as an RT9818 power management chip, and adopt an SOT23 package. Of course, the embodiment of the present application does not limit the model and packaging method of the power management chip. When different models and packaging methods of the power management chip are used, different preset voltage thresholds can be set in advance.

[0083] In the embodiment of the present application, the voltage detection sub-circuit includes a voltage dividing circuit and a power management circuit. The voltage dividing circuit is connected to the power supply and the power management circuit, and the power management circuit is connected to the control circuit. The voltage dividing circuit can divide the output voltage of the power supply and transmit the divided voltage to the power management circuit. Then, when the divided voltage is detected to drop to a preset voltage threshold, the power management circuit can send a reset signal to the signal input end of the control circuit through the reset port of the power management circuit.

[0084] In one embodiment, the voltage dividing circuit includes a first resistor and a second resistor. The first end of the first resistor is connected to the power supply, and the second end of the first resistor is connected to the first end of the second resistor. The second end of the second resistor is grounded.

[0085] The second end of the first resistor is connected to the input end of the power management circuit, and the second end of the second resistor is connected to the ground end of the power management circuit.

[0086] The voltage dividing circuit further includes a capacitor connected in parallel to the second resistor. The first end of the capacitor is connected to the input end of the power management circuit, and the second end of the capacitor is connected to the ground end of the power management circuit.

[0087] Specifically, as shown in Fig. 2, the voltage dividing circuit includes a first resistor R1, a second resistor R2, and a capacitor C1. The first end of the first resistor R1 is connected to the power supply 200, the second end of the first resistor R1 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is grounded. The first end of the capacitor C1 is connected to the input end of the power management circuit 122b, and the second end of the capacitor C1 is connected to the ground end of the power management circuit 122b. Figure 4 Figure 4 ​Figure 2 shows a connection diagram of the voltage detection sub-circuit in one embodiment. The voltage dividing circuit 122a includes a first resistor R1 and a second resistor R2. The first end of the first resistor R1 is connected to the power supply 200, the second end of the first resistor R1 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is grounded. The power management circuit 122b includes an input terminal VDD, a ground terminal GND, and a reset port RESET. The second end of the first resistor R1 is connected to the input terminal VDD of the power management circuit 122b, the second end of the second resistor R2 is connected to the ground terminal GND of the power management circuit 122b, and the reset port RESET is connected to the control circuit 140. In addition, the voltage dividing circuit 122a further includes a capacitor C connected in parallel with the second resistor R2. The first end of the capacitor C is connected to the input terminal VDD of the power management circuit 122b, and the second end of the capacitor C is connected to the ground terminal GND of the power management circuit 122b. The capacitor C is used to filter out noise to prevent the noise carried by the power supply 200 from interfering with the circuit. The formula for calculating the voltage dividing value VDD of the power supply 200 is shown in formula (1):

[0088]

[0089] wherein VDD is the voltage dividing value of the power supply 200 after voltage dividing, R1 is the first resistor, R2 is the second resistor, and V is the output voltage of the power supply 200.

[0090] In the embodiment of the present application, the voltage dividing circuit includes a first resistor, a second resistor, and a capacitor connected in parallel with the second resistor. The first end of the first resistor is connected to the power supply, and the second end of the first resistor is connected to the first end of the second resistor. The second end of the second resistor is grounded. The second end of the first resistor is connected to the input terminal of the power management circuit, and the second end of the second resistor is connected to the ground terminal of the power management circuit. The first end of the capacitor is connected to the input terminal of the power management circuit, and the second end of the capacitor is connected to the ground terminal of the power management circuit. The first resistor and the second resistor of the voltage dividing circuit can divide the output voltage of the power supply. The capacitor of the voltage dividing circuit can filter out noise to prevent the noise carried by the power supply from interfering with the circuit. By connecting the voltage dividing circuit to the power management circuit, a reset signal can be sent to the control circuit through the reset port of the power management circuit when the voltage after voltage dividing drops to the preset voltage threshold.

[0091] In one embodiment, the power-down control circuit further includes an input circuit, and the at least two mutually parallel voltage detection sub-circuits include a first voltage detection sub-circuit and a second voltage detection sub-circuit.

[0092] The first input terminal of the input circuit is connected to the first voltage detection sub-circuit to provide a first input voltage to the first voltage detection sub-circuit.

[0093] The second input end of the input circuit is connected with the second voltage detection sub-circuit and the chip power module, and provides a second input voltage to the second voltage detection sub-circuit and the chip power module.

[0094] The third input end of the input circuit is connected with the voltage input end of the control circuit, and provides a third input voltage to the voltage input end of the control circuit.

[0095] Specifically, as shown in Figure 5 , Figure 5 is a structural schematic diagram of the power-off control circuit including the input circuit in one embodiment. The power-off control circuit 100 further includes an input circuit 160, which includes a first input end V1, a second input end V2 and a third input end V3. The at least two mutually parallel voltage detection sub-circuits include a first voltage detection sub-circuit 124 and a second voltage detection sub-circuit 126. The first input end V1 of the input circuit 160 is connected with the first voltage detection sub-circuit 124, and provides a first input voltage to the first voltage detection sub-circuit 124. The second input end V2 of the input circuit 160 is connected with the second voltage detection sub-circuit 126 and the chip power module 300, and provides a second input voltage to the second voltage detection sub-circuit 126 and the chip power module 300. The third input end V3 of the input circuit 160 is connected with the voltage input end of the control circuit 140, and provides a third input voltage to the voltage input end of the control circuit 140. Wherein, the power supply 200 on the electric device is connected with the first input end V1, the second input end V2 and the third input end V3 in the input circuit 160 (which can be a PCIE board card gold finger). The first input voltage can be +3.3V, the second input voltage can be +12V, and the third input voltage can be +3.3V auxiliary voltage (3.3VAUX).

[0096] In the embodiment of the present application, the power-off control circuit further includes an input circuit, and the at least two mutually parallel voltage detection sub-circuits include a first voltage detection sub-circuit and a second voltage detection sub-circuit; the first input end of the input circuit is connected with the first voltage detection sub-circuit, and provides a first input voltage to the first voltage detection sub-circuit; the second input end of the input circuit is connected with the second voltage detection sub-circuit and the chip power module, and provides a second input voltage to the second voltage detection sub-circuit and the chip power module; and the third input end of the input circuit is connected with the voltage input end of the control circuit, and provides a third input voltage to the voltage input end of the control circuit. Through the input circuit, different input voltages can be provided to the first voltage detection sub-circuit, the second voltage detection sub-circuit, the chip power module and the control circuit respectively, so that the chip power module can be controlled to power off according to the power-off of the input voltage in the input circuit.

[0097] In one embodiment, the chip power module comprises a power conversion circuit and a chip power supply; the power conversion circuit is connected with the chip power supply; the control circuit comprises a plurality of signal output terminals, each signal output terminal is connected with each power conversion circuit in the plurality of chip power modules respectively;

[0098] The control circuit is configured to control each signal output terminal to send a control signal to the power conversion circuit according to a trigger signal and in a preset power-off sequence.

[0099] The power conversion circuit is configured to control the corresponding chip power supply to power off according to the control signal when the control signal is received.

[0100] Specifically, as shown in Figure 6 , Figure 6 is a structural schematic diagram of the chip power module in one embodiment. The chip power module 300 comprises a power conversion circuit 320 and a chip power supply 340. The power conversion circuit 320 is connected with the chip power supply 340. The control circuit 140 comprises a plurality of signal output terminals, each signal output terminal is connected with each power conversion circuit 320 in the plurality of chip power modules 300 respectively. The control circuit 140 is configured to control each signal output terminal to send a control signal to the power conversion circuit 320 according to a trigger signal and in a preset power-off sequence. The power conversion circuit 320 is configured to control the corresponding chip power supply 340 to power off according to the control signal when the control signal is received. The control circuit 140 can comprise a CPLD chip, the CPLD chip comprises a plurality of signal output terminals (GPIO3 to GPIOn). Each signal output terminal (GPIO3 to GPIOn), each power conversion circuit 320 and each chip power supply 340 have a one-to-one correspondence. The power conversion circuit 320 can be a DC-DC power conversion module. The plurality of DC-DC power conversion modules comprise a plurality of enable pins EN. Each DC-DC power conversion module comprises a corresponding enable pin EN.

[0101] In the embodiment of the application, the chip power module comprises a power conversion circuit and a chip power supply; the power conversion circuit is connected with the chip power supply; the control circuit comprises a plurality of signal output terminals, each signal output terminal is connected with each power conversion circuit in the plurality of chip power modules respectively. According to a trigger signal, the control circuit can control each signal output terminal to send a control signal to the power conversion circuit according to a preset power-off sequence, and then the power conversion circuit can control the corresponding chip power supply to power off according to the received control signal.

[0102] In one specific embodiment, a power-off control circuit is provided. As shown in Figure 7 , Figure 7A connection diagram of the power-off control circuit in a specific embodiment is shown. The power-off control circuit 100 includes a voltage detection circuit 120, a control circuit 140 and an input circuit 160. The voltage detection circuit 120 includes at least two mutually parallel voltage detection sub-circuits 122, which include a first voltage detection sub-circuit 124 and a second voltage detection sub-circuit 126. The first voltage detection sub-circuit 124 includes a voltage division circuit 124a and a power management circuit 124b, the voltage division circuit 124a includes a first resistor R1, a second resistor R2 and a first capacitor C1, and the first capacitor C1 is connected in parallel with the second resistor R2; the power management circuit 124b includes an input terminal VDD, a ground terminal GND and a reset port RESET. The second voltage detection sub-circuit 126 includes a voltage division circuit 126a and a power management circuit 126b, the voltage division circuit 126a includes a third resistor R3, a fourth resistor R4 and a second capacitor C2, and the second capacitor C2 is connected in parallel with the fourth resistor R4; the power management circuit 126b includes an input terminal VDD, a ground terminal GND and a reset port RESET. The control circuit 140 can include a CPLD chip, and the control circuit 140 includes a voltage input terminal, at least two signal input terminals and a plurality of signal output terminals (GPIO3 to GPIOn). In this embodiment, the CPLD chip includes two signal input terminals GPIO1 and GPIO2. The input circuit 160 includes a first input terminal V1, a second input terminal V2 and a third input terminal V3. The chip power module 300 includes a plurality of power conversion circuits 320 and a plurality of chip power supplies 340. The power conversion circuit 320 can be a DC-DC power conversion module. The plurality of DC-DC power conversion modules include a plurality of enable pins EN.

[0103] The power supply 200 on the electrical equipment is connected to the first input terminal V1, the second input terminal V2 and the third input terminal V3 in the input circuit 160 (which can be a PCIE board card gold finger). The output voltage of the power supply 200 is used to provide an input voltage to the chip power module 300. The first input terminal V1 of the input circuit 160 is connected to the first end of the first resistor R1 in the first voltage detection sub-circuit 124, which is used to provide a first input voltage (+3.3V) to the first voltage detection sub-circuit 124. The second input terminal V2 of the input circuit 160 is connected to the first end of the third resistor R3 in the second voltage detection sub-circuit 126 and each power conversion circuit 320 in the chip power module 300, respectively, which is used to provide a second input voltage (+12V) to the second voltage detection sub-circuit 126 and each power conversion circuit 320 in the chip power module 300. The third input terminal V3 of the input circuit 160 is connected to the voltage input terminal of the control circuit 140, which provides a third input voltage (+3.3V auxiliary voltage) to the voltage input terminal of the control circuit.

[0104] In the first voltage detection sub-circuit 124, the second end of the first resistor R1 is connected with the first end of the second resistor R2, and the second end of the second resistor R2 is grounded. The second end of the first resistor R1 is also connected with the input end VDD of the power management circuit 124b in the first voltage detection sub-circuit 124, and the second end of the second resistor R2 is also connected with the ground end GND of the power management circuit 124b. In addition, the first end of the first capacitor C1 is connected with the input end VDD of the power management circuit 124b, and the second end of the first capacitor C1 is connected with the ground end GND of the power management circuit 124b. The reset port RESET in the first voltage detection sub-circuit 124 is connected with the signal input end GPIO1 in the control circuit 140.

[0105] In the second voltage detection sub-circuit 126, the second end of the third resistor R3 is connected with the first end of the fourth resistor R4, and the second end of the fourth resistor R4 is grounded. The second end of the third resistor R3 is also connected with the input end VDD of the power management circuit 126b in the second voltage detection sub-circuit 126, and the second end of the fourth resistor R4 is also connected with the ground end GND of the power management circuit 126b. In addition, the first end of the second capacitor C2 is connected with the input end VDD of the power management circuit 126b, and the second end of the second capacitor C2 is connected with the ground end GND of the power management circuit 126b. The reset port RESET in the second voltage detection sub-circuit 126 is connected with the signal input end GPIO2 in the control circuit 140.

[0106] The signal output ends (GPIO3 to GPIOn) in the control circuit 140 are respectively connected with the enable pins EN of the power conversion circuits 320 in the chip power modules 300, and the power conversion circuits 320 are connected with the chip powers 340. The signal output ends (GPIO3 to GPIOn), the power conversion circuits 320 and the chip powers 340 are in one-to-one correspondence.

[0107] Voltage divider circuit 122a (including voltage divider circuits 124a and 126a) is used to divide the output voltage of the power supply and transmit the divided voltage to the power management circuit 122b. Power management circuit 122b (including power management circuits 124b and 126b) is used to send a reset signal to the signal input terminal of control circuit 140 through its reset port RESET when the divided voltage is detected to have dropped to a preset voltage threshold. The preset voltage threshold is not less than the minimum operating voltage of the chip power module; the trigger signal includes the reset signal. Control circuit 140 is used to, upon receiving a trigger signal from at least one voltage detection sub-circuit (first voltage detection sub-circuit 124 or second voltage detection sub-circuit 126), sequentially control each signal output terminal to send control signals to power conversion circuit 320 according to a preset power-down sequence. Power conversion circuit 320, upon receiving the control signal, controls the corresponding chip power supply 340 to power down according to the control signal.

[0108] The aforementioned power-down control circuit includes a voltage detection circuit and a control circuit. The voltage detection circuit is connected to both the power supply and the control circuit, and the control circuit is connected to each chip power module. The voltage detection circuit outputs a trigger signal to the control circuit when it detects that the output voltage of the power supply has dropped to a preset voltage threshold. The output voltage of the power supply is used to provide input voltage to the chip power modules, and the preset voltage threshold is not less than the minimum operating voltage of the chip power modules. The control circuit controls each chip power module to power down according to a preset power-down sequence based on the trigger signal. In this embodiment, a preset voltage threshold not less than the minimum operating voltage of the chip power modules is pre-set, and the voltage detection circuit outputs a trigger signal to the control circuit when the output voltage of the power supply is detected to have dropped to the preset voltage threshold. Since the output voltage of the power supply is used to provide input voltage to the chip power modules, the input voltage of the chip power modules at this time is greater than or equal to the minimum operating voltage of the chip power modules. Therefore, the chip power modules can operate normally. Afterwards, the control circuit can control the power modules of each chip that can work normally to power down according to the preset power-down sequence based on the received trigger signal, thereby safely realizing power-down control and avoiding the problems that may occur in the traditional method, such as abnormal chip operation or even chip burnout.

[0109] In one embodiment, such as Figure 8 As shown, a power-down control method is provided, which is applied to the power-down control circuit 100 described above. The power-down control method includes the following steps:

[0110] Step 820: Receive a power-down control request, and control the voltage detection circuit to detect the output voltage of the power supply according to the power-down control request.

[0111] Specifically, when the power-consuming device is powered off or enters a sleep mode (i.e., a power-down process), the power-down control circuit 100 can receive a power-down control request. Then, according to the received power-down control request, the power-down control circuit 100 can control the voltage detection circuit to detect the output voltage of the power supply on the power-consuming device in the power-down process. The power supply on the power-consuming device is connected with the first input end, the second input end and the third input end in the input circuit (which can be a PCIE board card gold finger), and is used to provide the first input voltage (+3.3V), the second input voltage (+12V) and the third input voltage (+3.3V auxiliary voltage), respectively.

[0112] At step 840, when the output voltage of the power supply drops to a preset voltage threshold, the voltage detection circuit outputs a trigger signal to the control circuit; the output voltage of the power supply is used to provide an input voltage to the chip power module, and the preset voltage threshold is not less than the minimum working voltage of the chip power module.

[0113] Specifically, the voltage detection circuit detects the output voltage of the power supply, and when the voltage detection circuit detects that the output voltage of the power supply drops to a preset voltage threshold, the power-down control circuit 100 can output a trigger signal to the control circuit through the voltage detection circuit. The output voltage of the power supply is used to provide an input voltage to the chip power module, and the preset voltage threshold is not less than the minimum working voltage of the chip power module. The trigger signal includes a reset signal. The condition for the voltage detection circuit to output the trigger signal to the control circuit is that the output voltage of the power supply drops to the preset voltage threshold, that is, in the process of the output voltage of the power supply dropping, when the voltage detection circuit detects that the output voltage of the power supply is just less than the preset voltage threshold, it can output the trigger signal to the control circuit.

[0114] At step 860, the control circuit controls each chip power module to be powered down according to the preset power-down sequence.

[0115] Specifically, according to the trigger signal received by the control circuit, the power-off control circuit 100 can control each chip power module connected with the control circuit to power off according to the preset power-off sequence through the control circuit. The trigger signal is used to represent that the power supply is powering off, and at this time, the power supply voltage in the power-off process is not less than the minimum working voltage of the chip power module, that is, the chip power module can work normally at this time. The control circuit includes a CPLD chip, and the plurality of chip power modules include a plurality of power conversion circuits and a plurality of chip power supplies. Each chip power module includes a DC-DC power conversion module and a corresponding chip power supply. By logically programming each GPIO pin (i.e., at least two signal input ends and a plurality of signal output ends GPIO3 to GPIOn) in the CPLD chip, the delay control of each DC-DC power conversion module to power off each chip power supply according to the preset power-off sequence can be realized. The preset power-off sequence is the time sequence of the power-off of the chip power supply which is set in the control circuit in advance. The chip power supply refers to the power supply for supplying power to each chip.

[0116] In the above power-off control method, first, a power-off control request is received, and the output voltage of the power supply is detected by the voltage detection circuit according to the power-off control request. Secondly, a preset voltage threshold value not less than the minimum working voltage of the chip power module is set in advance, so that when the output voltage of the power supply is detected to drop to the preset voltage threshold value, the voltage detection circuit outputs a trigger signal to the control circuit. Since the output voltage of the power supply is used to provide an input voltage to the chip power module, at this time, the input voltage of the chip power module is greater than or equal to the minimum working voltage of the chip power module. Therefore, the chip power module can work normally. Then, according to the received trigger signal, the control circuit can control each chip power module that can work normally to power off according to the preset power-off sequence, so that the power-off control can be safely realized, and the problems of abnormal chip operation and even chip burning caused by the traditional method can be avoided.

[0117] In one embodiment, the voltage detection circuit includes at least two mutually parallel voltage detection sub-circuits, each voltage detection sub-circuit is connected with the control circuit, and different voltage detection sub-circuits are connected with different voltage output ends of the power supply; the voltage output end is used to provide the output voltage of the power supply to the voltage detection sub-circuit;

[0118] According to the power-off control request, the voltage detection circuit detects the output voltage of the power supply, including:

[0119] According to the power-off control request, the voltage detection circuit detects the output voltage of the power supply, including:

[0120] Specifically, according to the received power-off control request, the power-off control circuit 100 can control at least two mutually parallel voltage detection sub-circuits in the voltage detection circuit to detect the output voltage of each power supply on the power-using device during the power-off process. For example, when the voltage detection sub-circuit includes a first voltage detection sub-circuit and a second voltage detection sub-circuit, and each power supply on the power-using device includes a first power supply and a second power supply, the output voltage of the first power supply on the power-using device can be detected by the first voltage detection sub-circuit, i.e., the first input voltage (+3.3V) provided by the first input end in the input circuit (i.e., the PCIE board card gold finger); and the output voltage of the second power supply on the power-using device can be detected by the second voltage detection sub-circuit, i.e., the second input voltage (+12V) provided by the second input end in the input circuit (i.e., the PCIE board card gold finger).

[0121] When the output voltage of the power supply drops to the preset voltage threshold, the voltage detection circuit outputs a trigger signal to the control circuit, including:

[0122] When the output voltage of the power supply drops to the preset voltage threshold, the voltage detection sub-circuit outputs a trigger signal to the control circuit.

[0123] Specifically, when the output voltage of the power supply drops to the preset voltage threshold, the power-off control circuit 100 can output a trigger signal to the control circuit through the voltage detection sub-circuit. For example, when the voltage detection sub-circuit includes a first voltage detection sub-circuit and a second voltage detection sub-circuit, the power-off control circuit 100 can output a trigger signal to the control circuit through the first voltage detection sub-circuit; the power-off control circuit 100 can also output a trigger signal to the control circuit through the second voltage detection sub-circuit. In the embodiment of the present application, the voltage detection sub-circuit that first outputs a trigger signal to the control circuit is used to control each chip power module to power off according to the preset power-off sequence.

[0124] In the embodiment, according to the power-off control request, at least two mutually parallel voltage detection sub-circuits are controlled to detect the output voltage of the power supply. When the output voltage of the power supply drops to the preset voltage threshold, the voltage detection sub-circuit outputs a trigger signal to the control circuit. Since the voltage detection circuit includes at least two voltage detection sub-circuits, the power-off control circuit can control each chip power module to power off according to the preset power-off sequence through the voltage detection sub-circuit that first outputs a trigger signal to the control circuit.

[0125] It should be understood that although each step in the flowchart involved in the above embodiments is shown in sequence according to the arrow, the steps are not necessarily executed in the order indicated by the arrow. Unless otherwise specified herein, the execution of the steps is not strictly limited in sequence, and the steps can be executed in other orders. Moreover, at least part of the steps in the flowchart involved in the above embodiments can include multiple steps or multiple stages, which are not necessarily executed at the same time, but can be executed at different times, and the execution order of the steps or stages is not necessarily sequential, but can be alternately or alternately executed with at least part of other steps or steps or stages in other steps.

[0126] In one embodiment, a computer device, which can be a server, is provided, and an internal structure diagram of the computer device can be as shown in Figure 9 The computer device includes a processor, a memory, an input / output interface (I / O) and a communication interface. Among them, the processor, the memory and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capability. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operating system and the computer program in the non-volatile storage medium to run. The database of the computer device is used to store power-off control data. The input / output interface of the computer device is used to exchange information between the processor and external devices. The communication interface of the computer device is used to communicate with external terminals through network connection. The computer program is executed by the processor to implement a power-off control method.

[0127] Those skilled in the art can understand that Figure 9 The structure shown in the above embodiment is only a block diagram of part of the structure related to the scheme of the present application, and does not constitute a limitation on the computer device to which the scheme of the present application is applied. The specific computer device can include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0128] In one embodiment, a computer device is provided, which includes the power-off control circuit described above.

[0129] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by a computer program instructing related hardware. The computer program for presetting a voltage threshold can be stored in a non-volatile computer readable storage medium. When the computer program is executed, the processes of the above-mentioned embodiments of the methods can be included. Any reference to a memory, a database or other medium used in the embodiments provided in the present application can include at least one of a non-volatile memory and a volatile memory. The non-volatile memory can include a read-only memory (ROM), a magnetic tape, a floppy disk, a flash memory, an optical storage, a high-density embedded non-volatile memory, a resistive memory (ReRAM), a magnetoresistive random access memory (MRAM), a ferroelectric memory (FRAM), a phase change memory (PCM), a graphene memory, etc. The volatile memory can include a random access memory (RAM) or an external cache memory, etc. As an illustration but not limitation, the RAM can be in various forms, such as a static random access memory (SRAM) or a dynamic random access memory (DRAM), etc. The database involved in the embodiments provided in the present application can include at least one of a relational database and a non-relational database. The non-relational database can include a distributed database based on a block chain, etc., without being limited thereto. The processor involved in the embodiments provided in the present application can be a general-purpose processor, a central processing unit, a graphics processing unit, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., without being limited thereto.

[0130] Any combination of the technical features of the above embodiments can be made. In order to make the description simple, all possible combinations of the technical features in the above embodiments are not described, however, as long as the combination of the technical features does not exist, it should be considered as the scope of the present application.

[0131] The above embodiments only express several implementation manners of the present application, and the description is more specific and detailed, but it should not be understood as a limitation on the scope of the patent of the present application. It should be noted that, for those skilled in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are all within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A power down control circuit, characterized by, The power-off control circuit comprises a voltage detection circuit and a control circuit, the voltage detection circuit comprises a plurality of voltage detection sub-circuits, the voltage detection sub-circuit comprises a voltage division circuit and a power management circuit; the voltage division circuit is connected with the power supply and the power management circuit respectively, the power management circuit is connected with the control circuit, and the control circuit is connected with each chip power module; the voltage division circuit comprises a first resistor, a second resistor and a capacitor, the first end of the first resistor is connected with the power supply, and the second end of the first resistor is connected with the first end of the second resistor; the second end of the second resistor is grounded; the second end of the first resistor is connected with the input end of the power management circuit, and the second end of the second resistor is connected with the ground end of the power management circuit; the capacitor is connected with the second resistor in parallel; the first end of the capacitor is connected with the input end of the power management circuit, and the second end of the capacitor is connected with the ground end of the power management circuit; The voltage division circuit is used for dividing the output voltage of the power supply through the first resistor and the second resistor, filtering the noise carried by the divided voltage through the capacitor, and transmitting the voltage after filtering the noise to the power management circuit; the output voltage of the power supply is used for providing an input voltage to the chip power module; The power management circuit is used for sending a reset signal to the signal input end of the control circuit through the reset port of the power management circuit when detecting that the divided voltage drops to a preset voltage threshold; the reset signal is used for indicating that the power supply is powering off, and the power supply voltage in the power-off process is not less than the minimum working voltage of the chip power module; the preset voltage threshold is not less than the minimum working voltage of the chip power module; The control circuit is used for controlling each chip power module to power off in a preset power-off sequence according to the reset signal.

2. The power down control circuit of claim 1, wherein, The voltage detection circuit comprises at least two voltage detection sub-circuits connected in parallel with each other, each voltage detection sub-circuit is connected with the control circuit, and different voltage detection sub-circuits are connected with different voltage output ends of the power supply; the voltage output end is used for providing the output voltage of the power supply to the voltage detection sub-circuit; The control circuit is used for controlling each chip power module to power off in a preset power-off sequence according to the trigger signal when receiving the trigger signal output by at least one voltage detection sub-circuit.

3. The power down control circuit according to claim 1 or 2, c h a r a c t e r i z e d b y The power-off control circuit further comprises an input circuit, and the at least two voltage detection sub-circuits connected in parallel with each other comprise a first voltage detection sub-circuit and a second voltage detection sub-circuit; The first input end of the input circuit is connected with the first voltage detection sub-circuit, and a first input voltage is provided to the first voltage detection sub-circuit; The second input end of the input circuit is connected with the second voltage detection sub-circuit and the chip power module, and a second input voltage is provided to the second voltage detection sub-circuit and the chip power module; The third input end of the input circuit is connected with the voltage input end of the control circuit, and a third input voltage is provided to the voltage input end of the control circuit.

4. The power down control circuit of claim 1, wherein, The chip power module comprises a power conversion circuit and a chip power supply; the power conversion circuit is connected with the chip power supply; the control circuit comprises a plurality of signal output ends, and each signal output end is connected with each power conversion circuit in the plurality of chip power modules respectively; The control circuit is configured to control each signal output end to send a control signal to the power conversion circuit according to a trigger signal and in a preset power-off sequence. The power conversion circuit is configured to control the corresponding chip power supply to power off according to the control signal when the control signal is received.

5. A power down control method applied to the power down control circuit according to any one of claims 1 to 4, characterized in that, The method comprises: receiving a power-off control request and controlling a voltage detection circuit to detect an output voltage of a power supply according to the power-off control request; when detecting that the output voltage of the power supply drops to a preset voltage threshold, outputting a trigger signal to the control circuit through the voltage detection circuit; the output voltage of the power supply is used to provide an input voltage to a chip power module, and the preset voltage threshold is not less than a minimum working voltage of the chip power module; controlling each chip power module to power off according to a preset power-off sequence through the control circuit according to the trigger signal.

6. The power down control method of claim 5, wherein, The voltage detection circuit comprises at least two mutually parallel voltage detection sub-circuits, each of which is connected with the control circuit, and different voltage detection sub-circuits are connected with different voltage output ends of the power supply; the voltage output end is used to provide the output voltage of the power supply to the voltage detection sub-circuit; controlling the voltage detection circuit to detect the output voltage of the power supply according to the power-off control request comprises: controlling the at least two mutually parallel voltage detection sub-circuits to detect the output voltage of the power supply according to the power-off control request; when detecting that the output voltage of the power supply drops to a preset voltage threshold, outputting a trigger signal to the control circuit through the voltage detection circuit, comprises: when at least one voltage detection sub-circuit detects that the output voltage of the power supply drops to a preset voltage threshold, outputting a trigger signal to the control circuit through the voltage detection sub-circuit.

7. A computer device, comprising: The power-off control circuit comprises any one of claims 1-4.

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