An on / off controlled ultra-high frequency resonant converter control chip

Abstract

This invention discloses an ON / OFF controlled ultra-high frequency resonant converter control chip, comprising: a clock module for generating clock signals; a PWM generation module for generating PWM signals; a control module, employing a hysteresis comparator and an inverter, for acquiring and outputting corresponding control signals based on the output voltage of the ultra-high frequency resonant converter to be controlled; and a drive module, including an AND gate and a dual-path drive circuit, for ANDing the control signals and PWM signals, and inputting a high level to the gate of the power transistor in the controlled resonant converter through one of the drive circuits when all signals are high, and inputting a low level to the gate of the power transistor in the controlled high-frequency resonant converter through the other drive circuit, thereby achieving control of the ultra-high frequency resonant converter. This invention can reduce the number of control circuit chips and improve the power density of the converter.

Description

Technical Field

[0001] This invention belongs to the field of power electronics and integrated circuits, and more specifically, relates to an ON / OFF controlled ultra-high frequency resonant converter control chip. Background Technology

[0002] Power converters are indispensable for various electronic devices. In recent years, ultra-high frequency resonant converters have been widely used in power supply systems due to their high power density. Existing ultra-high frequency resonant converters achieve closed-loop control of the output voltage by building a mixed-signal circuit. The control circuit requires a large number of chips, which is not conducive to further improving power density. Currently, there is still no dedicated chip on the market suitable for the control of ultra-high frequency resonant converters. Summary of the Invention

[0003] To address the shortcomings of existing technologies, the present invention aims to provide an ON / OFF controlled ultra-high frequency resonant converter control chip that can be used to control Class E and Class φ2 ultra-high frequency isolated / non-isolated resonant converters, thereby reducing the number of control loop chips and increasing the power density of the converter.

[0004] To achieve the above objectives, this invention provides an ON / OFF controlled ultra-high frequency resonant converter control chip for controlling Class E and Class φ2 ultra-high frequency resonant converters, comprising:

[0005] The clock module is used to generate clock signals;

[0006] The PWM generation module is used to adjust the duty cycle of the clock signal according to the duty cycle required by the ultra-high frequency resonant converter to be controlled, and output the PWM signal.

[0007] The control module employs a hysteresis comparator and an inverter to proportionally acquire the output voltage of the UHF resonant converter to be controlled via an external sampling circuit. When the output voltage of the UHF resonant converter to be controlled is less than a set value, a high-level control signal is output; when the output voltage of the UHF resonant converter to be controlled is greater than or equal to the set value, a low-level control signal is output. The set value is determined by the upper and lower voltage limits of the hysteresis comparator.

[0008] The drive module includes an AND gate and a dual-drive circuit. It is used to process the control signal and the PWM signal through the AND gate. When all signals are high, a high level is input to the gate of the power transistor in the UHF resonant converter to be controlled through one drive circuit. When one of the control signal and the PWM signal is low, a low level is input to the gate of the power transistor in the UHF resonant converter to be controlled through the other drive circuit, thereby realizing the control of the UHF resonant converter to be controlled.

[0009] The ON / OFF controlled ultra-high frequency resonant converter control chip provided by this invention has the following advantages: The chip integrates multiple modules specifically for controlling Class E and Class φ2 ultra-high frequency isolated / non-isolated resonant converters, reducing the number of control loop chips, simplifying the control loop design steps, and effectively improving the converter's power density. Furthermore, the control chip provided in this embodiment can adjust the clock signal frequency and PWM duty cycle according to design requirements, offering a high degree of customization. This allows the power transistors of the ultra-high frequency resonant converter to operate in a resonant state, reducing high-frequency switching losses.

[0010] In one embodiment, the clock module employs an oscillator or a phase-locked loop (PLL) according to circuit requirements. The oscillator generates a clock signal of a specific frequency through an external resistor, and the PLL generates a clock signal of a specific frequency through an external crystal oscillator. The clock signal is a square wave signal with a duty cycle of 50%.

[0011] In one embodiment, the PWM generation module uses a comparator U1. The negative terminal of the comparator U1 is connected to the output terminal of an external RC filter, and the input terminal of the external RC filter is connected to the output terminal of the clock module. The positive terminal of the comparator U1 is connected to the power supply VCC terminal through an adjustable rheostat. By adjusting the resistance value of the adjustable rheostat, the comparator U1 can output a PWM signal with a specific duty cycle.

[0012] In one embodiment, the external sampling circuit includes an isolation operational amplifier and resistors R1 to R4. The output voltage of the UHF resonant converter to be controlled is divided by resistors R1 and R2, and then connected to the positive terminal of the hysteresis comparator and one end of resistor R4 via the isolation operational amplifier and resistor R3, respectively. The negative terminal of the hysteresis comparator is connected to the reference voltage VREF_S terminal, and the output terminal of the hysteresis comparator is connected to the other end of resistor R4 and the input terminal of the inverter. The upper and lower voltage limits of the hysteresis comparator are adjusted by changing the ratio of the sampling output voltage of the isolation operational amplifier and the resistance values ​​of resistors R1 to R4.

[0013] In one embodiment, a capacitor C1 is connected in parallel with the resistor R2, and a capacitor C2 is connected in parallel with the resistor R4.

[0014] In one embodiment, the dual-drive circuit in the drive module consists of two power switching transistors. The gates of both power switching transistors are connected to the output of the AND gate. The input of the AND gate is connected to the output of the comparator U1 and the output of the inverter, respectively. The source of one power switching transistor is connected to the power supply VCC terminal, and the source of the other power switching transistor is grounded. The drains of the two power switching transistors are connected to the gates of the power transistors in the UHF resonant converter to be controlled, respectively.

[0015] In one embodiment, a power supply module employing a low-dropout linear regulator is also included, which is used to convert the voltage input from the external power supply into the reference voltage VREF_S required for the negative terminal of the hysteresis comparator in the control module, and is also used to provide VCC voltage for the comparator in the PWM generation module and the power switch in the drive module.

[0016] In one embodiment, the power supply module further includes an undervoltage protection circuit, the input of which is connected to the external power supply, and the output of which is connected to the input of the AND gate.

[0017] In one embodiment, a temperature monitoring module for monitoring the internal operating temperature of the control chip is also included, the output of which is connected to the input of the AND gate. Attached Figure Description

[0018] Figure 1 This is a control block diagram of an ON / OFF controlled ultra-high frequency resonant converter control chip provided in an embodiment of the present invention;

[0019] Figure 2 This is a schematic diagram of a variable duty cycle PWM generation module provided in an embodiment of the present invention;

[0020] Figure 3 This is a schematic diagram of a control module provided in an embodiment of the present invention;

[0021] Figure 4 This is a schematic diagram of a driving module provided in one embodiment of the present invention;

[0022] Figure 5 This is an example diagram of the driving signal timing in this invention;

[0023] Figure 6 This is a flowchart of the operation of the control chip provided by the present invention;

[0024] Figure 7 This is an example circuit diagram of the application of the present invention. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0026] This invention provides a dedicated control chip for ultra-high frequency resonant converters, which can be used for the control of Class E and Class φ2 ultra-high frequency isolated / non-isolated resonant converters. Figure 1 This is a schematic diagram of the structure of an ON / OFF controlled ultra-high frequency resonant converter control chip according to an embodiment of the present invention, as shown below. Figure 1 As shown, the control chip includes a clock module, a PWM generation module, a control module, and a drive module.

[0027] The clock module provided in this embodiment is used to generate a clock signal of a specific frequency. It can be implemented in two circuit configurations depending on requirements: one uses an oscillator, adjusting the required frequency via an external resistor connected to the RT pin of the control chip; the other uses a phase-locked loop (PLL), directly connecting an external crystal oscillator with a clock signal of tens of MHz via the CLK pin of the control chip. The PLL stabilizes the generated clock signal, providing a specific frequency waveform for the PWM generation module. This signal pin is RIN1. Specifically, the clock signal provided in this embodiment is a square wave signal with a 50% duty cycle, meaning the output signal from the RIN1 pin is a square wave signal with a 50% duty cycle.

[0028] The PWM generation module provided in this embodiment is used to adjust the duty cycle of the clock signal output by the clock module according to the duty cycle required by the UHF resonant converter to be controlled, and output a PWM signal with a specific duty cycle.

[0029] Specifically, the PWM generation module provided in this embodiment can use comparator U1, such as... Figure 2As shown, pin RIN1, connected to external resistor RL1 and capacitor CL1, forms an RC filter, filtering the 50% duty cycle square wave signal into a triangular ramp signal. This signal is then connected to pin RIN2 as the input to the PWM generation module, and further connected to the negative terminal of comparator U1. The positive terminal of comparator U1 is pin VREF, connected to the adjustment port of an adjustable resistor. One fixed port of the adjustable resistor is connected to the power supply VCC. By adjusting the resistance value of the adjustable resistor, the voltage value at the adjustment port is adjusted, thereby changing the reference voltage signal at the positive terminal of comparator U1, and thus adjusting the duty cycle of the PWM signal. This allows for adaptation to the different duty cycle requirements of various UHF resonant converters. For example, the duty cycle of a Class E UHF resonant converter is approximately 50%, while that of a Class φ2 UHF resonant converter is approximately 30%. Different resonant parameters have different optimal duty cycle requirements. The output signal of the PWM generation module is led out from pin PWM_MONI, facilitating circuit monitoring and debugging by designers.

[0030] The control module provided in this embodiment is used to proportionally acquire the output voltage of the ultra-high frequency resonant converter through an external sampling circuit, and adjust the ON / OFF control signal of the ultra-high frequency resonant converter according to the difference in the output voltage. Figure 3 As shown, the external sampling circuit includes an isolation operational amplifier and resistors R1 to R4. The control module includes a comparator U2 and an inverter. The connection relationship is as follows: the output voltage Vout of the ultra-high frequency resonant converter is divided by resistors R1 and R2, sampled by the isolation operational amplifier, and connected to resistor R3. The other end of R3 is connected to the chip's pin FB_V+. One end of resistor R4 is connected to pin FB_V+, and the other end is connected to pin FB_VCTRL. A hysteresis comparator circuit is built based on the chip's internal comparator U2, where FB_V+ is the positive terminal of the comparator, and the negative terminal of the comparator is connected to the reference voltage VREF_S, which can be provided by the power supply module inside the control chip.

[0031] Specifically, capacitor C1 is connected in parallel across resistor R2 to suppress high-frequency noise interference in the output voltage signal; capacitor C2 is connected in parallel across resistor R4 to form a low-pass filter, which is used to suppress high-frequency noise interference in the feedback signal of the hysteresis comparator. Figure 5 As shown in Vout, assuming the hysteresis limits of the output voltage are VH and VL respectively, and the comparator outputs a high-level signal voltage of VCH and a low-level signal voltage of VCL, then:

[0032]

[0033] The voltage limits of the hysteresis comparator can be adjusted by changing the ratio of the sampling output voltage of the isolation operational amplifier and the resistors R1 to R4. Generally, VCH is the supply voltage of the comparator, specifically 3.3V, and VCL is 0. When the output voltage rises from zero, the voltage V+ at the positive input node of comparator U2 is less than the voltage VREF_S at the negative input node, and the output signal of comparator U2 is low. After passing through the inverter, the control signal ON / OFF CTRL is high, and the ultra-high frequency resonant converter is in the ON state, operating normally, and the output voltage increases. When the output voltage rises to VH, V+ is greater than VREF_S, and the output signal of comparator U2 is high. After passing through the inverter, the control signal ON / OFF CTRL is low, and the ultra-high frequency resonant converter is in the OFF state, stopping operation, and the output voltage decreases. When the output voltage decreases to VL, V+ is again less than VREF_S, the output signal flips, and the above process repeats. The process is as follows: Figure 5 As shown in the diagram, the ON / OFF CTRL signal is brought out through a pin for easy monitoring and debugging by designers.

[0034] The driving module provided in this embodiment is used to process the control signal output by the control module and the PWM signal generated by the PWM generation module to drive the gate of the power transistor in the controlled ultra-high frequency resonant converter. For example... Figure 4 As shown, the drive module uses an AND gate and a dual-path drive circuit. Specifically, the dual-path drive circuit can use two power switching transistors. The gates of both power switching transistors are connected to the output of the AND gate. The input of the AND gate is connected to the output of the comparator U1 in the PWM generation module and the output of the inverter in the control module, respectively. The source of one power switching transistor is connected to the power supply VCC terminal, and the source of the other power switching transistor is grounded. The drains of the two power switching transistors are connected to the gate of the power transistor in the controlled ultra-high frequency resonant converter, respectively.

[0035] The working principle of the drive module provided in this embodiment is as follows: When both the PWM signal generated by the PWM generation module and the control signal output by the control module are high, the AND gate outputs a high level, i.e., the VGS_CTRL signal in the figure is high, the upper transistor is turned on, and VCC charges the gate of the power transistor in the controlled ultra-high frequency resonant converter through the external resistor Rgon, thus turning on the power transistor; when either the PWM signal generated by the PWM generation module or the control signal output by the control module is low, the lower transistor is turned on, and GND discharges the gate of the power transistor in the controlled ultra-high frequency resonant converter through the external resistor Rgoff, thus turning off the power transistor, thereby realizing the control of the ultra-high frequency resonant converter to be controlled. The drive module provided in this embodiment adopts a dual-path drive circuit, which can separate the gate charging current and the discharging current, reduce loop oscillation, and ensure the high-frequency operation stability of the power transistor in the controlled ultra-high frequency resonant converter.

[0036] The ON / OFF control chip for the ultra-high frequency resonant converter provided in this embodiment has the following advantages: The chip integrates multiple modules specifically designed for controlling Class E and Class φ2 ultra-high frequency isolated / non-isolated resonant converters, reducing the number of control loop chips, simplifying the control loop design steps, and effectively improving the converter's power density. Furthermore, the control chip provided in this embodiment can adjust the clock signal frequency and PWM duty cycle according to design requirements, offering a high degree of customization. This allows the power transistors of the ultra-high frequency resonant converter to operate in a resonant state, reducing high-frequency switching losses.

[0037] In one embodiment, the control chip provided in the above embodiment may further include a temperature monitoring module. The temperature monitoring module is used to monitor the internal operating temperature of the chip. The output terminal of the temperature monitoring module is connected to the input terminal of the AND gate in the drive module. When the internal temperature of the chip is too high, the operation of the drive module is stopped, the generation of the drive signal is prevented, and the power transistor in the controlled ultra-high frequency resonant converter is always in the OFF state.

[0038] In one embodiment, the control chip provided in the above embodiment further includes a power supply module using a low dropout linear regulator (LDO). The power supply module is connected to an external power supply to control the power supply voltage, and is used to convert the voltage (value of 5V) input from the external power supply into the reference voltage VREF_S required by the negative terminal of the hysteresis comparator in the control module. It is also used to provide VCC voltage for the comparator in the PWM generation module and the power switching transistor in the drive module.

[0039] Furthermore, the power supply module provided in this embodiment may also include an undervoltage protection circuit. The input terminal of the undervoltage protection circuit is connected to an external power supply, and the output terminal of the undervoltage protection circuit is connected to the input terminal of an AND gate. The power supply module provided in this embodiment is also used to monitor the voltage input to the external power supply and generate an undervoltage monitoring signal UVLO. When undervoltage protection is activated, the UVLO signal is low, causing the drive signal in the drive module to be low, thereby turning off the power transistor in the controlled ultra-high frequency resonant converter to stop the operation of the ultra-high frequency resonant converter, even if the ultra-high frequency resonant converter remains in the OFF state. When the voltage returns to normal, the UVLO signal is high, and the drive module can operate normally.

[0040] Figure 6 A flowchart of the operation of the control chip provided in an embodiment of the present invention is shown below. Figure 6 As shown, the workflow of the control chip provided in this embodiment includes the following steps:

[0041] Step 1: The chip powers on, and the power supply module performs an undervoltage check, generating a control signal UVLO that is transmitted to the driver module. When the chip power supply voltage is abnormal, the drive signal in the driver module is low. A normal chip power supply voltage is a necessary condition for the drive signal to be high.

[0042] Step 2: Temperature monitoring begins, determining the temperature and generating a control signal OTP, which is then transmitted to the driver module. When the temperature is abnormal, the drive signal in the driver module is low. A normal chip temperature is a necessary condition for the drive signal to be high.

[0043] Step 3: The clock module and PWM generation module generate PWM signals and transmit them to the drive module; the control module processes the output voltage signal and generates the control signal ON / OFF CTRL, which is then transmitted to the drive module.

[0044] Step 4: The drive module processes the four signals UVLO, OTP, PWM, and ON / OFF CTRL. When all signals are high, the drive module outputs a high level, which means the power transistor in the controlled UHF resonant converter is turned on; when one of the signals is low, the drive module outputs a low level, which means the power transistor in the controlled UHF resonant converter is turned off.

[0045] This invention also provides a chip application example of a Class E ultra-high frequency isolated resonant converter, such as... Figure 7 As shown.

[0046] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. An ON / OFF controlled UHF resonant converter control chip for the control of Class E and Class φ2 UHF resonant converters, characterized by, include: The clock module is used to generate clock signals; The PWM generation module is used to adjust the duty cycle of the clock signal according to the duty cycle required by the ultra-high frequency resonant converter to be controlled, and output the PWM signal. The control module employs a hysteresis comparator and an inverter to proportionally acquire the output voltage of the UHF resonant converter to be controlled via an external sampling circuit. When the output voltage of the UHF resonant converter to be controlled is less than a set value, a high-level control signal is output; when the output voltage of the UHF resonant converter to be controlled is greater than or equal to the set value, a low-level control signal is output. The set value is determined by the upper and lower voltage limits of the hysteresis comparator. The drive module includes an AND gate and a dual-drive circuit. It is used to process the control signal and the PWM signal through the AND gate. When all signals are high, a high level is input to the gate of the power transistor in the UHF resonant converter to be controlled through one drive circuit. When one of the control signal and the PWM signal is low, a low level is input to the gate of the power transistor in the UHF resonant converter to be controlled through the other drive circuit, thereby realizing the control of the UHF resonant converter to be controlled.

2. The ON / OFF controlled UHF resonant converter control chip according to claim 1, characterized in that, The clock module uses an oscillator or a phase-locked loop (PLL) according to circuit requirements. The oscillator generates a clock signal of a specific frequency through an external resistor, and the PLL generates a clock signal of a specific frequency through an external crystal oscillator. The clock signal is a square wave signal with a duty cycle of 50%.

3. The ON / OFF controlled UHF resonant converter control chip according to claim 1, characterized in that, The PWM generation module uses a comparator U1. The negative terminal of the comparator U1 is connected to the output terminal of an external RC filter, and the input terminal of the external RC filter is connected to the output terminal of the clock module. The positive terminal of the comparator U1 is connected to the power supply VCC terminal through an adjustable rheostat. By adjusting the resistance value of the adjustable rheostat, the comparator U1 can output a PWM signal with a specific duty cycle.

4. The ON / OFF controlled ultra-high frequency resonant converter control chip according to claim 3, characterized in that, The external sampling circuit includes an isolation operational amplifier and resistors R1 to R4. The output voltage of the UHF resonant converter to be controlled is divided by resistors R1 and R2, and then connected to the positive terminal of the hysteresis comparator and one end of resistor R4 via the isolation operational amplifier and resistor R3, respectively. The negative terminal of the hysteresis comparator is connected to the reference voltage VREF_S. The output terminal of the hysteresis comparator is connected to the other end of resistor R4 and the input terminal of the inverter. The upper and lower voltage limits of the hysteresis comparator are adjusted by changing the ratio of the sampling output voltage of the isolation operational amplifier and the resistance values ​​of resistors R1 to R4.

5. The ON / OFF controlled ultra-high frequency resonant converter control chip according to claim 4, characterized in that, A capacitor C1 is connected in parallel to resistor R2, and a capacitor C2 is connected in parallel to resistor R4.

6. The ON / OFF controlled ultra-high frequency resonant converter control chip according to claim 5, characterized in that, In the driving module, the dual-drive circuit consists of two power switching transistors. The gates of both power switching transistors are connected to the output of the AND gate. The input of the AND gate is connected to the output of the comparator U1 and the output of the inverter, respectively. The source of one power switching transistor is connected to the power supply VCC terminal, and the source of the other power switching transistor is grounded. The drains of the two power switching transistors are connected to the gates of the power transistors in the UHF resonant converter to be controlled, respectively.

7. The ON / OFF controlled ultra-high frequency resonant converter control chip according to claim 6, characterized in that, It also includes a power supply module employing a low-dropout linear regulator, used to convert the voltage input from the external power supply into the reference voltage VREF_S required by the negative terminal of the hysteresis comparator in the control module, and also used to provide VCC voltage for the comparator in the PWM generation module and the power switching transistor in the drive module.

8. The ON / OFF controlled ultra-high frequency resonant converter control chip according to claim 7, characterized in that, The power supply module also includes an undervoltage protection circuit, the input of which is connected to the external power supply, and the output of which is connected to the input of the AND gate.

9. The ON / OFF controlled ultra-high frequency resonant converter control chip according to claim 7 or 8, characterized in that, It also includes a temperature monitoring module for monitoring the internal operating temperature of the control chip, the output of which is connected to the input of the AND gate.

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