Antifuse Sensing Device and Its Operating Method

Abstract

The present invention provides an anti-fuse sensing device and an operation method thereof. The anti-fuse sensing device is adapted to sense the resistance state of an anti-fuse. The anti-fuse sensing device includes a voltage generating circuit, a comparison circuit, and a sensing circuit. The voltage generating circuit is used to generate a comparison voltage that varies with temperature. The comparison circuit is coupled to the voltage generating circuit to receive the comparison voltage. The comparison circuit is used to compare the comparison voltage with a reference voltage and convert the difference between the comparison voltage and the reference voltage into a bias voltage that varies with temperature. The sensing circuit is coupled to the comparison circuit to receive the bias voltage. The sensing circuit is used to sense the resistance state of the anti-fuse according to the bias voltage.

Description

Technical Field

[0001] The present invention relates to an electronic circuit, and more particularly to an anti-fuse sensing device and an operation method thereof. Background Art

[0002] Anti-fuses can be applied to various electronic circuits to latch different information. For example, dynamic random-access memory (DRAM) chips use anti-fuses to determine which redundant row and / or redundant column to turn on. In the case of anti-fuses, a blown anti-fuse has a low resistance value, while an un-blown anti-fuse has a high resistance value. Based on the material of the anti-fuse, in some embodiments, the resistance value of a blown anti-fuse can be in the range of 2 - 100 KΩ, and the resistance value of an un-blown anti-fuse can be in the range of 5000 - 20000 KΩ. A sensing circuit can sense the resistance state of the anti-fuse and thereby know the blown state of the anti-fuse. However, inevitably, the semiconductor components of the sensing circuit have temperature effects. Due to the temperature effect, the voltage provided to the anti-fuse by the sensing circuit will drift at different temperatures, and the drifting voltage may cause an error in the resistance state judgment. For a DRAM chip, an error in the resistance state judgment of the anti-fuse will result in turning on the wrong redundant row and redundant column, thereby affecting the yield of the DRAM chip. Summary of the Invention

[0003] The present invention provides an anti-fuse sensing device and an operation method thereof to compensate for the influence of temperature effects on the sensing circuit.

[0004] According to another embodiment of the present invention, the above anti-fuse sensing device is adapted to sense the resistance state of the anti-fuse. The anti-fuse sensing device includes a voltage generation circuit, a comparison circuit, and a sensing circuit. The voltage generation circuit is used to generate a comparison voltage that varies with temperature. The comparison circuit is coupled to the voltage generation circuit to receive the comparison voltage. The comparison circuit is used to compare the comparison voltage with a first reference voltage and convert the difference between the comparison voltage and the first reference voltage into a first bias voltage that varies with temperature. The sensing circuit is coupled to the comparison circuit to receive the first bias voltage. The sensing circuit is used to sense the resistance state of the anti-fuse based on the first bias voltage.

[0005] According to another embodiment of the present invention, the above operation method includes: generating a comparison voltage that varies with temperature by a voltage generation circuit of the antifuse sensing device; converting the difference between the comparison voltage and a first reference voltage into a first bias voltage that varies with temperature by a comparison circuit of the antifuse sensing device; and sensing the resistance state of the antifuse by a sensing circuit of the antifuse sensing device according to the first bias voltage.

[0006] Based on the above, the antifuse sensing devices described in the embodiments of the present invention can generate a first bias voltage that varies with temperature for the sensing circuit. Therefore, the antifuse sensing device can compensate for the influence of temperature effects on the sensing circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a schematic diagram of a circuit block of an antifuse sensing device according to an embodiment;

[0008] Figure 2 is a schematic diagram of a circuit block of an antifuse sensing device according to an embodiment of the present invention;

[0009] Figure 3 is a schematic flowchart of an operation method of an antifuse sensing device according to an embodiment of the present invention;

[0010] Figure 4 is an illustration according to an embodiment of the present invention Figure 2 a circuit schematic diagram of the shown voltage generation circuit, comparison circuit, and sensing circuit;

[0011] Figure 5 is an illustration according to another embodiment of the present invention Figure 2 a circuit schematic diagram of the shown voltage generation circuit, comparison circuit, and sensing circuit.

[0012] DESCRIPTION OF THE REFERENCE NUMERALS

[0013] 100, 200: Antifuse sensing device

[0014] 110, 211, DV41, DV51: Voltage dividing circuit

[0015] 120, 230: Sensing circuit

[0016] 210: Voltage generation circuit

[0017] 212, 213, 222, 224: Current-voltage conversion circuit

[0018] 220: Comparison circuit

[0019] 221, 223: Voltage-current conversion circuit

[0020] CM41, CM42, CM51, CM52: Current mirrors

[0021] CMP41, CMP51: Voltage comparators

[0022] FUSE11, FUSE21: Anti-fuses

[0023] I12, I22: Sensing currents

[0024] I41, I51: Positive temperature coefficient currents

[0025] I42, I44, I45, I52, I53, I55: Mirror currents

[0026] I43, I54: Converted currents

[0027] IPTAT: Positive temperature coefficient current source

[0028] N12, N40, N50, N51, P11, P12, P40, P41, P42, P43, P44, P50, P51, P52, P53: Transistors

[0029] OUT11, OUT21: Sensing results

[0030] R11, R12, R41, R42, R43, R44, R45, R51, R54, R55: Resistors

[0031] S310 to S330: Steps

[0032] V11, V21, VBP: Bias voltages

[0033] V12: Sensing voltage

[0034] VC: Comparison voltage

[0035] VDD: System voltage

[0036] VR, VSS: Reference voltages Detailed implementation manners

[0037] Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0038] As used throughout the specification (including the claims) of this case, the term "coupled (or connected)" may refer to any direct or indirect connection means. For example, if it is described in the text that a first device is coupled (or connected) to a second device, it should be interpreted that the first device can be directly connected to the second device, or the first device can be indirectly connected to the second device through other devices or certain connection means. The terms "first", "second", etc. mentioned throughout the specification (including the claims) of this case are used to name elements or to distinguish different embodiments or scopes, rather than to limit the upper or lower limit of the number of elements, nor to limit the order of the elements. In addition, wherever possible, components / elements / steps with the same reference numerals in the drawings and embodiments represent the same or similar parts. Components / elements / steps with the same reference numerals or the same terms used in different embodiments can refer to the relevant descriptions with each other.

[0039] Figure 1 is a schematic circuit block diagram of an anti-fuse sensing device 100 according to an embodiment. The anti-fuse sensing device 100 is adapted to sense the resistance state (programmed state) of the anti-fuse FUSE11. Figure 1 shows the equivalent circuit of the anti-fuse FUSE11. The anti-fuse FUSE11 is a conventional component and will not be described in detail herein. Figure 1 The illustrated anti-fuse sensing device 100 includes a voltage dividing circuit 110 and a sensing circuit 120. The voltage dividing circuit 110 includes resistors R11 and R12 connected in series between the system voltage VDD and the reference voltage VSS. The voltage dividing circuit 110 can divide the system voltage VDD to generate a bias voltage V11 for the sensing circuit 120.

[0040] Figure 1The sensing circuit 120 shown includes transistors P11, P12 and N12, where transistors P11 and P12 are p-channel metal oxide semiconductor (PMOS) transistors, and transistor N12 is an n-channel metal oxide semiconductor (NMOS) transistor. The control terminal (e.g., gate) of transistor P11 is coupled to the voltage dividing circuit 110 to receive the bias voltage V11. The first terminal (e.g., source) of transistor P11 is coupled to the system voltage VDD. The second terminal (e.g., drain) of transistor P11 is used to be coupled to the antifuse FUSE11. The control terminal (e.g., gate) of transistor P12 is coupled to the second terminal of transistor P11. The first terminal (e.g., source) of transistor P12 is coupled to the system voltage VDD. The control terminal (e.g., gate) of transistor N12 is coupled to the second terminal of transistor P11. The first terminal (e.g., source) of transistor N12 is coupled to the reference voltage VSS. The second terminal (e.g., drain) of transistor N12 is coupled to the second terminal (e.g., drain) of transistor P12. The second terminal of transistor N12 and the second terminal of transistor P12 jointly provide the sensing result OUT11 regarding the antifuse FUSE11.

[0041] The voltage dividing circuit 110 can provide the bias voltage V11 to the gate of transistor P11. Based on the bias voltage V11, transistor P11 can provide the sensing current I12 to the antifuse FUSE11. The resistance state of the sensed antifuse FUSE11 can be reflected in the sensing voltage V12. When the antifuse FUSE11 is in the un-blown state, the antifuse FUSE11 has a high resistance value, so the sensing voltage V12 is at a high level, making the sensing result OUT11 a logic "0". On the contrary, when the antifuse FUSE11 is in the blown state, the antifuse FUSE11 has a low resistance value, so the sensing voltage V12 is at a low level, making the sensing result OUT11 a logic "1". However, the bias voltage V11 hardly changes with temperature and process variations, but the threshold voltage (Vth) of transistor P11 changes with temperature and process variations. Without the change of the bias voltage V11, the change of the threshold voltage will affect the current change of transistor P11, which may further lead to misjudgment of the resistance state of the antifuse FUSE11 (e.g., misjudging the blown state of the antifuse FUSE11 as the un-blown state).

[0042] Figure 2 is a schematic circuit block diagram of an antifuse sensing device 200 according to an embodiment of the present invention. Figure 2 The shown antifuse sensing device 200 is adapted to sense the resistance state (blown state) of the antifuse FUSE21.Figure 2 The anti-fuse FUSE21 shown can be referred to Figure 1 the relevant description of the anti-fuse FUSE11 shown and analogized, so it will not be elaborated here. In Figure 2 the embodiment shown, the anti-fuse sensing device 200 includes a voltage generation circuit 210, a comparison circuit 220, and a sensing circuit 230.

[0043] Figure 3 is a schematic flowchart of an operation method of an anti-fuse sensing device according to an embodiment of the present invention. Please refer to Figure 2 and Figure 3 . In step S310, the voltage generation circuit 210 can generate a comparison voltage VC that changes with temperature. For example, when the temperature rises, the comparison voltage VC rises accordingly. Conversely, when the temperature drops, the comparison voltage VC drops accordingly. The voltage generation circuit 210 can also provide a reference voltage VR to the comparison circuit 220. The reference voltage VR hardly changes with temperature and process variations. For example, the reference voltage VR can be referred to Figure 1 the relevant description of the bias voltage V11 shown and analogized.

[0044] Please refer to Figure 2 and Figure 3 . The comparison circuit 220 is coupled to the voltage generation circuit 210 to receive the comparison voltage VC. In step S320, the comparison circuit 220 can compare the reference voltage VR with the comparison voltage VC, and convert the difference between the comparison voltage VC and the reference voltage VR into a bias voltage V21 that changes with temperature. For example, the bias voltage V21 can increase as the temperature rises, and the bias voltage V21 can decrease as the temperature drops. The sensing circuit 230 is coupled to the comparison circuit 220 to receive the bias voltage V21. Based on the bias voltage V21, the sensing circuit 230 can provide a sensing current I22 to the anti-fuse FUSE21. Figure 2 The sensing current I22 shown can be referred to Figure 1 the relevant description of the sensing current I12 shown and analogized, so it will not be elaborated here.

[0045] In step S330, the sensing circuit 230 can sense the resistance state (programmed state) of the anti-fuse FUSE21 according to the bias voltage V21. When the anti-fuse FUSE21 is in a high resistance state (unprogrammed state), the sensing result OUT21 is logic "0". Conversely, when the anti-fuse FUSE21 is in a low resistance state (programmed state), the sensing result OUT21 is logic "1". Figure 2 The sensing circuit 230 shown can be referred to Figure 1 the relevant description of the sensing circuit 120 shown and analogized, so it will not be elaborated here.

[0046] In summary, the antifuse sensing device 200 can generate a bias voltage V21 that varies with temperature for the sensing circuit 230. When the temperature rises, the threshold voltage of the transistors in the sensing circuit 230 decreases accordingly, but the bias voltage V21 can increase with temperature to compensate for the effect of temperature on the sensing current I22. When the temperature drops, the threshold voltage of the transistors in the sensing circuit 230 increases accordingly, but the bias voltage V21 can decrease with temperature to compensate for the effect of temperature on the sensing current I22. Therefore, the antifuse sensing device 200 can compensate for the influence of temperature effects on the sensing circuit 230.

[0047] Figure 4 is illustrated according to an embodiment of the present invention Figure 2 A circuit schematic diagram of the voltage generation circuit 210, the comparison circuit 220, and the sensing circuit 230 shown. Figure 4 The voltage generation circuit 210, the comparison circuit 220, the sensing circuit 230, and the antifuse FUSE21 shown can be referred to Figure 2 and Figure 3 the relevant description of.

[0048] In Figure 4 the illustrated embodiment, the voltage generation circuit 210 includes a voltage division circuit 211, a current-voltage conversion circuit 212, and a positive temperature coefficient current source IPTAT. Figure 4 The illustrated voltage division circuit 211 includes resistors R42 and R43 connected in series between the system voltage VDD and the reference voltage VSS. The voltage division circuit 211 can divide the system voltage VDD to generate a reference voltage VR for the comparison circuit 220. The level of the reference voltage VR can be set according to the actual design. The reference voltage VR hardly changes with temperature and process variations. The positive temperature coefficient current source IPTAT is coupled to the current-voltage conversion circuit 212 to draw a positive temperature coefficient current I41. The positive temperature coefficient current I41 can increase as the temperature rises. The current-voltage conversion circuit 212 can convert the positive temperature coefficient current I41 into a comparison voltage VC. Therefore, the comparison voltage VC can vary with temperature. The level of the comparison voltage VC can be set according to the actual design. For example, the comparison voltage VC can be less than the reference voltage VR.

[0049] In Figure 4 the illustrated embodiment, the current-voltage conversion circuit 212 includes a current mirror CM41 and a resistor R41. The positive temperature coefficient current source IPTAT is coupled to the main current terminal of the current mirror CM41 to draw a positive temperature coefficient current I41. The current mirror CM41 generates a mirror current I42 based on the positive temperature coefficient current I41. Figure 4The current mirror CM41 shown includes transistors P40, P41, and P44, where transistors P40, P41, and P44 are PMOS transistors. The first ends (such as the source electrodes) of transistors P40, P41, and P44 are coupled to the system voltage VDD. The second end (such as the drain electrode) of transistor P40 is coupled to the control ends (such as the gate electrodes) of transistors P40, P41, and P44 to provide a bias voltage VBP. The second end of transistor P40 is also coupled to the main current terminal of the current mirror CM41. The second end (such as the drain electrode) of transistor P41 is coupled to the slave current terminal of the current mirror CM41. The first end of resistor R41 is coupled to the slave current terminal of the current mirror CM41 to receive the mirror current I42. The second end of resistor R41 is coupled to the reference voltage VSS. The first end of resistor R41 is also coupled to the comparison circuit 220 to provide a comparison voltage VC.

[0050] In Figure 4 the embodiment shown, the comparison circuit 220 includes a voltage-current conversion circuit 221 and a current-voltage conversion circuit 222. The voltage-current conversion circuit 221 is coupled to the voltage generation circuit 210 to receive the comparison voltage VC and the reference voltage VR. The voltage-current conversion circuit 221 can compare the reference voltage VR with the comparison voltage VC and convert the difference between the comparison voltage VC and the reference voltage VR into a converted current I43 that varies with temperature. In Figure 4 the embodiment shown, the voltage-current conversion circuit 221 includes a voltage comparator CMP41 and a transistor N40, where transistor N40 is an NMOS transistor. The first input terminal (such as the non-inverting input terminal) of the voltage comparator CMP41 is coupled to the voltage generation circuit 210 to receive the reference voltage VR. The second input terminal (such as the inverting input terminal) of the voltage comparator CMP41 is coupled to the voltage generation circuit 210 to receive the comparison voltage VC. The control end (such as the gate electrode) of transistor N40 is coupled to the output terminal of the voltage comparator CMP41. The first end (such as the source electrode) of transistor N40 is coupled to the reference voltage VSS. One second end (such as the drain electrode) of transistor N40 is coupled to the current-voltage conversion circuit 222 to draw the converted current I43.

[0051] The voltage-current conversion circuit 221 is coupled to the current-voltage conversion circuit 222 to draw the converted current I43. The current-voltage conversion circuit 222 converts the converted current I43 into a bias voltage V21. In Figure 4In the illustrated embodiment, the current-voltage conversion circuit 222 includes a current mirror CM42, a voltage division circuit DV41, and a transistor P44. The voltage-current conversion circuit 221 is coupled to the main current terminal of the current mirror CM42 to draw the converted current I43. The current mirror CM42 can generate a mirror current I44 based on the converted current I43. Figure 4 The illustrated current mirror CM42 includes transistors P42 and P43, where transistors P42 and P43 are PMOS transistors. The first terminals (e.g., source) of transistors P42 and P43 are coupled to the system voltage VDD. The second terminal (e.g., drain) of transistor P42 is coupled to the control terminals (e.g., gate) of transistors P42 and P43. The second terminal of transistor P42 is also coupled to the main current terminal of the current mirror CM42. The second terminal (e.g., drain) of transistor P43 is coupled to the slave current terminal of the current mirror CM42.

[0052] Based on the comparison operation of the voltage comparator CMP41, when the temperature rises, the transistor N40 will reduce the converted current I43, such that the bias voltage V21 receives a smaller compensation voltage. Conversely, when the temperature drops, the bias voltage V21 receives a larger compensation voltage. Therefore, the antifuse sensing device 200 can perform temperature compensation on the bias voltage V21 to accurately control the voltage range.

[0053] The control terminal (e.g., gate) of transistor P44 is controlled by the bias voltage VBP of the voltage generation circuit 210. The first terminal (e.g., source) of transistor P44 is coupled to the system voltage VDD. The first terminal of the voltage division circuit DV41 is coupled to the second terminal (e.g., drain) of transistor P44 to receive the mirror current I45. The first terminal of the voltage division circuit DV41 is coupled to the slave current terminal of the current mirror CM42 to receive the mirror current I44. Figure 4 The illustrated voltage division circuit DV41 includes resistors R44 and R45. The first terminal of resistor R44 is coupled to the slave current terminal of the current mirror CM42 and the second terminal of transistor P44. The second terminal of resistor R44 is coupled to the first terminal of resistor R45. The second terminal of resistor R45 is coupled to the reference voltage VSS. The voltage division circuit DV41 can generate the bias voltage V21 for the sensing circuit 230.

[0054] Based on transistors P40 and P44 of the current mirror, when the process variation falls to the FF corner, the transistor P44 will increase the mirror current I45, such that the bias voltage V21 receives a larger compensation voltage. Conversely, when the process variation falls to the SS corner, the transistor P44 will reduce the mirror current I45, such that the bias voltage V21 receives a smaller compensation voltage. Therefore, the antifuse sensing device 200 can perform process variation compensation on the bias voltage V21 to accurately control the voltage range.

[0055] In Figure 4 In the illustrated embodiment, the sensing circuit 230 includes a transistor P11, a transistor P12, and a transistor N12. The control terminal of the transistor P11 is coupled to the comparison circuit 220 to receive a bias voltage V21. The first terminal of the transistor P11 is coupled to the system voltage VDD. The second terminal of the transistor P11 is used to be coupled to the antifuse FUSE21. The control terminals of the transistor P12 and the transistor N12 are coupled to the second terminal of the transistor P11. The first terminal of the transistor P12 is coupled to the system voltage VDD. The first terminal of the transistor N12 is coupled to the reference voltage VSS. The second terminal of the transistor N12 is coupled to the second terminal of the transistor P12. The second terminal of the transistor N12 and the second terminal of the transistor P12 jointly provide a sensing result OUT21 regarding the antifuse FUSE21. Figure 2 The illustrated sensing circuit 230 and the antifuse FUSE21 can be referred to Figure 1 the relevant description of the illustrated sensing circuit 120 and the antifuse FUSE11 and analogized, so it will not be elaborated here.

[0056] Figure 5 The following is an illustration according to another embodiment of the present invention Figure 2 a circuit schematic diagram of the illustrated voltage generation circuit 210, comparison circuit 220, and sensing circuit 230. Figure 5 The illustrated voltage generation circuit 210, comparison circuit 220, sensing circuit 230, and antifuse FUSE21 can be referred to Figure 2 and Figure 3 the relevant description.

[0057] In Figure 5 the illustrated embodiment, the voltage generation circuit 210 includes a voltage dividing circuit 211, a current-voltage conversion circuit 213, and a positive temperature coefficient current source IPTAT. Figure 5 The illustrated voltage dividing circuit 211 and the positive temperature coefficient current source IPTAT can be referred to Figure 4 the relevant description of the illustrated voltage dividing circuit 211 and the positive temperature coefficient current source IPTAT and analogized, so it will not be elaborated here. The current-voltage conversion circuit 213 is coupled to the positive temperature coefficient current source IPTAT to receive a positive temperature coefficient current I51. The positive temperature coefficient current I51 can increase as the temperature rises. The current-voltage conversion circuit 213 can convert the positive temperature coefficient current I51 into a comparison voltage VC. Therefore, the comparison voltage VC can vary with temperature. The levels of the comparison voltage VC and the reference voltage VR can be set according to actual design. For example, the comparison voltage VC can be less than the reference voltage VR.

[0058] In Figure 5In the illustrated embodiment, the current-voltage conversion circuit 213 includes a current mirror CM51, a current mirror CM52, and a resistor R51. The main current terminal of the current mirror CM51 is coupled to a positive temperature coefficient current source IPTAT to receive a positive temperature coefficient current I51. The current mirror CM51 can draw a mirror current I52 based on the positive temperature coefficient current I51. Figure 5 The illustrated current mirror CM51 includes transistors N50 and N51, where transistors N50 and N51 are NMOS transistors. The first terminals (e.g., source electrodes) of transistors N50 and N51 are coupled to a reference voltage VSS. The second terminal (e.g., drain electrode) of transistor N50 is coupled to the control terminals (e.g., gate electrodes) of transistors N50 and N51. The second terminal of transistor N50 is also coupled to the main current terminal of the current mirror CM51. The second terminal (e.g., drain electrode) of transistor N51 is coupled to the slave current terminal of the current mirror CM51.

[0059] The slave current terminal of the current mirror CM51 is coupled to the main current terminal of the current mirror CM52 to draw the mirror current I52. The current mirror CM52 can generate a mirror current I53 based on the mirror current I52. Figure 5 The illustrated current mirror CM52 includes transistors P50, P51, and P53, where transistors P50, P51, and P53 are PMOS transistors. The first terminals (e.g., source electrodes) of transistors P50, P51, and P53 are coupled to a system voltage VDD. The second terminal (e.g., drain electrode) of transistor P50 is coupled to the control terminals (e.g., gate electrodes) of transistors P50, P51, and P53 to provide a bias voltage VBP. The second terminal of transistor P50 is also coupled to the main current terminal of the current mirror CM52. The second terminal (e.g., drain electrode) of transistor P51 is coupled to the slave current terminal of the current mirror CM52. The first terminal of the resistor R51 is coupled to the slave current terminal of the current mirror CM52 to receive the mirror current I53. The second terminal of the resistor R51 is coupled to the reference voltage VSS. The first terminal of the resistor R51 is also coupled to the comparison circuit 220 to provide a comparison voltage VC.

[0060] In Figure 5 the illustrated embodiment, the comparison circuit 220 includes a voltage-current conversion circuit 223 and a current-voltage conversion circuit 224. Figure 5 The illustrated voltage-current conversion circuit 223 and current-voltage conversion circuit 224 can be referred to the Figure 4 relevant descriptions of the illustrated voltage-current conversion circuit 221 and current-voltage conversion circuit 222 and analogized, so details are not repeated here. In Figure 5In the illustrated embodiment, the voltage-current conversion circuit 223 includes a voltage comparator CMP51 and a transistor P52, where the transistor P52 is a PMOS transistor. The first input terminal (e.g., the non-inverting input terminal) of the voltage comparator CMP51 is coupled to the voltage generation circuit 210 to receive a comparison voltage VC. The second input terminal (e.g., the inverting input terminal) of the voltage comparator CMP51 is coupled to the voltage generation circuit 210 to receive a reference voltage VR. The control terminal (e.g., the gate) of the transistor P52 is coupled to the output terminal of the voltage comparator CMP51. The first terminal (e.g., the source) of the transistor P52 is coupled to the system voltage VDD. The second terminal (e.g., the drain) of the transistor P52 is coupled to the current-voltage conversion circuit 224 to provide a converted current I54.

[0061] In Figure 5 the illustrated embodiment, the current-voltage conversion circuit 224 includes a voltage divider circuit DV51 and a transistor P53. The control terminal (e.g., the gate) of the transistor P53 is controlled by a bias voltage VBP of the voltage generation circuit 210. The first terminal (e.g., the source) of the transistor P53 is coupled to the system voltage VDD. The first terminal of the voltage divider circuit DV51 is coupled to the second terminal (e.g., the drain) of the transistor P53 to receive a mirror current I55. The first terminal of the voltage divider circuit DV51 is coupled to the voltage-current conversion circuit 223 to receive the converted current I54. Figure 5 The illustrated voltage divider circuit DV51 includes a resistor R54 and a resistor R55. The first terminal of the resistor R54 is coupled to the voltage-current conversion circuit 223 and the second terminal of the transistor P53. The second terminal of the resistor R54 is coupled to the first terminal of the resistor R55. The second terminal of the resistor R55 is coupled to the reference voltage VSS. The voltage divider circuit DV51 can generate a bias voltage V21 for the sensing circuit 230.

[0062] Based on the comparison operation of the voltage comparator CMP51, when the temperature rises, the transistor P52 will reduce the converted current I54, so that the bias voltage V21 obtains a smaller compensation voltage. Conversely, when the temperature drops, the bias voltage V21 obtains a larger compensation voltage. Therefore, the antifuse sensing device 200 can perform temperature compensation on the bias voltage V21 to accurately control the voltage range. Based on the current mirror transistors P50 and P53, when the process variation falls to the FF corner (FF Corner), the transistor P53 will increase the mirror current I55, so that the bias voltage V21 obtains a larger compensation voltage. Conversely, when the process variation falls to the SS corner (SS Corner), the transistor P53 will reduce the mirror current I55, so that the bias voltage V21 obtains a smaller compensation voltage. Therefore, the antifuse sensing device 200 can perform process variation compensation on the bias voltage V21 to accurately control the voltage range.

[0063] In summary, the antifuse sensing device 200 described in the above embodiments can generate a bias voltage V21 that varies with temperature for the sensing circuit 230. By using the bias voltage V21 generated after compensation for temperature and process variations, the influence of temperature and process variations on the sensing current I22 of the transistor P11 is reduced, and thus the variation range of the sensing voltage V12 is accurately controlled. Therefore, the antifuse sensing device 200 can compensate for the influence of temperature effects on the sensing circuit and avoid misjudging the resistance state (programmed state) of the antifuse FUSE21.

[0064] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some or all of the technical features. However, such modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An anti-fuse sensing device, adapted to sense the resistance state of an anti-fuse, characterized in that, The anti-fuse sensing device includes: A voltage generating circuit for generating a comparison voltage that varies with temperature; A comparison circuit coupled to the voltage generating circuit to receive the comparison voltage, for comparing the comparison voltage with a first reference voltage, and converting the difference between the comparison voltage and the first reference voltage into a first bias voltage that varies with temperature; and A sensing circuit coupled to the comparison circuit to receive the first bias voltage, for sensing the resistance state of the anti-fuse based on the first bias voltage.

2. The anti-fuse sensing device according to claim 1, wherein The first bias voltage increases as the temperature rises, and the first bias voltage decreases as the temperature drops.

3. The anti-fuse sensing device according to claim 1, wherein The voltage generating circuit includes: A voltage dividing circuit for dividing the system voltage to generate the first reference voltage; A positive temperature coefficient current source for drawing a positive temperature coefficient current; and A current-voltage conversion circuit coupled to the positive temperature coefficient current source for converting the positive temperature coefficient current into the comparison voltage.

4. The anti-fuse sensing device according to claim 3, wherein The current-voltage conversion circuit includes: A current mirror, wherein the positive temperature coefficient current source is coupled to the main current terminal of the current mirror to draw the positive temperature coefficient current, and the current mirror generates a mirror current based on the positive temperature coefficient current; and A resistor having a first end coupled to the slave current terminal of the current mirror to receive the mirror current, wherein the second end of the resistor is coupled to a second reference voltage, and the first end of the resistor is further coupled to the comparison circuit to provide the comparison voltage.

5. The anti-fuse sensing device according to claim 1, wherein The voltage generating circuit includes: A voltage dividing circuit for dividing the system voltage to generate the first reference voltage; A positive temperature coefficient current source for providing a positive temperature coefficient current; and A current-voltage conversion circuit coupled to the positive temperature coefficient current source to receive the positive temperature coefficient current for converting the positive temperature coefficient current into the comparison voltage.

6. The anti-fuse sensing device according to claim 5, wherein The current-voltage conversion circuit includes: A first current mirror having a first main current terminal coupled to the positive temperature coefficient current source to receive the positive temperature coefficient current for drawing a first mirror current based on the positive temperature coefficient current; and A second current mirror, wherein the first slave current terminal of the first current mirror is coupled to the second main current terminal of the second current mirror to draw the first mirror current, and the second current mirror is used to generate a second mirror current based on the first mirror current; and A resistor having a first end coupled to the second slave current terminal of the second current mirror to receive the second mirror current, wherein the second end of the resistor is coupled to a second reference voltage, and the first end of the resistor is further coupled to the comparison circuit to provide the comparison voltage.

7. The anti-fuse sensing device according to claim 1, characterized in that, The comparison circuit includes: A voltage-current conversion circuit coupled to the voltage generating circuit to receive the comparison voltage, for comparing the comparison voltage with the first reference voltage, and converting the difference between the comparison voltage and the first reference voltage into a converted current that varies with temperature; and A current-voltage conversion circuit, wherein the voltage-current conversion circuit is coupled to the current-voltage conversion circuit to draw the converted current, and the current-voltage conversion circuit converts the converted current into the first bias voltage.

8. The anti-fuse sensing device according to claim 7, wherein The voltage-current conversion circuit includes: A voltage comparator having a first input terminal for receiving the first reference voltage, wherein a second input terminal of the voltage comparator is coupled to the voltage generation circuit to receive the comparison voltage; and A transistor having a control terminal coupled to an output terminal of the voltage comparator, wherein a first terminal of the transistor is coupled to a second reference voltage, and a second terminal of the transistor is coupled to the current-voltage conversion circuit to draw the converted current.

9. The anti-fuse sensing device according to claim 7, wherein The current-voltage conversion circuit includes: A current mirror, wherein the voltage-current conversion circuit is coupled to a main current terminal of the current mirror to draw the converted current, and the current mirror generates an image current based on the converted current; and A voltage division circuit having a first terminal coupled to a slave current terminal of the current mirror to receive the image current for generating the first bias voltage based on the image current.

10. The anti-fuse sensing device according to claim 9, wherein, The current-voltage conversion circuit further includes: A transistor having a control terminal controlled by a second bias voltage of the voltage generation circuit, wherein a first terminal of the transistor is coupled to a system voltage, and the first terminal of the voltage division circuit is further coupled to a second terminal of the transistor.

11. The anti-fuse sensing device according to claim 7, wherein The voltage-current conversion circuit includes: A voltage comparator having a first input terminal coupled to the voltage generation circuit to receive the comparison voltage, wherein a second input terminal of the voltage comparator is for receiving the first reference voltage; and A transistor having a control terminal coupled to an output terminal of the voltage comparator, wherein a first terminal of the transistor is coupled to a system voltage, and a second terminal of the transistor is coupled to the current-voltage conversion circuit to provide the converted current.

12. The antifuse sensing device according to claim 7, wherein The current-voltage conversion circuit includes: A voltage division circuit having a first terminal coupled to the voltage-current conversion circuit to receive the converted current for generating the first bias voltage based on the converted current.

13. The anti-fuse sensing device according to claim 12, wherein The current-voltage conversion circuit further includes: A transistor having a control terminal controlled by a second bias voltage of the voltage generation circuit, wherein a first terminal of the transistor is coupled to a system voltage, and the first terminal of the voltage division circuit is further coupled to a second terminal of the transistor.

14. The anti-fuse sensing device according to claim 1, characterized in that, The sensing circuit includes: A first transistor having a control terminal coupled to the comparison circuit to receive the first bias voltage, wherein a first terminal of the first transistor is coupled to a system voltage, and a second terminal of the first transistor is for coupling to the antifuse; A second transistor having a control terminal coupled to the second terminal of the first transistor, wherein a first terminal of the second transistor is coupled to the system voltage; and A third transistor having a control terminal coupled to the second terminal of the first transistor, wherein a first terminal of the third transistor is coupled to a second reference voltage, and a second terminal of the third transistor is coupled to a second terminal of the second transistor.

15. A method of operating an anti-fuse sensing device, the anti-fuse sensing device being adapted to sense the resistance state of an anti-fuse, characterized in that, The operation method includes: A comparison voltage that varies with temperature is generated by a voltage generation circuit of the antifuse sensing device; A difference between the comparison voltage and a first reference voltage is converted by a comparison circuit of the antifuse sensing device into a first bias voltage that varies with temperature; and A resistance state of the antifuse is sensed by a sensing circuit of the antifuse sensing device based on the first bias voltage.

16. The operating method according to claim 15, characterized in that, The first bias voltage increases as the temperature rises, and the first bias voltage decreases as the temperature drops.

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