Packaging method of a photon detector and photon detector

Abstract

The application discloses a packaging method of a photon detector and the photon detector. The packaging method of the photon detector comprises the following steps: providing a substrate and a chip, wherein a first conductive layer is arranged on one side of the substrate, and a second conductive layer is arranged on the other side of the substrate; performing etching treatment on the first conductive layer to form a first conductive circuit on the first conductive layer; mounting the chip on the first conductive layer to electrically connect the chip with the first conductive circuit; sequentially laminating a first dielectric layer and a third conductive layer on the outer surface of the chip; performing etching treatment and electroplating treatment on the second conductive layer and the third conductive layer to form a second conductive circuit on the second conductive layer and a third conductive circuit on the third conductive layer; and mounting a photoelectric conversion crystal on the third conductive layer to electrically connect the photoelectric conversion crystal with the third conductive circuit. The packaging method can simplify a process flow and improve the integration of the photon detector.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor packaging, and in particular to a packaging method of a photon detector and a photon detector. BACKGROUND

[0002] The photon counting detector is a new technology applied to medical CT instruments and is one of the most important components of CT machines. The photon counting detector can directly receive X-rays and convert the X-rays into current pulses, and then convert the current pulses into CT images through a series of image processing technologies, so as to provide doctors with the CT images for analyzing a disease.

[0003] In the related art, the photon technology detector is usually packaged in a non-embedded manner. However, the packaging manner has certain limitations and has a large process difficulty. SUMMARY

[0004] The present application aims to at least solve one of the problems in the prior art. To this end, one object of the present application is to provide a packaging method of a photon detector. The packaging method can simplify a process flow and improve the integration of the photon detector.

[0005] A second aspect of the present application provides a photon detector.

[0006] To solve the above problems, a first aspect of the present application provides a packaging method of a photon detector, comprising: providing a substrate and a chip, wherein a first conductive layer is arranged on one side of the substrate, and a second conductive layer is arranged on the other side of the substrate; performing etching treatment on the first conductive layer to form a first conductive circuit on the first conductive layer; mounting the chip on the first conductive layer so that the chip is electrically connected to the first conductive circuit; sequentially laminating a first dielectric layer and a third conductive layer on an outer surface of the chip; performing etching treatment and electroplating treatment on the second conductive layer and the third conductive layer to form a second conductive circuit on the second conductive layer and a third conductive circuit on the third conductive layer; and mounting a photoelectric conversion crystal on the third conductive layer so that the photoelectric conversion crystal is electrically connected to the third conductive circuit.

[0007] According to the packaging method of the photon detector, the chip is arranged on the first conductive layer, and the first dielectric layer and the third conductive layer are sequentially laminated on the outer surface of the chip, so that the chip is embedded in the substrate. Compared with the non-embedded packaging manner, the present application adopts the embedded packaging manner, which can greatly simplify the processing flow of the photon detector, realize the high integration of the product, reduce the internal resistance generated in the packaging process, and improve the signal-to-noise ratio of the product.

[0008] In some embodiments, after the photoelectric conversion crystal is electrically connected with the second conductive circuit, the packaging method further comprises: plastic packaging the photoelectric conversion crystal to form a plastic packaging layer on the outer surface of the photoelectric conversion crystal.

[0009] In some embodiments, the photoelectric conversion crystal is a cadmium zinc telluride crystal, and the plastic packaging layer is an X-ray transmissive material.

[0010] In some embodiments, mounting the chip on the first conductive layer comprises: mounting the chip on the first conductive layer in a flip-chip manner.

[0011] In some embodiments, the etching and plating processes on the second conductive layer and the third conductive layer to form the second conductive circuit on the second conductive layer and the third conductive circuit on the third conductive layer comprises: punching the second conductive layer to expose the first conductive circuit; punching the third conductive layer to etch through the first dielectric layer to expose the pads of the chip; plating the whole board, and etching the second conductive layer after the plating process to form the second conductive circuit, and etching the third conductive layer after the plating process to form the third conductive circuit.

[0012] In some embodiments, after the etching and plating processes on the second conductive layer to form the second conductive circuit on the second conductive layer, the packaging method further comprises: sequentially laminating a second dielectric layer and a fourth conductive layer on the outer surface of the second conductive layer; etching and drilling the fourth conductive layer to expose the signal transmission circuit in the second conductive circuit; plating the whole board, and etching the fourth conductive layer after the plating process to form the fourth conductive circuit.

[0013] In some embodiments, the second aspect of the application provides a photon detector, comprising: a substrate, one side of the substrate is provided with a first conductive layer, and the other side of the substrate is provided with a second conductive layer, wherein the first conductive layer forms a first conductive circuit, and the second conductive layer forms a second conductive circuit; a chip, the chip is arranged on the first conductive layer and electrically connected with the first conductive circuit; a first dielectric layer, the first dielectric layer is arranged on the outer surface of the chip; a third conductive layer, the third conductive layer is arranged on the outer surface of the first dielectric layer, and the third conductive layer forms a third conductive circuit; a photoelectric conversion crystal, the photoelectric conversion crystal is arranged on the third conductive layer and electrically connected with the third conductive circuit.

[0014] According to the photon detector of the embodiment of the present application, the chip is embedded in the substrate by arranging the chip on the first conductive layer and laminating the first dielectric layer and the third conductive layer on the outer surface of the chip in sequence, so that the packaging structure of the embedded type is adopted, the processing flow of the photon detector is facilitated to be simplified, the high integration of the product is realized, the internal resistance generated in the packaging process is reduced, and the signal-to-noise ratio of the product is improved.

[0015] In some embodiments, further comprising: a plastic sealing layer covering the outer surface of the photoelectric conversion crystal.

[0016] In some embodiments, the photoelectric conversion crystal is a cadmium zinc telluride crystal, and the plastic sealing layer is an X-ray transparent material.

[0017] In some embodiments, further comprising: a second dielectric layer arranged on the outer surface of the second conductive layer; and a fourth conductive layer arranged on the outer surface of the second dielectric layer, and a fourth conductive circuit is formed on the fourth conductive layer, and the fourth conductive circuit is electrically connected with the second conductive circuit.

[0018] Additional aspects and advantages of the present application will be made apparent from the following description of embodiments of the present application, taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0019] The above and / or additional aspects and advantages of the present application will become apparent and be readily understood from the following description, taken in conjunction with the accompanying drawings, in which:

[0020] Figure 1 is a flowchart of a packaging method of a photon detector according to an embodiment of the present application;

[0021] Figure 2 is a schematic diagram of a substrate according to an embodiment of the present application;

[0022] Figure 3 is a schematic diagram of mounting a chip on a first conductive layer according to an embodiment of the present application;

[0023] Figure 4 is a schematic diagram of laminating a first dielectric layer and a third conductive layer on the outer surface of the chip according to an embodiment of the present application;

[0024] Figure 5 is a schematic diagram of etching a second conductive layer and a third conductive layer according to an embodiment of the present application;

[0025] Figure 6 is a schematic diagram of electroplating a second conductive layer and a third conductive layer according to an embodiment of the present application;

[0026] Figure 7is a schematic diagram of etching and plating of the second conductive layer and the third conductive layer according to an embodiment of the present application;

[0027] Figure 8 is a schematic diagram of mounting a photoelectric conversion crystal on the third conductive layer according to an embodiment of the present application;

[0028] Figure 9 is a schematic diagram of plastic packaging of the photoelectric conversion crystal according to an embodiment of the present application;

[0029] Figure 10 is a schematic diagram of laminating a second dielectric layer and a fourth conductive layer on the second conductive layer according to an embodiment of the present application;

[0030] Figure 11 is a schematic diagram of a structure of a photon detector according to an embodiment of the present application.

[0031] Reference signs:

[0032] Photon detector 10;

[0033] Substrate 1; Chip 2; First dielectric layer 3; Third conductive layer 4; Photoelectric conversion crystal 5; Plastic packaging layer 6; Second dielectric layer 7; Fourth conductive layer 8;

[0034] First conductive layer 11; Substrate 12; Second conductive layer 13; Pad 21; Through silicon via 22. DETAILED DESCRIPTION

[0035] Embodiments of the present application are described in detail below, and the embodiments described with reference to the accompanying drawings are exemplary, and embodiments of the present application are described in detail below.

[0036] To solve the above problems, an embodiment of the first aspect of the present application proposes a packaging method of a photon detector, and the packaging method can simplify the process flow and improve the integration of the photon detector.

[0037] The packaging method of the photon detector according to an embodiment of the present application is described below with reference to Figure 1 - FIG. describes the packaging method of the photon detector according to an embodiment of the present application, as shown in the figure, the packaging method at least includes steps S1-S6. Figure 1

[0038] Step S1, providing a substrate and a chip, wherein a first conductive layer is arranged on one side of the substrate, and a second conductive layer is arranged on the other side of the substrate.

[0039] Exemplarily, as shown in Figure 2 , the substrate 1 is a printed circuit board, which includes the first conductive layer 11, the substrate 12 and the second conductive layer 13.

[0040] Step S2, as shown in Figure 2 ​As shown, the first conductive layer 11 is etched to form the first conductive circuit on the first conductive layer 11.

[0041] In step S3, the chip is mounted on the first conductive layer so that the chip is electrically connected with the first conductive circuit.

[0042] The mounting mode of the chip and the first conductive layer is not limited. For example, as shown in Figure 3 The chip 2 is mounted on the first conductive layer 11 in flip-chip mode. Specifically, the chip 2 is a special integrated circuit with a through silicon via 21, and the chip 2 is soldered to the first conductive layer.

[0043] The solder can be silver paste, indium dot, conductive glue, anisotropic tape, etc., and is not limited.

[0044] In step S4, as shown in Figure 4 The first dielectric layer 3 and the third conductive layer 4 are laminated on the outer surface of the chip 2 in sequence.

[0045] In step S5, the second conductive layer and the third conductive layer are etched and plated to form the second conductive circuit on the second conductive layer and the third conductive circuit on the third conductive layer.

[0046] For example, the second conductive layer is punched to expose the first conductive circuit. Specifically, as shown in Figure 5 The second conductive layer 13 is drilled at a position corresponding to the chip 2 pad, such as laser drilling to etch the second conductive layer 13 and the substrate 12 of the substrate 1, so as to expose the first conductive circuit connected with the chip 2 pad; and the third conductive layer is punched and etched to expose the chip pad. Specifically, as shown in Figure 5 The third conductive layer 4 is drilled at a position corresponding to the chip 2 pad, such as laser drilling to etch the third conductive layer 4 and the first dielectric layer 3, so as to expose the pad of the chip 2; the whole board is plated, and the plated whole board is etched to form the second conductive circuit and the third conductive circuit, as shown in Figure 6 Figure 7

[0047] In step S6, as shown in Figure 8 The photoelectric conversion crystal 5 is mounted on the third conductive layer 4. For example, the photoelectric conversion crystal 5 can be soldered to the third conductive layer 4, so that the photoelectric conversion crystal 5 is electrically connected with the third conductive circuit.

[0048] ​​In some embodiments, the photoelectric conversion crystal 5 can be a cadmium zinc telluride crystal or a cadmium telluride crystal, without limitation.

[0049] According to the packaging method of the photon detector, the chip is embedded in the substrate by arranging the chip on the first conductive layer and laminating the first dielectric layer and the third conductive layer on the outer surface of the chip in sequence, so that compared with a non-buried packaging method, the photon detector can be greatly simplified by using a buried packaging method, high integration of the product is achieved, internal resistance generated in the packaging process is reduced, and the signal-to-noise ratio of the product is improved.

[0050] In some embodiments, after the photoelectric conversion crystal is electrically connected with the second conductive circuit, as shown in Figure 9 , the packaging method further includes: plastic packaging the photoelectric conversion crystal 5 to form a plastic packaging layer 6 on the outer surface of the photoelectric conversion crystal 5, so that the photoelectric conversion crystal 5 is protected by covering the plastic packaging material on the entire surface of the photoelectric conversion crystal 5, thereby avoiding the problem that the surface of the photoelectric conversion crystal is directly exposed, and effectively reducing the influence of harmful substances such as crystal powder on the production line.

[0051] In some embodiments, the photoelectric conversion crystal 5 is a cadmium zinc telluride crystal, and the plastic packaging layer 6 is an X-ray transparent material. Thus, by using the X-ray transparent material, the plastic packaging layer 6 does not block the contact between the X-ray and the surface of the cadmium zinc telluride crystal in actual application, and can effectively protect the cadmium zinc telluride crystal from being damaged by external force, and can also effectively reduce the possibility of pollution by harmful chemicals.

[0052] In some embodiments, after the second conductive layer is etched and plated to form the second conductive circuit on the second conductive layer, as shown in Figure 10 , the packaging method further includes: laminating a second dielectric layer 7 and a fourth conductive layer 8 on the outer surface of the second conductive layer 13 in sequence; etching and drilling the fourth conductive layer 8 to expose the signal transmission circuit in the second conductive circuit; and plating the whole board and etching the fourth conductive layer 8 after the plating to form a fourth conductive circuit. Thus, the second dielectric layer 7 can effectively protect the circuit outside the signal transmission circuit in the second conductive circuit, and the fourth conductive layer 8 is arranged to lead out the signal transmission circuit in the second conductive circuit, so that the fourth conductive circuit is connected with the signal transmission circuit to facilitate signal transmission between the photon detector and external equipment.

[0053] The second aspect of the present application provides a photon detector, as shown in Figure 11 , the photon detector 10 includes a substrate 1, a chip 2, a first dielectric layer 3, a third conductive layer 4, and a photoelectric conversion crystal 5.

[0054] As shown in Figure 2 The one side of the substrate 1 is provided with a first conductive layer 11, and the other side of the substrate 1 is provided with a second conductive layer 13, wherein the first conductive layer 11 is formed with a first conductive circuit, and the second conductive layer 13 is formed with a second conductive circuit; the chip 2 is arranged on the first conductive layer 11 and electrically connected with the first conductive circuit; the first dielectric layer 3 is arranged on the outer surface of the chip 2; the third conductive layer 4 is arranged on the outer surface of the first dielectric layer 3, and the third conductive layer 4 is formed with a third conductive circuit; and the photoelectric conversion crystal 5 is arranged on the third conductive layer 4 and electrically connected with the third conductive circuit.

[0055] According to the photon detector 10 of the embodiment of the present application, the chip 2 is arranged on the first conductive layer 11, and the first dielectric layer 3 and the third conductive layer 4 are laminated on the outer surface of the chip 2 in sequence, so that the chip 2 is embedded in the substrate 1. Therefore, by using the embedded packaging structure, the processing flow of the photon detector is simplified, the product is highly integrated, the internal resistance generated in the packaging process is reduced, and the signal-to-noise ratio of the product is improved.

[0056] In some embodiments, as shown in Figure 11 The photon detector 10 further comprises a plastic sealing layer 6 covering the outer surface of the photoelectric conversion crystal 5. Therefore, by designing the plastic sealing layer 6, the photoelectric conversion crystal 5 can be effectively protected from being damaged by external force, and the possibility of chemical pollution can be effectively reduced.

[0057] In some embodiments, the photoelectric conversion crystal 5 is a cadmium zinc telluride crystal, and the plastic sealing layer 6 is an X-ray transparent material.

[0058] In some embodiments, as shown in Figure 11 The photon detector 10 further comprises a second dielectric layer 7 and a fourth conductive layer 8.

[0059] The second dielectric layer 7 is arranged on the outer surface of the second conductive layer 13; the fourth conductive layer 8 is arranged on the outer surface of the second dielectric layer 7, and the fourth conductive layer 8 is formed with a fourth conductive circuit, and the fourth conductive circuit is electrically connected with the second conductive circuit.

[0060] In the description of the present specification, the description of the terms "one embodiment", "some embodiments", "illustrative embodiment", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily mean the same embodiment or example.

[0061] While embodiments of the application have been shown and described, it is to be understood that the embodiments described are merely divergences of the principles and application of the present application and that numerous modifications, changes, substitutions, and alterations can be made thereto without departing from the spirit and scope of the present application, which is defined by the following claims and their equivalents.

Claims

1. A method for packaging a photon detector, characterized in that, include: A substrate and a chip are provided, wherein a first conductive layer is disposed on one side of the substrate and a second conductive layer is disposed on the other side of the substrate; The first conductive layer is etched to form a first conductive line on the first conductive layer; The chip is mounted on the first conductive layer so that the chip is electrically connected to the first conductive line; A first dielectric layer and a third conductive layer are sequentially laminated on the outer surface of the chip; The second conductive layer and the third conductive layer are etched and electroplated to form a second conductive line on the second conductive layer and a third conductive line on the third conductive layer. A photoelectric conversion crystal is mounted on the third conductive layer so that the photoelectric conversion crystal is electrically connected to the third conductive circuit. The process includes etching and electroplating the second and third conductive layers to form a second conductive line on the second conductive layer and a third conductive line on the third conductive layer, including: The second conductive layer is perforated to expose the first conductive circuit. The third conductive layer is punched and the first dielectric layer is etched through to expose the pads of the chip; The entire board is electroplated, and the second conductive layer after electroplating is etched to form the second conductive line, and the third conductive layer after electroplating is etched to form the third conductive line. The second conductive line is electrically connected to the first conductive line, and the third conductive line is electrically connected to the pads of the chip.

2. The packaging method for a photon detector according to claim 1, characterized in that, After the photoelectric conversion crystal is electrically connected to the third conductive line, the system further includes: The photoelectric conversion crystal is encapsulated to form an encapsulation layer on the outer surface of the photoelectric conversion crystal.

3. The packaging method for a photon detector according to claim 2, characterized in that, The photoelectric conversion crystal is a zinc cadmium telluride crystal, and the encapsulation layer is an X-ray transparent material.

4. The packaging method for a photon detector according to claim 1, characterized in that, Mounting the chip onto the first conductive layer includes: The chip is mounted on the first conductive layer using a flip-chip bonding method.

5. The packaging method for a photon detector according to claim 1, characterized in that, After etching and electroplating the second conductive layer to form a second conductive line on the second conductive layer, the packaging method further includes: A second dielectric layer and a fourth conductive layer are sequentially laminated on the outer surface of the second conductive layer; The fourth conductive layer is etched and drilled to expose the signal transmission lines in the second conductive line; The entire board is electroplated, and the fourth conductive layer after electroplating is etched to form the fourth conductive line.

6. A photon detector, characterized in that, It is prepared by the method according to any one of claims 1-5, comprising: A substrate, wherein a first conductive layer is disposed on one side of the substrate and a second conductive layer is disposed on the other side of the substrate, wherein a first conductive line is formed on the first conductive layer and a second conductive line is formed on the second conductive layer; A chip, wherein the chip is disposed on the first conductive layer and is electrically connected to the first conductive line; A first dielectric layer is disposed on the outer surface of the chip; A third conductive layer is disposed on the outer surface of the first dielectric layer, and a third conductive line is formed on the third conductive layer; A photoelectric conversion crystal is disposed on the third conductive layer and electrically connected to the third conductive circuit.

7. The photon detector according to claim 6, characterized in that, Also includes: A molding layer that covers the outer surface of the photoelectric conversion crystal.

8. The photon detector according to claim 7, characterized in that, The photoelectric conversion crystal is a zinc cadmium telluride crystal, and the encapsulation layer is an X-ray transparent material.

9. The photon detector according to claim 6, characterized in that, Also includes: A second dielectric layer is disposed on the outer surface of the second conductive layer; A fourth conductive layer is disposed on the outer surface of the second dielectric layer, and a fourth conductive line is formed on the fourth conductive layer, the fourth conductive line being electrically connected to the second conductive line.

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