A class-d audio power amplifier with adaptive boosting for light load efficiency and reduced quiescent current

Abstract

The application relates to a D-class audio power amplifier capable of self-adapting to improve light-load efficiency and reduce static current, which comprises an audio input module, an operational amplifier unit, a pulse width modulator and a power control module connected in sequence, wherein the operational amplifier unit and the power control module are connected with an automatic gain controller, and the pulse width modulator is connected with an oscillator; the power control module comprises a driving circuit, an adaptive power supply connected with the driving circuit and a full-bridge power tube; the driving circuit is connected with the pulse width modulator, and the full-bridge power tube is connected with the automatic gain controller. The adaptive power supply adjusts the power supply voltage of the driving circuit and the full-bridge power tube according to the size requirement of the audio output power, adaptively changes the gate voltage size of the full-bridge power tube, and reduces the power consumption of the circuit in the light load. The driving circuit adaptively adjusts the parallel number of the full-bridge power tube by detecting the size of the input voltage and the load power, reduces the static current, and improves the light-load efficiency.

Description

Technical Field

[0001] This invention relates to the field of audio power amplifiers, specifically to the field of Class D audio power amplifiers, and more specifically to a Class D audio power amplifier that adaptively improves light-load efficiency and reduces quiescent current. Background Technology

[0002] Audio power amplifiers are widely used in various portable audio systems. Their primary function is to amplify weak audio signals and drive speakers or headphones. Battery life is a crucial factor for portable audio systems with built-in batteries, and power output is a vital prerequisite for ensuring sound quality, leading to ever-increasing output power. As power requirements increase, the supply voltage of audio power amplifiers must also increase accordingly. As the main power-consuming component of an audio system, its operating efficiency is key to improving the performance of portable audio systems.

[0003] Audio power amplifiers are mainly classified into Class A, Class B, Class AB, and Class D based on their operating mode. When driving low-power speakers, Class A, Class B, and Class AB amplifiers can achieve low distortion while meeting power requirements. However, in high-power scenarios such as speaker driving, the more efficient Class D amplifiers are typically used. Class D amplifiers generate less heat, operate in a switching state, and their high efficiency significantly increases the battery life of portable speakers. Considering the wide range of audio signals, a constant battery power supply would limit the output power of the audio amplifier. Therefore, boost control is needed for Class D audio amplifiers, and the efficiency of the boost circuit also affects the battery life of portable speakers.

[0004] Currently, the main methods to improve the battery life of portable speakers include: 1) Synchronous boost converters, which can avoid the relative disadvantages of large inherent voltage drop and high losses in asynchronous boost rectifier diodes, thus improving overall efficiency; 2) Since music volume varies depending on the application scenario and time period when dynamically paired with an audio amplifier, a boost module can dynamically adjust the boost value according to the music volume to improve efficiency. However, under light load conditions, the conduction loss and gate drive loss of the full-bridge drive are particularly significant, and these losses change with the load. Therefore, a technology that adaptively improves the light-load efficiency of audio amplifiers is needed. Summary of the Invention

[0005] To address the problems in the prior art, the present invention provides a Class D audio power amplifier that adaptively improves light-load efficiency and reduces quiescent current, thereby improving light-load efficiency and reducing quiescent current.

[0006] This invention provides a Class D audio power amplifier that adaptively improves light-load efficiency and reduces quiescent current, comprising an audio input module, an operational amplifier unit, a pulse width modulator, and a power control module connected in sequence. Both the operational amplifier unit and the power control module are connected to an automatic gain controller, and the pulse width modulator is connected to an oscillator. The power control module includes a drive circuit, an adaptive power supply, and a full-bridge power transistor connected to the drive circuit. The drive circuit is connected to the pulse width modulator, and the full-bridge power transistor is connected to the automatic gain controller.

[0007] Furthermore, the audio input module is connected to the first input terminal of the operational amplifier unit, the second input terminal of the operational amplifier unit is connected to the automatic gain controller, the output terminal of the operational amplifier unit is connected to the first input terminal of the pulse width modulator, the second input terminal of the pulse width modulator is connected to the oscillator, the output terminal of the pulse width modulator is connected to the first input terminal of the drive circuit, the second input terminal of the drive circuit is connected to the adaptive power supply, the output terminal of the drive circuit is connected to the input terminal of the full-bridge power transistor, and the output terminal of the full-bridge power transistor is connected to the automatic gain controller and the audio device, respectively.

[0008] Furthermore, the adaptive power supply is connected to the voltage regulation module.

[0009] Furthermore, the voltage regulation module includes a threshold voltage generator, an audio amplitude detection unit, and an automatic data processing unit connected in sequence. The audio amplitude detection unit is connected to the operational amplifier unit, and the automatic data processing unit is connected to the clock signal generator and the adaptive power supply, respectively.

[0010] Furthermore, the output terminal of the threshold voltage generator is connected to the first input terminal of the audio amplitude detection unit, the second input terminal of the audio amplitude detection unit is connected to the output terminal of the operational amplifier unit, the output terminal of the audio amplitude detection unit is connected to the first input terminal of the automatic data processing unit, the second input terminal of the automatic data processing unit is connected to the output terminal of the clock signal generator, and the output terminal of the automatic data processing unit is connected to the input terminal of the adaptive power supply.

[0011] Furthermore, the voltage regulation module is configured such that: the threshold voltage generator outputs a first threshold voltage signal and a second threshold voltage signal, which are transmitted to the audio amplitude detection unit; the audio amplitude detection unit compares the amplitudes of the first threshold voltage signal and the second threshold voltage signal with the amplitude of the pre-amplified signal output by the operational amplifier unit, and outputs an amplitude detection signal, which is transmitted to the automatic data processing unit; the automatic data processing unit, through the clock signal generator, obtains a counting signal based on the clock pulses given by different output powers, which is transmitted to the adaptive power supply; the adaptive power supply determines the boost factor based on the counting signal, and obtains the power supply voltage provided to the drive circuit and the full-bridge power transistor.

[0012] Furthermore, the full-bridge power transistors include n sets of PMOS transistors and n sets of NMOS transistors connected to the first input terminal of the audio device, and n sets of PMOS transistors and n sets of NMOS transistors connected to the second input terminal of the audio device, where n is a positive integer.

[0013] Furthermore, the source of the first PMOS transistor is connected to the output terminal of the adaptive power supply, and is also connected to the sources of the second PMOS transistor, ..., and the nth PMOS transistor, respectively; the drain of the first PMOS transistor is connected to the drain of the second PMOS transistor, ..., and the nth PMOS transistor, respectively, and is also connected to the drain of the first NMOS transistor, the second NMOS transistor, ..., and the nth NMOS transistor, respectively; the sources of the first NMOS transistor, the second NMOS transistor, ..., and the nth NMOS transistor are all grounded, and the gates of the PMOS transistor and the NMOS transistor are both connected to the output terminal of the driving circuit.

[0014] Furthermore, the PMOS transistors are all the same size, and the NMOS transistors are all the same size.

[0015] The adaptive power supply used in this invention can adjust the supply voltage of the driver circuit and the full-bridge power transistors according to the required audio output power, thereby adaptively changing the gate voltage of the full-bridge power transistors and reducing power consumption under light load. The driver circuit adaptively adjusts the number of parallel full-bridge power transistors by detecting the input voltage and load power, reducing quiescent current and improving light-load efficiency. Furthermore, this invention has a simple structure, reduces operating costs, and is safe and reliable. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in one or more embodiments of this specification or in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this specification. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the structure of a Class D audio power amplifier that adaptively improves light-load efficiency and reduces quiescent current according to the present invention.

[0018] Figure 2 This is a schematic diagram of the voltage regulation module.

[0019] Figure 3 yes Figure 2 The principle waveform diagram of the voltage regulation module.

[0020] Figure 4(a) shows Figure 1 A schematic diagram of the n× mode structure of the full-bridge power transistor; Figure 4(b) shows... Figure 1 A schematic diagram of the 1× mode of the full-bridge power transistor. Detailed Implementation

[0021] The preferred embodiments of the present invention are given below with reference to the accompanying drawings and described in detail.

[0022] like Figure 1 As shown, the Class D audio power amplifier with adaptive improvement in light-load efficiency and reduction in quiescent current provided by the present invention includes an audio input module 1, an operational amplifier unit 2, a pulse width modulator 3, and a power control module 4 connected in sequence. Both the operational amplifier unit 2 and the power control module 4 are connected to an automatic gain controller 5, and the pulse width modulator 3 is connected to an oscillator 6. The power control module 4 includes a drive circuit 41, an adaptive power supply 42, and a full-bridge power transistor 43 connected to the drive circuit 41. The drive circuit 41 is connected to the pulse width modulator 3, and the full-bridge power transistor 43 is connected to the automatic gain controller 5.

[0023] Specifically, the audio input module 1 is connected to the first input terminal of the operational amplifier unit 2, the second input terminal of the operational amplifier unit 2 is connected to the automatic gain controller 5, the output terminal of the operational amplifier unit 2 is connected to the first input terminal of the pulse width modulator 3, the second input terminal of the pulse width modulator 3 is connected to the oscillator 6, the output terminal of the pulse width modulator 3 is connected to the first input terminal of the drive circuit 41, the second input terminal of the drive circuit 41 is connected to the adaptive power supply 42, the output terminal of the drive circuit 41 is connected to the input terminal of the full-bridge power transistor 43, and the output terminal of the full-bridge power transistor 43 is connected to the automatic gain controller 5 and the audio device 7 respectively, so that the output signal of the full-bridge power transistor 43 is fed back to the automatic gain controller 5 and the audio device 7.

[0024] The working principle of the aforementioned Class D audio power amplifier is as follows: Operational amplifier unit 2 pre-amplifies the audio signal input from audio input module 1. Automatic gain controller 5 provides feedback based on the required audio output power and the total output of the Class D audio power amplifier (i.e., the output signal of the full-bridge power transistor 43), adjusting the value of the feedback resistor in operational amplifier unit 2 to adjust the pre-amplification factor. Oscillator 6 generates a triangular wave signal. Pulse width modulator 3 compares the pre-amplified signal output from operational amplifier unit 2 with the triangular wave signal output from oscillator 6, outputs a pulse width modulated signal, and transmits it to drive circuit 41 to adjust the pulse width of the drive signal output by drive circuit 41. The drive signal output by drive circuit is transmitted to the gate of the MOS transistor in full-bridge power transistor 43 to control the switching on and off of the power transistor.

[0025] As the output power of Class D audio amplifiers increases, the conduction losses of the full-bridge power transistors become dominant under heavy loads, thus requiring lower on-resistance. However, under light loads, as the load current decreases, the conduction losses of the full-bridge power transistors decrease significantly, and drive losses become the dominant factor, affecting the circuit's conversion efficiency.

[0026] Under light load, the power consumption of a MOSFET in a circuit can be expressed as:

[0027] P loss =P cond +P gd +P sw +P others (1)

[0028] In the formula, P cond P represents the conduction loss. gd P represents the gate drive loss. sw P represents the switching loss. others This represents other losses that are independent of the gate drive voltage.

[0029] Among them, the conduction loss P cond For the on-resistance R on and the root mean square current I flowing through the MOS power transistor rms Functions:

[0030] P cond =I rms 2 R on (2)

[0031] Gate drive loss P gd It is the equivalent gate-source capacitance C during the charging and discharging of the switching power transistor. is Gate drive voltage V dr and switching frequency f s Related functions:

[0032]

[0033] Under zero-current or zero-voltage switching conditions, the switching loss P sw It can be approximated as zero.

[0034] Since the on-resistance of a power transistor is related to its width-to-length ratio and the gate drive voltage, both gate drive loss and conduction loss are affected by the gate drive voltage. However, these two factors are contradictory, and there exists an optimal gate drive voltage for a specific load current. The optimal drive voltage V0 opt The relevant expression is:

[0035]

[0036] In the formula, u n C represents the carrier mobility. ox The gate oxide capacitance per unit area.

[0037] According to formula (4), the optimal driving voltage is positively correlated with the current flowing through the MOS power transistor, i.e., the load current. Therefore, the value of the driving voltage can be reduced accordingly when the circuit is under light load, thereby improving the circuit efficiency.

[0038] To achieve the above objectives, the present invention improves the power control module 4.

[0039] The adaptive power supply 42 in the power control module 4 provides power voltage to the drive circuit 41 and the full-bridge power transistor 43, and is connected to the voltage regulation module 44. Figure 2 As shown, the voltage regulation module 44 includes a threshold voltage generator 441, an audio amplitude detection unit 442, and an automatic data processing unit 443 connected in sequence. The audio amplitude detection unit 442 is connected to the above-mentioned operational amplifier unit 2, and the automatic data processing unit 443 is connected to the clock signal generator 444 and the adaptive power supply 42 respectively.

[0040] Specifically, the output of the threshold voltage generator 441 is connected to the first input of the audio amplitude detection unit 442, the second input of the audio amplitude detection unit 442 is connected to the output of the operational amplifier unit 2, the output of the audio amplitude detection unit 442 is connected to the first input of the automatic data processing unit 443, the second input of the automatic data processing unit 443 is connected to the output of the clock signal generator 444, the output of the automatic data processing unit 443 is connected to the input of the adaptive power supply 42, and the output of the adaptive power supply 42 is the total output of the voltage regulation module 44.

[0041] The voltage regulation module 44 works as follows: The first threshold voltage signal Vth1 and the second threshold voltage signal Vth2 output by the threshold voltage generator 441 are transmitted to the audio amplitude detection unit 442. The audio amplitude detection unit 442 compares the amplitude of the threshold voltage signal with the amplitude of the pre-amplified signal Voamp output by the operational amplifier unit 2, and outputs the amplitude detection signal Famp, which is transmitted to the automatic data processing unit 443. The automatic data processing unit 443, through the clock signal generator 444, generates a counting signal Adp based on the clock pulse Clk given for different output powers, which is transmitted to the adaptive power supply 42. The adaptive power supply 42 determines the boost factor based on the counting signal Adp and obtains the power supply voltage Vbst provided to the drive circuit 41 and the full-bridge power transistor 43.

[0042] Figure 3 The schematic diagram of the voltage regulation module 44 is shown. Based on the above formula and the characteristic analysis of the adaptive power supply, the power consumption of the circuit under light load is mainly related to drive losses. Adjusting the supply voltage of the drive circuit 41 and the full-bridge power transistor 43 according to the load power can improve circuit efficiency. Since the audio pre-amplified signal output by the operational amplifier unit 2 indicates the load power level, when the amplitude of the pre-amplified signal output by the operational amplifier unit 2 is detected to be lower than Vth1, the adaptive power supply Vbst operates in pass-through mode; when the amplitude of the pre-amplified signal output by the operational amplifier unit 2 is detected to be higher than Vth1 but lower than Vth2, Vbst increases to mode one; when the amplitude of the pre-amplified signal output by the operational amplifier unit 2 is detected to be higher than Vth2, Vbst increases to mode two; when the amplitude decreases again, it returns to mode one, and so on. In this way, the circuit can adjust the power transistor drive voltage under light load to improve transmission efficiency.

[0043] As shown in Figure 4(a), the full-bridge power transistor 43 includes n sets of PMOS transistors and n sets of NMOS transistors (n is a positive integer) connected to the first input terminal of the audio device 7, and n sets of PMOS transistors and n sets of NMOS transistors connected to the second input terminal of the audio device 7. The PMOS transistors and NMOS transistors at the two input terminals of the audio device 7 are symmetrically arranged, and all PMOS transistors and all NMOS transistors are of the same size.

[0044] Taking the power transistors connected to the first input terminal of the audio device as an example, the connection method of these n groups of PMOS transistors and n groups of NMOS transistors is as follows: the source of the first PMOS transistor PM11 is connected to the output terminal of the adaptive power supply 42, and is connected to the source of the second PMOS transistor PM12, ..., the nth PMOS transistor PMn1 respectively; the drain of the first PMOS transistor PM11 is connected to the drain of the second PMOS transistor PM12, ..., the nth PMOS transistor PM1n respectively, and is connected to the drain of the first NMOS transistor NM11, the second NMOS transistor NM12, ..., the nth NMOS transistor NM1n respectively. This connection point is set as the first output terminal VOP of the full-bridge power transistor (which is also the first input terminal of the audio device 7); the sources of the first NMOS transistor NM11, the second NMOS transistor NM12, ..., the nth NMOS transistor NM1n are all grounded, and the gates of all PMOS transistors and all NMOS transistors are connected to the output terminal of the driving circuit 41. The connection method of the power transistor connected to the second input terminal of the audio device is the same as above, so it will not be described again. Set the second output terminal of the full-bridge power transistor to VON (which is also the second input terminal of the audio device 7).

[0045] Taking the NMOS transistor at the output VOP as an example, let the width-to-length ratio of the power transistor NM11 be... If the number of identical power transistors connected in parallel under a certain operating condition is n, then the equivalent aspect ratio of the total width to length of the conductive channel is:

[0046] When the circuit is in static operation, according to the above formulas (1) to (3), since the load current is zero, the power consumption of the power transistor is mainly the gate drive loss P. gd The equivalent gate-source capacitance C is The relationship with the pipe width-to-length ratio is as follows:

[0047]

[0048] Among them, C ov This represents the overlapping capacitance per unit width.

[0049] Combining formulas (3) and (5) above, we know that if the switching frequency of the power transistor is f... s When the number of power transistors connected in parallel is n, the power consumption of the power transistors in static operation is:

[0050]

[0051] Therefore, when operating in the static state, taking n=1, i.e., the power transistor is in 1x mode (as shown in Figure 4(b)), can reduce the static current.

[0052] In light-load mode, according to the above formula (1), the power consumption of the power transistor mainly consists of conduction loss and gate drive loss. When the number of power transistors connected in parallel is n, the expression for the on-resistance related to conduction loss is:

[0053]

[0054] Combining formulas (2) and (3) above, it can be seen that when the number of power transistors connected in parallel is n, the power consumption of the power transistors under a specific load current under light load is:

[0055]

[0056] When the driving voltage is at a certain specific value, there exists an n value that minimizes the power dissipation of the power transistor under light load:

[0057]

[0058] When the circuit is in light load mode, since the load current and gate drive voltage are directly related to the output power of class D, according to formula (9), the optimal drive voltage can be obtained by detecting the pre-amplified signal of operational amplifier unit 2, and the number of power transistors in parallel can be further adjusted to reduce the power consumption of the circuit in light load mode.

[0059] Since the conduction loss and gate drive loss of the full-bridge power transistors are generated by both PMOS and NMOS transistors, the adjustment principle for N-transistors described above also applies to P-transistors, and will not be repeated here.

[0060] Therefore, the working principle of the full-bridge power transistor 43 is as follows: the drive circuit 41 controls the number of PMOS and NMOS transistors connected in parallel in the full-bridge power transistor 43 based on the result of the pre-amplified signal detected by the adaptive power supply 42. Specifically, in static operation, the drive circuit 41 controls the power transistors to operate in 1x mode and adjusts the supply voltage of the drive circuit 41 to a shoot-through mode to reduce static operating current. In light-load mode, the number of power transistors connected in parallel is controlled according to the pre-amplified signal of the operational amplifier 2, and the gate voltage of the MOS transistors is adjusted according to the output voltage of the adaptive power supply 42 to reduce the power consumption of the MOS transistors under light load conditions and improve load transfer efficiency.

[0061] This invention employs a technique that dynamically changes the number of parallel power transistors in existing Class D power amplifiers. The gate of the power transistor is controlled by the drive circuit, reducing the power transistor losses under light load. It also achieves a technique that adaptively adjusts the supply voltage of the full-bridge drive according to different audio frequencies, reducing the static current at zero input, improving the transmission efficiency of the circuit under light load, and increasing the usage time of portable speakers.

[0062] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of the invention. Various variations can be made to the above embodiments of the present invention. That is, all simple and equivalent changes and modifications made based on the claims and description of this invention fall within the protection scope of the claims of this patent. All aspects not described in detail in this invention are conventional technical content.

Claims

1. A Class D audio power amplifier that adaptively improves light-load efficiency and reduces quiescent current, comprising an audio input module, an operational amplifier unit, a pulse width modulator, and a power control module connected in sequence, wherein the operational amplifier unit and the power control module are both connected to an automatic gain controller, and the pulse width modulator is connected to an oscillator; characterized in that, The power control module includes a drive circuit and an adaptive power supply and a full-bridge power transistor connected to the drive circuit. The drive circuit is connected to the pulse width modulator, and the full-bridge power transistor is connected to the automatic gain controller. The full-bridge power transistor includes a component connected to a first input terminal of the audio device. n Group PMOS transistors and n A group of NMOS transistors, and connected to the second input terminal of the audio device. n Group PMOS transistors and n Group of NMOS transistors, n It is a positive integer; When the Class D audio amplifier is in static operation, n=1 is set to reduce static current. When the Class D audio power amplifier is in light-load mode, since both the load current and the gate drive voltage are directly related to the Class D output power, the optimal drive voltage is determined by detecting the pre-amplified signal of the operational amplifier unit according to the following formula. Furthermore, the number of power transistors connected in parallel is adjusted to reduce the power consumption of the circuit in light-load mode. ， This is the root mean square current flowing through the MOSFET power transistor. This is the gate drive voltage. For switching frequency, The overlapping capacitance per unit width For carrier mobility, The gate oxide capacitance per unit area.

2. The Class D audio power amplifier with adaptive improvement of light-load efficiency and reduction of quiescent current according to claim 1, characterized in that, The audio input module is connected to the first input terminal of the operational amplifier unit, the second input terminal of the operational amplifier unit is connected to the automatic gain controller, the output terminal of the operational amplifier unit is connected to the first input terminal of the pulse width modulator, the second input terminal of the pulse width modulator is connected to the oscillator, the output terminal of the pulse width modulator is connected to the first input terminal of the drive circuit, the second input terminal of the drive circuit is connected to the adaptive power supply, the output terminal of the drive circuit is connected to the input terminal of the full-bridge power transistor, and the output terminal of the full-bridge power transistor is connected to the automatic gain controller and the audio device, respectively.

3. The Class D audio power amplifier with adaptive improvement of light-load efficiency and reduction of quiescent current according to claim 1, characterized in that, The adaptive power supply is connected to the voltage regulation module.

4. The Class D audio power amplifier with adaptive improvement of light-load efficiency and reduction of quiescent current according to claim 3, characterized in that, The voltage regulation module includes a threshold voltage generator, an audio amplitude detection unit, and an automatic data processing unit connected in sequence. The audio amplitude detection unit is connected to the operational amplifier unit, and the automatic data processing unit is connected to the clock signal generator and the adaptive power supply, respectively.

5. The Class D audio power amplifier with adaptive improvement of light-load efficiency and reduction of quiescent current according to claim 4, characterized in that, The output of the threshold voltage generator is connected to the first input of the audio amplitude detection unit, the second input of the audio amplitude detection unit is connected to the output of the operational amplifier unit, the output of the audio amplitude detection unit is connected to the first input of the automatic data processing unit, the second input of the automatic data processing unit is connected to the output of the clock signal generator, and the output of the automatic data processing unit is connected to the input of the adaptive power supply.

6. The Class D audio power amplifier with adaptive improvement of light-load efficiency and reduction of quiescent current according to claim 4, characterized in that, The voltage regulation module is configured such that: the threshold voltage generator outputs a first threshold voltage signal and a second threshold voltage signal, which are transmitted to the audio amplitude detection unit; the audio amplitude detection unit compares the amplitudes of the first threshold voltage signal and the second threshold voltage signal with the amplitude of the pre-amplified signal output by the operational amplifier unit, and outputs an amplitude detection signal, which is transmitted to the automatic data processing unit; the automatic data processing unit, through the clock signal generator, obtains a counting signal based on the clock pulses given by different output powers, which is transmitted to the adaptive power supply; the adaptive power supply determines the boost factor based on the counting signal, and obtains the power supply voltage provided to the drive circuit and the full-bridge power transistor.

7. The Class D audio power amplifier with adaptive improvement of light-load efficiency and reduction of quiescent current according to claim 6, characterized in that, The source of the first PMOS transistor is connected to the output terminal of the adaptive power supply, and is also connected to the second PMOS transistor, ..., the third PMOS transistor. n The source of the first PMOS transistor is connected; the drain of the first PMOS transistor is connected to the second PMOS transistor, ..., the first PMOS transistor respectively. n The drain of the PMOS transistor is connected, and then connected to the first NMOS transistor, the second NMOS transistor, ..., the third NMOS transistor respectively. n The drain connection of the NMOS transistor; the first NMOS transistor, the second NMOS transistor, ..., the first n The sources of the NMOS transistors are all grounded, and the gates of both the PMOS transistors and the NMOS transistors are connected to the output of the driving circuit.

8. The Class D audio power amplifier with adaptive improvement of light-load efficiency and reduction of quiescent current according to claim 6, characterized in that, The PMOS transistors are all the same size, and the NMOS transistors are all the same size.

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