A gallium nitride HEMT device and a method of fabricating the same

Abstract

The present disclosure relates to a gallium nitride HEMT device and a preparation method thereof, the method comprising: ion implanting a first silicon carbide substrate to form a defect layer at a preset depth, to obtain an ion-implanted first silicon carbide substrate; performing reverse-type doping on the surface of the ion-implanted first silicon carbide substrate to form a first insulating layer on the surface, to obtain a reverse-type doped first silicon carbide substrate; obtaining a second silicon carbide substrate; directly bonding the second silicon carbide substrate with the reverse-type doped first silicon carbide substrate to obtain a first composite substrate; peeling the first composite substrate along the defect layer to obtain a second composite substrate; performing insulating treatment on the surface of the second composite substrate to obtain a treated second composite substrate; and preparing the gallium nitride HEMT device based on the treated second composite substrate. The gallium nitride HEMT device preparation method disclosed by the present disclosure can not only reduce the preparation cost, but also expand the size of the gallium nitride HEMT device.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and in particular to a gallium nitride HEMT device and its fabrication method. Background Technology

[0002] Gallium nitride (GaN) power devices, due to GaN's wide bandgap characteristics, offer lower energy loss, smaller size, and higher power and frequency compared to silicon-based semiconductor power devices, which dominate the market at the same operating voltage and power conditions. Currently, the most mature and feasible GaN thin film fabrication technology in the industry is metal-organic chemical vapor deposition (MOCVD) epitaxy. The commonly used substrates in the industry are silicon carbide, sapphire, and single-crystal silicon.

[0003] Current technologies used in gallium nitride radio frequency devices <0001> High-quality gallium nitride (GaN) device layers are achieved by heteroepitaxial growth on semi-insulating silicon carbide with crystal orientation. Silicon carbide-based GaN offers advantages such as high heat dissipation and high device performance. However, currently, semi-insulating silicon carbide is not only too expensive for large-scale application, but its growth, cutting, grinding, and polishing are also difficult, resulting in a maximum size of only 6 inches for semi-insulating silicon carbide, making it difficult to expand to 8 or even 12 inches. This significantly hinders the reduction of GaN RF device costs. Summary of the Invention

[0004] This disclosure provides a gallium nitride HEMT device and its fabrication method. The technical solution of this disclosure is as follows:

[0005] According to a first aspect of the present disclosure, a method for fabricating a gallium nitride (GaN) HEMT device is provided, comprising:

[0006] Obtain a first silicon carbide substrate; the first silicon carbide substrate is an N-type conductive single-crystal silicon carbide substrate;

[0007] Ion implantation is performed on a first silicon carbide substrate to form a defect layer at a predetermined depth, resulting in an ion-implanted first silicon carbide substrate; the ion-implanted first silicon carbide substrate sequentially comprises a silicon carbide thin film, a defect layer, and a recyclable silicon carbide substrate.

[0008] The surface of the first silicon carbide substrate after ion implantation is inverted and doped to form a first insulating layer on the surface, thereby obtaining the first silicon carbide substrate after inversion doping.

[0009] Obtain a second silicon carbide substrate; the second silicon carbide substrate is any one of the following: a substitute silicon carbide substrate, a mixed-crystal silicon carbide substrate, and a polycrystalline silicon carbide substrate;

[0010] The second silicon carbide substrate is directly bonded to the first silicon carbide substrate after inversion doping to obtain the first composite substrate; the first composite substrate includes, in sequence, the second silicon carbide substrate, the first insulating layer, the silicon carbide thin film, the defect layer and the recyclable silicon carbide substrate.

[0011] The first composite substrate is peeled off along the defect layer to obtain the second composite substrate; the second composite substrate comprises a second silicon carbide substrate, a first insulating layer and a silicon carbide thin film in sequence;

[0012] The surface of the second composite substrate is subjected to an insulating treatment to obtain the treated second composite substrate.

[0013] A gallium nitride thin film is epitaxially grown on the surface of the treated second composite substrate;

[0014] A HEMT device layer is fabricated on the surface of a gallium nitride thin film to obtain a gallium nitride HEMT device.

[0015] In some possible embodiments, the surface of the first silicon carbide substrate after ion implantation is inversion-doped, including:

[0016] The surface of the first silicon carbide substrate after ion implantation is inversely doped using at least one implantation element, either boron or aluminum, with an implantation dose of 1E16 to 1E19 / cm2 and an implantation energy of 5keV to 30keV.

[0017] In some possible embodiments, after obtaining the second silicon carbide substrate and before directly bonding the second silicon carbide substrate to the inversion-doped first silicon carbide substrate, the method further includes:

[0018] Ion implantation is performed on the surface of the second silicon carbide substrate using at least one implantation element selected from boron and aluminum, with an implantation dose of 1E16 to 1E19 / cm2 and an implantation energy of 5keV to 30keV.

[0019] In some possible embodiments, after peeling off the first composite substrate along the defect layer to obtain the second composite substrate, before epitaxially growing a gallium nitride film on the surface of the second composite substrate, the method further includes:

[0020] The second composite substrate is annealed to activate the first insulating layer. The annealing temperature is 1500-1700℃ and the annealing time is 0.5-5h. The annealing time is inversely proportional to the annealing temperature.

[0021] In some possible embodiments, before annealing the second composite substrate to activate the first insulating layer, the process further includes:

[0022] The second composite substrate is protected with a carbon film; the thickness of the carbon film is 100-1000 nm, and the thickness of the carbon film is inversely proportional to the annealing temperature and annealing pressure.

[0023] In some possible embodiments, after annealing the second composite substrate to activate the first insulating layer, the process further includes:

[0024] The residual carbon film on the surface of the second composite substrate after annealing was removed by dry etching.

[0025] In some possible embodiments, after peeling off the first composite substrate along the defect layer to obtain the second composite substrate, before epitaxially growing a gallium nitride film on the surface of the second composite substrate, the method further includes:

[0026] The surface of the second composite substrate is polished to remove a silicon carbide film with a thickness of 100-300 nm, resulting in a polished second composite substrate.

[0027] In some possible embodiments, the surface of the second composite substrate is subjected to an insulating treatment to obtain a treated second composite substrate, comprising:

[0028] Hydrogen ion implantation is performed on the surface of the second composite substrate to form a second insulating layer on the surface of the silicon carbide thin film, resulting in a treated second composite substrate. The treated second composite substrate sequentially includes a second silicon carbide substrate, a first insulating layer, a silicon carbide thin film, and a second insulating layer.

[0029] In some possible embodiments, ion implantation is performed on the first silicon carbide substrate, including:

[0030] Ion implantation is performed on a first silicon carbide substrate using at least one implantation element, either hydrogen or helium, with an implantation dose of 1E16 / cm2 to 1E18 / cm2 and an implantation energy of 20keV to 500keV.

[0031] A second aspect of this disclosure provides a gallium nitride HEMT device, which is prepared by the gallium nitride HEMT device preparation method described above.

[0032] The technical solutions provided by the embodiments of this disclosure have at least the following beneficial effects:

[0033] The method for fabricating gallium nitride (GaN) HEMT devices disclosed in this embodiment reduces the cost of the silicon carbide substrate required for GaN HEMT device fabrication by transferring a high-quality single-crystal silicon carbide thin film to a low-cost silicon carbide substrate. Furthermore, the high-quality single-crystal silicon carbide substrate can be recycled and reused, thereby improving material utilization. On the other hand, since N-type conductive single-crystal silicon carbide has a large wafer size, modification can be achieved by inversion doping the N-type conductive single-crystal silicon carbide thin film, followed by insulating the surface on which GaN is grown. This allows for GaN growth to be expanded to 8 inches, which helps improve the yield of GaN HEMT devices.

[0034] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0035] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure, and are not intended to unduly limit this disclosure.

[0036] Figure 1 This is a flowchart illustrating a gallium nitride HEMT device fabrication method according to an exemplary embodiment;

[0037] Figures 2A-2I This is a schematic diagram illustrating the fabrication process of a gallium nitride HEMT device according to an exemplary embodiment. Detailed Implementation

[0038] To enable those skilled in the art to better understand the technical solutions of this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings.

[0039] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this disclosure are used to distinguish similar first objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this disclosure described herein can be implemented in orders other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples consistent with some aspects of this disclosure as detailed in the appended claims.

[0040] To address the issues of high substrate cost and small size in the fabrication of gallium nitride (GaN) HEMT devices in related technologies, this disclosure provides a method for fabricating GaN HEMT devices that enables low-cost fabrication of GaN HEMT devices and allows for the expansion of the size to 8 inches, thereby improving device yield.

[0041] Please see Figure 1 and Figures 2A to 2I , Figure 1 This is a schematic flowchart of a gallium nitride HEMT device fabrication method provided in an embodiment of this disclosure. Figures 2A to 2I This is a schematic diagram of a gallium nitride HEMT device fabrication method provided in this embodiment of the disclosure;

[0042] like Figure 1 As shown, a gallium nitride HEMT device fabrication method provided in this disclosure embodiment may include the following steps:

[0043] S101: Obtain the first silicon carbide substrate; the first silicon carbide substrate is an N-type conductive single-crystal silicon carbide substrate.

[0044] Specifically, such as Figure 2A As shown, a first SiC substrate 201 is first obtained. The first SiC substrate 201 is a high-quality single-crystal silicon carbide substrate with N-type conductivity. Compared with the semi-insulating silicon carbide substrate, the N-type conductive silicon carbide substrate has a larger wafer size, which helps to realize the growth of GaN to 8 inches.

[0045] S103: Ion implantation is performed on the first silicon carbide substrate to form a defect layer at a preset depth, thereby obtaining the first silicon carbide substrate after ion implantation.

[0046] The first silicon carbide substrate after ion implantation includes, in sequence, a silicon carbide thin film, a defect layer, and a recyclable silicon carbide substrate.

[0047] Optionally, when performing ion implantation on the first silicon carbide substrate, the types of ions that can be used include, but are not limited to, hydrogen ions and helium ions, with an implantation dose of 1E16 / cm2 to 1E18 / cm2 and an implantation energy of 20keV to 500keV.

[0048] Specifically, such as Figure 2B As shown, H ions are implanted into the first SiC substrate 201 to obtain the first SiC substrate 201a after H ion implantation; the first SiC substrate 201a after ion implantation includes, from top to bottom, a SiC thin film 2011, a defect layer 2012 and a recyclable SiC substrate 2013.

[0049] S105: The surface of the first silicon carbide substrate after ion implantation is inverted and doped to form a first insulating layer on the surface, thereby obtaining the first silicon carbide substrate after inversion doping.

[0050] Optionally, when performing inversion doping on the surface of the first silicon carbide substrate after ion implantation, at least one implantation element selected from boron and aluminum can be used, with an implantation dose of 1E16 to 1E19 / cm2 and an implantation energy of 5keV to 30keV.

[0051] Specifically, such as Figure 2C As shown, Al ions are used to invert-dop the surface of the first SiC substrate 201a to form a first insulating layer 2014 on the surface, resulting in the invert-doped first SiC substrate 201b. Here, the purpose of inversion doping is to insulate the surface of the conductive SiC thin film 2011, achieving an insulating state at the bonding surface. This can increase the impedance of the SiC thin film 2014 and prevent power leakage downwards from the upper HEMT device layer.

[0052] S107: Obtain a second silicon carbide substrate; the second silicon carbide substrate is any one of the following: a substitute silicon carbide substrate, a mixed-crystal silicon carbide substrate, and a polycrystalline silicon carbide substrate.

[0053] Specifically, such as Figure 2D As shown, a second SiC substrate 202 is obtained; the second SiC substrate 202 may be a low-quality SiC substrate, such as any one of dummy, mixed crystal, and polymorphic types.

[0054] Optionally, after step S107 and before step S109, the method of this embodiment may further include the following steps:

[0055] S108: Ion implantation is performed on the surface of a second silicon carbide substrate using at least one implantation element, either boron or aluminum, with an implantation dose of 1E16 to 1E19 / cm2 and an implantation energy of 5keV to 30keV.

[0056] In step S108, the purpose of ion implantation on the surface of the second silicon carbide substrate is also to achieve an insulating state on the bonding surface. Specifically, when ion implanting the surface of the second silicon carbide substrate, the same implantation element can be used as described above for inversion doping to achieve the best insulation effect.

[0057] S109: The second silicon carbide substrate is directly bonded to the first silicon carbide substrate after inversion doping to obtain the first composite substrate.

[0058] The first composite substrate comprises, in sequence, a second silicon carbide substrate, a first insulating layer, a silicon carbide thin film, a defect layer, and a recyclable silicon carbide substrate.

[0059] Specifically, such as Figure 2E As shown, the second SiC substrate 202 and the first SiC substrate 201b are directly bonded in a vacuum environment to obtain the first composite substrate 300. The first composite substrate 300 includes, from bottom to top, the second SiC substrate 202, the first insulating layer 2014, the SiC thin film 2011, the defect layer 2012 and the recyclable SiC substrate 2013.

[0060] S111: The first composite substrate is peeled off along the defect layer to obtain the second composite substrate.

[0061] The second composite substrate comprises, in sequence, a second silicon carbide substrate, a first insulating layer, and a silicon carbide thin film.

[0062] Specifically, such as Figure 2FAs shown, the first composite substrate 300 is peeled off along the defect layer 2012 to obtain the second composite substrate 400; the second composite substrate 400 includes, from bottom to top, a second SiC substrate 202, a first insulating layer 2014 and a SiC thin film 2011.

[0063] The recyclable SiC substrate 2013 after stripping can be recycled using the following steps for subsequent fabrication of other devices. Specifically, the recycling steps may include: thermal oxidation of the stripped recyclable silicon carbide substrate, wet oxidation in a pure oxygen environment at 1300°C for 2–5 hours; then removing the oxide layer using HF; and finally using fine polishing to remove a silicon carbide film with a thickness not exceeding 500 nm from the surface of the silicon carbide substrate.

[0064] Optionally, after step S111 and before step S113, the method of this embodiment may further include:

[0065] S112: Anneal the second composite substrate to activate the first insulating layer. The annealing temperature is 1500-1700℃ and the annealing time is 0.5-5h. The annealing time is inversely proportional to the annealing temperature.

[0066] Furthermore, before annealing, a carbon film can be applied to protect the second composite substrate; the thickness of the carbon film is 100–1000 nm, and the thickness of the carbon film is inversely proportional to the annealing temperature and annealing pressure. Correspondingly, after annealing the second composite substrate, the residual carbon film on the surface of the second composite substrate is removed by dry etching.

[0067] Optionally, before the next step S113, the surface of the second composite substrate can be polished to obtain a polished second composite substrate. Here, considering that the SiC thin film 2011 on the surface may be damaged during stripping, a certain thickness of SiC thin film 2011 on the surface is removed by polishing, and the thickness can be in the range of 100 to 300 nm.

[0068] S113: Perform an insulating treatment on the surface of the second composite substrate to obtain the treated second composite substrate.

[0069] Specifically, such as Figure 2G As shown, H ions are implanted onto the surface of the second composite substrate 400 to form a second insulating layer 203 on the surface of the SiC thin film 2011, resulting in a treated second composite substrate 400a. The treated second composite substrate 400a includes a second SiC substrate 202, a first insulating layer 2014, a SiC thin film 2011, and a second insulating layer 203 in sequence.

[0070] Here, H-ion implantation is used to insulate the surface of the second composite substrate instead of inversion doping, which avoids contamination of the GaN epitaxial process by inversion doping elements.

[0071] S115: A gallium nitride thin film epitaxially grown on the surface of the processed second composite substrate.

[0072] Specifically, such as Figure 2H As shown, a GaN thin film 204 is epitaxially grown on the surface of the treated second composite substrate 400a. The thickness of the GaN thin film 204 is 10–20 μm.

[0073] S117: A HEMT device layer is fabricated on the surface of a gallium nitride thin film to obtain a gallium nitride HEMT device.

[0074] Specifically, such as Figure 2I As shown, in fabricating HEMT device layer 205, GaN channel layer 2051 and Al are first sequentially deposited on the surface of GaN thin film 204. x Ga x An N-barrier layer 2052 and a dielectric layer 2053 are formed, and then a source electrode, a gate electrode, and a drain electrode are formed on the dielectric layer 2053. This completes the fabrication of the HEMT device layer 205, and finally the gallium nitride HEMT device is obtained.

[0075] This disclosure provides a method for fabricating a gallium nitride (GaN) HEMT device. On one hand, by transferring a high-quality single-crystal silicon carbide (SiC) thin film to a low-cost SiC substrate, the cost of the SiC substrate required for fabricating the GaN HEMT device can be reduced. Furthermore, the high-quality single-crystal SiC substrate can be recycled and reused, thereby improving material utilization. On the other hand, since N-type conductive single-crystal SiC has a large wafer size, by performing inversion doping on the N-type conductive single-crystal SiC thin film to achieve modification, and then insulating the surface on which GaN is grown, the growth diameter of GaN can be expanded to 8 inches. This helps to improve the fabrication yield of GaN HEMT devices.

[0076] Furthermore, this disclosure also provides a gallium nitride HEMT device, which is prepared by the gallium nitride HEMT device preparation method described above.

[0077] It should be noted that the gallium nitride HEMT device and the method for fabricating the gallium nitride HEMT device in this disclosure are based on the same concept as those in this application.

[0078] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.

[0079] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. A method for fabricating a gallium nitride HEMT device, characterized in that, include: Obtain the first silicon carbide substrate; The first silicon carbide substrate is an N-type conductive single-crystal silicon carbide substrate with a diameter of 8-12 inches; The first silicon carbide substrate is ion implanted to form a defect layer at a preset depth, resulting in an ion-implanted first silicon carbide substrate; the ion-implanted first silicon carbide substrate sequentially comprises a silicon carbide thin film, the defect layer, and a recyclable silicon carbide substrate. The surface of the first silicon carbide substrate after ion implantation is inverted and doped to form a first insulating layer on the surface, thereby obtaining an inverted doped first silicon carbide substrate; the inverted doped first silicon carbide substrate sequentially includes the first insulating layer, the defect layer and the recyclable silicon carbide substrate. Obtain a second silicon carbide substrate; the second silicon carbide substrate is a mixed-crystal silicon carbide substrate; The second silicon carbide substrate is directly bonded to the inversion-doped first silicon carbide substrate to obtain a first composite substrate; the first composite substrate sequentially includes the second silicon carbide substrate, the first insulating layer, the silicon carbide thin film, the defect layer and the recyclable silicon carbide substrate. The first composite substrate is peeled off along the defect layer to obtain a second composite substrate; the second composite substrate sequentially comprises a second silicon carbide substrate, the first insulating layer, and the silicon carbide thin film; The surface of the second composite substrate is subjected to an insulating treatment to obtain the treated second composite substrate. An 8-12 inch diameter gallium nitride thin film is epitaxially formed on the surface of the treated second composite substrate; A HEMT device layer is fabricated on the surface of the gallium nitride thin film to obtain a gallium nitride HEMT device; The inversion doping of the surface of the first silicon carbide substrate after ion implantation includes: The surface of the first silicon carbide substrate after ion implantation is inversely doped using at least one implantation element selected from boron and aluminum, with an implantation dose of 1E16~1E19 / cm². 2 The injected energy is 5keV~30keV; After peeling off the first composite substrate along the defect layer to obtain the second composite substrate, before epitaxially growing a gallium nitride film on the surface of the second composite substrate, the process further includes: The surface of the second composite substrate is polished to remove a silicon carbide film with a thickness of 100~300nm, resulting in a polished second composite substrate. The step of insulating the surface of the second composite substrate to obtain the treated second composite substrate includes: Hydrogen ion implantation is performed on the surface of the second composite substrate to form a second insulating layer on the surface of the silicon carbide thin film, thereby obtaining the treated second composite substrate; the treated second composite substrate sequentially includes a second silicon carbide substrate, a first insulating layer, the silicon carbide thin film, and a second insulating layer. After obtaining the second silicon carbide substrate, and before directly bonding the second silicon carbide substrate to the inversion-doped first silicon carbide substrate, the method further includes: The surface of the second silicon carbide substrate is ion-implanted using at least one implantation element selected from boron and aluminum, with an implantation dose of 1E16~1E19 / cm². 2 The injected energy is 5keV~30keV.

2. The method for fabricating a gallium nitride HEMT device according to claim 1, characterized in that, After peeling off the first composite substrate along the defect layer to obtain the second composite substrate, before epitaxially growing a gallium nitride film on the surface of the second composite substrate, the method further includes: The second composite substrate is annealed to activate the first insulating layer. The annealing temperature is 1500~1700℃ and the annealing time is 0.5~5h. The annealing time is inversely proportional to the annealing temperature.

3. The method for fabricating a gallium nitride HEMT device according to claim 2, characterized in that, Before annealing the second composite substrate to activate the first insulating layer, the method further includes: The second composite substrate is protected with a carbon film; the thickness of the carbon film is 100~1000nm, and the thickness of the carbon film is inversely proportional to the annealing temperature and annealing pressure.

4. The method for fabricating a gallium nitride HEMT device according to claim 3, characterized in that, After annealing the second composite substrate to activate the first insulating layer, the process further includes: The residual carbon film on the surface of the second composite substrate after annealing was removed by dry etching.

5. The method for fabricating a gallium nitride HEMT device according to claim 1, characterized in that, The ion implantation of the first silicon carbide substrate includes: The first silicon carbide substrate was ion implanted using at least one implantation element, hydrogen or helium, at a dose of 1E¹⁶ / cm². 2 ~1E18 / cm 2 The injected energy is 20keV~500keV.

6. A gallium nitride HEMT device, characterized in that, The gallium nitride HEMT device is prepared by any one of claims 1 to 5.

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