A monolithic integration method for silicon-based optoelectronic devices

Abstract

The present invention discloses a monolithic integration method for silicon-based optoelectronic devices, comprising the following steps: forming a photon isolation layer on a silicon substrate; depositing an amorphous silicon layer on the photon isolation layer; performing laser annealing on the amorphous silicon layer to crystallize the surface layer of the amorphous silicon layer into a polycrystalline silicon layer; fabricating optical passive devices on the amorphous silicon layer; and fabricating optical active devices on the polycrystalline silicon layer. The method of the present invention can synergistically utilize the advantages of low transmission loss of amorphous silicon and high mobility of polycrystalline silicon, thereby improving the quality of optoelectronic devices.

Description

Technical Field

[0001] The invention belongs to the technical field of optoelectronic integration, and in particular relates to a monolithic integration method of silicon-based optoelectronic devices. Background Art

[0002] Silicon-based optoelectronic monolithic integration technology helps promote further deep integration, coordinated development and architectural innovation of optoelectronics and microelectronics, and realize ultra-high-speed, intelligent, and low-power silicon-based optoelectronic integrated chips. It is a key enabling technology for building optical communications, 5G mobile communications, data centers, supercomputing, and artificial intelligence. Post-deposition photonics is a strategy for silicon photonic monolithic integration. Its main feature is to deposit thin film materials on microelectronic chips through a thin film deposition process to make optoelectronic devices. The thin film materials include polycrystalline silicon, silicon nitride, etc. In this strategy, microelectronic devices are made on a single crystal substrate, and optoelectronic devices are made on a deposited thin film, which avoids the contradiction between the inconsistent substrate requirements of the two devices. It is a silicon photonic monolithic integration architecture that has received attention in recent years.

[0003] In the post-deposition photonics integration strategy, polysilicon is a very important material, and active and passive optoelectronic devices are often based on this material. In order to meet the requirements of back-end compatibility with CMOS processes, this technology usually deposits a layer of amorphous silicon first when preparing polysilicon, and then converts it into polysilicon through laser annealing. The optoelectronic properties of polysilicon are the bottleneck of this optoelectronic integration technology: for optical passive devices, the optical loss of this layer needs to be as small as possible; for optical active devices, the mobility of this layer needs to be as high as possible. The difficulty of the current process is that the amorphous silicon deposited first has good optical properties due to its small grain size and the grain boundaries are passivated by hydrogen atoms. The corresponding passive device transmission loss can be less than 0.7dB / cm, but the electrical performance is very poor, and the mobility is often less than 1cm 2 / (V·s); After amorphous silicon is annealed to polycrystalline silicon, the electrical properties are greatly improved due to the improvement of crystal quality and grain growth, and the mobility can be greater than 100cm 2 / (V·s), but the corresponding optical performance is reduced, the larger grains bring strong optical scattering, and the corresponding optical passive device transmission loss is often greater than 10dB / cm. How to prepare an active layer with excellent optoelectronic properties is a major problem in this technical solution. Summary of the invention

[0004] In view of the shortcomings of the prior art, the purpose of the present invention is to provide a method for monolithic integration of silicon-based optoelectronic devices to overcome the problem of the optical / electrical performance of depositing polysilicon thin films in post-deposition photonics technology.

[0005] To achieve the above purpose, the present invention adopts the following technical solution.

[0006] A monolithic integration method for silicon-based optoelectronic devices provided by the present invention includes the following steps:

[0007] Form a photon isolation layer on a silicon substrate;

[0008] Deposit an amorphous silicon layer on the photon isolation layer;

[0009] Perform laser annealing on the amorphous silicon layer to crystallize the surface layer of the amorphous silicon layer into a polycrystalline silicon layer;

[0010] Fabricate optical passive devices on the amorphous silicon layer;

[0011] Fabricate optical active devices on the polycrystalline silicon layer.

[0012] Preferably, the preparation method of the photon isolation layer is one of CVD, PVD, and ALD.

[0013] Preferably, the deposition of the amorphous silicon layer uses chemical vapor deposition.

[0014] Preferably, the chemical vapor deposition method uses silane as the silicon source, and the deposition temperature is 100 - 600 °C.

[0015] Preferably, the laser annealing uses nanosecond pulses or continuous laser, the laser wavelength is less than 400 nm, and the energy density is 300 - 500 mJ / cm 2 , and the optical pulse frequency is 400 - 500 Hz.

[0016] Preferably, the thickness of the amorphous silicon layer is 100 - 3000 nm, and the thickness of the polycrystalline silicon layer is 10 - 200 nm.

[0017] Preferably, it further includes performing low-temperature annealing dehydrogenation treatment on the amorphous silicon layer before the laser annealing.

[0018] Preferably, the low-temperature annealing is treatment at 500 - 600 °C for 8 - 12 hours in a nitrogen atmosphere.

[0019] The present invention also provides an optoelectronic device prepared by the above monolithic integration method for silicon-based optoelectronic devices.

[0020] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0021] In the present invention, the surface layer of the amorphous silicon is crystallized into polycrystalline silicon through laser annealing, and the lower layer remains amorphous silicon without crystallization. In the subsequent preparation of optoelectronic devices, the lower amorphous silicon layer serves as an optical waveguide, and the upper polycrystalline silicon serves as an electrical active layer, synergistically leveraging the advantages of low transmission loss of amorphous silicon and high mobility of polycrystalline silicon, thereby improving the quality of optoelectronic devices. Description of the Drawings

[0022] Figure 1 Schematic flow diagram of the monolithic integration method of the silicon-based optoelectronic device of the present invention;

[0023] Figure 2 Schematic structural diagram of the silicon-based optoelectronic device of Example 1. Specific embodiments

[0024] The present invention will be further described in detail below with reference to specific embodiments, so that those skilled in the art can understand the present invention more clearly. The examples are only used to explain the present invention and are not intended to limit the scope of the present invention. In the embodiments of the present invention, unless otherwise specified, all raw material components are commercially available products well known to those skilled in the art; if not specifically specified, the technical means used are conventional means well known to those skilled in the art.

[0025] As Figure 1 shown, a monolithic integration method of a silicon-based optoelectronic device provided by an embodiment of the present invention includes the following steps:

[0026] Form a photon isolation layer on a silicon substrate;

[0027] Deposit an amorphous silicon layer on the photon isolation layer;

[0028] Perform laser annealing on the amorphous silicon layer to crystallize the surface layer of the amorphous silicon layer into a polycrystalline silicon layer;

[0029] Fabricate optical passive devices on the amorphous silicon layer;

[0030] Fabricate optical active devices on the polycrystalline silicon layer.

[0031] In some preferred embodiments, the photon isolation layer is silicon dioxide deposited by one of CVD, PVD, and ALD methods.

[0032] In some preferred embodiments, the amorphous silicon layer is deposited by chemical vapor deposition, preferably PECVD or HWCVD.

[0033] In some preferred embodiments, the chemical vapor deposition method uses silane as the silicon source and hydrogen as the reaction gas, and the deposition temperature is 100 - 600 °C.

[0034] In some preferred embodiments, the laser annealing uses nanosecond pulses or continuous lasers, the laser wavelength is less than 400 nm, and the energy density is 300 - 500 mJ / cm 2 , and the optical pulse frequency is 400 - 500 Hz.

[0035] In some preferred embodiments, the thickness of the amorphous silicon layer is 100 - 3000 nm, and the thickness of the polycrystalline silicon layer is 10 - 200 nm.

[0036] In some preferred embodiments, the amorphous silicon layer is subjected to low-temperature annealing for hydrogen removal before laser annealing. Performing hydrogen removal treatment can avoid hydrogen explosion damage to the morphology during the laser annealing process.

[0037] In some preferred embodiments, the low-temperature annealing is carried out at 500 - 600 °C for 8 - 12 hours in a nitrogen atmosphere. The advantage of using the low-temperature process is that it can be used for post-integration and will not damage the materials and devices in the previous process.

[0038] In some preferred embodiments, the optical passive device is one or several of a waveguide, a coupler, and a wavelength division multiplexer / demultiplexer.

[0039] In some preferred embodiments, the optical active device is one or several of a detector and a modulator.

[0040] Example 1

[0041] This embodiment provides a monolithic integration method for an optoelectronic device integrating a passive waveguide and an active micro-ring detector, as Figure 1 shown. The specific preparation steps are as follows:

[0042] First, deposit 1 μm thick silicon dioxide on the single-crystalline silicon substrate 1 by PECVD as the photon isolation layer 2; then deposit a 250 nm thick amorphous silicon layer 3 on the photon isolation layer 2 by PECVD. The process parameters of PECVD are 200 °C, and silane and hydrogen are used as reaction gases; then the amorphous silicon layer 3 is subjected to low-temperature annealing for hydrogen removal treatment, and the annealing conditions are 550 °C for 12 hours in a nitrogen atmosphere; then the amorphous silicon layer 3 is subjected to laser annealing to crystallize 30 nm of the surface of the amorphous silicon layer 3 into a polycrystalline silicon layer 4; the laser annealing uses a XeCl 308 nm excimer laser, the energy density is 300 mJ / cm 2 , the optical pulse frequency is 500 Hz, the overlap rate is 95%, and the scanning rate is 8 mm / s; next, determine the active area and the passive area according to the designed pattern, coat photoresist on the polycrystalline silicon layer 4 in the passive area, expose, develop, etch, and strip the photoresist to form a passive ridge waveguide in the amorphous silicon layer 3; coat photoresist on the polycrystalline silicon layer 4 in the active area, expose, develop, ion implant, strip the photoresist, and perform post-annealing to activate the doped ions to define p and n type regions in the polycrystalline silicon layer 4, and finally form an active micro-ring detector; finally, deposit a wiring layer to lead out and connect the electrodes 5 of the active micro-ring detector.

[0043] The structure of the optoelectronic device obtained in this embodiment is as Figure 2 shown. In the optoelectronic device of this embodiment, the passive ridge waveguide benefits from the low loss of the amorphous silicon film layer and has low transmission loss; the active micro-ring detector is based on the low-temperature polycrystalline silicon film layer crystallized by laser annealing, has high mobility, and excellent performance.

[0044] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A monolithic integration method for silicon-based optoelectronic devices, characterized in that, it includes the following steps: forming a photon isolation layer on a silicon substrate; depositing an amorphous silicon layer on the photon isolation layer; performing laser annealing on the amorphous silicon layer to crystallize the surface layer of the amorphous silicon layer into a polycrystalline silicon layer; fabricating optical passive devices on the amorphous silicon layer; fabricating optical active devices on the polycrystalline silicon layer.

2. The monolithic integration method for silicon-based optoelectronic devices according to claim 1, characterized in that, the preparation method of the photon isolation layer is one of CVD, PVD, and ALD.

3. The monolithic integration method for silicon-based optoelectronic devices according to claim 1, characterized in that, the amorphous silicon layer is deposited by chemical vapor deposition.

4. The monolithic integration method for silicon-based optoelectronic devices according to claim 3, characterized in that, the chemical vapor deposition uses silane as the silicon source, and the deposition temperature is 100 - 600 °C.

5. The monolithic integration method for silicon-based optoelectronic devices according to claim 1, characterized in that, The laser annealing uses a nanosecond pulse or continuous laser, with a laser wavelength less than 400 nm and an energy density of 300-500 mJ / cm 2 , and the optical pulse frequency is 400-500 Hz.

6. The monolithic integration method for silicon-based optoelectronic devices according to claim 1, characterized in that, the thickness of the amorphous silicon layer is 100 - 3000 nm, and the thickness of the polycrystalline silicon layer is 10 - 200 nm.

7. The monolithic integration method for silicon-based optoelectronic devices according to claim 1, characterized in that, it further includes performing low-temperature annealing dehydrogenation treatment on the amorphous silicon layer before the laser annealing.

8. The monolithic integration method for silicon-based optoelectronic devices according to claim 7, characterized in that, the low-temperature annealing is treatment at 500 - 600 °C for 8 - 12 hours in a nitrogen atmosphere.

9. An optoelectronic device prepared by the monolithic integration method for silicon-based optoelectronic devices according to any one of claims 1 - 8.

Images