A bandgap reference voltage source using second-order temperature compensation and its working method

Abstract

A bandgap reference voltage source employing second-order temperature compensation and an operating method thereof include a bias circuit including a positive voltage bias current generating circuit, a core reference circuit including a feedback-controlled operational amplifier circuit, and a positive voltage generating circuit and a negative voltage generating circuit. The difference between the base-emitter voltages of two transistors in the positive voltage generating circuit is a first voltage difference, which performs first-order compensation for the negative temperature coefficient voltage generated by the transistors in the negative voltage generating circuit. The difference between the base-emitter voltages of the two transistors in the positive voltage bias current generating circuit generates a bias current with a positive temperature coefficient across a resistor. When the bias current flows through the resistor in the positive voltage generating circuit, a second voltage difference is generated, which performs second-order temperature compensation for the negative temperature coefficient voltage after the first-order compensation, wherein both the first voltage difference and the second voltage difference are positive temperature coefficient voltages. The present invention obtains a reference voltage with a lower temperature drift coefficient through secondary temperature compensation.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuit bandgap reference voltage sources, and in particular relates to a bandgap reference voltage source adopting second-order temperature compensation and a working method thereof. Background Art

[0002] A bandgap voltage reference is one of the most fundamental and important building blocks in digital-to-analog circuits. Its primary function is to provide a stable bias voltage for the circuit. Therefore, the performance of the bandgap reference has a crucial impact on the circuit's performance and accuracy.

[0003] With the widespread use of electronic products in our lives, the demand for bandgap voltage references, a core module in chips, is increasing. Furthermore, the ambient temperature of chips can fluctuate significantly due to changes in ambient temperature and heat generated by electronic systems. To ensure stable operation within a certain temperature range, bandgap voltage reference circuits with low drift coefficients have become an indispensable component in the current chip industry.

[0004] In the prior art, most bandgap reference voltage source devices use the first-order temperature compensation principle. The first-order temperature compensated bandgap reference voltage source includes a clamping operational amplifier circuit and a positive and negative voltage generating circuit. The positive and negative voltage generating circuit includes a resistor and two transistors. Under the same current density, the base-emitter voltage difference ΔV of the two transistors is BE is a positive temperature coefficient voltage, the base-emitter voltage of a single transistor V BE For a voltage with a negative temperature coefficient, by adjusting the positive temperature coefficient voltage ΔV BE The coefficient value is adjusted to offset the negative temperature coefficient voltage, ultimately obtaining a low-temperature drift reference voltage, which serves as the reference voltage for the entire circuit. Among existing products, most first-order compensated bandgap reference voltage sources have a reference voltage temperature drift coefficient of 5-10ppm / °C, which can output a relatively stable reference voltage within a certain temperature range. However, in applications with large temperature changes, such as thermoelectric energy harvesting and industrial fields, a bandgap reference voltage source with a lower temperature drift coefficient is required. Due to the complex structure of the first-order temperature compensation circuit in the prior art, additional circuits are required to further achieve temperature compensation. At the same time, the output terminal of the first-order compensated bandgap reference voltage source is a common source output, and the circuit output impedance is extremely high. The bandgap reference voltage source has a very weak load capacity. Once loaded, the reference voltage value will change significantly and cannot remain stable. Therefore, the first-order compensated bandgap reference voltage source does not have load capacity. Summary of the Invention

[0005] In order to solve the deficiencies in the prior art, the present invention provides a bandgap reference voltage source using second-order temperature compensation and a working method thereof. On the basis of the existing first-order compensation, the base-emitter voltage difference ΔV of the transistor is used to compensate the voltage of the bandgap reference voltage source. BE Generate a bias current with a positive temperature coefficient, perform secondary temperature compensation on the bandgap reference voltage source, further reduce the temperature drift coefficient of the reference voltage source, and obtain a reference voltage with a lower temperature drift coefficient. The reference voltage value can be stably output within the temperature range of -20℃ to 130℃.

[0006] The present invention adopts the following technical solutions.

[0007] The present invention proposes a bandgap reference voltage source using second-order temperature compensation, comprising: a startup circuit, a bias circuit, and a core reference circuit;

[0008] The bias circuit includes a positive voltage bias current generating circuit, the core reference circuit includes a feedback control operational amplifier circuit, and the feedback control operational amplifier circuit includes a positive voltage generating circuit and a negative voltage generating circuit;

[0009] The positive voltage generating circuit includes two transistors and a resistor, and the negative voltage generating circuit includes a transistor; the difference between the base-emitter voltages of the two transistors in the positive voltage generating circuit is a first voltage difference, and the first voltage difference performs first-order compensation on the negative temperature coefficient voltage generated by the transistor in the negative voltage generating circuit; the positive voltage bias current generating circuit includes two transistors and a resistor, and the difference between the base-emitter voltages of the two transistors in the positive voltage bias current generating circuit generates a bias current with a positive temperature coefficient on the resistor; when the bias current flows through the resistor in the positive voltage generating circuit, a second voltage difference is generated, and the second voltage difference performs second-order temperature compensation on the negative temperature coefficient voltage after the first-order compensation, wherein the first voltage difference and the second voltage difference are both positive temperature coefficient voltages.

[0010] The transistor at the output end of the reference voltage source adopts a common collector connection.

[0011] The startup circuit includes: first to fifth MOS transistors M1, M2, M3, M4, and M5, and a first capacitor C1; the source of M1 is connected to the power supply VDD, the drain of M1 is connected to the source of M2, the drain of M2 is connected to the source of M3, the gates of M1, M2, and M3 are all grounded, one end of C1 is connected to the drain of M3, the other end of C1 is grounded, the source of M4 is connected to the power supply VDD, the gate of M4 is grounded, the drain of M4 is connected to the source of M5, the gate of M5 is connected to the drain of M3, and the drain of M5 is connected to the bias circuit.

[0012] The startup circuit only works during the startup process of the bandgap reference voltage source and is completely shut down after the bandgap reference voltage source is started.

[0013] The bias circuit includes: sixth to sixteenth MOS transistors M6, M7, M8, M9, M10, M11, M12, M13, M14, M15, and M16; first to fourth transistors Q1, Q2, Q3, and Q4; and first to third resistors R1, R2, and R3; wherein M11, M12, M13, M14, M15, M16, and R3 form a mirror circuit. The source of M6 is connected to the power supply VDD, the drain of M6 is connected to the source of M7, the gate of M6 is connected to the gate of M9, the gate of M7 is connected to the gate of M10, the drain of M7 is connected to the source of M8, the drain of M8 is connected to the drain of M5 in the startup circuit, the drain of M8 is connected to the collector of Q1, the base of Q1 is connected to the collector of Q1, the emitter of Q1 is connected to the collector of Q2, the emitter of Q2 is grounded, the base of Q2 is connected to the collector of Q4, the source of M9 is connected to the power supply VDD, the drain of M9 is connected to the source of M10, the gate of M9 is connected to the drain of M10, the drain of M10 is connected to one end of R1, the gate of M10 is connected to the other end of R1, the other end of R1 is connected to the collector of Q3, the base of Q3 is connected to the base of Q1, and the emitter of Q3 is connected to the collector of Q4. The base of Q4 is connected to the collector of Q2, the emitter of Q4 is connected to one end of R2, the other end of R2 is grounded, the source of M11 is connected to the power supply VDD, the gate of M11 is connected to the gate of M9, the drain of M11 is connected to the drain of M12, the gate of M12 is connected to the drain of M12, the source of M12 is connected to the drain of M13, the gate of M13 is connected to the gate of M12, the source of M13 is grounded, the source of M14 is connected to the power supply VDD, the gate and drain of M14 are short-circuited and connected to the core reference circuit, one end of R3 is connected to the drain of M14, the other end of R3 is connected to the drain of M15, the gate of M15 is connected to the gate of M13, the source of M15 is connected to the drain of M16, the gate of M16 is connected to the gate of M13 and connected to the core reference circuit, and the source of M16 is grounded.

[0014] The bias circuit is used to generate a bias current Ibias with a positive temperature coefficient on the resistor R2 by utilizing the difference between the base-emitter voltages of the transistors Q2 and Q4 in the bias circuit.

[0015] The core reference circuit includes: 17th to 23rd MOS tubes M17, M18, M19, M20, M21, M22, M23, 5th to 13th transistors Q5, Q6, Q7, Q8, Q9, Q10, 4th to 8th resistors R4, R5, R6, R7, R8, and the second capacitor C2; the source of M17 is connected to the power supply VDD, the gate and drain of M17 are short-circuited, the drain of M17 is connected to the collector of Q5, the base of Q5 is connected to one end of R7, and Q The emitter of 5 is connected to the drain of M18, the gate of M18 is connected to the gate of M16 in the startup circuit, the source of M18 is grounded, the source of M19 is connected to the power supply VDD, the gate of M19 is connected to the gate of M17, the drain of M19 is connected to the collector of Q6, the base of Q6 is connected to one end of R8, the emitter of Q6 is connected to one end of R4, the other end of R4 is connected to the drain of M18, the source of M20 is connected to the power supply VDD, the gate of M20 is connected to the gate of M114, and the drain of M20 is connected to the collector of Q6. The emitter of Q7 is connected to the base and collector of Q8, the base and collector of Q8 are short-circuited, the emitter of Q8 is connected to the drain of M21, the gate of M21 is connected to the collector of Q6, the source of M21 is grounded, one end of C2 is connected to the gate of M21, the other end of C2 is connected to the drain of M21, the source of M22 is connected to the power supply VDD, and the gate of M22 is connected to the gate of M20. The drain is connected to the collector of Q9, the base of Q9 is connected to the drain of M20, the emitter of Q9 is connected to the drain of M23, the gate of M23 is connected to the gate of M16 in the startup circuit, the source of M23 is grounded, R6, R7 and R8 are connected in series, one end of R6 is connected to the emitter of Q9, which is also the output end of the reference voltage source, outputting the reference voltage VREF, one end of R8 is connected to the base and collector of Q10, the base and collector of Q10 are short-circuited, and the emitter of Q10 is grounded.

[0016] In the core reference circuit, the bias current Ibias and the compensation resistor R4 perform second-order compensation on the bandgap reference voltage source.

[0017] In the core reference circuit, M17, M19, M18, R4, Q5 and Q6 constitute the first-stage feedback control amplifier, Q5 and Q6 constitute the differential input pair tube, M20, M21, R5, C2, Q7 and Q8 constitute the second-stage feedback control amplifier, and M22, M23, R6, R7, R8, Q9 and Q10 constitute the third-stage feedback control amplifier.

[0018] Q9 adopts common collector connection.

[0019] M13 and M18 form a current mirror structure, and M17 and M19 also form a current mirror structure.

[0020] The present invention also proposes a working method of a bandgap reference voltage source using second-order temperature compensation, comprising:

[0021] Step 1: After the startup circuit is turned on, the power supply charges the bias circuit and the core reference circuit;

[0022] Step 2: In the positive voltage generating circuit, the difference between the base-emitter voltages of the two transistors Q5 and Q6 is a first voltage difference, and the output voltage of the reference voltage source is formed by dividing the first voltage difference across R6, R7, and R8 and the collector voltage of Q10; wherein the first voltage difference is a positive temperature coefficient voltage, and the collector voltage of Q10 is a negative temperature coefficient voltage;

[0023] In step 3, in the bias circuit, the difference between the base-emitter voltages of the two transistors Q2 and Q4 generates a bias current with a positive temperature coefficient on the resistor R2; when the bias current flows through the resistor R4 in the positive voltage generating circuit, a second voltage difference is generated, and the second voltage difference is a positive temperature coefficient voltage; after the second voltage difference performs second-order temperature compensation on the negative temperature coefficient voltage after the first-order compensation, the reference voltage output by the bandgap reference voltage source is obtained.

[0024] When the bias current is established, the core reference circuit starts to work and outputs the reference voltage. At this time, C1 is charged to the power supply voltage VDD, M5 is turned off, and the startup circuit stops working.

[0025] Based on the current mirror structure in the bias circuit and the core reference circuit, the current flowing through the emitter of Q6 under the action of the first voltage difference is the bias current. times, where M is the ratio of the width to length ratios of M17 and M19 in the current mirror structure, and N3 is the ratio of the width to length ratios of M18 and M13 in the current mirror structure.

[0026] The beneficial effect of the present invention is that the present invention does not change the circuit structure of the first-order temperature compensated bandgap reference voltage source, nor does it require the addition of other circuits. By combining the clamping operational amplifier and the positive and negative voltage generating circuits in the core reference circuit with the second-order temperature compensation circuit, a bandgap reference voltage source with a simpler structure is realized.

[0027] The present invention proposes a bandgap structure for temperature compensation of the transistor source at the input end of an operational amplifier, thereby realizing second-order compensation of the bandgap reference voltage source and achieving stable output of the reference voltage over a wide temperature range of -20°C to 130°C, with a temperature drift coefficient of only 1.572ppm / °C.

[0028] The curve of the reference voltage output by the bandgap reference voltage source proposed by the present invention changing with temperature is similar to a sine function curve.

[0029] The output end of the reference voltage source proposed by the present invention adopts a common collector connection method, the circuit output impedance is extremely low, the load capacity is strong, and the stability of the output voltage is not affected.

[0030] The bandgap reference voltage source adopts a low-power design. The startup circuit only works during the startup process of the bandgap reference voltage source. After the bandgap reference voltage source is started, the startup circuit is completely shut down to achieve zero power consumption, thereby reducing the power consumption of the entire circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 Schematic diagram of the structure of a low-temperature drift bandgap reference voltage source using second-order temperature compensation proposed by the present invention;

[0032] Figure 2 This is a startup circuit diagram of a low-temperature drift bandgap reference voltage source using second-order temperature compensation proposed by the present invention;

[0033] Figure 3 This is a bias circuit diagram of a low-temperature drift bandgap reference voltage source using second-order temperature compensation proposed by the present invention;

[0034] Figure 4 This is the core reference circuit diagram of the low-temperature drift bandgap reference voltage source using second-order temperature compensation proposed by the present invention;

[0035] Figure 5 This is a timing diagram of output voltage establishment when power supply VDD is powered on in an embodiment of the present invention;

[0036] Figure 6 1 is a graph of the output voltage of a second-order temperature-compensated bandgap reference voltage source when the temperature changes in an embodiment of the present invention. DETAILED DESCRIPTION

[0037] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. The embodiments described in this application are only part of the embodiments of the present invention, not all of them. Based on the spirit of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0038] The present invention provides a bandgap reference voltage source using second-order temperature compensation, such as Figure 1 As shown, the reference voltage source includes: a startup circuit, a bias circuit, a core reference circuit, and a mirror circuit. The bias circuit includes a positive voltage bias current generating circuit, the core reference circuit includes a feedback control op amp circuit, and the feedback control op amp circuit includes a positive voltage generating circuit and a negative voltage generating circuit.

[0039] The positive voltage generating circuit includes two transistors and a resistor, and the negative voltage generating circuit includes a transistor; the difference between the base-emitter voltages of the two transistors in the positive voltage generating circuit is a first voltage difference, and the first voltage difference performs first-order compensation on the negative temperature coefficient voltage generated by the transistor in the negative voltage generating circuit; the positive voltage bias current generating circuit includes two transistors and a resistor, and the difference between the base-emitter voltages of the two transistors in the positive voltage bias current generating circuit generates a bias current with a positive temperature coefficient on the resistor; when the bias current flows through the resistor in the positive voltage generating circuit, a second voltage difference is generated, and the second voltage difference performs second-order temperature compensation on the negative temperature coefficient voltage after the first-order compensation, wherein the first voltage difference and the second voltage difference are both positive temperature coefficient voltages.

[0040] The transistor at the output end of the reference voltage source adopts a common collector connection.

[0041] The present invention integrates a clamped operational amplifier with a positive and negative voltage generation circuit to create a feedback-controlled operational amplifier circuit. Furthermore, a positive temperature coefficient, positive voltage bias current generation circuit is designed into the bias circuit, resulting in a novel bandgap reference voltage source. The proposed bandgap reference voltage source eliminates the need for external circuitry and combines a clamped operational amplifier, a positive and negative voltage generation circuit, and a second-order temperature compensation circuit. This results in a simpler structure and the ability to produce a reference voltage with a lower temperature drift coefficient. Furthermore, the bandgap reference voltage source utilizes a common collector connection at its output, resulting in a stronger load capacity.

[0042] Specifically, if Figure 2 As shown, the startup circuit includes: first to fifth MOS transistors M1, M2, M3, M4, M5, and a first capacitor C1. The source of M1 is connected to the power supply VDD (as shown in FIG. Figure 3 As shown in FIG5 , the drain of M1 is connected to the source of M2, the drain of M2 is connected to the source of M3, and the gates of M1, M2, and M3 are all grounded. One end of C1 is connected to the drain of M3, and the other end of C1 is grounded. The source of M4 is connected to the power supply VDD, the gate of M4 is grounded, the drain of M4 is connected to the source of M5, the gate of M5 is connected to the drain of M3, and the drain of M5 is connected to the bias circuit.

[0043] The startup circuit only works during the startup process of the bandgap reference voltage source. After the bandgap reference voltage source is started, the startup circuit is completely shut down to achieve zero power consumption, thereby reducing the power consumption of the entire circuit.

[0044] like Figure 3As shown, the bias circuit includes: sixth to sixteenth MOS transistors M6, M7, M8, M9, M10, M11, M12, M13, M14, M15, and M16; first to fourth transistors Q1, Q2, Q3, and Q4; and first to third resistors R1, R2, and R3. The source of M6 is connected to the power supply VDD, the drain of M6 is connected to the source of M7, and the gate of M6 is connected to the gate of M9. The gate of M7 is connected to the gate of M10, the drain of M7 is connected to the source of M8, the drain of M8 is connected to the drain of M5 in the startup circuit, the drain of M8 is connected to the collector of Q1, the base of Q1 is connected to the collector of Q1, the emitter of Q1 is connected to the collector of Q2, the emitter of Q2 is grounded, and the base of Q2 is connected to the collector of Q4. The source of M9 is connected to the power supply VDD, the drain of M9 is connected to the source of M10, and the gate of M9 is connected to the drain of M10. The drain of M10 is connected to one end of R1, the gate of M10 is connected to the other end of R1, and the other end of R1 is connected to the collector of Q3. The base of Q3 is connected to the base of Q1, the emitter of Q3 is connected to the collector of Q4, the base of Q4 is connected to the collector of Q2, the emitter of Q4 is connected to one end of R2, and the other end of R2 is grounded. When current flows through Q2 and Q4, the voltage difference between the base-emitter voltage of Q2 and the base-emitter voltage of Q4 generates a bias current Ibias in R2. The source of M11 is connected to the power supply VDD, the gate of M11 is connected to the gate of M9, the drain of M11 is connected to the drain of M12, the gate of M12 is connected to the drain of M12, the source of M12 is connected to the drain of M13, the gate of M13 is connected to the gate of M12, and the source of M13 is grounded. The source of M14 is connected to the power supply VDD, the gate and drain of M14 are short-circuited and connected to the core reference circuit, one end of R3 is connected to the drain of M14, the other end of R3 is connected to the drain of M15, the gate of M15 is connected to the gate of M13, the source of M15 is connected to the drain of M16, the gate of M16 is connected to the gate of M13 and connected to the core reference circuit, and the source of M16 is grounded; M11, M12, M13, M14, M15, M16 and R3 form a mirror circuit.

[0045] The bias circuit is used to generate a bias current Ibias with a positive temperature coefficient on the resistor R2 by utilizing the difference between the base-emitter voltages of the transistors Q2 and Q4 in the bias circuit.

[0046] Among them, the emitter junction area ratio of transistors Q4 and Q2 is N1.

[0047] Specifically, if Figure 4As shown, the core reference circuit includes: MOS transistors 17 through 23, M17, M18, M19, M20, M21, M22, and M23; transistors 5 through 13, Q5, Q6, Q7, Q8, Q9, and Q10; resistors 4 through 8, R4, R5, R6, R7, and R8; and a second capacitor, C2. The source of M17 is connected to the power supply VDD; the gate and drain of M17 are short-circuited; the drain of M17 is connected to the collector of Q5; the base of Q5 is connected to one end of R7; the emitter of Q5 is connected to the drain of M18; the gate of M18 is connected to the gate of M16 in the startup circuit; and the source of M18 is grounded. The source of M19 is connected to the power supply VDD; the gate of M19 is connected to the gate of M17; and the drain of M19 is connected to the collector of Q6. The base of Q6 is connected to one end of R8; the emitter of Q6 is connected to one end of R4; and the other end of R4 is connected to the drain of M18. The source of M20 is connected to power supply VDD, the gate of M20 is connected to the gate of M114, the drain of M20 is connected to one end of R5, the other end of R5 is connected to the collector and base of Q7, the base and collector of Q7 are shorted, the emitter of Q7 is connected to the base and collector of Q8, the base and collector of Q8 are shorted, the emitter of Q8 is connected to the drain of M21, the gate of M21 is connected to the collector of Q6, and the source of M21 is grounded. One end of C2 is connected to the gate of M21, and the other end of C2 is connected to the drain of M21. The source of M22 is connected to power supply VDD, the gate of M22 is connected to the gate of M20, and the drain is connected to the collector of Q9. The base of Q9 is connected to the drain of M20, and the emitter of Q9 is connected to the drain of M23. The gate of M23 is connected to the gate of M16 in the startup circuit, and the source of M23 is grounded. R6, R7 and R8 are connected in series, one end of R6 is connected to the emitter of Q9, which is also the output end of the reference voltage source, outputting the reference voltage VREF, one end of R8 is connected to the base and collector of Q10, the base and collector of Q10 are short-circuited, and the emitter of Q10 is grounded.

[0048] In the core reference circuit, the bias current Ibias and the compensation resistor R4 perform second-order temperature compensation on the bandgap reference voltage source, making the output voltage of the bandgap reference voltage source more stable over a wider temperature range than a first-order bandgap reference voltage source.

[0049] The core reference circuit integrates positive and negative voltage generation circuits into a conventional two-stage clamped op amp circuit, resulting in a feedback-controlled op amp circuit. Conventional bandgap reference voltage sources with first-order temperature compensation typically consist of a two-stage clamped op amp circuit and positive and negative voltage generation circuits, which are separate and independent, rather than integrated. Therefore, the core reference circuit proposed in this invention achieves second-order temperature compensation while maintaining a simpler circuit structure and eliminating the need for additional circuitry.

[0050] In an embodiment of the present invention, a positive voltage generation circuit and a negative voltage generation circuit are integrated into a conventional two-stage clamped operational amplifier circuit to obtain a feedback-controlled operational amplifier circuit, including: M17, M19, M18, Q5, and Q6 forming a first-stage feedback-controlled amplifier, with Q5 and Q6 forming a differential input pair. M20, M21, R5, C2, Q7, and Q8 forming a second-stage feedback-controlled amplifier, and M22, M23, R6, R7, R8, Q9, and Q10 forming a third-stage feedback-controlled amplifier.

[0051] Q9 at the output end of the bandgap reference voltage source adopts a common collector connection method, and the output impedance is extremely small, so that the bandgap reference voltage source has a strong load capacity.

[0052] Furthermore, the emitter junction area ratio of Q6 to Q5 is N2.

[0053] Furthermore, M13 and M18 form a current mirror structure, and the width-to-length ratio of M18 to M13 is N3. M17 and M19 also form a current mirror structure, and the width-to-length ratio of M17 to M19 is M.

[0054] The present invention also proposes an operating method of a bandgap reference voltage source using second-order temperature compensation, comprising:

[0055] Step 1: After the startup circuit is turned on, the power supply charges the bias circuit and the core reference circuit.

[0056] Specifically, if Figure 2 As shown in Figure 1, when the startup circuit is first powered on, the gates of M1, M2, M3, and M4 are all grounded, M1, M2, M3, and M4 are all turned on, and C1 begins to charge. The gate of M5 is connected to one end of C1. Initially, the gate of M5 is at a low level, M5 is turned on, and the power supply VDD begins to charge the parasitic capacitance from the collector of Q1 to ground.

[0057] Step 2: In the positive voltage generating circuit, the difference between the base-emitter voltages of the two transistors Q5 and Q6 is a first voltage difference, and the output voltage of the reference voltage source is formed by dividing the first voltage difference across R6, R7, and R8 and the collector voltage of Q10; wherein the first voltage difference is a positive temperature coefficient voltage, and the collector voltage of Q10 is a negative temperature coefficient voltage;

[0058] Specifically, if Figure 4 As shown, the base-emitter voltage difference ΔV of Q5 BE5 The base-emitter voltage difference ΔV of Q6 BE6 The first voltage difference ΔV between BE5-6 as follows:

[0059] ΔV BE5-6 =AV BE5 -ΔV BE6 =VT ln(N2M)+I6*R4

[0060] Where,

[0061] V T is the thermal voltage,

[0062] N2 is the emitter junction area ratio of Q6 to Q5,

[0063] M is the ratio of the width to length of MOS tubes M17 and M19,

[0064] I6 is the current flowing through the emitter of transistor Q6,

[0065] R4 is the resistance value of the resistor R4.

[0066] Specifically, if Figure 4 As shown, the reference voltage VREF is determined by the voltage across R6, R7, and R8 and the collector voltage V BE10 The current flowing through R6, R7, R8 and transistor Q10 is the first voltage difference ΔV BE5-6 The action is formed on R7, so the reference voltage is as follows:

[0067]

[0068] Where,

[0069] R6, R7, and R8 are the resistance values ​​of resistors R6, R7, and R8 respectively.

[0070] The first voltage difference performs first-order compensation on the negative temperature coefficient voltage generated by the transistor Q10 in the negative voltage generating circuit.

[0071] In step 3, in the bias circuit, the difference between the base-emitter voltages of the two transistors Q2 and Q4 generates a bias current with a positive temperature coefficient on the resistor R2; when the bias current flows through the resistor R4 in the positive voltage generating circuit, a second voltage difference is generated, and the second voltage difference performs second-order temperature compensation on the negative temperature coefficient voltage after the first-order compensation, wherein the second voltage difference is a positive temperature coefficient voltage.

[0072] Specifically, if Figure 3 As shown, the collector potential of Q1 increases. When the potential of Q1 is greater than the threshold voltage of 0.7V, the branch where Q1 is located is turned on, and at the same time, the branch where Q3 is located is turned on. When current flows through Q2 and Q4, the base-emitter voltage difference ΔV of Q2 BE The base-emitter voltage difference ΔV of Q4 BE4 The second voltage difference ΔV BE2-4 A bias current Ibias is generated on the resistor R2 due to the second voltage difference ΔV BE2-4It is a positive temperature coefficient, so the bias current generated is proportional to the temperature. The bias current is as follows:

[0073]

[0074] Where,

[0075] N1 is the ratio of the emitter junction area of ​​transistors Q4 and Q2,

[0076] V T is the thermal voltage,

[0077] q is the electron charge,

[0078] k is the Boltzmann constant,

[0079] T is the thermodynamic temperature,

[0080] R2 is the resistance value of resistor R2.

[0081] Based on the current mirror structure in the bias circuit and the core reference circuit, the current flowing through the emitter of Q6 under the action of the first voltage difference is the bias current. times, where M is the ratio of the width to length ratios of the current mirror structure MOS tubes M17 and M19, and N3 is the ratio of the width to length ratios of the current mirror structure MOS tubes M18 and M13.

[0082] Specifically, if Figure 3 and 4 As shown, M13 and M18 form a current mirror structure, and M17 and M19 also form a current mirror structure, so the current I6 flowing through the emitter of Q6 is the current flowing through M13. times.

[0083] The reference voltage is converted to:

[0084]

[0085] In the expression of VREF, V T Positively correlated with temperature, V BE10 It is negatively correlated with temperature. Therefore, the temperature derivative of the reference voltage is as follows:

[0086]

[0087] Where,

[0088] N2 is the ratio of the emitter junction area of ​​transistors Q6 and Q5,

[0089] N3 is the ratio of the width to length ratio of the current mirror structure MOS tubes M18 and M13,

[0090] R eq is the resistance ratio, satisfying: The resistance ratio changes little with temperature and can be ignored.

[0091] is a positive temperature coefficient term, is a negative temperature coefficient term, is a quadratic term with respect to temperature.

[0092] Specifically, when the positive and negative temperature coefficient terms are equal, the temperature derivative of the reference voltage VREF is zero. At this point, the reference voltage is independent of temperature variations, and the circuit output is a stable voltage that remains constant over a wide temperature range. Furthermore, the combined effects of resistor R4 and bias current Ibias introduce a quadratic term related to the variable temperature, T, into the output voltage, further compensating for the negative temperature coefficient term. This quadratic term, however, is not present in first-order temperature-compensated bandgap references.

[0093] Therefore, by reasonably setting the proportional coefficients M, N1, N2, N3, and the values ​​of the resistors R4, R6, R7, and R8, the bandgap reference voltage source proposed in the present invention can achieve complete temperature compensation.

[0094] Furthermore, when the bias current is established, the core reference circuit starts to work and outputs the reference voltage. At this time, C1 is charged to the power supply voltage VDD, M5 is turned off, and the startup circuit stops working.

[0095] like Figure 5 As shown in the figure, the output voltage is established when the power supply VDD is powered on. In the figure, VDD represents the power supply voltage, VC1 represents the voltage across C1, VQ1_C represents the collector voltage of the transistor Q1, and VREF represents the output reference voltage. Figure 5 It can be seen that the bandgap reference voltage source proposed in the present invention can output a reference voltage with low temperature drift.

[0096] Figure 6 The output voltage of the bandgap reference voltage source proposed in the present invention varies with temperature. Within the temperature range of -20°C to 130°C, the bandgap reference output voltage VREF is stable at approximately 1.26V. By introducing resistor R4 and a bias current Ibias with a positive temperature coefficient, a quadratic term with respect to the variable temperature T is introduced into the output voltage, further compensating for the negative term. Compared to a first-order temperature-compensated bandgap reference voltage source, the curve of the output voltage of the bandgap reference voltage source proposed in the present invention as it varies with temperature resembles a sine function curve and has a lower temperature drift coefficient, which is as follows:

[0097]

[0098] Where,

[0099] max[VREF(T)] and min[vREF(T)] represent the maximum and minimum values ​​of the curve of output voltage changing with temperature, respectively.

[0100] Tmax and Tmin are the maximum and minimum temperatures respectively.

[0101] average[VREF(T)] is the average value of the output voltage changing with temperature.

[0102] like Figure 6 The simulation results show that the temperature drift coefficient is 1.572ppm / ℃ in the temperature range of -20℃ to 130℃.

[0103] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered by the scope of protection of the claims of the present invention.

Claims

1. A bandgap reference voltage source with second-order temperature compensation, comprising: The startup circuit, bias circuit, and core reference circuit are characterized by: The bias circuit includes a positive voltage bias current generating circuit and a mirror circuit, the core reference circuit includes a feedback control operational amplifier circuit, and the feedback control operational amplifier circuit includes a positive voltage generating circuit and a negative voltage generating circuit; The positive voltage generating circuit includes two transistors and a resistor, and the negative voltage generating circuit includes a transistor; the difference between the base-emitter voltages of the two transistors in the positive voltage generating circuit is a first voltage difference, and the first voltage difference performs first-order compensation on the negative temperature coefficient voltage generated by the transistor in the negative voltage generating circuit; the positive voltage bias current generating circuit includes two transistors and a resistor, and the difference between the base-emitter voltages of the two transistors generates a bias current with a positive temperature coefficient on the resistor; when the bias current flows through the resistor in the positive voltage generating circuit, a second voltage difference is generated, and the second voltage difference performs second-order temperature compensation on the negative temperature coefficient voltage after the first-order compensation, wherein the first voltage difference and the second voltage difference are both positive temperature coefficient voltages; The core reference circuit includes: 17th to 23rd MOS tubes M17, M18, M19, M20, M21, M22, M23, 5th to 13th transistors Q5, Q6, Q7, Q8, Q9, Q10, 4th to 8th resistors R4, R5, R6, R7, R8, and the second capacitor C2; the source of M17 is connected to the power supply VDD, the gate and drain of M17 are short-circuited, the drain of M17 is connected to the collector of Q5, and the base of Q5 is connected One end of R7, the emitter of Q5 is connected to the drain of M18, the gate of M18 is connected to the mirror circuit, the source of M18 is grounded, the source of M19 is connected to the power supply VDD, the gate of M19 is connected to the gate of M17, the drain of M19 is connected to the collector of Q6, the base of Q6 is connected to one end of R8, the emitter of Q6 is connected to one end of R4, the other end of R4 is connected to the drain of M18, the source of M20 is connected to the power supply VDD, and the gate of M20 is connected to M114. The gate of M21 is connected to the collector of Q6, the drain of M21 is connected to the collector of Q7, the emitter of Q7 is connected to the collector of Q8, the emitter of Q8 is connected to the drain of M21, the gate of M21 is connected to the collector of Q6, the source of M21 is grounded, one end of C2 is connected to the gate of M21, the other end of C2 is connected to the drain of M21, the source of M22 is connected to the power supply VDD, the gate of M22 is connected to the gate of M20, and the drain of M22 is connected to the power supply VDD. The base of R6 is connected to the collector of Q9, the base of Q9 is connected to the drain of M20, the emitter of Q9 is connected to the drain of M23, the gate of M23 is connected to the mirror circuit, the source of M23 is grounded, one end of R6 is connected to the emitter of Q9, which is also the output end of the reference voltage source, outputting the reference voltage VREF, the other end of R6 is connected to one end of R7, the other end of R7 is connected to one end of R8, the other end of R8 is connected to the base and collector of Q10, and the emitter of Q10 is grounded.

2. The bandgap reference voltage source with second-order temperature compensation according to claim 1, wherein: The startup circuit includes: first to fifth MOS transistors M1, M2, M3, M4, and M5, and a first capacitor C1; the source of M1 is connected to the power supply VDD, the drain of M1 is connected to the source of M2, the drain of M2 is connected to the source of M3, the gates of M1, M2, and M3 are all grounded, one end of C1 is connected to the drain of M3, the other end of C1 is grounded, the source of M4 is connected to the power supply VDD, the gate of M4 is grounded, the drain of M4 is connected to the source of M5, the gate of M5 is connected to the drain of M3, and the drain of M5 is connected to the bias circuit.

3. The bandgap reference voltage source with second-order temperature compensation according to claim 2, wherein: The startup circuit only works during the startup process of the bandgap reference voltage source and is completely shut down after the bandgap reference voltage source is started.

4. The bandgap reference voltage source with second-order temperature compensation according to claim 2, wherein: The bias circuit includes: the sixth to sixteenth MOS transistors M6, M7, M8, M9, M10, M11, M12, M13, M14, M15, and M16, the first to fourth transistors Q1, Q2, Q3, and Q4, and the first to third resistors R1, R2, and R3; the source of M6 is connected to the power supply VDD, the drain of M6 is connected to the source of M7, the gate of M6 is connected to the gate of M9, the gate of M7 is connected to the gate of M10, and the drain of M7 is connected to the source of M8 , the drain of M8 is connected to the drain of M5 in the startup circuit, the drain of M8 is connected to the collector of Q1, the base of Q1 is connected to the collector of Q1, the emitter of Q1 is connected to the collector of Q2, the emitter of Q2 is grounded, the base of Q2 is connected to the collector of Q4, the source of M9 is connected to the power supply VDD, the drain of M9 is connected to the source of M10, the gate of M9 is connected to the drain of M10, the drain of M10 is connected to one end of R1, the gate of M10 is connected to the other end of R1, and the The other end is connected to the collector of Q3, the base of Q3 is connected to the base of Q1, the emitter of Q3 is connected to the collector of Q4, the base of Q4 is connected to the collector of Q2, the emitter of Q4 is connected to one end of R2, the other end of R2 is grounded, the source of M11 is connected to the power supply VDD, the gate of M11 is connected to the gate of M9, the drain of M11 is connected to the drain of M12, the gate of M12 is connected to the drain of M12, the source of M12 is connected to the drain of M13, and the gate of M13 is connected to the drain of M13. The gate of M15 is connected to the gate of M16, the source of M16 is connected to the gate of M13 and is connected to the gate of M18 and M23 in the core reference circuit. The source of M16 is grounded.

5. The bandgap reference voltage source with second-order temperature compensation according to claim 4, wherein: M11, M12, M13, M14, M15, M16 and R3 form a mirror circuit.

6. The bandgap reference voltage source with second-order temperature compensation according to claim 4, wherein: The bias circuit is used to generate a bias current with a positive temperature coefficient on the resistor R2 by using the difference between the base-emitter voltage of the transistors Q2 and Q4 in the bias circuit. .

7. The bandgap reference voltage source with second-order temperature compensation according to claim 1, wherein: In the core reference circuit, M17, M19, M18, R4, Q5 and Q6 constitute the first-stage feedback control amplifier, Q5 and Q6 constitute the differential input pair tube, M20, M21, R5, C2, Q7 and Q8 constitute the second-stage feedback control amplifier, and M22, M23, R6, R7, R8, Q9 and Q10 constitute the third-stage feedback control amplifier.

8. The bandgap reference voltage source with second-order temperature compensation according to claim 1, wherein: Q9 adopts common collector connection.

9. The bandgap reference voltage source with second-order temperature compensation according to claim 4, wherein: M13 and M18 form a current mirror structure, and M17 and M19 also form a current mirror structure.

10. A method for operating a bandgap reference voltage source using second-order temperature compensation, applicable to the bandgap reference voltage source according to any one of claims 1 to 9, characterized in that: The working method comprises: Step 1: After the startup circuit is turned on, the power supply charges the bias circuit and the core reference circuit; Step 2: In the positive voltage generating circuit, the difference between the base-emitter voltages of the two transistors Q5 and Q6 is a first voltage difference, and the output voltage of the reference voltage source is formed by dividing the first voltage difference across R6, R7, and R8 and the collector voltage of Q10; wherein the first voltage difference is a positive temperature coefficient voltage, and the collector voltage of Q10 is a negative temperature coefficient voltage; In step 3, in the bias circuit, the difference between the base-emitter voltages of the two transistors Q2 and Q4 generates a bias current with a positive temperature coefficient on the resistor R2; when the bias current flows through the resistor R4 in the positive voltage generating circuit, a second voltage difference is generated, and the second voltage difference is a positive temperature coefficient voltage; after the second voltage difference performs second-order temperature compensation on the negative temperature coefficient voltage after the first-order compensation, the reference voltage output by the bandgap reference voltage source is obtained.

11. The operating method of the bandgap reference voltage source using second-order temperature compensation according to claim 10, characterized in that: When the bias current is established, the core reference circuit starts to work and outputs the reference voltage. At this time, C1 is charged to the power supply voltage VDD, M5 is turned off, and the startup circuit stops working.

12. The operating method of the bandgap reference voltage source using second-order temperature compensation according to claim 10, characterized in that: Based on the current mirror structure in the bias circuit and the core reference circuit, the current flowing through the emitter of Q6 under the action of the first voltage difference is the bias current. times, of which N is the ratio of the width to length ratio of M17 to M19 in the current mirror structure, and N3 is the ratio of the width to length ratio of M18 to M13 in the current mirror structure.

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