Array substrate and liquid crystal panel

Abstract

The application discloses an array substrate and a liquid crystal panel, and belongs to the technical field of display. The array substrate comprises a substrate and a plurality of patterned film layer structures which are stacked on the substrate. The part of the patterned film layer structure located in the first splicing display area is formed based on the first mask and the second mask of the mask plate, and two sets of mask scales at different positions in the mask plate are used in two exposures respectively. Therefore, in the patterned film layer structure formed based on the same mask plate in the array substrate, the width of the first splicing display area between two adjacent normal display areas can be obtained from the scale structure in the two adjacent normal display areas. In this way, the width of the first splicing display area in each patterned film layer structure in the array substrate in the embodiment of the application can be reliably and stably controlled, thereby improving the display effect of the subsequently formed display panel.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to an array substrate and a liquid crystal panel. Background Technology

[0002] To meet people's demand for viewing large-screen images, large-size display panels need to be installed in display devices.

[0003] Currently, in the fabrication of large-size display panels, the patterned film structure in the display panel often requires the use of a splicing exposure process. For example, when creating a patterned film structure in a large-size display panel, firstly, a continuous film structure needs to be formed on the substrate and coated with photoresist; then, different sections of the photoresist are exposed separately using the same mask; next, the exposed photoresist is developed, and the continuous film structure formed on the substrate is etched; finally, the photoresist on the substrate is peeled off, thus forming the patterned film structure on the substrate.

[0004] However, currently, when exposing the photoresist film on the substrate, the width of the splicing area between the two partitions is usually large, resulting in poor display effect for large-size display panels. Summary of the Invention

[0005] This application provides an array substrate and a liquid crystal panel. It can solve the problem of poor display effect in existing display panels. The technical solution is as follows:

[0006] On one hand, an array substrate is provided, the array substrate having a display area and a non-display area located around the display area; the array substrate includes:

[0007] A substrate, and a plurality of patterned film structures stacked on the substrate;

[0008] The patterned film structure located within the display area includes: multiple normal display areas arranged in an array, and a first splicing display area located between two adjacent normal display areas;

[0009] In the patterned film structure of the same layer, the patterned film structure includes: multiple sets of ruler patterns, each set of ruler patterns having two ruler structures, the two ruler structures being located in two adjacent normal display areas respectively, and the distance between the two ruler structures being equal to the width of the first splicing display area in the length direction perpendicular to the first splicing display area between the two adjacent normal display areas.

[0010] Optionally, the distance between the two scale structures is greater than 0 in the length direction of the first splicing display area parallel to the two adjacent normal display areas.

[0011] Optionally, at least a portion of the patterned film structure is used to form a plurality of sub-pixels, wherein at least a portion of the orthographic projection of the two scale structures onto the substrate is located within the orthographic projection of the two sub-pixels onto the substrate, and the two sub-pixels are arranged in the row or column direction of the plurality of sub-pixels.

[0012] Optionally, the film structure closest to the substrate among the multiple patterned film structures is a first conductive layer, and the scale structure in the first conductive layer includes: a first strip structure, wherein the length directions of two first strip structures within a set of scale patterns are parallel.

[0013] Optionally, the scale structure in the first conductive layer further includes at least one protrusion structure connected to the first strip structure;

[0014] The number of protrusions on the first strip structure is within a preset range.

[0015] Optionally, the scale structure has multiple protruding structures, and the multiple protruding structures and the first strip structure are used to form a comb-like structure.

[0016] Optionally, the scale structure in each of the multiple patterned film structures, excluding the first conductive layer, includes a second strip structure, the length direction of which is parallel to the length direction of the first strip structure.

[0017] Optionally, a plurality of second strip structures in different patterned film structures correspond one-to-one with a plurality of first strip structures in the first conductive layer. At least a portion of the orthographic projections of the first strip structure and the corresponding second strip structure on the substrate are located within the orthographic projection of the same sub-pixel on the substrate, and the orthographic projections of the first strip structure on the substrate and the corresponding second strip structure on the substrate do not overlap.

[0018] Optionally, the orthographic projections of the second stripe structure in different patterned film structures on the substrate do not coincide.

[0019] Optionally, the multiple patterned film structures, excluding the first conductive layer, are respectively: an active layer pattern, a second conductive layer, a first planarization layer, a pixel electrode layer, and a support pattern, wherein the active layer pattern, the second conductive layer, the first planarization layer, the pixel electrode layer, the second planarization layer, and the support pattern are stacked sequentially along a direction perpendicular to and away from the substrate;

[0020] The array substrate further includes: a gate insulating layer disposed entirely between the active layer pattern and the first conductive layer, and a second planarization layer disposed entirely between the pixel electrode layer and the support pattern;

[0021] The second strip structure in the active layer pattern, the second conductive layer, the pixel electrode layer, and the support pattern is a strip-shaped protrusion; the second strip structure in the first planarization layer is a strip-shaped groove.

[0022] Optionally, in the support pattern, the length of the second strip structure is greater than the length of the first strip structure, and in the length direction perpendicular to the first splicing display area between two adjacent normal display areas, the distance between two second strip structures in a set of ruler patterns is less than the width of one sub-pixel.

[0023] Optionally, in the support pattern, a portion of the second strip structure and the orthographic projection of the corresponding first strip structure on the substrate are located within the orthographic projection of the same sub-pixel on the substrate; another portion of the second strip structure and the orthographic projection of the corresponding first strip structure on the substrate are located within the orthographic projection of different sub-pixels on the substrate, and the orthographic projections of the other portions of two second strip structures in a set of scale patterns on the substrate are located within the orthographic projection of the same sub-pixel on the substrate.

[0024] Optionally, the first conductive layer further includes: a gate of a thin-film transistor in the sub-pixel, and a gate line electrically connected to the gate;

[0025] The active layer pattern further includes: the active layer of the thin-film transistor in the sub-pixel;

[0026] The second conductive layer further includes: a first electrode and a second electrode of the thin-film crystal in the sub-pixel, and a data line electrically connected to the first electrode;

[0027] The planarization layer also has connection vias;

[0028] The pixel electrode layer further includes: a pixel electrode in the sub-pixel, wherein the pixel electrode is electrically connected to the second electrode through the connection via;

[0029] The support pattern also has multiple support columns arranged in an array.

[0030] Optionally, the pixel electrode whose orthographic projection on the substrate overlaps with the second strip structure in the pixel electrode layer has a hollow structure, and the orthographic projection of the second strip structure in the pixel electrode layer on the substrate is located within the orthographic projection of the hollow structure on the substrate.

[0031] Optionally, the first conductive layer further includes: an auxiliary signal line, wherein the orthographic projection of the auxiliary signal line on the substrate overlaps with the orthographic projection of the pixel electrode in the sub-pixel on the substrate, and does not coincide with the orthographic projection of the first strip structure on the substrate.

[0032] Optionally, a set of the ruler patterns also has two mark structures that correspond one-to-one with the two ruler structures, and the ruler structure is closer to the first splicing display area than the corresponding mark structure.

[0033] On the other hand, a liquid crystal panel is provided, comprising: an array substrate and a cover plate disposed opposite to each other, and a liquid crystal layer located between the array substrate and the cover plate, wherein the array substrate is any of the array substrates described above.

[0034] The beneficial effects of the technical solutions provided in this application include at least the following:

[0035] An array substrate includes a substrate and a plurality of patterned film structures stacked on the substrate. The portion of the patterned film structure located within a first splicing display area is formed based on a first mask and a second mask of a photomask. Furthermore, the first mask can also form the portion of the patterned film structure located within a normal display area, and the second mask can also form the portion of the patterned film structure located within a non-display area. Therefore, during the formation of the patterned film structure in this array, it is unnecessary to use an additional photomask to expose the photoresist within the first splicing display area separately, effectively reducing the number of exposures and simplifying the subsequent manufacturing process of large-size display panels based on this array substrate. Moreover, during the formation of the film structure within the normal display area, two sets of mask scales at different positions on the photomask are used in the two exposures. After the two exposures and development of the photoresist film, only the scale structures within two adjacent normal display areas on either side of the first splicing display area are retained. Therefore, in the patterned film layer structure formed based on the same mask in the array substrate, the width of the first splicing display area between two adjacent normal display areas can be obtained by the scale structure within the two adjacent normal display areas. Furthermore, the light-shielding baffle can be adjusted according to the length of the two scale structures to keep the width of the first splicing display area within a suitable range. Thus, the width of the first splicing display area in each patterned film layer structure within the array substrate in this embodiment can be stably and reliably controlled, thereby improving the display effect of the subsequently formed display panel. Moreover, in actual production, the width of the first splicing display area in each patterned film layer structure can be monitored and adjusted at any time, resulting in a high yield rate for the display panel. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a top view of an array substrate provided in an embodiment of this application;

[0038] Figure 2 yes Figure 1 The diagram shows the film structure of the array substrate at point A-A'.

[0039] Figure 3 yes Figure 1 The image shows a partial enlarged view of the array substrate at point B;

[0040] Figure 4 yes Figure 1 The diagram shows a partial enlarged view of the array substrate at point C;

[0041] Figure 5 This is a schematic diagram of the structure of a mask provided in an embodiment of this application;

[0042] Figure 6 yes Figure 5 A schematic diagram of the mask scale at point U is shown;

[0043] Figure 7 yes Figure 5 A schematic diagram of the mask scale at point D is shown;

[0044] Figure 8 This is a schematic diagram illustrating two exposures of a target first splicing display area, provided in an embodiment of this application.

[0045] Figure 9 This is a top view of another array substrate provided in the embodiments of this application;

[0046] Figure 10 yes Figure 9 The diagram shows the film structure of the array substrate at point D-D'.

[0047] Figure 11 This is a schematic diagram of the scale pattern in the first conductive layer provided in an embodiment of this application;

[0048] Figure 12 This is a schematic diagram of another scale pattern in the first conductive layer provided in an embodiment of this application;

[0049] Figure 13 This is a schematic diagram of a scale structure when the number of protrusions P is 1, as provided in an embodiment of this application.

[0050] Figure 14 This is a schematic diagram of a scale structure when the number of protrusions P is 8, as provided in an embodiment of this application.

[0051] Figure 15 This is a schematic diagram of a scale pattern in a first conductive layer and a scale pattern in a film structure other than the first conductive layer, provided in an embodiment of this application.

[0052] Figure 16 This is a top view of a sub-pixel in an array substrate provided in an embodiment of this application;

[0053] Figure 17 This is a top view of another sub-pixel in the array substrate provided in the embodiments of this application;

[0054] Figure 18 yes Figure 5 A schematic diagram of the mask scale at the support pattern U is shown;

[0055] Figure 19 yes Figure 5 A schematic diagram of the mask scale at point D of the support pattern is shown;

[0056] Figure 20 This is a schematic diagram of a second strip structure of a support pattern provided in an embodiment of this application;

[0057] Figure 21 This is a schematic diagram of a second strip structure of another support pattern provided in an embodiment of this application. Detailed Implementation

[0058] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0059] Please refer to Figure 1 , Figure 1 This is a top view of an array substrate provided in an embodiment of this application. The array substrate 000 has a display area 001 and a non-display area 002 located around the display area 001. For a clearer view of the film structure of the array substrate 000, please refer to... Figure 2 , Figure 2 yes Figure 1 The diagram shows a schematic of the film structure of the array substrate at point A-A'. The array substrate 000 may include a substrate 100 and a plurality of patterned film structures 100a stacked on the substrate 100. Here, at least a portion of the patterned film structures 100a are used to form a plurality of sub-pixels.

[0060] To see the structure of these multiple sub-pixels more clearly, please refer to... Figure 3 , Figure 3 yes Figure 1 The diagram shows a partial enlarged view of the array substrate at point B. The plurality of sub-pixels may include: a plurality of first sub-pixels 100a1 located within the display area 001, and a plurality of virtual sub-pixels 100a2 located within the non-display area 002. The area of ​​the pixel electrode in the virtual sub-pixel 100a2 projected onto the substrate 100 is larger than the area of ​​the pixel electrode in the first sub-pixel 100a1 projected onto the substrate 100.

[0061] It should be noted that, in the embodiments of this application, the area of ​​the orthographic projection of the pixel electrode of a sub-pixel onto the substrate refers to the area enclosed by the outer contour of the orthographic projection of this pixel electrode onto the substrate. It should also be noted that the embodiments of this application are illustrated by the example where the orthographic projections of the pixel electrodes of each virtual sub-pixel arranged in the non-display area are all larger than the area of ​​the orthographic projection of the pixel electrode of the first sub-pixel. In other possible implementations, the orthographic projections of the pixel electrodes of some virtual sub-pixels arranged in the non-display area may be larger than the area of ​​the orthographic projection of the pixel electrode of the first sub-pixel, while the orthographic projections of the pixel electrodes of another set of virtual sub-pixels may be equal to the area of ​​the orthographic projection of the pixel electrode of the first sub-pixel. The embodiments of this application do not limit this.

[0062] like Figure 3 and Figure 4 , Figure 4 yes Figure 1 The diagram shows a partial enlarged view of the array substrate at point C. Each patterned film structure 100a, within the display area 001, comprises: a plurality of normally arranged display areas 001a, and a first splicing display area 001b located between two adjacent normally arranged display areas 001a. Here, the plurality of normally arranged display areas 001a within the display area 001 can be arranged in at least one row and / or at least one column. Figure 1 The illustration is based on an example of multiple normal display areas 001a arranged in three rows and two columns within display area 001. Multiple first sub-pixels 100a1 are all located within normal display areas 001a. The multiple sub-pixels composed of multiple patterned film structures 100a may also include multiple second sub-pixels 100a3 located within the first splicing display area 001b. Here, the orthographic projection of the pixel electrode in the virtual sub-pixel 100a2 onto the substrate 100 is also larger than the area of ​​the orthographic projection of the pixel electrode in the second sub-pixel 100a3 onto the substrate 100.

[0063] In the embodiments of this application, such as Figure 4 As shown, the plurality of sub-pixels composed of multiple patterned film layer structures 100a may further include a plurality of third sub-pixels 100a5. Here, a portion of the third sub-pixels 100a5 may be located within the normal display area 001a, and another may be located within the first splicing display area 001b. In this case, the boundary line between the first splicing display area 001b and the normal display area 001a in the array substrate 000 is located within the area where the third sub-pixels 100a5 are located.

[0064] In the same patterned film layer structure 100a, the patterned film layer structure 100a may include: multiple sets of scale patterns 100a4, each set of scale patterns 100a4 having two scale structures (E1, E2), the two scale structures (E1, E2) being located within two adjacent normal display areas 001a respectively, and the distance between the two scale structures (E1, E2) in the length direction X perpendicular to the length direction X of the first splicing display area 001b between the two adjacent normal display areas 001a is equal to the width of the first splicing display area 001b. Here, the two scale structures (E1, E2) are located within the third sub-pixel 100a5 within the two adjacent normal display areas 001a respectively.

[0065] In this embodiment, in each patterned film structure 100a in the array substrate 000, the portion located within the normal display area 001a is formed based on a first mask of a mask plate, the portion located within the non-display area 002 is formed based on a second mask of a mask plate, and the portion located within the first splicing display area 001b is formed based on both the first and second masks. Here, the first mask and the second mask are masks located in different areas of the same mask plate.

[0066] Please refer to the following in this application: Figure 5 , Figure 5 This is a schematic diagram of a photomask provided in an embodiment of this application. The photomask 111 may include a first mask 111a and a second mask 111b distributed around the first mask 111a. During the formation of the patterned film structure 100a in the array substrate 000, after a full layer of photoresist film is formed on the substrate, the first mask 111a in the photomask 111 is used to expose portions of the normal display area 001a and the first spliced ​​display area 001b in the photoresist film, and the second mask 111b in the photomask 111 is used to expose portions of the first spliced ​​display area 001b and the non-display area 002 in the photoresist film.

[0067] The mask plate 111 may further include multiple sets of mask rulers 111c, wherein two sets of mask rulers 111c located on opposite sides of the mask plate 111 are positioned differently. For example, these two sets of mask rulers 111c may be distributed on both sides of the center line L. For a clearer view of the mask rulers on the mask plate 111, please refer to... Figure 6 and Figure 7 , Figure 6 yes Figure 5 The diagram shown illustrates the mask scale at point U. Figure 7 yes Figure 5The diagram shows a schematic of the mask rulers at point D. Each set of mask rulers 111c may include two rulers, between which the patterns of the first mask 111a or the second mask 111b can be arranged, and the two rulers completely overlap on the same extension line. For example, the set of mask rulers 111c at point U may be distributed to the right of the center line L, and the set of mask rulers 111c at point D may be distributed to the left of the center line L.

[0068] Thus, during the formation of the patterned film structure 100a in the array substrate 000, after forming a full-layer photoresist film on the substrate, the two sets of mask rulers 111c located on both sides of the center line L can form a set of ruler patterns 100a4 on both sides of the first splicing display area 001b in the array substrate 000. Furthermore, the rulers in the set of mask rulers 111c at location D can form a ruler structure E1 on one side of the first splicing display area 001b in the array substrate 000; the rulers in the set of mask rulers 111c at location U can form a ruler structure E2 on the other side of the first splicing display area 001b in the array substrate 000. Therefore, in the length direction X of the first splicing display area 001b parallel to the two adjacent normal display areas 001a, the distance between the two ruler structures (E1, E2) is greater than 0. Here, the center line L is a virtual line, used only to indicate the positional relationship of the two sets of mask rulers 111c, and does not exist in the mask pattern of the mask plate 111.

[0069] It should be noted that each patterned film structure 100a in the array substrate 000 is formed based on a mask in a photomask. For example, when it is necessary to form a certain patterned film structure in the array substrate 000, firstly, a whole-layer film structure can be formed on the substrate 100 and a photoresist film can be coated; then, the same photomask is used to perform an exposure operation on the portion of the photoresist film located within multiple normal display areas 001a; then, the exposed photoresist film is developed and the whole-layer film structure is etched; finally, the photoresist on the substrate is peeled off, and a patterned film structure can be formed on the substrate 100.

[0070] The exposure operation performed on a portion of the photoresist film located within a normal display area may include: forming a first exposure area within the first normal display area and the target spliced ​​display area using a first mask in a masking plate, and forming a second exposure area within a non-display area and the target spliced ​​display area using a second mask in the masking plate; moving the masking plate in a direction toward the second normal display area until the first mask can cover the second normal display area and the second exposure area located within the target spliced ​​display area, and the second mask can cover the first exposure area located within the target first spliced ​​display area. Here, the first normal display area is any one of a plurality of normal display areas 001a, the second normal display area is a normal display area adjacent to the first normal display area, and the target spliced ​​display area is the first spliced ​​display area located between the first normal display area and the second normal display area.

[0071] It should be noted that after exposing the photoresist film using the mask in the photomask, an exposure area can be formed in the photoresist film. Subsequently, after developing the exposed photoresist film, the photoresist outside the exposure area is removed, while the photoresist inside the exposure area is retained to obtain a photoresist pattern. Therefore, in the patterned film structure 100a formed based on the same photomask in the array substrate 000, the portion located in the normal display area 001a is formed based on the first mask of this photomask, the portion located in the non-display area 002 is formed based on the second mask of this photomask, and the portion located in the first splicing display area 001b is formed based on both the first and second masks of this photomask.

[0072] It should also be noted that while the first and second masks in the photomask have similar shapes, the unit area of ​​the second exposure area formed by exposing the photoresist film using the second mask is larger than the unit area of ​​the first exposure area formed by exposing the photoresist film using the first mask. Thus, in the patterned film structure 100a formed on the same photomask in the array substrate 000, the unit area of ​​the pattern located in the non-display area 002 is larger than the unit area of ​​the pattern located in the normal display area 001a. Consequently, the orthographic projection of the virtual sub-pixel 100a2 located in the non-display area 002 onto the substrate 100 is larger than the area of ​​the orthographic projection of the first sub-pixel 100a1 located in the normal display area 001a onto the substrate 100. It should be pointed out that the unit surface area of ​​the pattern in this embodiment refers to the area of ​​the pattern within the same region, for example, the region may refer to the sub-pixel region in the array substrate 000.

[0073] In this embodiment, the portion of the photoresist film located within the first splicing display area is exposed twice. For example, as... Figure 8 As shown, Figure 8 This is a schematic diagram illustrating two exposures of a target first splicing display area provided in an embodiment of this application. During the exposure of the portion of the photoresist film located within the first normal display area AA1 by the first mask in the photomask, the first mask, the second mask, and a set of mask scales 111c located at point D in this photomask can be used to perform a first exposure of the photoresist within the target splicing display area AA2, thereby forming a first exposure area B11 and a second exposure area B12 in the portion of the photoresist film located within the target splicing display area AA2. During the exposure of the portion of the photoresist film located within the second normal display area AA3 by the first mask in the photomask, the first mask, the second mask, and a set of mask scales 111c located at point U in this photomask can be used to perform a second exposure of the photoresist within the target splicing display area AA2, thereby forming a first exposure area B21 and a second exposure area B22 in the portion of the photoresist film located within the target splicing display area AA2.

[0074] Here, in the portion of the photoresist film located within the target splicing display area AA2, the center point of the first exposure area B11 formed during the first exposure coincides with the center point of the second exposure area B22 formed during the second exposure, and the center point of the second exposure area B12 formed during the first exposure coincides with the center point of the first exposure area B21 formed during the second exposure. Furthermore, since the unit area of ​​the first exposure area is smaller than that of the second exposure area, after two exposures of the portion of the photoresist film located within the target splicing display area AA2, and after development of the photoresist film, only the photoresist within the smaller unit area of ​​the first exposure area will be retained; that is, only the photoresist within the first exposure area B11 formed during the first exposure and the first exposure area B21 formed during the second exposure will be retained. It should be noted that... Figure 8 In the diagram, the dotted pattern represents the exposed area formed during the first exposure, and the white pattern represents the exposed area formed during the second exposure. Figure 8 The first column of the exposure area represents the exposure area formed only during the first exposure, the second column represents the exposure area formed only during the second exposure, and the third column represents the exposure area formed when both exposures are considered.

[0075] In order to fabricate two scale structures (E1, E2) within two adjacent normal display areas 001a in the same patterned film structure 100a, and to control the width of a spliced ​​display area 001b between the two scale structures (E1, E2), it is necessary to block a portion of the second mask in the photoresist film using a masking plate 222 during the exposure of the photoresist film using a mask. The following embodiments will describe this in detail:

[0076] During the exposure of the portion of the photoresist film located within the first normal display area AA1 by the first mask 111a and a set of mask scales 111c located at D in the photomask 111, a first shielding plate 222a is used to shield the portion of the second mask 111b of the photomask 111 that is close to the second normal display area AA3. Furthermore, during the exposure of the portion of the photoresist film located within the second normal display area AA3 by the first mask 111a and a set of mask scales 111c located at U in the photomask 111, a second shielding plate 222b is used to shield the portion of the second mask 111b of the photomask 111 that is close to the first normal display area AA1. Here, the first shielding plate 222a and the second shielding plate 222b are the same size, defined only for shielding different positions within the photomask 111.

[0077] Assume that the second mask 111b in mask 111 can form the film layer structure within the two rows of sub-pixels. Further assume that while the first mask 111a in mask 111 exposes the portion of the photoresist film located within the first normal display area AA1, the exposure of the target splicing display area AA2 is the first exposure; and while the first mask 111a in mask 111 exposes the portion of the photoresist film located within the second normal display area AA3, the exposure of the target splicing display area AA2 is the second exposure.

[0078] Therefore, during the first exposure of the target splicing display area AA2, the portion of the first mask 111a of the mask plate 111 used to form a row of half-sub-pixels needs to be exposed to the target first splicing display area AA2 to form a first exposure area B11 within the target splicing display area AA2. Furthermore, the first blocking plate 222a needs to block the portion of the second mask 111b of the mask plate 111 used to form a row of half-sub-pixels, so that the unblocked portion of the second mask 111b exposes the target splicing display area AA2 to form a second exposure area B12 within the target splicing display area AA2. Subsequently, a row of half-sub-pixels can be formed based on the first exposure area B11, and a half-row of sub-pixels can be formed based on the second exposure area B12. Here, two rulers from a set of mask rulers 111c located at point D are used to expose the first normal display area AA1 and the target splicing display area AA2, so as to form a ruler structure E1 in the half-sub-pixel region of the first exposure area B11 and the half-sub-pixel region of the first normal display area AA1, and form half of the ruler structure E1 in the second exposure area B12. Subsequently, based on the second exposure, only half of the ruler structure E1 will be retained in the half-sub-pixel region of the first normal display area AA1.

[0079] During the second exposure of the target splicing display area AA2, the portion of the first mask 111a of the mask plate 111 used to form half a row of sub-pixels needs to be exposed to the target splicing display area AA2 to form the first exposure area B21 within the target splicing display area AA2. Furthermore, the second masking plate 222b needs to block the portion of the second mask 111b of the mask plate 111 used to form half a row of sub-pixels, allowing the unblocked portion of the second mask 111b to expose the target splicing display area AA2 to form the second exposure area B22 within the target splicing display area AA2. If the influence of the first exposure is not considered, then subsequent exposures based on the first exposure area B21 can form half a row of sub-pixels, and subsequent exposures based on the second exposure area B22 can form a row and a half row of sub-pixels. Here, disregarding the impact of the first exposure, two rulers from a set of mask rulers 111c located at U are used to expose the second normal display area AA3 and the target splicing display area AA2. This forms a ruler structure E2 within half a sub-pixel of the first exposure area B21 and half a sub-pixel of the second normal display area AA3. A half-ruler structure E2 is also formed within half a sub-pixel of the second exposure area B22, near the first normal display area AA1. Due to the impact of the first exposure, only half a ruler structure E2 will be retained within half a sub-pixel of the second normal display area AA3 subsequently.

[0080] In this scenario, considering the impact of both exposures simultaneously, regarding the size of the exposure area, after the first exposure forms the first exposure area B11, the area containing this first exposure area B11 is the same as the area containing the second exposure area B22 formed by the subsequent second exposure. Furthermore, the area of ​​the first exposure area B11 is smaller than the area of ​​the second exposure area B22. Therefore, the second exposure area B22 formed by the second exposure does not affect the area of ​​the first exposure area B11 formed by the first exposure. Similarly, after the first exposure forms the second exposure area B12, the area containing this second exposure area B12 is the same as the area containing the first exposure area B21 formed by the subsequent second exposure. Furthermore, the area of ​​the second exposure area B12 is larger than the area of ​​the first exposure area B21. Therefore, after the second exposure, the second exposure area B12 formed by the first exposure can be treated as the first exposure area B21. In this way, it can be ensured that the portion of the photoresist film located within the target splicing display area AA2 is exposed twice, and after the photoresist film is developed, only the photoresist within the first exposure area B11 formed during the first exposure and the first exposure area B12 formed during the second exposure will be retained.

[0081] When considering the effects of two exposures simultaneously, regarding the distribution of the ruler structure, after the first exposure forms the first exposure area B11, the orthographic projection of half a ruler structure E1 within half a sub-pixel region of the first exposure area B11 onto the substrate 100 does not overlap with the orthographic projection of half a ruler structure E2 within half a sub-pixel region of the second exposure area B22, which is closer to the first normal display area AA1. Therefore, the ruler structure (E1, E2) will not be retained in the first exposure area B11 formed after the second exposure. However, during the second exposure, the second masking plate 222b blocks the portion of the second mask 111b of the mask plate 111 used to form half a row of sub-pixels, thus retaining half a ruler structure E1 within half a sub-pixel region of the first normal display area AA1. Similarly, after the first exposure forms the first exposure area B11, the orthographic projection of half a ruler structure E1 on the substrate 100 formed in the second exposure area B12 does not overlap with the orthographic projection of half a ruler structure E2 on the substrate 100 formed in the area of ​​half a sub-pixel in the first exposure area B21. Therefore, the ruler structure (E1, E2) will not be retained in the first exposure area B21 formed after the second exposure. However, since the first masking plate 222a blocks the portion of the second mask 111b of the mask plate 111 used to form a row of half sub-pixels during the first exposure, the half ruler structure E2 is retained in the area of ​​half a sub-pixel in the second normal display area AA3 after the second exposure.

[0082] It should be noted that the first normal display area AA1 and the second normal display area AA3 shown in the above embodiments are illustrated using two normal display areas arranged vertically and a first splicing display area located between them as examples. The exposure methods for two normal display areas arranged horizontally and the first splicing display area located between them will not be described in detail in this embodiment.

[0083] Thus, in the patterned film structure 100a formed on the same mask in the array substrate 000, a set of scale patterns 100a4 in the patterned film structure 100a can reflect the width of the first splicing display area 001b between two adjacent normal display areas 001a. For example, the distance between two scale structures (E1, E2) located in two adjacent normal display areas 001a in the length direction perpendicular to the first splicing display area 001b can be measured by an electronic ruler. If the measured width of the first splicing display area 001b is too large, the positions of the second baffle 222b and the first baffle 222a can be adjusted according to the length of the scale structure E1 or the length of the scale structure E2, so that the width of the first splicing display area 001b is always within a suitable range, thereby improving the display effect of the subsequently formed display panel.

[0084] In related technologies, when forming the film layer structure within the first splicing display area using a two-exposure method, the same mask is used for both exposures, and this mask lacks a mask scale. This prevents adjustment of the mask position based on the width between the first splicing display areas on the array substrate, making it difficult to ensure the width between these areas remains within a suitable range. This results in uneven widths of the first splicing display areas within the same patterned film layer structure on the produced array substrate, leading to poor display quality in the subsequent display panel formation.

[0085] In this embodiment, during the formation of the film structure within the first splicing display area 001b, two exposures are required. Both exposures utilize the first and second masks from the photomask. After the two exposures and development of the photoresist film, only the photoresist within the first exposure area formed based on the first mask is retained. Similarly, during the formation of the film structure within the normal display area 001a, two sets of mask rulers at different positions on the photomask are used during the two exposures. After the two exposures and development of the photoresist film, only the ruler structures (E1, E2) located in the two adjacent normal display areas 001a on either side of the first splicing display area are retained. Therefore, in the patterned film layer structure 100a formed based on the same mask in the array substrate 000, the width of the first splicing display area 001b between two adjacent normal display areas 001a can be obtained by the scale structures (E1, E2) within the two adjacent normal display areas 001a. Furthermore, the light-shielding baffle 222 can be adjusted according to the lengths of the two scale structures (E1, E2) to control the width of the first splicing display area 001b to remain within a suitable range. Thus, the width of the first splicing display area 001b in each patterned film layer structure 100a within the array substrate 000 in this embodiment can be stably and reliably controlled, thereby improving the display effect of the subsequently formed display panel. Moreover, in actual production, the width of the first splicing display area 001b in each patterned film layer structure 100a can be monitored and adjusted at any time, resulting in a high yield rate for the display panel.

[0086] In summary, the array substrate provided in this application includes: a substrate, and a plurality of patterned film structures stacked on the substrate. Since the portion of the patterned film structure located within the first splicing display area is formed based on the first and second masks of a mask plate, and the portion of the patterned film structure located within the normal display area can also be formed based on the first mask, and the portion of the patterned film structure located within the non-display area can also be formed based on the second mask, the formation of the patterned film structure in this array eliminates the need for separate exposure of the photoresist within the first splicing display area using an additional mask plate. This effectively reduces the number of exposures and simplifies the subsequent manufacturing process of the large-size display panel fabricated based on this array substrate. Furthermore, during the formation of the film structure within the normal display area, two sets of mask scales at different positions in the mask plate are used in the two exposures. After the two exposures and development of the photoresist film, only the scale structures within the two adjacent normal display areas on both sides of the first splicing display area are retained. Therefore, in the patterned film layer structure formed based on the same mask in the array substrate, the width of the first splicing display area between two adjacent normal display areas can be obtained by the scale structure within the two adjacent normal display areas. Furthermore, the light-shielding baffle can be adjusted according to the length of the two scale structures to keep the width of the first splicing display area within a suitable range. Thus, the width of the first splicing display area in each patterned film layer structure within the array substrate in this embodiment can be stably and reliably controlled, thereby improving the display effect of the subsequently formed display panel. Moreover, in actual production, the width of the first splicing display area in each patterned film layer structure can be monitored and adjusted at any time, resulting in a high yield rate for the display panel.

[0087] Optional, such as Figure 1 As shown, the display area 001 of the array substrate 000 may further include a second splicing display area 001d located between two first splicing display areas 001b arranged along the row direction and two first splicing display areas 001b arranged along the column direction. The plurality of sub-pixels composed of multiple patterned film layer structures 100a may further include a plurality of fourth sub-pixels located within the second splicing display area 001d.

[0088] In one possible implementation, since four exposure processes are required in the second splicing display area 001d during the fabrication of the patterned film structure 100a in the array substrate 000, the unit area of ​​the pattern within the second splicing display area 001d is slightly smaller than the unit area of ​​the pattern within the first splicing display area 001b in the patterned film structure 100a formed based on the same mask in the array substrate 000. Thus, the area of ​​the orthographic projection of the fourth sub-pixel located in the second splicing display area 001d onto the substrate 100 is less than or equal to the area of ​​the orthographic projection of the second sub-pixel 100a3 located in the first splicing display area 001b onto the substrate 100.

[0089] In this embodiment, at least a portion of the orthographic projections of the two scale structures (E1, E2) onto the substrate 100 lie within the orthographic projections of the two sub-pixels onto the substrate 100, and the two sub-pixels are arranged in the row or column direction of a plurality of sub-pixels. Here, as... Figure 4 As shown, the areas of the orthographic projections of scale structures E1 and E2 onto the substrate 100 are both smaller than the area of ​​the orthographic projection of the corresponding third sub-pixel 100a5 onto the substrate 100. Therefore, the scale structures (E1, E2) will not affect the display effect of the display panel assembled from the subsequent array substrate 000. It should be noted that in the above embodiment... Figure 4 This is illustrated using the example of two third sub-pixels 100a5 arranged in the column direction.

[0090] Please refer to the following in this application: Figure 9 and Figure 10 , Figure 9 This is a top view of another array substrate provided in an embodiment of this application. Figure 10 yes Figure 9 The diagram shows the film structure of the array substrate at point D-D'. The array substrate 000 has multiple sets of scale patterns 100a4 in the length direction perpendicular to each of the first splicing display areas 001b, and the orthographic projections of each set of scale patterns 100a4 on the substrate 100 do not overlap.

[0091] For example, the first splicing display area 001 between two adjacent normal display areas 001a in the column direction has at least one set of scale patterns 100a4. Thus, during the formation of the film structure within the first splicing display area 001b, the average distance between two scale structures (E1, E2) in the multiple sets of scale patterns 100a4 ensures uniform width throughout the first splicing display area 001b in the length direction. Furthermore, the average distance between the multiple scale structures E1 and the first splicing display area 001b ensures accurate adjustment of the first baffle 000a. Similarly, the average distance between the multiple scale structures E2 and the first splicing display area 001b ensures accurate adjustment of the second baffle 000b.

[0092] In this application embodiment, there are multiple structures for a set of scale patterns 100a4. For a clearer description, this application embodiment will take the film structure closest to the substrate 100 among the multiple patterned film structures 100a as an example to illustrate the following two possible structures of a set of scale patterns 100a4. Here, the film structure closest to the substrate 100 among the multiple patterned film structures 100a in the array substrate 000 is the first conductive layer 200.

[0093] For the first structure, please refer to... Figure 11 , Figure 11 This is a schematic diagram of a scale pattern in a first conductive layer according to an embodiment of this application. The scale structure (E1, E2) in the first conductive layer 200 may include: a first strip structure T1, and the length directions of two first strip structures T1 within a set of scale patterns 100a4 are parallel. In this way, the distance between the two scale structures (E1, E2) can be measured by an electronic ruler along the length direction X perpendicular to the first splicing display area 001b, thereby obtaining the width of the first splicing display area 001b located between the two scale structures (E1, E2).

[0094] For the second structure, please refer to... Figure 12 , Figure 12 This is a schematic diagram of another scale pattern in the first conductive layer provided in this application embodiment. The scale structure (E1, E2) in the first conductive layer 200 may further include at least one protruding structure P connected to the first strip structure T1. Here, each protruding structure P also has a corresponding numerical identifier, which can intuitively show the length of the two scale structures (E1, E2) and the width of the first splicing display area 001b between the two scale structures (E1, E2) in the length direction X perpendicular to the first splicing display area 001b.

[0095] It should be noted that the mask scales 111c on the mask 111 and the scale pattern 100a4 on the array substrate 000 are correspondingly distributed. For their correspondence, please refer to the process of forming a set of scale patterns 100a4 on the array substrate 000 in the above embodiment. Thus, as... Figure 6 and Figure 7 As shown, the numerical values ​​of the mask 111 are smaller in the portion of the mask 111 that is closer to the first splicing display area 001b. For example, for a set of mask scales 111c located at D, the numerical values ​​of the portion of the mask 111 that is closer to the first splicing display area 001b gradually decrease from 5 to -4.

[0096] The number of raised structures P on the first strip structure T1 is within a preset range. Here, the number of raised structures P in a set of ruler patterns 100a4 can range from 1 to 8. The more raised structures P on the first strip structure T1, the wider the width of the first splicing display area 001b; the fewer raised structures P on the first strip structure T1, the smaller the width of the first splicing display area 001b.

[0097] In this embodiment, the scale structure (E1, E2) has multiple protrusions P, which, together with the first strip structure T1, form a comb-like structure. Here, the multiple protrusions P are evenly distributed along the length of the first strip structure T1. To further clarify the preset number range of protrusions P in the scale structure (E1, E2), please refer to... Figure 13 and Figure 14 , Figure 13 This is a schematic diagram of a scale structure when the number of protrusions P is 1, according to an embodiment of this application. Figure 14 This is a schematic diagram of a scale structure with 8 raised structures P provided in an embodiment of this application. When there is 1 raised structure P, the readings on scale structure E1 and scale structure E2 are 5; when there are 8 raised structures P, the readings on scale structure E1 and scale structure E2 are -2. It should be noted that the number of raised structures P in scale structure E1 of a set of scale patterns 100a4 can range from 1 to 8, and the number of raised structures P in scale structure E2 of a set of scale patterns 100a4 can also range from 1 to 8. Here, Figure 13 Both the scale structure E1 and the scale structure E2 shown have only one protruding structure P. At this time, the width of the first splicing display area 001b is the largest. Figure 14Both scale structures E1 and E2 shown have eight raised structures P, at which point the width of the first splicing display area 001b is minimized. For example, the width of the first splicing display area 001b within the first conductive layer 200 can range from 1.4 mm to 3.0 mm. Therefore, if the number of raised structures P exceeds a preset range during the formation of the film structure within the first splicing display area 001b within the first conductive layer 200, it indicates that the width of the first splicing display area 001b is either too large or too small. Thus, the position of the corresponding mask can be adjusted according to the number of raised structures P on the first strip structure T1.

[0098] In the embodiments of this application, please refer to Figure 15 , Figure 15 This is a schematic diagram of a scale pattern in a first conductive layer and a scale pattern in a film structure other than the first conductive layer, provided in an embodiment of this application. The scale structures (E1, E2) within the multiple patterned film structures 100a, excluding the first conductive layer 200, can all include a second strip structure T2, the length direction of which is parallel to the length direction of the first strip structure T1. Thus, the width of the first splicing display area 001b in the film structure excluding the first conductive layer 200 can be adjusted by setting the second strip structure T2. It should be noted that in other possible implementations, the scale pattern 100a4 of each layer in the film structure 100a, excluding the first conductive layer 200, can also adopt the same structure as the second scale pattern 100a4 in the first conductive layer 200; this application does not limit this.

[0099] In this application, multiple second strip structures T2 in different patterned film structures 100a correspond one-to-one with multiple first strip structures T1 in the first conductive layer 200. At least a portion of the first strip structure T1 and the corresponding second strip structure T2 have their orthographic projections on the substrate 100 located within the orthographic projection of the same sub-pixel on the substrate 100, and the orthographic projections of the first strip structure T1 and the corresponding second strip structure T2 on the substrate 100 do not coincide. Here, after forming two scale structures (E1, E2) on both sides of the first splicing display area 001b in the first conductive layer 200, the lengths of the two first strip structures T1 in the first conductive layer 200 are known. Thus, when forming the subsequent patterned film structure 100a, the length of the second strip structure T2 can be obtained by referring to the length of the corresponding first strip structure T1. Based on the second strip structures T2 on both sides of the first splicing display area 001b in the subsequent patterned film structure 100a, the same technical effect as the two scale structures (E1, E2) can be achieved, allowing control over the width of the first splicing display area 001b in the subsequent patterned film structure 100a. It should be noted that the area of ​​the orthographic projection of the second strip structure T2 corresponding to the first strip structure T1 in a portion of the subsequent patterned film structure 100a onto the substrate 100 is smaller than the area of ​​the orthographic projection of a sub-pixel onto the substrate 100. Therefore, the second strip structure T2 in a portion of the subsequent patterned film structure 100a will not affect the display effect of the display panel assembled from the subsequent array substrate 000.

[0100] In the embodiments of this application, such as Figure 9 and Figure 15 As shown, among the multiple patterned film structures 100a in the array substrate 000, all film structures except the first conductive layer 200 include two second strip structures T2 located within a set of scale patterns 100a4. Figure 9 (Not marked in the text). The orthographic projections of the second strip structure T2 in different patterned film structures 100a onto the substrate 100 do not coincide. This facilitates subsequent inspection of the width of each first splicing display area 100b in each patterned film structure 100a.

[0101] In this case, within the normal display area 001a of the array substrate 000, where a set of scale patterns 100a4 are located, there are multiple first strip structures T1 and multiple second strip structures T2, and these multiple first strip structures T1 can correspond one-to-one with the multiple second strip structures T2. It should be noted that, since each patterned film structure 100a has one second strip structure T2 within the same set of scale patterns 100a4, the number of first strip structures T1 and the number of second strip structures T2 within the same set of scale patterns 100a4 are the same as the number of film structures other than the first conductive layer 200 in the multiple patterned film structures 100a.

[0102] For example, such as Figure 10 As shown, the multiple patterned film structures 100a, excluding the first conductive layer 200, have six layers: an active layer pattern 300, a second conductive layer 400, a first planarization layer 500, a pixel electrode layer 600, and a support pattern 800. The active layer pattern 300, the second conductive layer 400, the first planarization layer 500, the pixel electrode layer 600, the second planarization layer 700, and the support pattern 800 can be sequentially stacked along a direction perpendicular to and away from the substrate 100. In addition to the multiple patterned film structures 100a, the array substrate 000 also includes integrally formed film structures. For example, the array substrate 000 may further include an integrally formed gate insulating layer 900 located between the active layer pattern 300 and the first conductive layer 200, and an integrally formed second planarization layer 700 located between the pixel electrode layer 600 and the support pattern 800. Here, the patterned film structure in the array substrate 000 refers to the film structure that needs to be formed based on a mask and through a patterning process, while the film structure set in an integral layer in the array substrate 000 refers to the film structure that does not need to be formed through a patterning process.

[0103] In this case, please refer to Figure 16 and Figure 17 , Figure 16 This is a top view of a sub-pixel in an array substrate provided in an embodiment of this application. Figure 17 This is a top view of another sub-pixel in the array substrate provided in the embodiments of this application. The second strip structure T2 in the active layer pattern 300, the second conductive layer 400, the pixel electrode layer 600 and the support pattern 800 is a strip protrusion, and the second strip structure T2 in the first planarization layer 500 is a strip groove. Figure 16 The diagram shows the positional relationship between the first strip structure T1 in the first conductive layer 200, the second strip structure T2 in the active layer pattern 300, and the second strip structure T2 in the second conductive layer 400. Figure 17The diagram shows the positional relationship between the first strip structure T1 in the first conductive layer 200 and the second strip structure T2 in the pixel electrode layer 600.

[0104] It should be noted that the first strip structure T1 in the first conductive layer 200, the second strip structure T2 in the active layer pattern 300, the second strip structure T2 in the second conductive layer 400, and the second strip structure T2 in the pixel electrode layer 600 are all located within the same sub-pixel.

[0105] In this embodiment of the application, in the support pattern 800, the length of the second strip structure T2 is greater than the length of the first strip structure T1, and in the length direction perpendicular to the first splicing display area 001b between two adjacent normal display areas 001a, the distance between the two second strip structures T2 in a set of ruler patterns 100a4 is less than the width of one sub-pixel.

[0106] Here, for reference Figure 18 and Figure 19 , Figure 18 yes Figure 5 The diagram shows the mask scale at the support pattern U. Figure 19 yes Figure 5 This is a schematic diagram of the mask scale at support pattern D. During the formation of the patterned film structure 100a in the array substrate 000, the formation of the support pattern 800 is the same as in the above embodiments, and will not be repeated here. Here, the positional relationship between the mask scale 111c at support pattern U and the mask scale 111c at support pattern D can be referred to the corresponding content in the above embodiments, and will not be repeated here. Here, a mask scale with… Figure 18 and Figure 19 The second strip structure T2 of the support pattern 800 shown serves as a mask 111. Through the process described in the above embodiment, two second strip structures T2 located on both sides of the first splicing display area 001b in the support pattern 800 can be obtained. That is, the width of the first splicing display area 001b in the support pattern 800 can be controlled.

[0107] In the embodiments of this application, please refer to Figure 20 and Figure 21 , Figure 20 This is a schematic diagram of a second strip structure of a support pattern provided in an embodiment of this application. Figure 21This is a schematic diagram of the second strip structure of another support pattern provided in an embodiment of this application. In the support pattern 800, a portion of the second strip structure T2 and the corresponding first strip structure T1, when projected onto the substrate 100, are located within the same sub-pixel's projection onto the substrate 100. Here, this sub-pixel can be the first sub-pixel 100a1 located within the normal display area 001a. Another portion of the second strip structure T2 and the corresponding first strip structure T1, when projected onto the substrate 100, are located within different sub-pixels' projections onto the substrate 100, and the other portions of the two second strip structures T2 in a set of scale patterns 100a4, when projected onto the substrate 100, are located within the same sub-pixel's projection onto the substrate 100. Here, this sub-pixel can be the second sub-pixel 100a3 located within the first splicing display area 001b. In this way, in a set of scale patterns 100a4, there are always two other parts of the second strip structures T2 located in the second sub-pixel 100a3 within the first splicing display area 001b, so that the first splicing display area 001b in the support pattern 800 is located at the center of the second sub-pixel 100a3.

[0108] It should be noted that during the formation of the support pattern 800 on the array substrate 000, a thin film of highly photosensitive resin material needs to be formed on the substrate, followed by exposure, development, and etching processes. Here, because the support pattern 800 uses a highly photosensitive resin material, the smaller the width of the secondary exposure area of ​​the support pattern 800, the less likely the pattern of the support pattern 800 within the first splicing display area 001b of the support pattern 800 will be interfered with by the secondary exposure. Here, the first splicing display area 001b of the support pattern 800 is controlled within one sub-pixel, and its width does not exceed the width of that sub-pixel. Figure 20 The lengths of the two second strip structures T2 shown are relatively large, and at this time, the width of the first splicing display area 001b is the smallest; Figure 21 The two second strip structures T2 shown are relatively short, and in this case, the width of the first splicing display area 001b is at its maximum. For example, the width of the first splicing display area 001b within the support pattern 800 can range from 0.2 mm to 1.0 mm. This results in a more uniform pattern in both the normal display area 001a and the first splicing display area 001b of the support pattern 800, leading to a better display effect on the subsequently formed display panel.

[0109] It should be noted that, as Figure 18 and Figure 19As shown, the mask plate 111 also has a first vertical marker K1 and a second vertical marker K2 in a set of mask rulers 111c. The distance between the first vertical marker K1 and the second vertical marker K2 in the set of mask rulers 111c is the same. Here, the first vertical marker K1 and the second vertical marker K2 can be used to monitor the situation where the width of the first splicing display area 001b exceeds the normal range when the position of the mask plate 222 deviates from the normal position. Here, the normal position of the mask plate 222 refers to the position of the mask plate 222 when the width of the first splicing display area 001b in the formed support pattern 800 is within the normal range.

[0110] When the mask 222 deviates from its normal position, after the process described in the above embodiment, the two second strip structures T2 located on both sides of the first splicing display area 001b in the support pattern 800 will include either a first vertical mark K1 or a second vertical mark K2. In this case, the position of the mask 222 can be adjusted according to the first vertical mark K1 or the second vertical mark K2 included in the two second strip structures T2. For example, when both second strip structures T2 on both sides of the first splicing display area 001b in the support pattern 800 include the first vertical mark K1, the mask 222 can be shifted 0.05 mm towards its normal position; when both second strip structures T2 on both sides of the first splicing display area 001b in the support pattern 800 include the first vertical mark K1 and the second vertical mark K2, the mask 222 can be shifted 0.1 mm towards its normal position, so that the width of the first splicing display area 001b in the support pattern 800 formed by the adjusted mask 222 is within the normal range.

[0111] In this embodiment, a set of ruler patterns 100a4 also has two mark structures corresponding one-to-one with the two ruler structures (E1, E2), wherein the ruler structures (E1, E2) are closer to the first splicing display area 001b relative to their corresponding mark structures. Here, the mark structures are used to distinguish different patterned film structures 100a; therefore, different patterned film structures 100a correspond to different mark structures. For example, such as... Figure 4 , Figure 8 , Figure 11 , Figure 12 , Figure 13 , Figure 14 and Figure 16 In the schematic diagram of the first conductive layer 200 shown, the marking structure of the first conductive layer 200 is the letter "G"; as shown... Figure 16 In the schematic diagram of the source layer pattern 300 shown, the source layer pattern 300 is marked with the letter "A"; the second conductive layer 400 is marked with the letter "D"; and the first planarization layer 500 is marked with the letter "P1". Figure 17In the schematic diagram of the pixel electrode layer 600 shown, the pixel electrode layer 600 is marked with the letters "ITO"; as shown Figure 20 and Figure 21 In the structural schematic diagram of the support pattern 800 shown, the marker structure of the support pattern 800 is the letter "PS". It should be noted that other patterned film structures 100a also have corresponding marker structures, which will not be described in detail in this embodiment.

[0112] It should be noted that, Figure 6 , Figure 7 , Figure 18 and Figure 19 As shown, each patterned film structure 100a has a corresponding mask plate 111, and each set of mask scales 111c in each mask plate 111 also has the same letters as the marking structure in the patterned film structure 100a. Here, each set of mask scales 111c has two letters that are the same as the marking structure in the patterned film structure 100a.

[0113] In this case, if a marking structure is also formed in the first splicing display area 100b of the patterned film structure 100a obtained through the process described in the above embodiments, it indicates that the mask 222 has undergone a significant shift. Therefore, it is necessary to inspect the process for forming the patterned film structure 100a and adjust the position of the mask 222.

[0114] It should also be noted that, in order to avoid other abnormal situations, it is necessary to perform fixed-point monitoring on each patterned membrane structure 100a. For example... Figure 9 As shown, after obtaining a patterned film structure 100a through the process described in the above embodiments, it is possible to... Figure 9 Take photos at the positions of the scale patterns 100a4 shown to check for any abnormalities in the first splicing display area 100b of the patterned film structure 100a. For example, if the first shielding plate 222a and the second shielding plate 222b overlap, a normal patterned film structure 100a cannot be formed in the first splicing display area 100b, that is, the first splicing display area 100b contains a whole layer of photoresist.

[0115] In the embodiments of this application, such as Figure 10 As shown, in addition to the scale structure (E1, E2) and the marker structure (G), the first conductive layer 200 may also include: the gate 201 of the thin film transistor in the sub-pixel, and the gate line 202 electrically connected to the gate 201.

[0116] In addition to the second strip structure T2 and the marker structure (A), the active layer pattern 300 may also include an active layer 301 of a thin-film transistor in a sub-pixel. The orthographic projection of the active layer 301 of the thin-film transistor onto the substrate 100 may coincide with the orthographic projection of the gate 201 of the thin-film transistor onto the substrate 100, and the active layer 301 and the gate 201 may be insulated from each other by a gate insulating layer 900.

[0117] In addition to the second strip structure T2 and the marker structure (D), the second conductive layer 400 may also include: a first electrode 401 and a second electrode 402 of a thin-film transistor in a sub-pixel, and a data line 403 electrically connected to the first electrode 401.

[0118] In addition to the second strip structure T2 and the marker structure (P1), the first flat layer 500 also has a connecting via 501.

[0119] In addition to the second strip structure T2 and the marker structure (ITO), the pixel electrode layer 600 may also include a pixel electrode 601 in the sub-pixel. The pixel electrode 601 can be electrically connected to the second electrode 403 of the thin-film transistor via a connection via 501.

[0120] The second flattening layer 700 can flatten the pixel electrode layer 600 to make the support pattern 800 formed on it have a better flatness.

[0121] In addition to the second strip structure T2 and the marker structure (PS), the support pattern 800 also has multiple arrayed support columns 801.

[0122] In this application, the array substrate 000 contains multiple gate lines 202 and multiple data lines 403, arranged in parallel. The length direction of the gate lines 202 can be perpendicular to the length direction of the data lines 403. Thus, any two adjacent gate lines 202 and any two adjacent data lines 403 can form a sub-pixel region, and one sub-pixel can be arranged in one sub-pixel region.

[0123] In the embodiments of this application, such as Figure 17As shown, the pixel electrode 601, whose orthographic projection on the substrate 100 overlaps with the second strip structure T2 in the pixel electrode layer 600, has a hollow structure 6011. The orthographic projection of the second strip structure T2 in the pixel electrode layer 600 on the substrate 100 is located within the orthographic projection of the hollow structure 6011 on the substrate 100. Since the pixel electrode 601 in the sub-pixel is usually block-shaped, the horizontal distance between the pixel electrode 601 and the gate line 202 is relatively small, as is the horizontal distance between the pixel electrode 601 and the data line 403. Therefore, in order to properly arrange the second strip structure T2 in the pixel electrode layer 600 within the sub-pixel region, the second strip structure T2 can be placed within the hollow structure 6011. In this way, the pixel electrode 601 arranged within the sub-pixel region will not affect the positional distribution of the second strip structure T2, allowing the sub-pixel portion with the second strip structure T2 to also function normally, resulting in a better display effect when the array substrate 000 is subsequently assembled into a display panel.

[0124] In the embodiments of this application, such as Figure 16 As shown, the first conductive layer 200 may further include an auxiliary signal line 204. The orthographic projection of the auxiliary signal line 204 onto the substrate 100 overlaps with the orthographic projection of the pixel electrode 601 in the sub-pixel onto the substrate 100, and does not coincide with the orthographic projection of the first strip structure T1 onto the substrate 100. Thus, the first strip structure T1 will not be electrically connected to the gate line 202 or the auxiliary signal line 204 in the first conductive layer 200, preventing display defects in the resulting display panel. Here, the overlapping portion of the auxiliary signal line 204 and the pixel electrode 601 can form a storage capacitor Cst. The storage capacitor Cst can maintain the pixel voltage applied to the pixel electrode 601, ensuring that the pixel voltage used to maintain the pixel electrode 102 remains unchanged.

[0125] For example, the auxiliary signal line 204 may include: an auxiliary signal line body 2041, and a bent winding 2042 electrically connected to the auxiliary signal line body 2041. At least a portion of the first alignment structure 204 is located within the area enclosed by the bent winding 2042. This ensures that the orthographic projection of the first strip structure T1 on the substrate 101 does not coincide with the orthographic projection of the auxiliary signal line 204 on the substrate. Here, the length direction of the auxiliary signal line body 2041 may be parallel to the length direction of the gate line 202; the bent winding 2042 consists of two first portions extending along the length direction of the data line 403, and a second portion located between these two first portions, the length direction of the second portion of the bent winding 2042 may be parallel to the length direction of the gate line 202. It should be noted that the area enclosed by the bent winding 2042 in this embodiment is not a closed area, but an open area.

[0126] In summary, the array substrate provided in this application includes: a substrate, and a plurality of patterned film structures stacked on the substrate. Since the portion of the patterned film structure located within the first splicing display area is formed based on the first and second masks of a mask plate, and the portion of the patterned film structure located within the normal display area can also be formed based on the first mask, and the portion of the patterned film structure located within the non-display area can also be formed based on the second mask, the formation of the patterned film structure in this array eliminates the need for separate exposure of the photoresist within the first splicing display area using an additional mask plate. This effectively reduces the number of exposures and simplifies the subsequent manufacturing process of the large-size display panel fabricated based on this array substrate. Furthermore, during the formation of the film structure within the normal display area, two sets of mask scales at different positions in the mask plate are used in the two exposures. After the two exposures and development of the photoresist film, only the scale structures within the two adjacent normal display areas on both sides of the first splicing display area are retained. Therefore, in the patterned film layer structure formed based on the same mask in the array substrate, the width of the first splicing display area between two adjacent normal display areas can be obtained by the scale structure within the two adjacent normal display areas. Furthermore, the light-shielding baffle can be adjusted according to the length of the two scale structures to keep the width of the first splicing display area within a suitable range. Thus, the width of the first splicing display area in each patterned film layer structure within the array substrate in this embodiment can be stably and reliably controlled, thereby improving the display effect of the subsequently formed display panel. Moreover, in actual production, the width of the first splicing display area in each patterned film layer structure can be monitored and adjusted at any time, resulting in a high yield rate for the display panel.

[0127] This application also provides a liquid crystal panel. This liquid crystal panel can be integrated into any large-size display device with display functionality, such as a television or screen. The array substrate may include: an array substrate and a cover plate disposed opposite each other, and a liquid crystal layer located between the array substrate and the cover plate. This array substrate can be the array substrate shown in the above embodiments.

[0128] It should be noted that if the above-mentioned liquid crystal panel is a liquid crystal handwriting tablet, the cover plate may include a flexible substrate and a common electrode located on the side of the flexible substrate close to the array substrate; if the above-mentioned liquid crystal panel is a liquid crystal display panel, the cover plate may be a color filter substrate.

[0129] It should be noted that the dimensions of layers and regions may be exaggerated in the accompanying drawings for clarity. Furthermore, it is understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element, or there may be intermediate layers. Additionally, it is understood that when an element or layer is referred to as being "below" another element or layer, it can be directly below the other element, or there may be more than one intermediate layer or element. Furthermore, it is also understood that when a layer or element is referred to as being "between" two layers or two elements, it can be the only layer between the two layers or two elements, or there may be more than one intermediate layer or element. Similar reference numerals throughout indicate similar elements.

[0130] In this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. The term "multiple" refers to two or more unless otherwise expressly defined.

[0131] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. An array substrate, characterized by, The array substrate has a display area and a non-display area located around the display area; the array substrate includes: A substrate, and a plurality of patterned film structures stacked on the substrate; The patterned film structure located within the display area includes: multiple normal display areas arranged in an array, and a first splicing display area located between two adjacent normal display areas; In the patterned film structure of the same layer, the patterned film structure includes: multiple sets of ruler patterns, each set of ruler patterns having two ruler structures, the two ruler structures being located in two adjacent normal display areas respectively, and the distance between the two ruler structures being equal to the width of the first splicing display area in the length direction perpendicular to the first splicing display area between the two adjacent normal display areas.

2. The array substrate of claim 1, wherein, In the length direction of the first splicing display area parallel to two adjacent normal display areas, the distance between the two scale structures is greater than 0.

3. The array substrate of claim 1, wherein, At least a portion of the patterned film structure is used to form a plurality of sub-pixels, wherein at least a portion of the orthographic projection of the two scale structures onto the substrate is located within the orthographic projection of the two sub-pixels onto the substrate, and the two sub-pixels are arranged in the row or column direction of the plurality of sub-pixels.

4. The array substrate of claim 3, wherein, The film structure closest to the substrate among the multiple patterned film structures is the first conductive layer. The scale structure in the first conductive layer includes: a first strip structure, and the length directions of two first strip structures within a set of scale patterns are parallel.

5. The array substrate of claim 4, wherein, The scale structure in the first conductive layer further includes at least one protrusion structure connected to the first strip structure; The number of protrusions on the first strip structure is within a preset range.

6. The array substrate of claim 5, wherein, The scale structure has multiple protrusions, and the multiple protrusions and the first strip structure are used to form a comb-like structure.

7. The array substrate of claim 4, wherein, The scale structure in each of the multiple patterned film structures, excluding the first conductive layer, includes a second strip structure, the length direction of which is parallel to the length direction of the first strip structure.

8. The array substrate of claim 7, wherein, The multiple second strip structures in the different patterned film structures correspond one-to-one with the multiple first strip structures in the first conductive layer. At least a portion of the orthographic projection of the first strip structure and the corresponding second strip structure on the substrate are located within the orthographic projection of the same sub-pixel on the substrate, and the orthographic projection of the first strip structure on the substrate and the orthographic projection of the corresponding second strip structure on the substrate do not overlap.

9. The array substrate of claim 8, wherein, The orthographic projections of the second strip structure in different patterned film structures on the substrate do not coincide.

10. The array substrate according to any one of claims 7 to 9, wherein, The multiple patterned film structures, excluding the first conductive layer, are as follows: an active layer pattern, a second conductive layer, a first planarization layer, a pixel electrode layer, and a support pattern. The active layer pattern, the second conductive layer, the first planarization layer, the pixel electrode layer, and the support pattern are stacked sequentially along a direction perpendicular to and away from the substrate. The array substrate further includes: a gate insulating layer disposed entirely between the active layer pattern and the first conductive layer, and a second planarization layer disposed entirely between the pixel electrode layer and the support pattern; The second strip structure in the active layer pattern, the second conductive layer, the pixel electrode layer, and the support pattern is a strip-shaped protrusion; the second strip structure in the first planarization layer is a strip-shaped groove.

11. The array substrate of claim 10, wherein, In the support pattern, the length of the second strip structure is greater than the length of the first strip structure, and in the length direction perpendicular to the first splicing display area between two adjacent normal display areas, the distance between two second strip structures in a set of ruler patterns is less than the width of one sub-pixel.

12. The array substrate of claim 11, wherein, In the support pattern, a portion of the second strip structure and the orthographic projection of the corresponding first strip structure on the substrate are located within the orthographic projection of the same sub-pixel on the substrate; another portion of the second strip structure and the orthographic projection of the corresponding first strip structure on the substrate are located within the orthographic projection of different sub-pixels on the substrate, and the orthographic projections of the other portions of the two second strip structures in a set of scale patterns on the substrate are located within the orthographic projection of the same sub-pixel on the substrate.

13. The array substrate of claim 10, wherein, The first conductive layer further includes: the gate of the thin-film transistor in the sub-pixel, and a gate line electrically connected to the gate; The active layer pattern further includes: the active layer of the thin-film transistor in the sub-pixel; The second conductive layer further includes: a first electrode and a second electrode of the thin-film crystal in the sub-pixel, and a data line electrically connected to the first electrode; The planarization layer also has connection vias; The pixel electrode layer further includes: a pixel electrode in the sub-pixel, wherein the pixel electrode is electrically connected to the second electrode through the connection via; The support pattern also has multiple support columns arranged in an array.

14. The array substrate of claim 13, wherein, The pixel electrode, whose orthogonal projection on the substrate overlaps with the second strip structure in the pixel electrode layer, has a hollow structure. The orthogonal projection of the second strip structure in the pixel electrode layer on the substrate is located within the orthogonal projection of the hollow structure on the substrate.

15. The array substrate according to any one of claims 11 to 14, wherein, The first conductive layer further includes: an auxiliary signal line, wherein the orthographic projection of the auxiliary signal line on the substrate overlaps with the orthographic projection of the pixel electrode in the sub-pixel on the substrate, and does not coincide with the orthographic projection of the first strip structure on the substrate.

16. The array substrate according to any one of claims 1 to 9, wherein, Each set of ruler patterns also has two mark structures that correspond one-to-one with the two ruler structures, and the ruler structure is closer to the first splicing display area than the corresponding mark structure.

17. A liquid crystal panel, characterized by comprising: include: An array substrate as claimed in any one of claims 1 to 16, a counter substrate, and a liquid crystal layer between the array substrate and the counter substrate.

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