Superconducting Quantum Gate Circuit Generation Method Based on the Combination of FPGA and Host Computer

Abstract

The present invention discloses a method for generating superconducting quantum gate circuits based on the combination of FPGA and host computer. In the host computer, a parameter generation module receives instructions and external parameters, performs operations on the division in the analytical formula for generating the waveform corresponding to the quantum gate included in the instructions, and forms an input parameter group by combining the operation results with the external parameters required for the FPGA to generate waveform data, and sends the input parameter group to the FPGA; in the FPGA, a parameter parsing module parses the input parameter group to obtain the marker information of the quantum gate circuit, and transmits the input parameter group to the corresponding waveform generation module according to the marker information. The waveform generation module uses the analytical formula for generating the waveform corresponding to the quantum gate corresponding to the input parameter group to generate waveform data, and sends it to the corresponding conversion branch in the AWG; in the AWG, a DAC converter converts the waveform data into an analog microwave signal, thereby generating a quantum gate circuit. The advantage is that the total time consumption for generating the quantum gate circuit is less, and the experimental efficiency of superconducting quantum computing can be effectively improved.

Description

Technical Field

[0001] The present invention relates to a technique for generating superconducting quantum gate circuits, and in particular to a method for generating superconducting quantum gate circuits based on the combination of an FPGA (Field Programmable Gate Array, programmable logic device) and a host computer. Background Art

[0002] In a superconducting quantum computing system, different superconducting qubits are controlled and measured by different quantum gate circuits. A quantum gate circuit is composed of several quantum gate operations. For example, superconducting qubits are controlled by X gates, H gates, etc., and the state of superconducting qubits is read by measurement gates. In a superconducting quantum computing system, a quantum gate is essentially a segment of analog microwave signal, and the analog microwave signal needs to be generated by an electronic instrument. Since the waveform generation analytical formula corresponding to the quantum gate contains a large number of transcendental functions, the current common practice is to use a computer programming language, such as Python, etc., to sequentially calculate all the digital waveform data corresponding to each quantum gate circuit through the host computer CPU, and then transmit it to the digital-to-analog conversion chip through the network to convert it into an analog microwave signal. This method is simple and easy to implement, but in a future large-scale superconducting quantum computing system, the number of superconducting qubits will reach hundreds or thousands, and the types and quantities of quantum gates to be generated are extremely large. The original serial-structured CPU will take a large amount of time in calculating quantum gate data. Moreover, transmitting quantum gate data through the network will also consume a large amount of time, greatly affecting the experimental efficiency of superconducting quantum computing. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a method for generating superconducting quantum gate circuits based on the combination of an FPGA and a host computer, which has less total time consumption for generating quantum gate circuits and can effectively improve the experimental efficiency of superconducting quantum computing.

[0004] The technical solution adopted by the present invention to solve the above technical problems is as follows: A method for generating superconducting quantum gate circuits based on the combination of an FPGA and a host computer, characterized by comprising the following steps:

[0005] Step 1: A parameter generation module is set in the host computer; the user selects instructions from the instruction set according to the sequence of each quantum gate in the quantum gate circuit to be generated and inputs them into the parameter generation module, each instruction contains a quantum gate information and the label information of the quantum gate circuit acted by the quantum gate; the parameter generation module receives the instructions from the user and a large number of external parameters obtained from the superconducting quantum computer; the parameter generation module performs a division operation on the waveform generation analytical expression corresponding to the quantum gate contained in the received instruction, and saves the operation result in the form of a parameter, together with the external parameters required for the FPGA to generate waveform data selected from all the received external parameters to form a group of input parameter groups, and the input parameter group is attached with the label information of the quantum gate circuit acted on; the parameter generation module transmits the input parameter group to the DDR memory connected to the FPGA for storage;

[0006] Step 2: A parameter parsing module and a plurality of waveform generating modules are set in the FPGA, the number of the waveform generating modules is equal to the number of quantum gate circuits to be generated, and each waveform generating module contains waveform generating analytical expressions corresponding to all possible quantum gates required by the corresponding quantum gate circuit; the parameter parsing module reads the input parameter group from the DDR memory external to the FPGA; the parameter parsing module parses the input parameter group to obtain the tag information of the quantum gate circuit to which it is attached; the parameter parsing module transmits the input parameter group to a corresponding waveform generating module according to the tag information of the quantum gate circuit to which it is attached; the waveform generating module receives the input parameter group; the waveform generating module generates waveform data according to the input parameter group and the waveform generating analytical expression corresponding to the quantum gate corresponding to the input parameter group; the waveform generating module transmits the waveform data to the DDR memory of a corresponding conversion branch in the AWG for storage;

[0007] Step 3: multiple conversion branches are set in the AWG, the number of the conversion branches is equal to the number of quantum gate circuits to be generated, each conversion branch includes a DDR memory and a DAC converter; the DAC converter reads the waveform data from the DDR memory of the conversion branch where it is located; the DAC converter converts the waveform data into an analog microwave signal, so that the quantum gate circuit can be generated.

[0008] In step 2, if the waveform generating analytical expression used in the process of generating waveform data contains other transcendental functions besides trigonometric functions, the transcendental function is processed as follows:

[0009] Step 2.1: Set a curvature traversal interval [0,0.5], and use the starting curvature value 0 in the curvature traversal interval [0,0.5] as the current curvature;

[0010] Step 2.2: Divide the transcendental function into two partial functions according to the current curvature. For one partial function, its curvature is greater than the current curvature, and for the other partial function, its curvature is less than or equal to the current curvature;

[0011] Step 2.3: Evenly divide each partial function into several segments according to the amount of resources allocated to the waveform generation module containing the transcendental function in the FPGA. The larger the amount of resources allocated, the more segments are divided.

[0012] Step 2.4: Sample each segment in the partial function whose curvature is less than or equal to the current curvature, and then use the least squares method to fit the sampled data into a linear function, i.e., a first-order function; sample each segment in the partial function whose curvature is greater than the current curvature, and then use the least squares method to fit the sampled data into a quadratic function;

[0013] Step 2.5: Combine all the first-order functions corresponding to the segments in the partial function whose curvature is less than or equal to the current curvature into a piecewise function. Similarly, combine all the quadratic functions corresponding to the segments in the partial function whose curvature is greater than the current curvature into a piecewise function; then combine the two piecewise functions into an integral piecewise function;

[0014] Step 2.6: Calculate the mean square error between the transcendental function and its corresponding integral piecewise function at the current curvature;

[0015] Step 2.7: Take the next curvature value in the curvature traversal interval [0, 0.5] with a step of 0.05 as the current curvature, and then return to Step 2.2 to continue execution until the curvature values in the curvature traversal interval [0, 0.5] are traversed completely, obtaining the mean square error between the transcendental function and its corresponding integral piecewise function at each curvature. Then select the integral piecewise function with the smallest mean square error as the final piecewise function corresponding to the transcendental function.

[0016] In the said Step 1, the instruction set contains multiple instructions, each instruction represents a quantum gate in a quantum gate circuit to be generated, there are multiple quantum gate circuits to be generated, and each quantum gate circuit has several quantum gates.

[0017] Compared with the prior art, the advantages of the present invention are as follows:

[0018] 1) Compared with the serial calculation and data transmission of the original CPU, the method of the present invention is improved to use parallel calculation and transmission of the FPGA. When there are more quantum gates required, it can significantly improve the waveform data generation speed, shorten the data transmission time. At the same time, the host computer no longer transmits specific waveform data, but only transmits a small amount of parameters for the FPGA to calculate, greatly reducing the amount of data transmitted and shortening the data transmission time.

[0019] 2) Since the host computer no longer takes charge of waveform calculation and waveform data transmission, parameter transmission, waveform data calculation, and quantum gate circuit output can be carried out in a pipeline form, greatly reducing the total time consumption for generating quantum gate circuits and effectively improving the experimental efficiency of superconducting quantum computing.

[0020] 3) By approximating transcendental functions with linear and quadratic functions, the use of look-up tables is reduced, and the consumption of memory resources in the FPGA is decreased.

[0021] 4) Since the FPGA has rich standard input / output ports and good scalability, standard communication can be carried out with other devices, facilitating expansion and transplantation with other electronic instruments.

[0022] 5) The method of the present invention is applicable to superconducting quantum computing experiments. Description of the Drawings

[0023] Figure 1 is the overall implementation flow block diagram of the method of the present invention;

[0024] Figure 2 is the schematic diagram of the time consumption of the traditional method of only using the host computer to generate waveform data;

[0025] Figure 3 is the schematic diagram of the time consumption of the method of the present invention. Detailed Embodiment

[0026] The present invention will be further described in detail below in conjunction with the embodiments of the drawings.

[0027] A method for generating superconducting quantum gate circuits based on the combination of FPGA and host computer proposed by the present invention, the overall implementation flow block diagram of which is as Figure 1 shown, and it includes the following steps:

[0028] Step 1: A parameter generation module is set in the host computer; the user selects instructions from the instruction set according to the sequence of each quantum gate in the quantum gate circuit to be generated and inputs them into the parameter generation module. Each instruction contains a quantum gate information and the marking information of the quantum gate circuit on which the quantum gate acts; the parameter generation module receives the instructions from the user and a large number of external parameters obtained from the superconducting quantum computer; the parameter generation module performs operations on the division in the waveform generation analytical formula corresponding to the quantum gate contained in the received instructions, and saves the operation results in the form of parameters. Together with the external parameters required for the FPGA (Field Programmable Gate Array) to generate waveform data selected from all the received external parameters, they form a set of input parameter groups, and the input parameter groups are appended with the marking information of the quantum gate circuit on which they act; the parameter generation module transmits the input parameter groups to the DDR (Double Data Rate) memory externally connected to the FPGA for storage.

[0029] Here, each quantum gate has its corresponding waveform generation analytical formula. Utilizing the characteristic of the host computer being convenient for performing division operations, the division operation in the waveform generation analytical formula is performed in advance in the host computer, and the operation results are saved in the form of parameters. Since the FPGA has a natural disadvantage in division operations, the host computer is used to complete the division operation in the waveform generation analytical formula and send it to the FPGA in the form of parameters. This not only avoids the large amount of resources required for the FPGA to perform division operations but also reduces the number of parameters of the waveform generation analytical formula that need to be transmitted, further reducing the time consumption; the function of the parameter generation module is as described above, and how the parameter generation module realizes the above functions can be achieved when the functions are clear.

[0030] In this specific embodiment, in Step 1, the instruction set contains multiple instructions, each instruction represents a quantum gate in one of the quantum gate circuits to be generated, there are multiple quantum gate circuits to be generated, and each quantum gate circuit has several quantum gates. During implementation, the instruction set usually contains 30 single-bit quantum gate instructions. Through the method of the present invention, a complete waveform description of one quantum gate circuit can be realized, and multi-channel simultaneous generation is supported.

[0031] Step 2: A parameter parsing module and a plurality of waveform generating modules are set in the FPGA, the number of the waveform generating modules is equal to the number of quantum gate circuits to be generated, and each waveform generating module contains waveform generating analytical expressions corresponding to all possible quantum gates required by the corresponding quantum gate circuit; the parameter parsing module reads the input parameter group from the DDR memory external to the FPGA; the parameter parsing module parses the input parameter group to obtain the tag information of the quantum gate circuit to which it is attached; the parameter parsing module transmits the input parameter group to a corresponding waveform generating module according to the tag information of the quantum gate circuit to which it is attached; the waveform generating module receives the input parameter group; the waveform generating module generates waveform data according to the input parameter group and the waveform generating analytical expression corresponding to the quantum gate corresponding to the input parameter group; the waveform generating module transmits the waveform data to the DDR memory of a corresponding conversion branch in the AWG for storage.

[0032] Here, the functions of the parameter parsing module are as described above, and how the parameter parsing module implements the above functions is achievable when the functions are clear; the waveform generation module is mainly used to generate waveform data, which is achievable during implementation.

[0033] In this specific embodiment, in step 2, if the waveform generation analytical expression used in the process of generating waveform data contains other transcendental functions besides trigonometric functions, the transcendental function is processed as follows:

[0034] Step 2.1: Set a curvature traversal interval [0,0.5], and use the starting curvature value 0 in the curvature traversal interval [0,0.5] as the current curvature.

[0035] Step 2.2: Divide the transcendental function into two parts according to the current curvature, one part of which has a curvature greater than the current curvature, and the other part of which has a curvature less than or equal to the current curvature.

[0036] Step 2.3: Divide each part of the function evenly into several segments according to the amount of resources allocated to the waveform generation module containing the transcendental function in the FPGA. The larger the amount of allocated resources, the more segments there are, so that the later approximate result will be more accurate; here, the segmentation intervals of the two parts of the function are roughly the same.

[0037] Step 2.4: Sample each segment of a part of the function whose curvature is less than or equal to the current curvature, and then use the least squares method to fit the sampled data into a linear function, that is, a linear function; sample each segment of a part of the function whose curvature is greater than the current curvature, and then use the least squares method to fit the sampled data into a quadratic function.

[0038] Step 2.5: Combine the linear functions corresponding to all segments in the part of the function whose curvature is less than or equal to the current curvature into a piecewise function. Similarly, combine the quadratic functions corresponding to all segments in the part of the function whose curvature is greater than the current curvature into a piecewise function. Then combine the two piecewise functions into a whole piecewise function.

[0039] Step 2.6: Calculate the mean square error between the transcendental function and its corresponding piecewise function at the current curvature.

[0040] Step 2.7: Take the next curvature value in the curvature traversal interval [0,0.5] as the current curvature with a step of 0.05, and then return to step 2.2 to continue executing until the curvature values ​​in the curvature traversal interval [0,0.5] are traversed, and the mean square error between the transcendental function and its corresponding integer piecewise function at each curvature is obtained, and then the integer piecewise function with the smallest mean square error is selected as the final piecewise function corresponding to the transcendental function.

[0041] Step 3: multiple conversion branches are set in the AWG (Arbitrary Waveform Generator), the number of the conversion branches is equal to the number of quantum gate circuits to be generated, each conversion branch includes a DDR memory and a DAC (Digital-to-Analog Converter) converter; the DAC converter reads the waveform data from the DDR memory of the conversion branch where it is located; the DAC converter converts the waveform data into an analog microwave signal, so that the quantum gate circuit can be generated.

[0042] In order to illustrate that the method of the present invention consumes less time in generating a quantum gate circuit, a comparison is made with the time consumed in generating a quantum gate circuit in the prior art.

[0043] Figure 2 A time consumption diagram of the traditional method that only uses the host computer to generate waveform data is given. In the traditional method, waveform data generation, transmission and output are serial. The time when the host computer generates waveform data is recorded as t1, the time when the host computer transmits waveform data to DDR is t2, and the time when the waveform data is output to AWG is t3. The total time consumption is t1+t2+t3. With the increase in the number of superconducting quantum bits and the number of controlled quantum gates, t1 and t2 will also increase, which greatly affects the total time consumption.

[0044] The method of the present invention for the problem of too long waveform data generation time t1 is as follows: Utilizing the parallelism of the FPGA, multiple waveform generation modules are used to generate different waveform data simultaneously. The method of the present invention for the problem of too long waveform data transmission time t2 is as follows: Instead of transmitting waveform data, the host computer directly transfers parameters to the FPGA after simple parameter processing, and at the same time increases the transmission bandwidth and speeds up the transmission speed. The method of the present invention for serial waveform data generation, transmission, and output is changed to be completed in a pipelined manner.

[0045] Figure 3 The time consumption diagram of the method of the present invention is given. The parameter processing and transmission time is denoted as t1, the FPGA waveform data generation time is denoted as t2, and the time for outputting waveform data to the AWG is denoted as t3. Under the same quantum gate circuit, t3 remains unchanged. Each part is in a pipelined manner, that is, except for the first instruction and the last instruction, waveform data generation, transmission, and output are all parallel during the remaining time. Through the optimization of the method of the present invention, t1 and t2 can be reduced to within t3, so that the total time consumption is t3.

Claims

1. A superconducting quantum gate circuit generation method based on the combination of FPGA and host computer, characterized in that It includes the following steps: Step 1: A parameter generation module is set in the host computer; the user selects instructions from the instruction set according to the sequence of each quantum gate in the quantum gate circuit to be generated and inputs them into the parameter generation module. Each instruction contains a quantum gate information and the marker information of the quantum gate circuit on which the quantum gate acts; the parameter generation module receives the instructions from the user and a large number of external parameters obtained from the superconducting quantum computer; the parameter generation module performs operations on the division in the waveform generation analytical formula corresponding to the quantum gate contained in the received instructions, and saves the operation results in the form of parameters. Together with the external parameters required for the FPGA to generate waveform data selected from all the received external parameters, they form a set of input parameter groups, and the input parameter groups are attached with the marker information of the quantum gate circuit on which they act; the parameter generation module transmits the input parameter groups to the DDR memory externally connected to the FPGA for storage; Step 2: A parameter parsing module and multiple waveform generation modules are set in the FPGA. The number of waveform generation modules is equal to the number of quantum gate circuits to be generated. Each waveform generation module contains all possible waveform generation analytical formulas corresponding to the quantum gates required for the corresponding quantum gate circuit; the parameter parsing module reads the input parameter groups from the DDR memory externally connected to the FPGA; the parameter parsing module parses the input parameter groups to obtain the attached marker information of the quantum gate circuit on which they act; the parameter parsing module transmits the input parameter groups to a corresponding waveform generation module according to the marker information of the quantum gate circuit on which they act; the waveform generation module receives the input parameter groups; the waveform generation module generates waveform data according to the input parameter groups and uses the waveform generation analytical formula corresponding to the quantum gate corresponding to the input parameter groups; The waveform generation module transmits the waveform data to the DDR memory of a corresponding conversion branch in the AWG for storage; Step 3: Multiple conversion branches are set in the AWG. The number of conversion branches is equal to the number of quantum gate circuits to be generated. Each conversion branch includes a DDR memory and a DAC converter; the DAC converter reads the waveform data from the DDR memory of the conversion branch where it is located; the DAC converter converts the waveform data into an analog microwave signal, so as to be able to generate a quantum gate circuit.

2. The superconducting quantum gate circuit generation method based on the combination of FPGA and host computer according to claim 1, characterized in that In the above-mentioned Step 2, when other transcendental functions except trigonometric functions are included in the waveform generation analytical formula used in the process of generating waveform data, the following processing is performed on this transcendental function: Step 2.1: Set a curvature traversal interval [0, 0.5], and take the starting curvature value 0 in the curvature traversal interval [0, 0.5] as the current curvature; Step 2.2: Divide the transcendental function into two partial functions according to the current curvature. The curvature of one partial function is greater than the current curvature, and the curvature of the other partial function is less than or equal to the current curvature; Step 2.3: Divide each partial function into several segments evenly according to the resource amount allocated to the waveform generation module containing the transcendental function in the FPGA. The larger the allocated resource amount, the more segments are divided Step 2.4: Sample each segment in a part of the function whose curvature is less than or equal to the current curvature, and then use the least squares method to fit the sampled data into a linear function, i.e., a first-order function; sample each segment in a part of the function whose curvature is greater than the current curvature, and then use the least squares method to fit the sampled data into a quadratic function; Step 2.5: Combine all the first-order functions corresponding to the segments in a part of the function whose curvature is less than or equal to the current curvature into a piecewise function. Similarly, combine all the quadratic functions corresponding to the segments in a part of the function whose curvature is greater than the current curvature into a piecewise function; then combine the two piecewise functions into an entire piecewise function; Step 2.6: Calculate the mean square error between the transcendental function and its corresponding entire piecewise function at the current curvature; Step 2.7: Take the next curvature value in the curvature traversal interval [0, 0.5] with a step of 0.05 as the current curvature, and then return to Step 2.2 to continue execution until the curvature values in the curvature traversal interval [0, 0.5] are all traversed, obtaining the mean square error between the transcendental function and its corresponding entire piecewise function at each curvature. Then select the entire piecewise function with the minimum mean square error as the final piecewise function corresponding to the transcendental function.

3. The superconducting quantum gate circuit generation method based on the combination of FPGA and host computer according to claim 1 or 2, characterized in that In the said Step 1, the instruction set contains multiple instructions, each instruction representing a quantum gate in a quantum gate circuit to be generated. There are multiple quantum gate circuits to be generated, and each quantum gate circuit has several quantum gates.

Images