A dynamic current steering DAC and its control method

Abstract

The present invention provides a dynamic current steering DAC, belonging to the field of digital-to-analog conversion technology, comprising: a switch device SW4, one end of which is electrically connected to a power supply VDD or ground GND, and the other end of which is electrically connected to the source of a current source; a switch device SW5 provided at the gate of a MOS transistor in the current source, one end of which is electrically connected to a bias voltage source VBIAS, and the other end of which is electrically connected to the gate of the MOS transistor; a switch device SW1 provided at the output OUTP terminal of the current steering, a switch device SW2 provided at the output OUTN terminal of the current steering, and a switch device SW3 further provided at the output terminal of the current steering. By adding a current source on / off control circuit, the present invention achieves a circuit structure that shuts down the current source during periods when the current source has no valid output, thereby suppressing noise and reducing circuit power consumption.

Description

Technical Field

[0001] The present invention belongs to the technical field of digital-to-analog conversion, and in particular relates to a dynamic current steering DAC and a control method thereof. Background Art

[0002] Current steering DAC (Digital to Analog Data Converter) is a circuit structure that converts digital to analog output. Figure 1 Traditional current-steering DACs use multiple current sources, with digital signals controlling MOS switches to determine whether the current sources flow to OUTP or OUTN. For example, in an 8-source DAC, if the digital control signal is 0, all eight current sources flow to OUTN, leaving no current at OUTP. If the control signal is 4, four current sources flow to OUTP, and the remaining four flow to OUTN. If the digital signal is 8, all eight current sources flow to OUTP, leaving no current at OUTN. This ensures that the output current is completely controlled by the digital signal, with the output current proportional to the digital control signal.

[0003] Since the actual effective output signal is a differential signal, that is, the current at OUTP minus the current at OUTN, the output differential signal is 0. Although the output signal is 0, the current source has current noise. Noise is an uncorrelated random signal, and the noise of the eight current sources will be superimposed at the output.

[0004] When the current-steering DAC is not outputting current, half of the current source flows to OUTP, and the other half flows to OUTN. The total output current is OUTP - OUTN = 0. Although there is no output signal at this time, all current sources contribute noise and all current sources have power loss, resulting in not only high noise but also high power loss. Summary of the Invention

[0005] In view of the above-mentioned problems of large power loss and noise superposition, the present invention proposes a dynamic current steering and a control method thereof, which can reduce power loss while controlling noise.

[0006] The specific solution of the present invention is: a dynamic current steering DAC, comprising: a switch device SW4, one end of the switch device SW4 is electrically connected to the current source, and the other end of the switch device SW4 is electrically connected to the source of the MOS transistor;

[0007] The gate of the MOS transistor is provided with a switch device SW5, one end of the switch device SW5 is electrically connected to the current source, and the other end of the switch device SW5 is electrically connected to the gate of the MOS transistor;

[0008] A switch device SW1 is provided in the output OUTP terminal of the current steering, a switch device SW2 is provided in the output OUTN terminal of the current steering, and a switch device SW3 is further provided at the output terminal of the current steering.

[0009] Furthermore, one end of the switch device SW3 is electrically connected to the output end of the current steering, and the other end of the switch device SW3 is electrically connected to the VCM end.

[0010] Furthermore, the current device M2 has a source electrically connected to the drain of the MOS tube M1, and a drain electrically connected to the output end of the current rudder.

[0011] Furthermore, the gate of the current device M2 is connected to the GND terminal, wherein a switch is set between the gate of the current device M2 and the GND terminal to control turning on or off;

[0012] The gate of the current device M2 is electrically connected to the V_CAS terminal, and a switch is provided between the gate of the current device M2 and the V_CAS terminal to control turning on or off.

[0013] Furthermore, the source of the current device M2 is electrically connected to the drain of the current device M1 , and the gate of the current device M1 is electrically connected to the VBIAS terminal via the switch device SW5 .

[0014] Furthermore, the switch device SW3 , the switch device SW4 and the switch device SW5 are all sequential logic control devices.

[0015] Based on the same inventive concept, the present invention also provides a dynamic current steering control method, comprising: controlling the switch device SW3, the switch device SW4 and the switch device SW5 through a timing control logic;

[0016] Before the current source is about to output to the OUTP terminal or the OUTN terminal, the switch device SW1 and the switch device SW2 are turned off, and the switch device SW3 is turned on;

[0017] The switching device SW5 is opened, and the switching device SW4 is closed to start the current source.

[0018] Furthermore, the current during the startup process is directed to the VCM terminal by closing the switch device SW3.

[0019] Furthermore, when the voltage of the current source is stabilized, the switch device SW5 is closed to electrically connect the gate of the MOS transistor to the current source, and the gate voltage is established to the VBIAS voltage.

[0020] Furthermore, when it is detected that the current source does not output in the next cycle, the switching device SW1 and the switching device SW2 are turned off, the switching device SW3 is turned on, and then the switching device SW5 is turned off, and then the switching device SW4 is turned off.

[0021] Beneficial effects of the present invention:

[0022] Add a control circuit to turn the current source on and off. Existing technology keeps the current source on regardless of whether it contributes a signal, resulting in constant power consumption. This invention achieves a circuit structure that turns off the current source when the current source is not generating any valid output, thereby reducing circuit power consumption.

[0023] Other features and advantages of the present invention will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures pointed out in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following is a brief introduction to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0025] Figure 1 shows a structural diagram of a current rudder according to the prior art;

[0026] Figure 2 Shows the structure diagram of the dynamic current rudder of the present invention;

[0027] Figure 3 The current steering structure diagram of the present invention is shown in which the current device M2 replaces the switch device SW4;

[0028] Figure 4 A schematic diagram of a dynamic current steering control method according to the present invention is shown;

[0029] Figure 5 shows a dynamic current steering control timing diagram of the present invention;

[0030] Figure 6 The dynamic current steering control timing diagram of the present invention is shown. DETAILED DESCRIPTION

[0031] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0032] It should be noted that the terms "first", "second" etc. in this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the application described herein. In this application, the directions or positional relationships indicated by the terms "upper", "lower", "left", "right", "front", "back", "top", "bottom", "inside", "outside", "center", "vertical", "horizontal", "lateral", "longitudinal" etc. are based on the directions or positional relationships shown in the accompanying drawings.

[0033] The embodiment of the present invention provides a dynamic current steering, see Figure 2 , comprising: a switching device SW4, one end of the switching device SW4 being electrically connected to the current source, and the other end of the switching device SW4 being electrically connected to the source of the MOS tube;

[0034] The gate of the MOS transistor is provided with a switch device SW5, one end of the switch device SW5 is electrically connected to the current source, and the other end of the switch device SW5 is electrically connected to the gate of the MOS transistor;

[0035] A switching device SW5 is added to the gate of the current source MOS transistor to shield the current source from any effects of the current source switch on the current source bias voltage. Before shutting down the current source, SW5 must be disconnected to ensure that the gate of the current source is disconnected from other current sources. While shutting down the current source in this way may cause fluctuations in the gate voltage of the current source, it will not cause fluctuations in the gate voltages of other current sources. Before turning on the current source, SW5 must be kept disconnected. After the gate voltage of the current source recovers, SW5 can be reconnected and closed. Because the gate of the current source is not charged or discharged during switching, there is only minimal leakage. Any gate voltage errors caused by leakage can be quickly passed through the closed SW5, stabilizing the gate control voltage of the current source.

[0036] A switch device SW1 is provided in the output OUTP terminal of the current steering, a switch device SW2 is provided in the output OUTN terminal of the current steering, and a switch device SW3 is further provided at the output terminal of the current steering.

[0037] Specifically, one end of the switch device SW3 is electrically connected to the output end of the current steering, and the other end of the switch device SW3 is electrically connected to the VCM end.

[0038] Since error current is introduced during the process of turning the current source off and on, it is necessary to connect the output to the VCM terminal through SW3 before turning it on and off. The VCM terminal has the function of collecting interference current that affects performance.

[0039] It should be noted that, to suppress noise and improve performance, a third switch is added to connect the signal to the VCM terminal, creating a three-state DAC. This three-state DAC has three states: State 1: Current output to OUTP, State 2: Current output to OUTN, and State 3: No current output. For example, when the digital signal is 4, four current sources originally flow to OUTP, and another four current sources flow to OUTN. Since the actual effective output signal is a differential signal—the current at OUTP minus the current at OUTN—the output differential signal is 0. Although the output signal is 0, the current sources are noisy, and noise is an uncorrelated random signal, so the noise from the eight current sources is added to the output. By adding a third switch, the current sources that do not contribute to the effective output signal are switched to the VCM terminal via switch device SW3. Therefore, when the digital signal is 4, the number of current sources at OUTP and OUTN is zero, and no current sources contribute noise to the output, significantly reducing noise. However, power loss still exists.

[0040] In some optional embodiments, see Figure 3 , one way to realize the current source Cs is Figure 3 The current device M1 and the current device M2, specifically, the present invention also includes: a current device M2, the source of the current device M2 is electrically connected to the drain of the MOS tube M1, and the drain of the current device M2 is electrically connected to the current steering output end.

[0041] Specifically, the gate of the current device M2 is connected to the GND terminal, wherein a switch is provided between the gate of the current device M2 and the GND terminal to control turning on or off;

[0042] The gate of the current device M2 is electrically connected to the V_CAS terminal, and a switch is provided between the gate of the current device M2 and the V_CAS terminal to control turning on or off.

[0043] Furthermore, the source of the current device M2 is electrically connected to the drain of the current device M1 , and the gate of the current device M1 is electrically connected to the VBIAS terminal via the switch device SW5 .

[0044] Specifically, in order to reduce power consumption, it is necessary to completely turn off the current source that does not contribute to the effective signal, which can reduce noise and power consumption. However, there are side effects when directly turning off the current source. The opening and closing process of the current source will interfere with the bias voltage of the current source, causing the output current of the current source to be interfered with by the signal or noise, and ultimately leading to serious nonlinearity or noise. The current device M2 is both a cascode device in the original current mirror and is reused as a current switch. When the gate terminal of the current device M2 is connected to GND, the current device M2 is turned off, thereby turning off the entire current source. When the gate terminal of the current device M2 is connected to V_CAS, the current device M2 works as a cascode device of the current source. In the technical solution of the present invention, the current device M2 also plays the role of turning off the current source, and has the same effect as the switch device SW4.

[0045] Furthermore, the switch device SW3 , the switch device SW4 and the switch device SW5 are all sequential logic control devices.

[0046] Based on the same inventive concept, the present invention also provides a dynamic current steering control method, see Figure 4 , including: controlling the switch device SW3, the switch device SW4 and the switch device SW5 through the timing control logic;

[0047] Before the current source is about to output to the OUTP terminal or the OUTN terminal, the switch device SW1 and the switch device SW2 are turned off, and the switch device SW3 is turned on;

[0048] The switching device SW5 is opened, and the switching device SW4 is closed to start the current source.

[0049] Furthermore, the current during the startup process is directed to the VCM terminal by closing the switch device SW3.

[0050] Specifically, in the timing control logic, before the current source is about to output to the OUTP terminal or the OUTN terminal, keep SW1 / SW2 open, SW3 closed, SW5 open, and then close SW4 to start the current source. At this time, since SW3 is closed, the current in the startup process will be directed to the VCM terminal.

[0051] Furthermore, when the voltage of the current source is stabilized, the switch device SW5 is closed to electrically connect the gate of the MOS transistor to the current source, and the gate voltage is established to the VBIAS voltage.

[0052] In some optional embodiments, when it is detected that the current source has no output in the next cycle, the switching device SW1 and the switching device SW2 are opened, the switching device SW3 is closed, and then the switching device SW5 is opened, and then the switching device SW4 is opened.

[0053] Specifically, if it is detected that the current source has no output in the next cycle, after the switch devices SW1 and SW2 have been disconnected and the switch device SW3 has been closed, the timing logic controller disconnects SW5 to protect VBIAS, and then disconnects the switch device SW4, thereby turning off the current source and reducing power consumption.

[0054] Based on the current source of the traditional current steering DAC, in the current steering DAC, each current is required to remain stable, so VBIAS should also remain stable and cannot be disturbed. Add a switching device SW5 to the gate of the current source, and disconnect the connection between the current source gate and the bias voltage before turning off the current source or starting the current source. If there is no gate switch, then when the current source is turned off or on, the gate voltage change will affect the gate control voltage VBIAS of other current sources, thereby interfering with the output current of other current sources, and ultimately affecting the output performance. The output current is equal to VBIAS*gm. In other words, the current of the current source is proportional to VBIAS.

[0055] A switch device SW4 is added to the current path of the current source to cut off the current. The current source may be composed of multiple devices. Adding a switch device SW4 at any location in the internal circuit path can achieve the purpose of shutting down the current source and is protected by this patent. This switch can also reuse the CASCODE device of the current source or the switch device SW3. As long as it can shut down the current source, it will be sufficient.

[0056] See also Figure 5 and Figure 6The timing diagram of the present invention illustrates its operation. When the logic detects the need to shut down the current source, at time T1, switch SW1 or SW2 is closed while switch SW3 is opened, directing the current source's output to the VCM port. This prevents the glitch current caused by turning the current source off and on from being output to the active output port. After switch SW1 or SW2 is fully opened and switch SW3 is fully closed, switch SW5 is opened at time T2 to ensure that subsequent on / off operations do not interfere with the VBIAS voltage. Because the VBIAS voltage is the bias voltage for all current sources, fluctuations in the VBIAS voltage can affect all other operating current sources. Reducing fluctuations at the VBIAS terminal is crucial for achieving the desired DAC performance. After switch SW5 is fully closed, switch SW4 is opened at time T3, completely cutting off the current path for the current source and saving power. While the current source is off, switches SW1 / SW2 / SW5 remain open, while switch SW3 remains closed. When the logic detects that the current source needs to be turned on, it first maintains the open state for switches SW1 / SW2 / SW5 and the closed state for switch SW3. At time T4, switch SW4 is closed, connecting the current path of the current source and activating the current source. Due to the charge retained at the gate of MOS transistor M1, the gate voltage of MOS transistor M1 quickly and automatically recovers to a voltage close to VBIAS after the current source is turned on. After waiting for the gate voltage of M1 to fully establish, switch SW5 is closed at time T5, ensuring that the gate voltage of M1 is completely equal to VBIAS and the current flowing through M1 is at the correct level. At time T6, switch SW3 is opened, and a digital control signal is applied to turn on one of switches SW1 and SW2, returning the current source to its normal output signal state. It should be noted that implementing this function through electronic devices with similar switching functions, such as N-type and P-type MOS transistors, IGBTs, and thyristors, falls within the scope of protection of the present invention.

[0057] In addition to the switching device that controls the current output to the current steering DAC output terminal (OUTP or OUTN), the current source also requires a switching device SW3 that outputs the current steering DAC current to the VCM port. The function of the VCM port is to drain the interference current generated by the current source during the startup or shutdown process, so that the current source can be established normally without affecting the performance of the current steering DAC output terminal.

[0058] The present invention adds a control circuit to turn the current source on and off. Conventional technology requires the current source to remain on regardless of whether it contributes to a signal, resulting in constant power consumption. This invention achieves a circuit structure that turns off the current source during periods of inactive output, thereby reducing circuit power consumption.

[0059] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A dynamic current rudder, characterized in that: include: A switch device SW4, one end of the switch device SW4 is electrically connected to the power supply VDD or the ground terminal GND, and the other end of the switch device SW4 is electrically connected to the source of the MOS transistor; The gate of the MOS transistor is provided with a switch device SW5, one end of the switch device SW5 is electrically connected to the current source bias voltage VBIAS, and the other end of the switch device SW5 is electrically connected to the gate of the MOS transistor; Before turning off the current steering through SW4, disconnect SW5 to make the gate of the MOS tube float and not be charged or discharged; After turning on the current steering through SW4 and waiting for the gate voltage to recover, close SW5 to enable the bias voltage to connect and stabilize the gate voltage of the MOS tube; A switch device SW1 is provided in the output OUTP terminal of the current steering, a switch device SW2 is provided in the output OUTN terminal of the current steering, and a switch device SW3 is further provided at the output terminal of the current steering.

2. The current steering according to claim 1, characterized in that: One end of the switch device SW3 is electrically connected to the output end of the current steering, and the other end of the switch device SW3 is electrically connected to the VCM end.

3. The current steering according to claim 1 or 2, characterized in that: include: The current device M2 has a source electrically connected to the drain of the MOS tube M1 , and a drain electrically connected to the output terminal of the current rudder.

4. The electric current steering according to claim 3, characterized in that: include: The gate of the current device M2 is connected to the GND terminal, wherein a switch is set between the gate of the current device M2 and the GND terminal to control turning on or off; The gate of the current device M2 is electrically connected to the V_CAS terminal, and a switch is provided between the gate of the current device M2 and the V_CAS terminal to control turning on or off.

5. The current steering according to claim 4, characterized in that: include: The source of the current device M2 is electrically connected to the drain of the current device M1 , and the gate of the current device M1 is electrically connected to the VBIAS terminal via the switch device SW5 .

6. The electric current steering according to claim 3, characterized in that: The switch device SW3 , the switch device SW4 and the switch device SW5 are all sequential logic control devices.

7. A dynamic current steering control method for controlling the current steering according to any one of claims 1 to 6, characterized in that: include: Controlling the switch device SW3, the switch device SW4 and the switch device SW5 through the timing control logic; Before the current source is about to output to the OUTP terminal or the OUTN terminal, the switch device SW1 and the switch device SW2 are turned off, and the switch device SW3 is turned on; Keep the switch device SW5 in the off state to ensure that the current source gate is in a floating state, and then close the switch device SW4 to start the current source to ensure that the current source gate is not charged or discharged during the current startup process; After the current source is started, the gate voltage will automatically return to the VBIAS voltage. At this time, the switch SW5 is closed to maintain the gate voltage.

8. The control method according to claim 7, characterized in that: include: The current during startup is directed to the VCM terminal by closing the switch device SW3.

9. The control method according to claim 8, characterized in that: include: When the voltage of the current source is stable, the switch device SW5 is closed to electrically connect the gate of the MOS transistor to the current source, and the gate voltage is established to the VBIAS voltage.

10. The control method according to claim 8, characterized in that: include: When it is detected that the current source does not output in the next cycle, the switching device SW1 and the switching device SW2 are turned off, the switching device SW3 is closed, and then the switching device SW5 is turned off, and then the switching device SW4 is turned off.

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