Method of forming a photoelectric sensor

Abstract

A forming method of a photoelectric sensor, the forming method comprising: providing a pixel substrate, including opposite first and second surfaces, the pixel substrate including a light-sensitive region and a lead region, the light-sensitive region including a plurality of pixel unit regions, at least one of which is used as a preset pixel unit region, the second surface being formed with an interconnection layer, and isolation grooves being formed between the pixel unit regions; forming an insulating layer on the first surface outside the isolation grooves, the insulating layer being formed with a first opening communicating with the isolation grooves and a ground trench in the preset pixel unit region and exposing the pixel substrate; forming an isolation structure in the isolation grooves and the first opening, the isolation structure including a conductive layer, and forming a ground line in the ground trench and in contact with the pixel substrate of the preset pixel unit region; and forming a metal mesh on the isolation structure and in contact with the conductive layer and the ground line. The embodiments of the present application are beneficial to simplify the process flow and reduce the number of masks.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and more particularly to a method for forming a photoelectric sensor. Background Technology

[0002] A photoelectric sensor is a device that converts light signals into electrical signals. Its working principle is based on the photoelectric effect, which refers to the phenomenon that when light shines on certain materials, the electrons of the materials absorb the energy of the photons and produce corresponding electrical effects.

[0003] For example, CCD (Charge Coupled Device) image sensors and CMOS image sensors, widely used in digital cameras and other electro-optical devices, both utilize photoelectric conversion to convert optical images into electrical signals and output digital images. ToF (Time of Flight) distance sensors, such as DTOF (Direct Time of Flight) sensors, record the time between the emission and detection of a light pulse, converting the time difference into distance information. This technology can be used in various ranging scenarios, including autonomous driving, robotic vacuum cleaners, and VR (Virtual Reality) / AR (Augmented Reality) modeling. Summary of the Invention

[0004] The problem solved by the embodiments of the present invention is to provide a method for forming a photoelectric sensor, which helps to simplify the process flow and reduce the number of photomasks.

[0005] To address the aforementioned problems, this invention also provides a method for forming a photoelectric sensor, comprising: providing a pixel substrate, including a first surface and a second surface opposite to each other, the pixel substrate including a photosensitive area and a lead area, the photosensitive area including a plurality of pixel unit areas, wherein at least one pixel unit area is used as a preset pixel unit area; forming an interconnect layer on the second surface; forming an isolation trench between the pixel unit areas; forming an insulating layer on the first surface outside the isolation trench, the insulating layer having a first opening communicating with the isolation trench and a grounding trench located in the preset pixel unit area and exposing the pixel substrate; forming an isolation structure within the isolation trench and the first opening, the isolation structure including a conductive layer, and forming a grounding wire in the grounding trench that contacts the pixel substrate of the preset pixel unit area; forming a metal mesh on the isolation structure that contacts the conductive layer and the grounding wire; and forming a pad layer located above the interconnect layer, the pad layer being connected to the interconnect layer of the lead area.

[0006] Compared with the prior art, the technical solution of the embodiments of the present invention has the following advantages:

[0007] In the photoelectric sensor formation method provided by the present invention, in the same step, a first opening communicating with the isolation trench is formed in the insulating layer, and a grounding trench exposing the pixel substrate is formed in the insulating layer of the preset pixel unit area. Compared with the scheme of first forming the isolation structure in the isolation trench and then forming the grounding trench, the present invention is beneficial to simplifying the process flow, reducing the number of photomasks, thereby saving process costs and improving process efficiency. Attached Figure Description

[0008] Figures 1 to 9 This is a schematic diagram of the structure corresponding to each step in a method for forming a photoelectric sensor;

[0009] Figures 10 to 22 This is a schematic diagram of the structure corresponding to each step in one embodiment of the method for forming the photoelectric sensor of the present invention;

[0010] Figures 23 to 25 This is a schematic diagram of the structure corresponding to each step in another embodiment of the method for forming the photoelectric sensor of the present invention;

[0011] Figure 26 and Figure 27 This is a schematic diagram of the structure corresponding to each step in another embodiment of the method for forming the photoelectric sensor of the present invention. Detailed Implementation

[0012] The current process for fabricating photoelectric sensors is quite complex and requires a large number of photomasks. This paper analyzes the reasons why the performance of photoelectric sensors needs improvement, using one method of photoelectric sensor fabrication as an example. Figures 1 to 9 This is a schematic diagram of the structure corresponding to each step in the formation method of a photoelectric sensor.

[0013] refer to Figure 1 A pixel substrate 800 is provided, including a first surface 801 and a second surface 802 opposite to each other. The pixel substrate 800 includes a photosensitive area 800P and a lead area 800N surrounding the photosensitive area 800P. The photosensitive area 800P includes an array of pixel unit areas, wherein at least one pixel unit area is used as a preset pixel unit area 800px. A dielectric layer 820 is formed on the second surface 802, and an interconnect layer 845 is formed in the dielectric layer 820. An isolation trench 870 is formed between the pixel unit areas, penetrating the pixel substrate 800. A light trapping groove 850 is also formed in the first surface 801 of the pixel unit area.

[0014] refer to Figure 2A first insulating layer 821 is formed on the first surface 801, the first insulating layer 821 covers the light trapping groove 850 and the first surface 801, and seals the top of the isolation trench 870.

[0015] refer to Figure 3 Remove the first insulating layer 821 located on top of the isolation trench 870.

[0016] refer to Figure 4 An isolation structure 871 is formed within the isolation trench 870. The top of the isolation structure 871 is flush with the top of the first insulating layer 821. The isolation structure 871 includes a conductive layer.

[0017] refer to Figure 5 A second insulating layer 872 is formed on the isolation structure 871 and the insulating layer 821.

[0018] refer to Figure 6 Remove the first insulating layer 821 and the second insulating layer 872 located in the preset pixel unit area of ​​800px, and form a grounding trench 843 in the first insulating layer 821 and the second insulating layer 872 in the preset pixel unit area of ​​800px to expose the bottom of the pixel base 800.

[0019] refer to Figure 7 Remove the second insulating layer 872 located on top of the isolation structure 871, and form an opening 844 in the second insulating layer 872 to expose the isolation structure 871.

[0020] refer to Figure 8 A grounding wire 851 is formed in the grounding trench 843 to contact the pixel substrate 800 of the preset pixel unit area 800px, and a metal mesh 852 is formed in the opening 844 to contact the conductive layer. The metal mesh 852 is electrically connected to the grounding wire 851.

[0021] refer to Figure 9 After the metal mesh 852 is formed, a pad layer 854 is formed in the lead area 800N, which is located above the interconnect layer 845 and in the pixel substrate 800 and dielectric layer 820. The pad layer 854 is connected to the interconnect layer 845 of the lead area 800N.

[0022] The first insulating layer 821 and the second insulating layer 872 located in the preset pixel unit area of ​​800px are removed, and a grounding trench 843 exposing the pixel substrate 800 is formed in the first insulating layer 821 and the second insulating layer 872 in the preset pixel unit area of ​​800px; the first insulating layer 821 and the second insulating layer 872 located on top of the isolation structure 871 are removed, and an opening 844 exposing the isolation structure 871 is formed in the second insulating layer 872. Therefore, the opening 844 and the grounding trench 843 are formed in different steps, which leads to a complex process flow for forming the photoelectric sensor and an increase in the number of photomasks.

[0023] To address the aforementioned technical problem, embodiments of the present invention provide a method for forming a photoelectric sensor, comprising:

[0024] A pixel substrate is provided, including a first surface and a second surface opposite to each other. The pixel substrate includes a photosensitive area and a lead area. The photosensitive area includes a plurality of pixel unit areas, one of which is used as a preset pixel unit area. An interconnect layer is formed on the second surface, and an isolation trench is formed between the pixel unit areas. An insulating layer is formed on the first surface outside the isolation trench. A first opening communicating with the isolation trench and a ground trench located in the preset pixel unit area and exposing the pixel substrate are formed in the insulating layer. An isolation structure is formed in the isolation trench and the first opening. The isolation structure includes a conductive layer and a ground wire in contact with the pixel substrate of the preset pixel unit area is formed in the ground trench. A metal mesh in contact with the conductive layer and the ground wire is formed on the isolation structure. A pad layer is formed above the interconnect layer and connected to the interconnect layer of the lead area.

[0025] In the photoelectric sensor formation method provided by the present invention, in the same step, a first opening communicating with the isolation trench is formed in the insulating layer, and a grounding trench exposing the pixel substrate is formed in the insulating layer of the preset pixel unit area. Compared with the scheme of first forming the isolation structure in the isolation trench and then forming the grounding trench, the present invention is beneficial to simplifying the process flow, reducing the number of photomasks, thereby saving process costs and improving process efficiency.

[0026] To make the above-mentioned objects, features, and advantages of the embodiments of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. (Reference) Figures 10 to 22 This is a schematic diagram of the structure corresponding to each step in one embodiment of the method for forming the photoelectric sensor of the present invention.

[0027] refer to Figure 10A pixel substrate 100 is provided, including a first surface 101 and a second surface 102 opposite to each other. The pixel substrate 100 includes a photosensitive area 100P and a lead area 100N. The photosensitive area 100N includes a plurality of pixel unit areas (not shown), wherein at least one pixel unit area is used as a preset pixel unit area 100px. An interconnection layer is formed on the second surface 102, and isolation trenches 143 are formed between the pixel unit areas.

[0028] The pixel substrate 100 is used to provide an operating platform for the formation of photoelectric sensors.

[0029] In this embodiment, the pixel substrate 100 includes a substrate (not shown). Specifically, the substrate material may include one or more of silicon, germanium, silicon germanide, silicon carbide, gallium arsenide, and indium gallium dihydrogen phosphate. As an example, the substrate is a silicon substrate. In other embodiments, the substrate may also be other types of substrates such as a silicon-on-insulator substrate or a germanium-on-insulator substrate.

[0030] In this embodiment, the first surface 101 is the back surface of the pixel substrate 100, and the second surface 102 is the front surface of the pixel substrate 100. Specifically, the pixel substrate 100 is a backside illumination (BSI) pixel wafer, and the first surface 101 of the pixel substrate 100 is the light-receiving surface.

[0031] The pixel substrate 100 includes a photosensitive area 100P, which is used to receive optical signals and convert them into electrical signals. In this embodiment, the photosensitive area 100P includes an array of pixel unit areas, in which pixel units (not shown) are formed. The pixel units are used to receive optical signals and convert them into electrical signals.

[0032] In this embodiment, during the step of the pixel substrate 100, the plurality of pixel unit regions are arranged in an array, which is beneficial for uniformly receiving optical signals.

[0033] The pixel substrate 100 of the preset pixel unit area of ​​100px is used for electrical connection with the interconnect layer and the ground line.

[0034] In this embodiment, the number of pixel units in the preset pixel unit area 100px is 1. In other embodiments, the number of pixel units can be a natural number greater than 1.

[0035] The lead area 100N is used for wiring and forming leads to achieve electrical connection between pixel units or other device structures and external circuits.

[0036] In this embodiment, during the step of providing the pixel substrate 100, the lead area 100N is arranged around the photosensitive area 100P, which facilitates the photosensitive area 100P in receiving optical signals.

[0037] The interconnect layer is used to realize electrical connections between pixel units, and also to realize electrical connections between pixel units and external circuits or other interconnect structures. Specifically, the interconnect layer includes one or more interconnect lines.

[0038] In this embodiment, the interconnect layer includes a first interconnect layer 111 located within the dielectric layer 100P of the photosensitive region 100P, and a second interconnect layer 112 located within the dielectric layer 120 of the lead region 100N. The second interconnect layer 112 is electrically connected to the first interconnect layer 111. The first interconnect layer 111 and the second interconnect layer 112 are used to connect the pixel unit to the pad layer 150 (e.g., ...). Figure 20 The electrical connection between the pixel unit and the external circuitry is achieved by connecting the pixel unit to the external circuitry.

[0039] The materials of the first interconnect layer 111 and the second interconnect layer 112 are metals, such as one or more of copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride.

[0040] In this embodiment, a connection structure 115 is also formed in the medium layer 120 of the preset pixel unit area 100px. The connection structure 115 is in contact with the first interconnect layer 111 and the pixel substrate 100 below the orthogonal projection of the photosensitive area 100P.

[0041] The connection structure 115 is in contact with the first interconnect layer 111 and with the pixel substrate 100 of the preset pixel unit area 100px, thereby realizing the electrical connection between the pixel substrate 100 of the preset pixel unit area 100px and the first interconnect layer 111.

[0042] The connection structure 115 penetrates the dielectric layer 120 between the first interconnect layer 111 and the pixel substrate 100 of the preset pixel unit area 100px, and is in contact with the first interconnect layer 111 and the pixel substrate 100 respectively, thereby realizing the electrical connection between the first interconnect layer 111 and the pixel substrate 100 of the preset pixel unit area 100px.

[0043] In this embodiment, the connection structure 115 is formed in a later-stage process. In this embodiment, the material of the connection structure 115 is the same as the material of the first conductive plug 121 and the second conductive plug 122, such as one or more of copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride.

[0044] In this embodiment, the interconnect layer further includes: a third interconnect layer 113 located in the dielectric layer 120 of the photosensitive area 100P and the lead area 100N, the third interconnect layer 113 being located on the side of the first interconnect layer 111 away from the second surface 102 and on the side of the second interconnect layer 112 away from the second surface; a first conductive plug 121 located between the first interconnect layer 111 and the third interconnect layer 113, and a second conductive plug 122 located between the second interconnect layer 112 and the third interconnect layer 113, the first conductive plug 121 being used to realize the electrical connection between the first interconnect layer 111 and the third interconnect layer 113, and the second conductive plug 122 being used to realize the electrical connection between the second interconnect layer 112 and the third interconnect layer 113.

[0045] Electrical connection between the first interconnect layer 111 and the second interconnect layer 112 is achieved through the third interconnect layer 113, the first conductive plug 121, and the second conductive plug 122.

[0046] The materials of the third interconnect layer 113, the first conductive plug 121, and the second conductive plug 122 are all metals, such as one or more of copper, aluminum, tungsten, cobalt, nickel, titanium, tantalum, titanium nitride, and tantalum nitride.

[0047] The isolation trench 143 is located between adjacent pixel unit areas, used to isolate adjacent pixel unit areas, and also to provide space for the subsequent formation of isolation structures.

[0048] In this embodiment, the isolation trench 143 is a deep trench isolation (DTI). The isolation trench 143 penetrates the pixel substrate 100 to a large depth. The depth of the isolation trench 143 is greater than the depth of the light trap 197, and even much greater than the depth of the light trap 197. This enables better isolation of adjacent pixel unit areas, and the depth of the subsequently formed isolation structure is also large, which is beneficial to better achieve optical isolation of adjacent pixel unit areas.

[0049] In this embodiment, in the step of providing the pixel substrate 100, the isolation trench 142 penetrates the pixel substrate 143, which helps to improve the isolation effect of adjacent pixel unit areas, and the depth of the subsequently formed isolation structure is also large, which helps to better achieve optical isolation of adjacent pixel unit areas.

[0050] In this embodiment, in the step of providing the pixel substrate 100, a dielectric layer 120 is formed on the second surface 102, and the interconnect layer is formed in the dielectric layer 120.

[0051] The dielectric layer 120 is used to achieve isolation between interconnect layers. The material of the dielectric layer 120 is a dielectric material, such as one or more of silicon oxide, silicon nitride, silicon oxynitride, low-k dielectric material, and ultra-low-k dielectric material. In this embodiment, during the step of providing the pixel substrate 100, a logic substrate 200, a memory chip, or a sensor chip is also bonded to the dielectric layer 120 on the second surface 102 of the pixel substrate 100.

[0052] In this embodiment, the logical substrate 200 is bonded to the dielectric layer 120 of the second surface 102 of the pixel substrate 100 as an example for illustration.

[0053] The logic substrate 200 serves as a logic wafer, used to analyze and process the electrical signals provided by the pixel substrate 100. Specifically, logic devices are formed within the logic substrate 200, and these logic devices are used to analyze and process the electrical signals provided by the pixel substrate 100.

[0054] By setting the pixel area (i.e., photosensitive area 100P) and the logic area on different substrates, and bonding the pixel substrate 100 and the logic substrate 200 together, it is beneficial to increase the pixel area, shorten the path of light to the photoelectric element, reduce light scattering, and make the light more focused, thereby improving the photoelectric sensor's light-sensing ability in low-light environments and reducing system noise and crosstalk.

[0055] As one embodiment, the bonding between the logic substrate 200 and the dielectric layer 120 of the second surface 102 of the pixel substrate 100 is achieved by hybrid bonding.

[0056] In this embodiment, during the step of providing the pixel substrate 100, a light trapping groove 197 is also formed in the first surface 101 of the pixel unit region.

[0057] The light trap 197 is used to form a conformal dielectric layer in the future, thereby mitigating the refractive index change between air and pixel substrate 100, reducing the high reflectivity caused by the abrupt change in refractive index at the interface of the dielectric change, so that more light can enter the optoelectronic element and the transmittance of incident light can be improved.

[0058] In this embodiment, the light trapping groove 197 is an inverted pyramid structure.

[0059] It should be noted that the shape of the light trapping groove 197 is not limited to this. In actual manufacturing processes, the light trapping groove can also be other shapes, such as a rectangular structure, which can also improve the optical transmittance of the pixel unit area.

[0060] Reference Figures 11 to 13 An insulating layer 151 is formed on the first surface 101 outside the isolation trench 143. The insulating layer 151 has a first opening 154 that communicates with the isolation trench 143 and a grounding trench 148 located in the preset pixel unit area 100px and exposing the pixel substrate 100.

[0061] The first opening 154 is used to provide space for the subsequent formation of the isolation structure, and the grounding trench 148 is used to provide space for the subsequent formation of the grounding wire.

[0062] In this embodiment, in the same step, a first opening 154 communicating with the isolation trench 143 is formed in the insulating layer 151, and a grounding trench 148 exposing the pixel substrate 100 is formed in the insulating layer 151 of the preset pixel unit area 100px. Compared with the scheme of first forming the isolation structure in the isolation trench and then forming the grounding trench, the embodiment of the present invention is beneficial to simplify the process flow, reduce the number of photomasks, thereby saving process costs and improving process efficiency.

[0063] The steps for forming the insulating layer 151 having the first opening 154 and the grounding trench 148 are described in detail below with reference to the accompanying drawings.

[0064] refer to Figure 11 An insulating layer 151 is formed on the first surface 101, the insulating layer 151 covering the first surface 101 and sealing the top of the isolation trench 143.

[0065] The insulating layer 151 is used to provide space for the subsequent formation of the grounding trench and the first opening.

[0066] In this embodiment, the insulating layer 151 is made of an insulating material to prevent any impact on the electrical performance of the photoelectric sensor. In this embodiment, the insulating layer 151 may be made of silicon oxide, silicon nitride, silicon oxynitride, or silicon carbide. As an example, the insulating layer 151 is made of silicon oxide. Silicon oxide has high process compatibility, low cost, and good light transmittance and insulation properties.

[0067] In this embodiment, the insulating layer 151 is formed by chemical vapor deposition. By using chemical vapor deposition, the insulating layer 151 seals the top of the isolation trench 143 while reducing the probability of the insulating layer 151 filling the isolation trench 143, thereby minimizing the impact on subsequent processes for forming the isolation structure in the isolation trench 143.

[0068] Continue to refer to Figure 11Before forming the insulating layer 151, the method further includes forming a conformal dielectric layer 166 in the light trapping groove 197 and the isolation trench 143.

[0069] It should be noted that the conformal dielectric layer 166 is also formed on the remaining first surface 101. The conformal dielectric layer 166 is used together with the subsequently filled isolation structure to optically isolate adjacent pixel unit regions.

[0070] The conformal dielectric layer 166 has a stacked structure, including an interface buffer layer 180, a negatively charged dielectric layer 181, and an isolation layer 182 stacked sequentially.

[0071] The interface buffer layer 180 is used to repair surface defects on the inner surfaces of the isolation trench 143 and the light trapping groove 197, which helps to improve problems such as dark current and white pixel of the photoelectric sensor caused by surface defects, and also improves the smoothness and interface quality of the inner surfaces of the isolation trench 143 and the light trapping groove 197 as well as the first surface 101.

[0072] As an example, the interface buffer layer 180 is made of silicon oxide. Specifically, the interface buffer layer 180 can be decoupled plasma oxide (DPO).

[0073] In this embodiment, the process for forming the interface buffer layer 180 includes a decoupled plasma oxide process.

[0074] In other embodiments, other oxidation processes, such as high-temperature oxidation (HTO), can be used to form the interface buffer layer. In still other embodiments, a deposition process can be used to form the interface buffer layer.

[0075] The negatively charged dielectric layer 181 has a more comprehensive negative charge than the conventional dielectric layer. The negative charge can increase the accumulation of holes at the interface of the negatively charged dielectric layer 181, and correspondingly, holes can accumulate at the bottom and sidewalls of the first surface 101 and the subsequently formed isolation structure to form a P-type protective structure. This helps to prevent leakage problems in the first surface 101 and the sidewalls of the isolation structure, and also helps to improve the uniformity of the electric field inside the pixel.

[0076] The negatively charged dielectric layer 181 can be a single-layer structure or a stacked structure. As an example, the negatively charged dielectric layer 181 is a stacked structure, including a first dielectric layer 181a and a second dielectric layer 181b located on the first dielectric layer 181a. In one embodiment, the first dielectric layer 181a is made of aluminum oxide, and the second dielectric layer 181b is made of tantalum oxide. The tantalum oxide material of the second dielectric layer 181b also increases transmittance, which is beneficial for alignment in subsequent photolithography processes.

[0077] As one embodiment, the first dielectric layer 181a is formed using a furnace tube process; the second dielectric layer 181b is formed using a physical vapor deposition (PVD) process.

[0078] In other embodiments, the material of the negatively charged dielectric layer may also be a nitride dielectric material. The nitride material may be silicon nitride, nitrogen-rich silicon nitride, or other nitrogen-rich dielectric films, such as tantalum nitride, titanium nitride, hafnium nitride, aluminum nitride, magnesium nitride, or other metal nitrides.

[0079] The isolation layer 182 is used to isolate the negatively charged dielectric layer 181 from the subsequently formed isolation structure, thereby ensuring the stability of the P-type protective structure formed at the interface of the negatively charged dielectric layer 181, and thus ensuring that the negatively charged dielectric layer 181 serves to prevent leakage problems between the first surface 101 and the sidewall of the isolation structure.

[0080] The insulating layer 182 is made of a dielectric material. As an example, the insulating layer 182 is made of silicon oxide. In other embodiments, the insulating layer may be made of other dielectric materials.

[0081] In this embodiment, the process for forming the isolation layer 182 includes atomic layer deposition (ALD). Thin films prepared by atomic layer deposition have advantages such as good bonding strength, consistent film thickness, good compositional uniformity, and good shape retention, which are beneficial for improving the thickness consistency and stepped coverage of the isolation layer 50.

[0082] refer to Figure 12 The insulating layer 151 is planarized.

[0083] Specifically, the insulating layer 151 is planarized to provide a flat and smooth surface for subsequent processes.

[0084] In this embodiment, the insulating layer 151 is planarized using a chemical mechanical polishing (CMP) process.

[0085] It should be noted that if the subsequent planarization process of the first conductive material layer above the top surface of the insulating layer 151 is of high quality, this step can be omitted.

[0086] refer to Figure 13 Remove the insulating layer 151 located on top of the isolation trench 143 and the preset pixel unit area 100px, form a first opening 154 in the insulating layer 151 that communicates with the isolation trench 143, and form a grounding trench 148 in the insulating layer 151 in the preset pixel unit area 100px that exposes the pixel substrate 100px.

[0087] In this embodiment, removing the insulating layer 151 at the top of the isolation trench 143 and the insulating layer 151 of the preset pixel unit area includes: forming a photolithographic pattern layer (not shown) on the insulating layer 151, the photolithographic pattern layer exposing the insulating layer 151 at the top of the isolation trench 143 and the insulating layer 151 of the preset pixel unit area.

[0088] Specifically, a photoresist layer (not shown) is formed on the insulating layer 151, and the photoresist layer is transformed into a photolithographic pattern layer by exposure and development.

[0089] In this embodiment, after the photolithographic pattern layer is formed, the exposed insulating layer 151 is removed using the photolithographic pattern layer as a mask to form the first opening 154 and the grounding trench 148.

[0090] In this embodiment, the exposed insulating layer 151 is removed by an anisotropic etching process.

[0091] Specifically, the anisotropic etching process is an anisotropic dry etching process. The anisotropic dry etching process has the characteristics of anisotropic etching and has high process controllability and etching accuracy, thereby improving the dimensional accuracy and morphological quality of the first opening 154 and the grounding trench 148, and helping to reduce the probability of damage to the pixel substrate 100.

[0092] After forming the first opening 154 and the grounding trench 148, the photolithographic pattern layer is removed, thereby reducing the probability of the photolithographic pattern layer affecting subsequent processes. In this embodiment, an ashing process is used to remove the photolithographic pattern layer.

[0093] refer to Figure 14 An isolation structure is formed in the isolation trench 143 and the first opening 154. The isolation structure includes a conductive layer 110, and a grounding line 220 is formed in the grounding trench 148 to contact the pixel substrate 100 of the preset pixel unit area 100px.

[0094] The isolation structure is used to reduce optical and electrical crosstalk between adjacent pixel units.

[0095] In this embodiment, the isolation structure is a deep trench isolation (DTI) structure.

[0096] In this embodiment, the isolation structure includes a conductive layer 110 so that a voltage can be applied to the conductive layer 110 to adsorb positive charges on the sidewall of the isolation structure, thereby improving the interface state of the sidewall of the isolation structure and reducing the dark current of the pixel unit.

[0097] The end of the conductive layer 110 is exposed on the first surface 101 so that a metal mesh in contact with the conductive layer 110 can be formed on the first surface 101, thereby allowing the electrical properties of the conductive layer 110 to be brought out through the metal mesh.

[0098] In this embodiment, the conductive layer 110 is made of a metallic material. Metallic materials have good electrical conductivity, and since they are typically opaque, they can also act as light-blocking agents between adjacent pixel units.

[0099] In this embodiment, the conductive layer 110 is made of one or more of tungsten, aluminum, titanium, titanium nitride, tantalum nitride, and copper. As one embodiment, the conductive layer 110 is made of tungsten. Tungsten is not easily diffused and has excellent hole-filling ability, thereby improving the filling effect of the conductive layer 110 in deep trenches. Furthermore, tungsten is an opaque metal material, which can act as a light barrier, making the reduction of optical crosstalk between adjacent pixel units by the isolation structure more significant.

[0100] The grounding wire 220 is used to make an electrical connection with the pixel substrate 100 of the preset pixel unit area 100px.

[0101] Specifically, by forming a grounding wire 220 that contacts the pixel substrate 100 of the preset pixel unit area 100px, and subsequently forming a metal mesh that contacts the conductive layer 110, with the grounding wire 220 electrically connected to the metal mesh, when the photoelectric sensor is working, through the sequentially connected pad layer 150, second interconnect layer 112, first interconnect layer 111, connection structure 115, pixel substrate 100 and grounding wire 220, the conductive layer 110 of the isolation structure can be connected to a negative potential by applying a negative potential to the pad layer 150, thereby facilitating the adsorption of positive charges on the sidewall of the isolation structure, which in turn helps to improve the interface state of the sidewall of the isolation structure and reduce the dark current of the pixel unit.

[0102] In this embodiment, the grounding wire 220 is made of a metallic material. As one embodiment, the grounding wire 220 is made of one or both of aluminum and tungsten.

[0103] In this embodiment, the grounding wire 220 and the conductive layer 110 are formed in the same step, so that the materials of the grounding wire 220 and the conductive layer 110 are the same.

[0104] Specifically, the steps of forming an isolation structure in the isolation trench 143 and the first opening 154, and forming a grounding wire 220 in the grounding trench 148 include: forming a first conductive material layer (not shown) in the isolation trench 143, the first opening 154 and the grounding trench 148; performing planarization on the first conductive material layer, removing the first conductive material layer above the top surface of the insulating layer 151, with the first conductive material layer located in the isolation trench 143 and the first opening 154 serving as the conductive layer 110, and the remaining first conductive material layer located in the grounding trench 148 serving as the grounding wire 220.

[0105] The first conductive material layer is used to subsequently form the isolation structure and grounding wire 220.

[0106] In this embodiment, the process for forming the first conductive material layer includes chemical vapor deposition. In other embodiments, the process for forming the first conductive material layer may also be physical vapor deposition.

[0107] In this embodiment, before forming the first conductive material layer, a spacer layer 105 is formed on the sidewalls and bottom of the isolation trench.

[0108] The spacer layer 105 is used to enhance the bonding between the first conductive material layer and the second dielectric layer 181b formed subsequently, and when the material of the first conductive material layer is tungsten, it helps to reduce the probability of the fluorine-containing reaction precursor corroding the conformal dielectric layer 166 during the formation of tungsten.

[0109] In this embodiment, the spacer layer 105 is made of titanium nitride. In other embodiments, the spacer layer 105 may also be made of titanium.

[0110] In this embodiment, the first conductive material layer is planarized by removing the first conductive material layer that is higher than the top surface of the insulating layer 151, thereby exposing the top surface of the conductive layer 110 and the grounding wire 220, which is beneficial for the subsequent formation of a metal mesh that is electrically connected to the grounding wire 220.

[0111] In this embodiment, the first conductive material layer is planarized using a chemical mechanical polishing process.

[0112] refer to Figure 15 A metal mesh 144 is formed on the isolation structure to contact the conductive layer 110 and the grounding wire 220.

[0113] In this embodiment, after forming the conductive layer 110 and the grounding wire 220, a metal mesh 144 in contact with the conductive layer 110 is directly formed on the isolation structure, which helps to simplify the process flow, reduce the number of photomasks, and thus save process costs and improve process efficiency.

[0114] By electrically connecting the metal mesh 144 to the ground wire 220, the interconnect layer, the connection structure 115, the pixel substrate 100, the metal mesh 144, the conductive layer 110, and the subsequently formed pad layer are electrically connected. By applying a negative potential to the pad layer 150, the conductive layer 110 of the isolation structure can be connected to a negative potential, which is beneficial for adsorbing positive charges on the sidewall of the isolation structure, thereby improving the interface state of the sidewall of the isolation structure and reducing the dark current of the pixel unit.

[0115] In this embodiment, the metal mesh 144 is made of a metallic material, including one or both of aluminum and tungsten. As an example, the metal mesh 144 is made of aluminum. Aluminum is an easily etchable material, facilitating the patterning process for forming the metal mesh 144. Furthermore, aluminum has good electrical conductivity, which helps improve the electrical connectivity of the metal mesh 144. In addition, aluminum is opaque, thus ensuring that the metal mesh 144 reduces optical crosstalk between adjacent pixel units.

[0116] In this embodiment, the step of forming the metal mesh 144 includes: forming a metal material layer (not shown) on the isolation structure, the insulating layer 151 and the grounding wire 220; patterning the metal material layer, retaining the metal material layer located on top of the conductive layer 110 as the metal mesh, the metal mesh 144 extending to cover the top of the grounding wire 220 and connected to the grounding wire 220.

[0117] In this embodiment, a metal material layer is formed directly on the isolation structure, the insulating layer 151, and the grounding wire 220, thereby saving the number of photomasks.

[0118] In this embodiment, the metal material layer located on top of the grounding wire 220 is retained as the grounding wire 220, and the grounding wire 220 is connected to the metal mesh 144, which facilitates the electrical connection between the grounding wire 220 and the metal mesh 144.

[0119] The metal material layer is used to form the metal grid 144 and the grounding wire 220.

[0120] In this embodiment, a physical vapor deposition process is used to form the metal material layer. In other embodiments, a chemical vapor deposition process can also be used to form the metal material layer.

[0121] In this embodiment, an etching process is used to pattern the metal material layer. Specifically, an anisotropic dry etching process is used to pattern the metal material layer. The anisotropic dry etching process has high control over the etching profile, which is beneficial for precise control of the cross-sectional morphology of the metal material layer.

[0122] refer to Figure 16 After forming the metal mesh 144, a first passivation layer 160 is formed on the first surface 101, and the first passivation layer 160 covers the metal mesh 144 and the ground wire 220.

[0123] The first passivation layer 160 is used to protect the metal mesh 144 and the grounding wire 220, reducing the probability that the metal mesh 144 and the grounding wire 220 will be affected by subsequent process steps.

[0124] In this embodiment, the material of the first passivation layer 160 is an insulating material, including one or more of silicon oxide, silicon oxynitride, and silicon nitride. As an example, the material of the first passivation layer 160 is silicon oxide.

[0125] In this embodiment, the step of forming the first passivation layer 160 includes: forming a passivation material layer (not shown) on the first surface 101 using a deposition process, wherein the passivation material layer covers the metal mesh 144; performing planarization on the passivation material layer, and using the remaining passivation material layer located on the first surface 101 and covering the metal mesh 144 as the first passivation layer 160.

[0126] By planarizing the passivation material layer after the deposition process, the flatness and height consistency of the top surface of the first passivation layer 160 are improved, so as to provide a flat surface for subsequent process steps.

[0127] As one embodiment, the planarization process is performed using a chemical mechanical planarization process.

[0128] It should be noted that the planarization treatment of the passivation material layer can be retained depending on the subsequent process requirements.

[0129] refer to Figures 17 to 20 A pad layer 150 is formed above the interconnect layer, and the pad layer 150 is connected to the interconnect layer of the lead region. In this embodiment, after the metal mesh 144 is formed, the pad layer 150 is formed in the lead region 100N.

[0130] In this embodiment, in the step of forming the pad layer 150 located above the interconnect layer, the pad layer 150 is located in the pixel substrate 100 and the dielectric layer 120.

[0131] The solder pad layer 150 is in contact with the interconnect layer of the lead region 100N. In this embodiment, the solder pad layer 150 is in contact with the second interconnect layer 112.

[0132] In this embodiment, the pad layer 150 is used to connect to a negative potential, thereby connecting the conductive layer 110 of the isolation structure to a negative potential. This is beneficial for adsorbing positive charges on the sidewall of the isolation structure, thereby improving the interface state of the sidewall of the isolation structure and reducing the dark current of the pixel unit.

[0133] The specific steps for forming the solder pad layer 150 in this embodiment will be described in detail below with reference to the accompanying drawings.

[0134] like Figures 17 to 19 As shown, the step of forming the pad layer 150 includes: forming a pixel substrate 100 that extends through the interconnect layer and exposes an opening 140 in the lead region 100N.

[0135] The opening 140 provides space for the subsequent formation of the solder pad layer 150, and the opening 140 exposes the second interconnect layer 112 so that the solder pad layer 150 formed at the bottom of the opening 140 can contact the second interconnect layer 112, thereby achieving an electrical connection between the solder pad layer 150 and the second interconnect layer 112.

[0136] Specifically, in the step of forming the opening 140, the opening includes a second opening 199 located in the pixel substrate 100 and a third opening 142 located in the dielectric layer 120 at the bottom of the second opening 199, and the second opening 199 and the third opening 142 are connected.

[0137] As an example, the bottom opening size of the second opening 199 is larger than the top opening size of the third opening 142.

[0138] Specifically, such as Figure 17 As shown, the step of forming the opening 140 includes: forming a second opening 199 through the pixel substrate 100 of the lead area 100N, the second opening 199 exposing the dielectric layer 120.

[0139] The second opening 199 is used to expose the dielectric layer 120, thereby facilitating the subsequent formation of the third opening.

[0140] As an example, an anisotropic dry etching process is used to form the second opening 199. The anisotropic dry etching process has high control over the etching profile, which is beneficial for precise control of the profile morphology of the second opening 199.

[0141] like Figure 18As shown, the step of forming the opening 140 further includes: after forming the second opening 199, forming an isolation layer 145 on the sidewalls and bottom of the second opening 199 and on the first passivation layer 160.

[0142] The isolation layer 145 serves to protect the pixel substrate 100 and also isolates the pixel substrate 100 from the subsequently formed bonding pad layer. In this embodiment, the material of the isolation layer 145 is silicon oxide.

[0143] In this embodiment, the isolation layer 145 conformally covers the sidewalls and bottom of the second opening 199 and the first passivation layer 160.

[0144] like Figure 19 As shown, the step of forming the opening 140 further includes: forming a third opening 142 through the dielectric layer 120 below the second opening 199, exposing the second interconnect layer 112, wherein the third opening 142 and the second opening 199 constitute the opening 140. Specifically, the third opening 142 exposes a portion of the top of the second interconnect layer 112 facing the first surface 101.

[0145] The third opening 142 is used to expose the second interconnect layer 112, thereby facilitating the electrical connection between the subsequently formed pad layer and the second interconnect layer 112.

[0146] In the step of forming the third opening 142, the third opening 142 also penetrates a portion of the isolation layer 145 above the second interconnect layer 112.

[0147] As an example, an anisotropic dry etching process is used to form a third opening 142 that penetrates the dielectric layer 120 below the second opening 199. The anisotropic dry etching process has high control over the etching profile, which is beneficial for precise control of the profile morphology of the third opening 142 and reduces the probability of mis-etching the second interconnect layer 112.

[0148] like Figure 20 As shown, a pad layer 150 is formed inside the opening.

[0149] In this embodiment, the pad layer 150 is in contact with the second interconnect layer 112 to realize the electrical connection between the second interconnect layer 112 and external circuits or other interconnect structures.

[0150] More specifically, the pad layer 150 is in contact with the second interconnect layer 112, the second interconnect layer 112 is electrically connected to the first interconnect layer 111, and the first interconnect layer 111 is electrically connected to the pixel substrate 100 through the connection structure 115. The pixel substrate 100 and the conductive layer 110 are electrically connected in sequence through the ground wire 220 and the metal mesh 144. Accordingly, when the photoelectric sensor is working, through the sequentially electrically connected pad layer 150, second interconnect layer 112, first interconnect layer 111, connection structure 115, pixel substrate 100 and ground wire 220, the conductive layer 110 of the isolation structure can be connected to a negative potential by applying a negative potential to the pad layer 150. This is beneficial for adsorbing positive charges on the sidewall of the isolation structure, thereby improving the interface state of the sidewall of the isolation structure and reducing the dark current of the pixel unit.

[0151] Furthermore, this embodiment applies a negative potential to the pad layer 150, thereby connecting the conductive layer 110 of the isolation structure to a negative potential. This eliminates the need to form an additional pad layer electrically connected to the metal mesh 144 on the first surface, thus ensuring the high consistency of the pad layer 150 of the photoelectric sensor and helping to reduce the complexity of subsequent packaging processes and testing.

[0152] The pad layer 150 is made of a conductive material. In this embodiment, the material of the pad layer 150 includes one or more of aluminum, titanium, gold, and indium tin oxide. As one embodiment, the material of the pad layer 150 is aluminum. Aluminum has good electrical conductivity and is an easily etchable material, thus making it easy to form the pad layer 150 in a patterned manner.

[0153] The solder pad 150 is located within the opening 140, and the top surface of the solder pad 150 is lower than the first surface 101.

[0154] In this embodiment, the step of forming the pad layer 150 includes: forming a pad material layer (not shown) on the bottom and sidewalls of the opening 140 and on the isolation layer 145; removing a portion of the pad material layer located on the first surface 101 and at the bottom of the opening 140, and using the remaining pad material layer located at the bottom of the opening 140 and in contact with the second interconnect layer 112 as the pad layer 150.

[0155] like Figure 21 As shown, after the solder pad layer 150 is formed, a second passivation layer 155 is formed on the top surface and sidewalls of the solder pad layer 150, on the sidewalls and bottom surface of the second opening 199, and on the first passivation layer 160.

[0156] Specifically, the second passivation layer 155 covers the sidewalls and bottom surface of the second opening 199, the solder pad layer 150, and the first passivation layer 160. More specifically, the second passivation layer 155 conformally covers the isolation layer 145 and the solder pad layer 150.

[0157] The second passivation layer 155 serves to protect the solder pad layer 150.

[0158] In this embodiment, the material of the second passivation layer 155 is silicon oxide. In other embodiments, the material of the second passivation layer may also be silicon nitride or silicon oxynitride.

[0159] In this embodiment, a chemical vapor deposition (CVD) process is used to form the second passivation layer 155. CVD has high coverage capability and is a mature and highly compatible process. In other embodiments, atomic layer deposition (ALD), or a combination of ALD and CVD, can also be used to form the second passivation layer.

[0160] refer to Figure 21 and Figure 22 , Figure 21 This is a sectional view. Figure 22 for Figure 21 In the corresponding top view, a portion of the second passivation layer 155 located on the top surface of the solder pad layer 150 is removed, exposing the solder pad layer 150. The remaining second passivation layer 155 and the first passivation layer 160 are used to form a passivation layer.

[0161] The pad layer 150 is exposed to enable electrical connection between the pad layer 150 and external circuitry, such as for facilitating packaging and testing processes.

[0162] In this embodiment, an anisotropic dry etching process is used to remove part of the second passivation layer 155 located on the top surface of the pad layer 150.

[0163] Figures 23 to 25 This is a schematic diagram of the structure corresponding to each step in another embodiment of the method for forming the photoelectric sensor of the present invention. The similarities between this embodiment and the previous embodiment will not be repeated here. The difference between this embodiment and the previous embodiment is that a first protective layer is formed on the isolation structure, the insulating layer, and the grounding wire before forming the metal material layer.

[0164] The specific steps of this embodiment will be described in detail below with reference to the accompanying drawings.

[0165] refer to Figure 23 The forming method further includes forming a first protective layer 448 on the isolation structure, the insulating layer 451 and the grounding wire 420 before forming the metal material layer.

[0166] In one scenario, when a portion of the conductive layer 410 does not need to contact the metal mesh, the first protective layer 448 is used to protect the conductive layer 410 that does not need to contact the metal mesh. This helps to reduce the probability of accidental etching of the conductive layer 410 during the etching process of the metal material layer after its formation. Consequently, it facilitates the determination of the position and number of conductive layers 410 in contact with the metal mesh based on the actual situation.

[0167] In another scenario, when the metal mesh does not completely cover the conductive layer 410 below it, the first protective layer 448 is used to protect the surface of the conductive layer 410 that cannot be covered by the metal mesh, thereby reducing the probability of accidental etching of the conductive layer 410 during the subsequent etching process of the metal material layer.

[0168] In this embodiment, the first protective layer is formed by chemical vapor deposition.

[0169] refer to Figure 24 A fourth opening 449 is formed in the first protective layer 448, the fourth opening 449 exposes the conductive layer 410 of all or part of the conductive layer 410 of the isolation structure, and the fourth opening 449 also exposes the grounding wire 420.

[0170] The fourth opening 449 is used to provide space for the subsequent formation of the metal mesh.

[0171] In this embodiment, an anisotropic dry etching process is used to form the fourth opening 449. The anisotropic dry etching process has high control over the etching profile, which is beneficial for precise control of the profile morphology of the fourth opening 449.

[0172] refer to Figure 25 In the step of forming a metal material layer 499 on the isolation structure, the insulating layer 451 and the grounding wire 420, the metal material layer 499 covers the first protective layer 448 and fills the fourth opening 449.

[0173] Metal material layer 499 is used for subsequent formation of metal mesh.

[0174] The metal material layer covers the first protective layer 448 and fills the fourth opening 449, thereby facilitating the electrical connection between the subsequently formed metal mesh and the grounding wire 420 and the conductive layer 410.

[0175] Specifically, the detailed description of the formation method in this embodiment can be found in the relevant description of the first embodiment, and will not be repeated here.

[0176] Figure 26 and Figure 27This is a schematic diagram of the structure corresponding to each step in another embodiment of the method for forming the photoelectric sensor of the present invention. The similarities between this embodiment and the previous embodiment will not be repeated here. The difference between this embodiment and the first embodiment is that, in the same step, an isolation structure, a grounding wire, and a metal mesh are formed.

[0177] Forming the isolation structure, grounding wire 520, and metal mesh 544 in the same step helps to further simplify the process flow, reduce the number of photomasks, and thus save process costs and improve process efficiency.

[0178] The following detailed description, in conjunction with the accompanying drawings, illustrates the formation of the isolation structure, grounding wire, and metal mesh in the same step of this embodiment.

[0179] refer to Figure 26 The steps of forming the isolation structure, grounding wire and metal mesh include: forming a first conductive material layer 599 in the isolation trench (not shown), the first opening (not shown) and the grounding trench (not shown), the first conductive material layer 599 further covering an insulating layer 551.

[0180] The first conductive material layer 599 is used for the subsequent formation of the conductive layer, metal mesh and grounding wire.

[0181] The material of the first conductive material layer 599 includes one or both of aluminum and tungsten. In this embodiment, the material of the first conductive material layer 599 is tungsten.

[0182] In this embodiment, the first conductive material layer 599 is formed by chemical vapor deposition. In other embodiments, the first conductive material layer can also be formed by physical vapor deposition.

[0183] In this embodiment, the steps of forming the isolation structure, grounding wire and metal mesh 544 further include: forming a second protective layer 598 covering the first conductive material layer 599 before patterning the first conductive material layer 599.

[0184] In this embodiment, when the first conductive material layer 599 is subsequently patterned to form a metal mesh, the second protective layer 598 is also patterned accordingly. Therefore, the remaining second protective layer 598 above the metal mesh can form a mesh structure, thereby increasing the total thickness of the mesh structure. This is beneficial for improving the mesh structure's effect on reducing optical crosstalk between adjacent pixel units. Furthermore, the second protective layer 598 protects the first conductive material layer 599 during the subsequent patterning process. Additionally, the second protective layer 598 increases the process window for patterning the first conductive material layer 599. In this embodiment, the material of the second protective layer 598 is silicon oxide. In other embodiments, the second protective layer can also be silicon nitride or silicon oxynitride.

[0185] In this embodiment, the second protective layer 598 is formed using a chemical vapor deposition process. The process for forming the second protective layer 598 is the same as the process for forming the first conductive material layer 599, which improves process compatibility. In other embodiments, the second protective layer can also be formed using a physical vapor deposition process.

[0186] refer to Figure 27 The first conductive material layer 599 is patterned, and the first conductive material layer located in the isolation trench and the first opening is retained as the conductive layer 510. The remaining first conductive material layer 599 located on top of the conductive layer 510 and in contact with the conductive layer 510 is used as the metal mesh 544. The first conductive material layer 599 located in the grounding trench is used as the grounding wire 520. The metal mesh 544 extends to cover the top of the grounding wire 520 and is connected to the grounding wire 520.

[0187] Specifically, a photolithographic pattern layer (not shown) is formed on the first conductive material layer 599, which covers the top of the isolation trench and the grounding trench. Using the photolithographic pattern layer as a mask, the exposed first conductive material layer 599 is removed, and the remaining first conductive material layer 599 located in the isolation trench and the first opening serves as the conductive layer 510. The remaining first conductive material layer 599 located on top of the conductive layer 510 and in contact with the conductive layer 510 serves as the metal mesh 544, and the first conductive material layer 599 located in the grounding trench serves as the grounding wire 520.

[0188] In this embodiment, a second protective layer 598 is formed on the first conductive material layer 599. Therefore, in the patterning process, the second protective layer 598 and the first conductive material layer 599 are patterned sequentially from top to bottom.

[0189] Accordingly, the metal mesh 544 and the remaining second protective layer 598 located on top of the metal mesh 544 constitute a mesh structure.

[0190] After forming the isolation structure, grounding wire 520 and metal mesh 544, an ashing process is used to remove the photolithographic pattern layer.

[0191] Specifically, the detailed description of the formation method in this embodiment can be found in the relevant description of the first embodiment, and will not be repeated here.

[0192] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a photoelectric sensor, characterized in that, include: A pixel substrate is provided, including a first surface and a second surface opposite to each other. The pixel substrate includes a photosensitive area and a lead area. The photosensitive area includes a plurality of pixel unit areas, wherein at least one pixel unit area is used as a preset pixel unit area. An interconnect layer is formed on the second surface, and isolation trenches are formed between the pixel unit areas. An insulating layer is formed on a first surface outside the isolation trench, and a first opening communicating with the isolation trench and a grounding trench located in the preset pixel unit area and exposing the pixel substrate are formed in the insulating layer. An isolation structure is formed within the isolation trench and the first opening. The isolation structure includes a conductive layer, and a grounding wire is formed within the grounding trench that contacts the pixel substrate of the preset pixel unit area. A metal mesh is formed on the isolation structure to contact the conductive layer and the grounding wire; A pad layer is formed above the interconnect layer, and the pad layer is connected to the interconnect layer of the lead area.

2. The method for forming a photoelectric sensor as described in claim 1, characterized in that, The step of forming the pad layer includes: forming a pixel substrate in the lead region that extends over the interconnect layer and exposes an opening in the interconnect layer; A pad layer is formed inside the opening.

3. The method for forming a photoelectric sensor as described in claim 1, characterized in that, In the step of providing a pixel substrate, a dielectric layer is formed on the second surface, and the interconnect layer is formed in the dielectric layer; In the step of forming the opening, the opening includes a second opening located within the pixel substrate and a third opening located within a dielectric layer at the bottom of the second opening, and the second opening and the third opening are connected.

4. The method for forming a photoelectric sensor as described in claim 1, characterized in that, The step of forming an insulating layer having the first opening and a grounding trench on a first surface outside the isolation trench includes: forming an insulating layer on the first surface, the insulating layer covering the first surface and sealing the top of the isolation trench; Remove the insulating layer located at the top of the isolation trench and the preset pixel unit area, form a first opening in the insulating layer that communicates with the isolation trench, and form a grounding trench in the insulating layer of the preset pixel unit area that exposes the pixel substrate.

5. The method for forming a photoelectric sensor as described in claim 4, characterized in that, Removing the insulating layer at the top of the isolation trench and the insulating layer of the preset pixel unit area includes: forming a photolithographic pattern layer on the insulating layer, wherein the photolithographic pattern layer exposes the insulating layer at the top of the isolation trench and the insulating layer of the preset pixel unit area; Using the photolithographic pattern layer as a mask, the exposed insulating layer is removed to form the first opening and the grounding trench; Remove the photolithographic pattern layer.

6. The method for forming a photoelectric sensor as described in claim 1, characterized in that, The step of forming an isolation structure in the isolation trench and the first opening, and forming a grounding wire in the grounding trench includes: forming a first conductive material layer in the isolation trench, the first opening and the grounding trench; The first conductive material layer is planarized, and the first conductive material layer above the top surface of the insulating layer is removed. The first conductive material layer located in the isolation trench and the first opening serves as the conductive layer, and the remaining first conductive material layer located in the grounding trench serves as the grounding wire.

7. The method for forming a photoelectric sensor as described in claim 1 or 6, characterized in that, The step of forming the metal mesh includes: forming a metal material layer on the isolation structure, the insulating layer and the grounding wire; patterning the metal material layer, retaining the metal material layer located on top of the conductive layer as a metal mesh, the metal mesh extending to cover the top of the grounding wire and connected to the grounding wire.

8. The method for forming a photoelectric sensor as described in claim 7, characterized in that, The process for forming the metal material layer includes chemical vapor deposition or physical vapor deposition.

9. The method for forming a photoelectric sensor as described in claim 7, characterized in that, The forming method further includes: forming a first protective layer on the isolation structure, the insulating layer and the grounding wire before forming the metal material layer; A fourth opening is formed in the protective layer, the fourth opening exposing the conductive layer of all or part of the isolation structure, and the fourth opening also exposing the grounding wire; In the step of forming a metal material layer on the isolation structure, the insulation layer and the grounding wire, the metal material layer covers the protective layer and fills the fourth opening.

10. The method for forming a photoelectric sensor as described in claim 1, characterized in that, The steps of forming the isolation structure, grounding wire and metal mesh include: forming a first conductive material layer in the isolation trench, the first opening and the grounding trench, wherein the first conductive material layer also covers the insulating layer; The first conductive material layer is patterned, and the first conductive material layer located in the isolation trench and the first opening is retained as a conductive layer. The remaining first conductive material layer located on top of the conductive layer and in contact with the conductive layer is used as a metal mesh. The first conductive material layer located in the grounding trench is used as a grounding wire. The metal mesh extends to cover the top of the grounding wire and is connected to the grounding wire.

11. The method for forming a photoelectric sensor as described in claim 6 or 10, characterized in that, The process for forming the first conductive material layer includes chemical vapor deposition or physical vapor deposition.

12. The method for forming a photoelectric sensor as described in claim 10, characterized in that, The step of forming the isolation structure, grounding wire and metal mesh further includes: forming a second protective layer covering the first conductive material layer before patterning the first conductive material layer; In the patterning process, the second protective layer and the first conductive material layer are patterned sequentially from top to bottom, and the metal mesh and the remaining second protective layer located on top of the metal mesh constitute a mesh structure.

13. The method for forming a photoelectric sensor as described in claim 10 or 12, characterized in that, The patterning process includes anisotropic etching.

14. The method for forming a photoelectric sensor as described in claim 1, characterized in that, The conductive layer is made of one or more of the following materials: tungsten, aluminum, titanium, titanium nitride, tantalum nitride, and copper. The grounding wire is made of one or both of aluminum and tungsten. The material of the solder pad layer includes one or more of aluminum, titanium, gold, and tin-doped indium oxide; The material of the metal mesh includes one or both of aluminum and tungsten.

15. The method for forming a photoelectric sensor as described in claim 1, characterized in that, The first surface is the back side of the pixel substrate, and the second surface is the front side of the pixel substrate.

16. The method for forming a photoelectric sensor as described in claim 1, characterized in that, In the step of providing the pixel substrate, a logic substrate, a memory chip, or a sensor chip is also bonded to the second surface of the pixel substrate.

17. The method for forming a photoelectric sensor as described in claim 1, characterized in that, In the step of providing a pixel substrate, a light-trapping groove is also formed in the first surface of the pixel unit region, and the insulating layer covers the light-trapping groove.

18. The method for forming a photoelectric sensor as described in claim 1, characterized in that, In the step of providing the pixel substrate, the isolation trench extends through the pixel substrate.

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