Gallium nitride high electron mobility transistor epitaxial wafer and preparation method thereof

Abstract

The present application discloses a gallium nitride high electron mobility transistor epitaxial wafer and a preparation method thereof, the method comprising: epitaxially growing an InGaN or n+GaN sacrificial layer and a GaN HEMT epitaxial layer in sequence on a substrate; taking the InGaN or n+GaN sacrificial layer and the GaN HEMT epitaxial layer as a whole, performing repeated epitaxial growth on the substrate for multiple times, and finally forming a first epitaxial structure with multiple repeated stacking layers on the substrate; depositing a dielectric layer on the outer edge of the first epitaxial structure; and using the first epitaxial structure and the dielectric layer as a first GaN HEMT epitaxial wafer. It can be seen that the first GaN HEMT epitaxial wafer can achieve the effect of being grown once and used multiple times, so as to produce several times the number of GaN HEMT devices, thereby facilitating a significant reduction in the cost of GaN HEMT device products.

Description

Technical Field

[0001] The present application relates to the field of semiconductor device process technology, and in particular to a gallium nitride high electron mobility transistor epitaxial wafer and a preparation method thereof. Background Art

[0002] Gallium nitride (GaN) high electron mobility transistor (HEMT) devices generally need to be prepared on GaN HEMT epitaxial wafers on substrates, and GaN HEMT epitaxial wafers are usually expensive, making the cost of GaN HEMT epitaxial wafers a major part of the total cost of GaN HEMT device products. Therefore, in order to reduce the cost of GaN HEMT device products, it is necessary to fundamentally reduce the cost of GaN HEMT epitaxial wafers. Summary of the invention

[0003] The present application provides a gallium nitride high electron mobility transistor epitaxial wafer and a method for preparing the same, in the hope of reducing the cost of GaN HEMT epitaxial wafers.

[0004] In a first aspect, a method for preparing a gallium nitride high electron mobility transistor epitaxial wafer of the present application comprises:

[0005] On the substrate, epitaxially grow a layer of indium gallium nitride InGaN or a highly doped N-type gallium nitride n+GaN sacrificial layer and a layer of gallium nitride high electron mobility transistor GaN HEMT epitaxial layer in sequence, wherein the InGaN or n+GaN sacrificial layer is used for GaN HEMT epitaxial stripping;

[0006] Taking the InGaN or n+GaN sacrificial layer and the GaN HEMT epitaxial layer as a whole, performing repeated epitaxial growth on the substrate for multiple times, and finally forming a first epitaxial structure with multiple repeated stacked layers on the substrate;

[0007] Depositing a dielectric layer at the outer edge of the first epitaxial structure, the dielectric layer is used to prevent the lower InGaN or n+GaN sacrificial layer from being corroded during the current epitaxial stripping corrosion;

[0008] The first epitaxial structure and the dielectric layer are used as a first GaN HEMT epitaxial wafer; wherein the first GaN HEMT epitaxial wafer is used to prepare a GaN HEMT device by using each of the GaN HEMT epitaxial layers in sequence from the top to the bottom, and then the InGaN or n+GaN sacrificial layer is used for epitaxial stripping until all the GaN HEMT epitaxial layers are used and stripped, and finally the substrate is recycled.

[0009] It can be seen that the first GaN HEMT epitaxial wafer can achieve the effect of being grown once and used multiple times, so that under the same wafer size, compared with other epitaxial wafers prepared by conventional technology, the first GaN HEMT epitaxial wafer can produce several times the number of GaN HEMT devices, which is beneficial to significantly reduce the cost of GaN HEMT device products.

[0010] Secondly, the GaN HEMT epitaxial layer grown on the substrate has better quality and characteristics, higher thickness, and fewer defects, which is beneficial to improving the performance, finished product rate, and yield rate of the prepared GaN HEMT device.

[0011] Thirdly, the damage of stripping the GaN HEMT epitaxial layer is reduced to a minimum through the InGaN or n+GaN sacrificial layer, thereby reducing the damage to the prepared GaN HEMT device caused by stripping the GaN HEMT epitaxial layer.

[0012] Finally, the dielectric layer is used to prevent the lower InGaN or n+GaN sacrificial layer from being corroded during the current epitaxial stripping. At the same time, after all GaN HEMT epitaxial layers are used and stripped, the substrate is recycled so that a new epitaxial structure can be grown on the substrate later, which is conducive to the recycling of the substrate and further reduces the cost of GaN HEMT epitaxial wafers and GaN HEMT devices.

[0013] In a second aspect, a gallium nitride high electron mobility transistor epitaxial wafer of the present application is used to prepare and peel off a GaN HEMT device using each gallium nitride high electron mobility transistor GaN HEMT epitaxial layer in order from the top to the bottom, and then epitaxially peel off using an indium gallium nitride InGaN or a highly doped N-type gallium nitride n+GaN sacrificial layer until all the GaN HEMT epitaxial layers are used and peeled off, and finally the substrate is recovered; the epitaxial wafer comprises:

[0014] A first epitaxial structure having a plurality of repeated stacked layers on the substrate, wherein the first epitaxial structure is obtained by repeatedly performing epitaxial growth on the substrate for a plurality of times with a layer of the InGaN or n+GaN sacrificial layer and a layer of the GaN HEMT epitaxial layer as a whole, and the InGaN or n+GaN sacrificial layer is used for epitaxial stripping of the GaN HEMT; and

[0015] A dielectric layer is deposited at the outer edge of the first epitaxial structure, and the dielectric layer is used to prevent the lower InGaN or n+GaN sacrificial layer from being corroded during the current epitaxial stripping corrosion.

[0016] The beneficial effects brought about by the technical solution of the second aspect can be referred to the technical effects brought about by the technical solution of the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments of the present application are briefly introduced below.

[0018] Figure 1 It is a structural schematic diagram of an epitaxial structure of a GaN HEMT provided in the present application;

[0019] Figure 2 It is a schematic diagram of the structure of a GaN HEMT epitaxial layer provided in the present application;

[0020] Figure 3 is a structural schematic diagram of another epitaxial structure of a GaN HEMT provided in the present application;

[0021] Figure 4 It is a structural schematic diagram of a GaN HEMT epitaxial wafer provided in the present application;

[0022] Figure 5 It is a structural schematic diagram of another GaN HEMT epitaxial wafer provided in the present application;

[0023] Figure 6 This is a schematic diagram of a structure after an etched stripping groove is prepared on a GaN HEMT epitaxial wafer provided in the present application;

[0024] Figure 7 It is a structural schematic diagram of an epitaxial structure provided by the present application when an electrochemical etching process is used to remove the exposed InGaN or n+GaN sacrificial layer;

[0025] Figure 8 It is a structural schematic diagram of an epitaxial structure provided by the present application when the device structure layer and the GaN HEMT epitaxial layer are peeled off;

[0026] Fig. 9 It is a schematic structural diagram of another substrate when the peeled device structure layer and GaN HEMT epitaxial layer are transferred to another substrate provided by the present application;

[0027] Fig.10 It is a schematic diagram of a process for preparing a GaN HEMT epitaxial wafer provided in the present application;

[0028] Fig.11 It is a structural schematic diagram of a GaN HEMT epitaxial wafer provided in the present application;

[0029] Fig.12It is a structural schematic diagram of a GaN HEMT epitaxial wafer provided in the present application. DETAILED DESCRIPTION

[0030] In order to enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0031] The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish different objects rather than to describe a specific order. The reference to "embodiment" in this article means that the specific features, structures or characteristics described in conjunction with the embodiment may be included in at least one embodiment of the present application. The appearance of this phrase in various positions in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments. In addition, "placed in", "placed" or "placed in" in the embodiments of the present application are the same as "deposited", which is a layer of structure deposited by thin film deposition technology in a semiconductor manufacturing process.

[0032] In the drawings provided in the embodiments of the present application, the cross-sectional view of the device structure shown may not be partially enlarged according to the general proportion, and the schematic diagram is only an exemplary description, which should not limit the scope of protection claimed in this application. At the same time, the thickness of each layer in the cross-sectional view of the device structure shown is only a schematic, which needs to be determined according to the specific semiconductor process, and does not constitute a limitation on the embodiments of the present application. In addition, the RF semiconductor device prepared in the actual preparation process for the RF semiconductor device should include three-dimensional spatial dimensions of length, width and depth.

[0033] In the embodiments of the present application, "at least one item" or similar expressions refer to any combination of these items, including any combination of single items or plural items, and refer to one or more, and multiple refers to two or more. For example, at least one item of a, b, or c can represent the following seven situations: a, b, c, a and b, a and c, b and c, a, b, and c. Among them, each of a, b, and c can be an element or a set containing one or more elements.

[0034] 1. Preparation of GaN HEMT epitaxial wafers

[0035]

describe

[0036] In order to reduce the product cost of GaN HEMT devices, it is necessary to fundamentally reduce the cost of GaN HEMT epitaxial wafers. Based on this, the present application proposes a method for preparing GaN HEMT epitaxial wafers, which is as follows:

[0037] First, a layer of indium gallium nitride (InGaN) or a highly doped N-type gallium nitride (n+GaN) sacrificial layer is epitaxially grown on the substrate, and then a GaN HEMT epitaxial layer is epitaxially grown thereon. Then, the InGaN or n+GaN sacrificial layer and the GaN HEMT epitaxial layer are used as a whole to perform repeated epitaxial growth on the substrate multiple times, and finally an epitaxial structure with multiple repeated stacked layers is formed on the substrate. Finally, a dielectric layer is deposited on the outer edge of the epitaxial structure to prepare a GaN HEMT epitaxial wafer.

[0038] In this way, since the GaN HEMT epitaxial wafer includes a plurality of repeated and overlapping InGaN or n+GaN sacrificial layers and GaN HEMT epitaxial layers epitaxially grown from bottom to top, and the GaN HEMT epitaxial layers are used to prepare GaN HEMT devices, and the InGaN or n+GaN sacrificial layers are used for GaN HEMT epitaxial stripping, the present application can use each GaN HEMT epitaxial layer in sequence from the top layer to the bottom layer to prepare the GaN HEMT device, and then use the InGaN or n+GaN sacrificial layer for epitaxial stripping until all GaN HEMT epitaxial layers are used and stripped.

[0039] It can be seen that the present application prepares GaN HEMT epitaxial wafers by repeated epitaxial growth, so that the GaN HEMT epitaxial wafer can achieve the effect of being grown once and used multiple times, so that under the same wafer size, compared with other epitaxial wafers prepared by conventional technology, the GaN HEMT epitaxial wafer can produce several times the number of GaN HEMT devices, which is beneficial to significantly reduce the cost of GaN HEMT device products.

[0040] Secondly, the GaN HEMT epitaxial layer grown on the substrate has better quality and characteristics, higher thickness, and fewer defects, which is beneficial to improving the performance, finished product rate, and yield rate of the prepared GaN HEMT device.

[0041] Thirdly, the InGaN or n+GaN sacrificial layer can minimize the damage of the stripped GaN HEMT epitaxial layer, and reduce the damage to the prepared GaN HEMT device caused by the stripped GaN HEMT epitaxial layer. At the same time, the stripped GaN HEMT epitaxial layer can be heterogeneously integrated with other semiconductor devices or circuits after transfer, so that different semiconductor materials can play their best characteristics, obtain chips or components with better performance, and realize smaller and stronger chips or components.

[0042] Finally, the dielectric layer is used to prevent the lower InGaN or n+GaN sacrificial layer from being corroded during the current epitaxial stripping corrosion. At the same time, after all GaN HEMT epitaxial layers are used and stripped, the present application can recycle the substrate so that a new epitaxial structure can be subsequently grown on the substrate, thereby facilitating the recycling of the substrate and further reducing the cost of GaN HEMT epitaxial wafers and GaN HEMT devices.

[0043]

Specific process flow

[0044] In combination with the above content, the specific process flow of preparing GaN HEMT epitaxial wafers is introduced as follows:

[0045] Step 1: Select the substrate

[0046] The substrate is the carrier of the device epitaxy and has a great influence on the RF performance. Its selection needs to comprehensively consider factors such as cost, lattice matching with the epitaxial layer, thermal conductivity, and the difficulty of obtaining large-size wafers.

[0047] Optionally, the substrate includes a silicon carbide (SiC) or a sapphire substrate.

[0048] It should be noted that, in order to ensure performance, the dielectric substrate material selected in this application is SiC or sapphire.

[0049] In this way, epitaxially growing a GaN HEMT epitaxial layer on a SiC or sapphire substrate can make the grown GaN HEMT epitaxial layer have better quality and characteristics, higher thickness, and fewer defects, thereby facilitating improving the performance, finished product rate, and yield rate of the prepared GaN HEMT device.

[0050] Step 2: Epitaxially grow an InGaN or n+GaN sacrificial layer and a GaN HEMT epitaxial layer in sequence

[0051] like Figure 1 As shown, on a substrate, an InGaN or n+GaN sacrificial layer and a GaN HEMT epitaxial layer are sequentially epitaxially grown using an epitaxial thin film preparation process.

[0052] It should be noted that InGaN and n+GaN can have good lattice matching with SiC, so that the InGaN or n+GaN sacrificial layer can have good lattice matching with the SiC substrate, so as to achieve the growth of a thicker GaN HEMT epitaxial layer with good crystal quality on the SiC substrate.

[0053] In addition, the epitaxial GaN technology on sapphire is relatively mature, and can also obtain epitaxial layers with good lattice quality and low residual stress, so that better GaN HEMT epitaxial layers can be grown on sapphire substrates. At the same time, the crystal quality of the repeatedly grown epitaxial layer is mainly related to the quality of the epitaxial layer below, which can be considered as homogeneous epitaxy, and the crystal quality will be better.

[0054] Optionally, the purpose of preparing the InGaN or n+GaN sacrificial layer may be for GaN HEMT epitaxial stripping (such as stripping the GaN HEMT epitaxial layer, stripping the GaN HEMT structural device layer, etc.), or for recovering the substrate after all GaN HEMT epitaxial layers are used and stripped.

[0055] Optionally, the InGaN sacrificial layer may include In x Ga y N sacrificial layer. Wherein, the value of x is 0.08-0.2, and x+y=1.

[0056] Optionally, the high doping concentration n+ in the n+GaN sacrificial layer is 1E19-1E20 / cm3.

[0057] Optionally, the epitaxial film preparation process may include chemical vapor deposition (CVD), physical vapor deposition (PVD), etc. Among them, CVD may include metal organic vapor phase epitaxy (MOCVD), plasma enhanced chemical vapor deposition (PECVD), etc.; PVD may include molecular beam epitaxy (MBE), pulsed laser deposition (PLD), magnetron sputtering, etc.

[0058] For example, MOCVD is used to epitaxially grow an InGaN or n+GaN sacrificial layer, and MBE or MOCVD is used to epitaxially grow a GaN HEMT epitaxial layer.

[0059] Optionally, the GaN HEMT epitaxial layer includes at least one of the following: a nucleation layer, a buffer layer, a high resistance layer, a channel layer, a barrier layer, and a cap layer, wherein the nucleation layer, the buffer layer, the high resistance layer, the channel layer, the barrier layer, and the cap layer are deposited sequentially from bottom to top.

[0060] For the nucleation layer, due to the lattice mismatch problem between the substrate and the buffer layer, such as the lattice mismatch rate between SiC and GaN is 3.5%, the present application can introduce a nucleation layer of a certain thickness (such as nanometer level) to reduce the interface tension caused by the mismatch. Among them, the nucleation layer plays an important role in reducing the current collapse caused by interface mismatch, defects or trap effects, reducing static current leakage and RF conduction, and improving RF performance. Among them, the material of the nucleation layer can include at least one of aluminum gallium nitride (AlGaN), aluminum nitride (AlN), GaN, etc.

[0061] The buffer layer has high resistivity and a thickness of usually micrometers, and is used to form a two-dimensional electron gas (2DEG) and reduce the background carrier concentration to reduce the drain current collapse caused by the buffer layer trap effect. The material of the buffer layer may include GaN, AlGaN, etc.

[0062] The high resistance layer may have high resistance characteristics to reduce device leakage and improve the breakdown characteristics and frequency characteristics of the GaN HEMT. The material of the high resistance layer may include GaN and the like.

[0063] As for the channel layer, the channel layer can provide an electron transmission channel and control the size and properties of the current, directly affecting the function and performance of the device. Among them, the material of the channel layer can include GaN and the like.

[0064] For the barrier layer, the barrier layer can provide a certain barrier height for the gate Schottky contact. Due to the influence of surface traps, a thinner barrier layer has a greater electric field strength, more serious current collapse, and lower saturated output power, but a thicker barrier layer will increase parasitic effects and reduce small signal gain characteristics. Among them, the material of the barrier layer can include at least one of AlGaN, AlN, indium aluminum nitride (InAlN), etc.

[0065] As for the cap layer, the cap layer plays an important role in reducing the collapse of the drain current and maintaining the 2DEG generated by the polarization characteristics. At the same time, it can also reduce the gate leakage current, enhance the source and drain ohmic contact and breakdown voltage. Among them, the material of the cap layer can include GaN and the like.

[0066] For example, Figure 2As shown, the GaN HEMT epitaxial layer includes an AlN nucleation layer, an AlGaN buffer layer, a GaN high resistance layer, a GaN channel layer, an AlGaN barrier layer, and a GaN cap layer which are sequentially deposited from bottom to top.

[0067] Step 3: Taking the InGaN or n+GaN sacrificial layer and the GaN HEMT epitaxial layer as a whole, multiple repeated epitaxial growths are performed on the substrate, and finally a first epitaxial structure with multiple repeated stacking layers is formed on the substrate.

[0068] like Figure 3 As shown, an InGaN or n+GaN sacrificial layer and a GaN HEMT epitaxial layer are repeatedly epitaxially grown on a substrate to form a first epitaxial structure having a plurality of repeated stacked layers.

[0069] Optionally, the number of repeated epitaxial growth is 1 to 9 times. That is, the InGaN or n+GaN sacrificial layer and the GaN HEMT epitaxial layer are taken as a whole, and the epitaxial growth is repeated 1 to 9 times on the whole. In this way, 2 to 10 InGaN or n+GaN sacrificial layers and GaN HEMT epitaxial layers can be obtained in the end.

[0070] Of course, the number of repeated epitaxial growth in the present application is not limited to 1 to 9 times, and can also be other values, which mainly depends on the process preparation capabilities and requirements.

[0071] Step 4: Deposit a dielectric layer on the outer edge of the first GaN HEMT epitaxial wafer

[0072] like Figure 4 As shown, a dielectric layer is deposited on the outer edge of the first GaN HEMT epitaxial wafer through a deposition process. The dielectric layer is used to prevent the lower InGaN or n+GaN sacrificial layer from being corroded during the current epitaxial stripping corrosion. Finally, the first epitaxial structure and the dielectric layer are used as the first GaN HEMT epitaxial wafer, thereby preparing a GaN HEMT epitaxial wafer.

[0073] In this way, the present application prepares GaN HEMT epitaxial wafers by repeating epitaxial growth multiple times, so that the GaN HEMT epitaxial wafer can achieve the effect of being grown once and used multiple times, so that the GaN HEMT epitaxial wafer can produce several times the number of GaN HEMT devices under other epitaxial wafers prepared by conventional technology of the same size, thereby helping to significantly reduce the cost of GaN HEMT device products.

[0074] Step 5: Use each GaN HEMT epitaxial layer in order from the top to the bottom to prepare the GaN HEMT device, and do not perform edge removal in the glue coating process in the process of preparing the metal wire contact lead pad (PAD) of the GaN HEMT device, and finally form the device structure layer

[0075] It should be noted that after the first GaN HEMT epitaxial wafer is prepared, each GaN HEMT epitaxial layer can be used in sequence from the uppermost layer to the lowermost layer to prepare a GaN HEMT device.

[0076] At the same time, the glue coating process in the process of preparing the metal line contact PAD of the GaN HEMT device does not perform edge removal. This is because a dielectric layer is deposited on the outer edge of the first epitaxial structure, and the glue coating process without edge removal can effectively protect the dielectric layer, and the dielectric film can protect the lower InGaN or n+GaN sacrificial layer from being corroded by the subsequent stripping and etching process.

[0077] Then, after each front side process of the GaN HEMT device is completed, a device structure layer is formed on the GaN HEMT epitaxial layer, and the GaN HEMT device is composed of the GaN HEMT epitaxial layer and the device structure layer.

[0078] For example, Figure 5 As shown, the current GaN HEMT device is prepared using the current GaN HEMT epitaxial layer, and after the front process of the current GaN HEMT device is completed, the current device structure layer is formed on the current GaN HEMT epitaxial layer. The current GaN HEMT device is composed of the current GaN HEMT epitaxial layer and the current device structure layer.

[0079] Optionally, in each process of using the GaN HEMT epitaxial layer to prepare a GaN HEMT device, the etching depth does not exceed the bottom of the next layer of the used GaN HEMT epitaxial layer (ie, the InGaN or n+GaN sacrificial layer).

[0080] This is because, taking the current GaN HEMT epitaxial layer as an example, the etching depth in the preparation process of the current GaN HEMT device does not exceed the bottom of the current InGaN or n+GaN sacrificial layer. In this way, it is possible to avoid damage to the GaN HEMT epitaxial layer below the current InGaN or n+GaN sacrificial layer, ensuring that the preparation of the subsequent GaN HEMT device is not affected by the previous preparation process.

[0081] Step 6: Etch the device structure layer and GaN HEMT epitaxial layer using an etching process to expose the InGaN or n+GaN sacrificial layer

[0082] In order to perform epitaxial stripping of the GaN HEMT device that has completed the front-side process, it is necessary to first use an etching process to etch the device structure layer and the GaN HEMT epitaxial layer to expose the InGaN or n+GaN sacrificial layer. This makes it easy to etch the exposed InGaN or n+GaN sacrificial layer for GaN HEMT epitaxial stripping.

[0083] For example, Figure 6 As shown, the device structure layer and the GaN HEMT epitaxial layer are etched by an etching process to prepare an etching stripping groove, which penetrates the device structure layer and the GaN HEMT epitaxial layer to expose the InGaN or n+GaN sacrificial layer. The etching stripping groove can be used to separate and etch and strip GaN HEMT devices from each other.

[0084] Taking the completion of the front process of the current GaN HEMT device as an example, an etching process is used to prepare a current corrosion stripping groove, which penetrates the current device structure layer and the current GaN HEMT epitaxial layer to expose the current InGaN or n+GaN sacrificial layer. The current corrosion stripping groove can be used to separate and corrode the current GaN HEMT device.

[0085] Step 7: Remove the exposed InGaN or n+GaN sacrificial layer by etching, so that the device structure layer and GaN HEMT epitaxial layer are peeled off from the first GaN HEMT epitaxial wafer.

[0086] In this way, the present application can be to peel off the device structure layer and the GaN HEMT epitaxial layer.

[0087] Optionally, the etching process may include removing the exposed n+GaN sacrificial layer using an electrochemical etching process, such as Figure 7 shown.

[0088] exist Figure 7 In the process, the first GaN HEMT epitaxial wafer is immersed in a corrosion electrolyte, and the corrosion electrolyte is energized through the inert metal connected to the positive and negative electrodes, so as to remove the exposed n+GaN sacrificial layer by an electrochemical corrosion process. The corrosion electrolyte may include HF mixed solution, oxalic acid mixed solution, nitric acid mixed solution, etc.; a bias voltage of 5 to 30V is applied to the positive and negative electrodes. Of course, the surface of the epitaxial wafer can be protected by photoresist to prevent corrosion of the contact holes opened.

[0089] Optionally, the etching process may include using an etching solution and ultraviolet light irradiation in a light-assisted electrochemical etching process to remove the exposed InGaN sacrificial layer. The etching solution may include a KOH aqueous solution; the ultraviolet light wavelength λ may be greater than 366nm and less than the wavelength of the absorption edge of the forbidden band of InxGaN. Of course, the surface of the epitaxial wafer may be protected by photoresist to prevent the contact holes from being corroded.

[0090] Optionally, the component is InxGaN, x=0.12, and the ultraviolet light wavelength λ is 400nm.

[0091] In this way, the device structure layer and the GaN HEMT epitaxial layer are peeled off from the first GaN HEMT epitaxial wafer by an etching process, as shown in FIG. Figure 8 shown.

[0092] Step 8: Use flexible tape or transfer carrier to stick the peeled device structure layer and GaN HEMT epitaxial layer, and transfer them to other required substrates

[0093] It should be noted that after the device structure layer and the GaN HEMT epitaxial layer are peeled off, the peeled device structure layer and the GaN HEMT epitaxial layer are fished out, dried, and then transferred.

[0094] It can be seen that the present application can transfer the stripped device structure layer and the GaN HEMT epitaxial layer, so that the stripped GaN HEMT epitaxial layer can be heterogeneously integrated with other semiconductor devices or circuits after the transfer, so that different semiconductor materials can give full play to their respective optimal characteristics, obtain chips or components with better performance, and realize smaller and stronger chips or components.

[0095] For example, Fig. 9 As shown, the peeled device structure layer and GaN HEMT epitaxial layer are transferred to other substrates.

[0096] Optionally, the flexible tape may include an ultraviolet (UV) tape.

[0097] Optionally, the transfer carrier may include a quartz glass sheet, a sapphire sheet, etc.

[0098] Optionally, other substrates may include a diamond substrate, an AlN substrate, a SiC substrate, glass, or a wafer containing devices / circuits, etc.

[0099] Step 9: After the remaining first GaN HEMT epitaxial wafer is cleaned, it is put back into use until all GaN HEMT epitaxial layers are used and stripped, finally exposing the substrate

[0100] For example, the surface of the first GaN HEMT epitaxial wafer is cleaned and etched, and the remaining GaN HEMT epitaxial layers in the first GaN HEMT epitaxial wafer are continuously used to prepare other GaN HEMT devices until all GaN HEMT epitaxial layers are used and stripped off, and finally the substrate is exposed.

[0101] Step 10: Recycle the substrate, clean the surface and start new epitaxial growth

[0102] In this way, after all GaN HEMT epitaxial layers are used and stripped, the present application can recycle the substrate so as to subsequently epitaxially grow a new epitaxial structure on the substrate, thereby facilitating the recycling of the substrate and further reducing the cost of GaN HEMT epitaxial wafers and GaN HEMT devices.

[0103] For example, the substrate is recycled, and the InGaN or n+GaN sacrificial layer and the GaN HEMT epitaxial layer are continued to be a whole, or other sacrificial layers and other GaN epitaxial layers are taken as a whole, and repeated epitaxial growth is performed on the substrate for multiple times to form a second epitaxial structure with multiple repeated stacking layers, so that the substrate and the second epitaxial structure are used as a second GaN HEMT epitaxial wafer, thereby preparing a new GaN HEMT epitaxial wafer.

[0104] Among them, the other sacrificial layer can be understood as a sacrificial layer whose material is not InGaN or n+GaN, for example, the other sacrificial layer is a niobium nitride (NbNx) sacrificial layer, etc.; the other GaN epitaxial layer can be understood as an epitaxial layer with a different film layer from the GaN HEMT epitaxial layer.

[0105] It should be noted that when the InGaN or n+GaN sacrificial layer and the GaN HEMT epitaxial layer are repeatedly epitaxially grown as a whole, the number of repeated epitaxial growths can be the same as the previous time, or the number of repeated epitaxial growths can be different from the previous time, which is determined by the preparation process and requirements and is not specifically limited.

[0106] 2. An example of a method for preparing a GaN HEMT epitaxial wafer

[0107] In combination with the above content, the following is an example of the preparation method of the GaN HEMT epitaxial wafer of the present application. Fig.10 As shown. Fig.10 In the present invention, the GaN HEMT epitaxial wafer preparation method may include the following steps:

[0108] S1010, epitaxially growing an InGaN or n+GaN sacrificial layer and a GaN HEMT epitaxial layer in sequence on a substrate, wherein the InGaN or n+GaN sacrificial layer is used for GaN HEMT epitaxial stripping.

[0109] S1020, taking the InGaN or n+GaN sacrificial layer and the GaN HEMT epitaxial layer as a whole, repeatedly performing epitaxial growth on the substrate for multiple times, and finally forming a first epitaxial structure with multiple repeated stacked layers on the substrate.

[0110] S1030, depositing a dielectric layer at the outer edge of the first epitaxial structure, the dielectric layer is used to prevent the lower InGaN or n+GaN sacrificial layer from being corroded during the current epitaxial stripping corrosion.

[0111] S1040, using the first epitaxial structure and the dielectric layer as a first GaN HEMT epitaxial wafer; wherein the first GaN HEMT epitaxial wafer is used to sequentially use each GaN HEMT epitaxial layer in order from the top to the bottom to prepare a GaN HEMT device, and then use an InGaN or n+GaN sacrificial layer to perform epitaxial stripping until all GaN HEMT epitaxial layers are used and stripped, and finally the substrate is recovered.

[0112] It can be seen that the first GaN HEMT epitaxial wafer can achieve the effect of being grown once and used multiple times, so that under the same wafer size, compared with other epitaxial wafers prepared by conventional technology, the first GaN HEMT epitaxial wafer can produce several times the number of GaN HEMT devices, which is beneficial to significantly reduce the cost of GaN HEMT device products.

[0113] Secondly, the GaN HEMT epitaxial layer grown on the substrate has better quality and characteristics, higher thickness, and fewer defects, which is beneficial to improving the performance, finished product rate, and yield rate of the prepared GaN HEMT device.

[0114] Thirdly, the damage of stripping the GaN HEMT epitaxial layer is reduced to a minimum through the InGaN or n+GaN sacrificial layer, thereby reducing the damage to the prepared GaN HEMT device caused by stripping the GaN HEMT epitaxial layer.

[0115] Finally, the dielectric layer is used to prevent the lower InGaN or n+GaN sacrificial layer from being corroded during the current epitaxial stripping. At the same time, after all GaN HEMT epitaxial layers are used and stripped, the substrate is recycled so that a new epitaxial structure can be grown on the substrate later, which is conducive to the recycling of the substrate and further reduces the cost of GaN HEMT epitaxial wafers and GaN HEMT devices.

[0116] Optionally, the GaN HEMT epitaxial layer includes at least one of the following:

[0117] Nucleation layer, buffer layer, high resistance layer, channel layer, barrier layer, cap layer;

[0118] The nucleation layer, buffer layer, high resistance layer, channel layer, barrier layer and cap layer are deposited in sequence from bottom to top.

[0119] Optionally, the epitaxial growth is repeated 1 to 9 times.

[0120] Optionally, after obtaining the first GaN HEMT epitaxial wafer, the method further comprises the following steps:

[0121] Using the current GaN HEMT epitaxial layer in the first GaN HEMT epitaxial wafer to prepare the current GaN HEMT device, and not performing edge removal in the glue coating process in the metal wire contact lead pad process of preparing the current GaN HEMT device;

[0122] After completing the front process of the current GaN HEMT device, a current device structure layer is formed on the current GaN HEMT epitaxial layer, wherein the current GaN HEMT device is composed of the current GaN HEMT epitaxial layer and the current device structure layer;

[0123] Etching the current device structure layer and the current GaN HEMT epitaxial layer by using an etching process to expose the current InGaN or n+GaN sacrificial layer, wherein the current InGaN or n+GaN sacrificial layer is located under the current GaN HEMT epitaxial layer in the first GaN HEMT epitaxial wafer;

[0124] The current InGaN or n+GaN sacrificial layer is removed by an etching process, so that the current device structure layer and the current GaN HEMT epitaxial layer are peeled off from the first GaN HEMT epitaxial wafer.

[0125] Optionally, the etching depth in the current preparation process of the GaN HEMT device does not exceed the bottom of the current InGaN or n+GaN sacrificial layer.

[0126] Optionally, etching the current device structure layer and the current GaN HEMT epitaxial layer to expose the current InGaN or n+GaN sacrificial layer by using an etching process, including:

[0127] The current etching stripping groove is prepared by etching process, and the current etching stripping groove penetrates the current device structure layer and the current GaN HEMT epitaxial layer to expose the current InGaN or n+GaN sacrificial layer. The current etching stripping groove is used to separate and etch the current GaN HEMT device.

[0128] Optionally, an etching process is used to remove the current InGaN or n+GaN sacrificial layer, including:

[0129] Remove the current InGaN sacrificial layer using a light-assisted electrochemical etching process; or,

[0130] The n+GaN sacrificial layer is removed by electrochemical etching process.

[0131] Optionally, after the current device structure layer and the current GaN HEMT epitaxial layer are peeled off from the first GaN HEMT epitaxial wafer, the method further comprises the following steps:

[0132] The peeled current device structure layer and the current GaN HEMT epitaxial layer are pasted using a flexible tape or a transfer carrier, and transferred to other required substrates.

[0133] Optionally, after the current device structure layer and the current GaN HEMT epitaxial layer are peeled off from the first GaN HEMT epitaxial wafer, the method further comprises the following steps:

[0134] Cleaning and etching the surface of the first GaN HEMT epitaxial wafer, and continuing to use the remaining GaN HEMT epitaxial layers in the first GaN HEMT epitaxial wafer to prepare other GaN HEMT devices, until all GaN HEMT epitaxial layers are used and stripped off, and finally the substrate is exposed;

[0135] Recovering the substrate, and continuing to perform multiple repeated epitaxial growth on the substrate with the InGaN or n+GaN sacrificial layer and the GaN HEMT epitaxial layer as a whole, or with other sacrificial layers and other GaN epitaxial layers as a whole, to form a second epitaxial structure with multiple repeated stacked layers;

[0136] The substrate and the second epitaxial structure are used as a second GaN HEMT epitaxial wafer.

[0137] 3. An example of the structure of a GaN HEMT epitaxial wafer

[0138] In combination with the above content, the GaN HEMT epitaxial wafer of the present application is illustrated below. Fig.11 As shown. Fig.11 In the embodiment, the GaN HEMT epitaxial wafer 1100 includes a first epitaxial structure 1120 having a plurality of repeated stacks on a substrate 1110 , and a dielectric layer 1130 deposited on an outer edge of the first epitaxial structure 1120 .

[0139] The first epitaxial structure 1120 is obtained by performing multiple repeated epitaxial growth on the substrate 1110 with a layer of InGaN or n+GaN sacrificial layer and a layer of GaN HEMT epitaxial layer as a whole.

[0140] Among them, the InGaN or n+GaN sacrificial layer is used for GaN HEMT epitaxial lift-off.

[0141] The dielectric layer 1130 is used to prevent the lower InGaN or n+GaN sacrificial layer from being corroded during the current epitaxial stripping corrosion.

[0142] The GaN HEMT epitaxial wafer 1100 is used to prepare GaN HEMT devices by using each GaN HEMT epitaxial layer in order from the top to the bottom, and then epitaxial stripping is performed using an InGaN or n+GaN sacrificial layer until all GaN HEMT epitaxial layers are used and stripped, and finally the substrate 1110 is recycled. It can be seen that the first GaN HEMT epitaxial wafer can achieve the effect of one-time growth and multiple uses, so that under the same wafer size, compared with other epitaxial wafers prepared by conventional technology, the first GaN HEMT epitaxial wafer can produce several times the number of GaN HEMT devices, which is conducive to significantly reducing the cost of GaN HEMT device products.

[0143] Secondly, the GaN HEMT epitaxial layer grown on the substrate has better quality and characteristics, higher thickness, and fewer defects, which is beneficial to improving the performance, finished product rate, and yield rate of the prepared GaN HEMT device.

[0144] Thirdly, the damage of stripping the GaN HEMT epitaxial layer is reduced to a minimum through the InGaN or n+GaN sacrificial layer, thereby reducing the damage to the prepared GaN HEMT device caused by stripping the GaN HEMT epitaxial layer.

[0145] Finally, the dielectric layer is used to prevent the lower InGaN or n+GaN sacrificial layer from being corroded during the current epitaxial stripping. At the same time, after all GaN HEMT epitaxial layers are used and stripped, the substrate is recycled so that a new epitaxial structure can be grown on the substrate later, which is conducive to the recycling of the substrate and further reduces the cost of GaN HEMT epitaxial wafers and GaN HEMT devices.

[0146] Optionally, the material of the substrate 1110 is SiC or sapphire.

[0147] Optionally, the GaN HEMT epitaxial layer includes at least one of the following: a nucleation layer, a buffer layer, a high resistance layer, a channel layer, a barrier layer, and a cap layer, wherein the nucleation layer, the buffer layer, the high resistance layer, the channel layer, the barrier layer, and the cap layer are deposited sequentially from bottom to top.

[0148] Optionally, the epitaxial growth is repeated 1 to 9 times.

[0149] Optional, in Fig.12 In the figure, the first epitaxial structure 1120 includes a current InGaN or n+GaN sacrificial layer 1121 , a current GaN HEMT epitaxial layer 1122 , a current device structure layer 1123 , a current etching stripping groove 1124 , and a dielectric layer 1130 .

[0150] The current InGaN or n+GaN sacrificial layer 1121 is located under the current GaN HEMT epitaxial layer 1122 .

[0151] The current GaN HEMT epitaxial layer 1122 is located under the current device structure layer 1123 .

[0152] The current GaN HEMT device is composed of a current GaN HEMT epitaxial layer 1122 and a current device structure layer 1123 .

[0153] The current etching stripping groove 1124 penetrates the current device structure layer 1123 and the current GaN HEMT epitaxial layer 1122 to expose the current InGaN or n+GaN sacrificial layer 1121 , and the current etching stripping groove 1124 is used to separate and etch the current GaN HEMT device.

[0154] Optionally, the current InGaN or n+GaN sacrificial layer 1121 may be one or more; the current GaN HEMT epitaxial layer 1122 may be one or more; the current device structure layer 1123 may be one or more; and the current etching stripping groove 1124 may be one or more.

[0155] Optionally, the first epitaxial structure 1120 further includes a plurality of repeatedly stacked InGaN or n+GaN sacrificial layers and a GaN HEMT epitaxial layer under the current InGaN or n+GaN sacrificial layer 1121 .

[0156] It should be noted that, for the above-mentioned various method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. Those skilled in the art should be aware that the present application is not limited by the described order of actions, because some steps in the embodiments of the present application can be performed in other orders or simultaneously. In addition, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present application.

[0157] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0158] The embodiments of the present application are described in detail above, and the description in the embodiments of the present application is only used to help understand the method and core idea of ​​the present application. Those skilled in the art should know that the embodiments of the present application may be changed in specific implementation and application scope, and the content of this specification should not be construed as limiting the present application.

Claims

1. A method for preparing a gallium nitride high electron mobility transistor epitaxial wafer, characterized in that: include: On the substrate, epitaxially grow a layer of indium gallium nitride InGaN or a highly doped N-type gallium nitride n+GaN sacrificial layer and a layer of gallium nitride high electron mobility transistor GaN HEMT epitaxial layer in sequence, wherein the InGaN or n+GaN sacrificial layer is used for GaN HEMT epitaxial stripping; Taking the InGaN or n+GaN sacrificial layer and the GaN HEMT epitaxial layer as a whole, performing repeated epitaxial growth on the substrate for multiple times, and finally forming a first epitaxial structure with multiple repeated stacked layers on the substrate; Depositing a dielectric layer at the outer edge of the first epitaxial structure, the dielectric layer is used to prevent the lower InGaN or n+GaN sacrificial layer from being corroded during the current epitaxial stripping corrosion; The first epitaxial structure and the dielectric layer are used as a first GaN HEMT epitaxial wafer; wherein the first GaN HEMT epitaxial wafer is used to prepare a GaN HEMT device by using each of the GaN HEMT epitaxial layers in order from the top to the bottom, and then the InGaN or n+GaN sacrificial layer is used for epitaxial stripping until all the GaN HEMT epitaxial layers are used and stripped, and finally the substrate is recycled; Using the current GaN HEMT epitaxial layer in the first GaN HEMT epitaxial wafer to prepare a current GaN HEMT device, and not performing edge removal in a glue coating process in a metal wire contact lead pad process of preparing the current GaN HEMT device to protect the dielectric layer; After completing the front process of the current GaN HEMT device, forming a current device structure layer on the current GaN HEMT epitaxial layer, wherein the current GaN HEMT device is composed of the current GaN HEMT epitaxial layer and the current device structure layer; Etching the current device structure layer and the current GaN HEMT epitaxial layer by an etching process to expose a current InGaN or n+GaN sacrificial layer, wherein the current InGaN or n+GaN sacrificial layer is located under the current GaN HEMT epitaxial layer in the first GaN HEMT epitaxial wafer; The current InGaN or n+GaN sacrificial layer is removed by an etching process, so that the current device structure layer and the current GaN HEMT epitaxial layer are peeled off from the first GaN HEMT epitaxial wafer.

2. The method according to claim 1, characterized in that The GaN HEMT epitaxial layer includes at least one of the following: Nucleation layer, buffer layer, high resistance layer, channel layer, barrier layer, cap layer; The nucleation layer, the buffer layer, the high resistance layer, the channel layer, the barrier layer and the cap layer are deposited sequentially from bottom to top.

3. The method according to claim 1 or 2, characterized in that: The number of times of repeating the epitaxial growth is 1 to 9 times.

4. The method according to claim 1, characterized in that The etching depth during the preparation process of the current GaN HEMT device does not exceed the bottom of the current InGaN or n+GaN sacrificial layer.

5. The method according to claim 1, characterized in that The etching process is used to etch the current device structure layer and the current GaN HEMT epitaxial layer to expose the current InGaN or n+GaN sacrificial layer, including: The current etching stripping groove is prepared by etching process, and the current etching stripping groove penetrates the current device structure layer and the current GaN HEMT epitaxial layer to expose the current InGaN or n+GaN sacrificial layer. The current etching stripping groove is used to separate and etch the current GaN HEMT device.

6. The method according to claim 5, characterized in that The method of removing the current InGaN or n+GaN sacrificial layer by an etching process includes: Using a light-assisted electrochemical etching process to remove the current InGaN sacrificial layer; or, The n+GaN sacrificial layer is removed by an electrochemical etching process.

7. The method according to claim 1, characterized in that After the current device structure layer and the current GaN HEMT epitaxial layer are peeled off from the first GaN HEMT epitaxial wafer, the method further includes: The peeled current device structure layer and the current GaN HEMT epitaxial layer are pasted using a flexible tape or a transfer carrier, and transferred to other required substrates.

8. The method according to claim 1, characterized in that: After the current device structure layer and the current GaN HEMT epitaxial layer are peeled off from the first GaN HEMT epitaxial wafer, the method further includes: Cleaning and etching the surface of the first GaN HEMT epitaxial wafer, and continuing to use the remaining GaN HEMT epitaxial layers in the first GaN HEMT epitaxial wafer to prepare other GaN HEMT devices, until all the GaN HEMT epitaxial layers are used and stripped off, and finally the substrate is exposed; Recovering the substrate, and continuing to perform multiple repeated epitaxial growth on the substrate with the InGaN or n+GaN sacrificial layer and the GaN HEMT epitaxial layer as a whole, or with other sacrificial layers and other GaN epitaxial layers as a whole, to form a second epitaxial structure with multiple repeated stacked layers; The substrate and the second epitaxial structure are used as a second GaN HEMT epitaxial wafer.

9. A gallium nitride high electron mobility transistor epitaxial wafer, characterized in that: The method is used to prepare and peel off the GaN HEMT device by using each GaN HEMT epitaxial layer in order from the top to the bottom, and then use the indium gallium nitride InGaN or the high-doped N-type gallium nitride n+GaN sacrificial layer to perform epitaxial peeling until all the GaN HEMT epitaxial layers are used and peeled off, and finally the substrate is recovered; the epitaxial wafer includes: A first epitaxial structure having a plurality of repeated stacked layers on the substrate, wherein the first epitaxial structure is obtained by repeatedly performing epitaxial growth on the substrate for a plurality of times with a layer of the InGaN or n+GaN sacrificial layer and a layer of the GaN HEMT epitaxial layer as a whole, and the InGaN or n+GaN sacrificial layer is used for epitaxial stripping of the GaN HEMT; and A dielectric layer deposited at the outer edge of the first epitaxial structure, the dielectric layer being used to prevent the lower InGaN or n+GaN sacrificial layer from being corroded during the current epitaxial stripping corrosion; The first epitaxial structure includes a current InGaN or n+GaN sacrificial layer, a current GaN HEMT epitaxial layer, a current device structure layer, a current etching stripping groove, and the dielectric layer; The current InGaN or n+GaN sacrificial layer is located below the current GaN HEMT epitaxial layer; The current GaN HEMT epitaxial layer is located in a layer below the current device structure layer; The current GaN HEMT device is composed of the current GaN HEMT epitaxial layer and the current device structure layer; The current etching stripping groove penetrates the current device structure layer and the current GaN HEMT epitaxial layer to expose the current InGaN or n+GaN sacrificial layer, and the current etching stripping groove is used to separate and etch and strip the current GaN HEMT device.

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