A field effect transistor with a pulse power amplifier

Abstract

The present invention discloses a field effect transistor with a pulse power amplifier, comprising an insulating substrate, a conductive channel layer, a source electrode, a gate electrode and a drain electrode, wherein the conductive channel layer is arranged on the upper surface of the insulating substrate, an insulating protective layer is arranged on the upper surface of the conductive channel layer, a first N-type region is arranged on one side inside the insulating protective layer, and a second N-type region is arranged on the other side inside the insulating protective layer, the source electrode covers the upper surface of the first N-type region, the drain electrode covers the upper surface of the second N-type region, the gate electrode is arranged at the center of the surface of the insulating protective layer, a signal amplification region is arranged inside the insulating substrate, and a pulse power amplifier module is arranged inside the signal amplification region. The present invention can increase the output power and the amplitude of the signal, can realize efficient, stable and reliable pulse signal amplification, and can meet the needs of specific applications.

Description

Technical Field

[0001] The invention relates to the technical field of field effect transistors, in particular to a field effect transistor with a pulse power amplifier. Background Art

[0002] A field effect transistor is a type of transistor that uses an electric field to control the flow of current in a semiconductor. A field effect transistor is a device with three terminals: source, gate, and drain. A FET controls the flow of current by applying a voltage to the gate, which changes the conductivity between the drain and source.

[0003] The Chinese patent with the number CN210866187U discloses a field effect transistor, including a substrate, a conductive channel, a source electrode, a drain electrode, an aluminum oxide gate dielectric layer and a gate electrode, wherein a dielectric layer is provided on the substrate, the conductive channel is provided on the dielectric layer, the source electrode and the drain electrode are respectively located on both sides of the conductive channel, the source electrode, the drain electrode and the exposed conductive channel surface are covered with a seed layer, the gate dielectric layer is provided on the seed layer, and the gate electrode is provided on the gate dielectric layer. The conductive channel is a two-dimensional material conductive channel. The substrate is a high-resistance intrinsic silicon substrate. The dielectric layer is a silicon dioxide dielectric layer. The present application uses ALD to deposit a high-K dielectric Al2O3 as a top gate dielectric layer on the device surface.

[0004] The Chinese patent number CN206003780U discloses a MOS transistor. In the MOS transistor of the present invention, a doping region is set at a specific position below the gate between the source and the drain. After the doping position is fixed, the performance of the MOS transistor no longer has the volatility caused by random doping of the channel region, making the performance of the MOS transistor more stable.

[0005] The above-mentioned field effect transistor simplifies the process steps, reduces the damage of the process to the conductive channel of the two-dimensional material, and reduces the thickness of the gate dielectric layer without changing the function of the top gate dielectric layer, thereby improving the device performance; although the transistor performance no longer has the volatility caused by random doping in the channel region, making the performance of the MOS transistor more stable, the amplitude of the signal output by the field effect transistor is limited, and the signal power is weak, which is difficult to meet the needs of specific applications, and therefore needs to be improved. Summary of the invention

[0006] The object of the present invention is to provide a field effect transistor with a pulse power amplifier to solve the problems raised in the above background technology.

[0007] To achieve the above-mentioned purpose, the present invention provides the following technical solutions: a field effect transistor with a pulse power amplifier, comprising an insulating substrate, a conductive channel layer, a source electrode, a gate electrode and a drain electrode, wherein the conductive channel layer is arranged on the upper surface of the insulating substrate, an insulating protection layer is arranged on the upper surface of the conductive channel layer, a first N-type region is arranged on one side inside the insulating protection layer, and a second N-type region is arranged on the other side inside the insulating protection layer, the source electrode covers the upper surface of the first N-type region, the drain electrode covers the upper surface of the second N-type region, depletion layers are arranged on the outer sides of the first N-type region and the second N-type region, the gate electrode is arranged at the center of the surface of the insulating protection layer, a signal amplification region is arranged inside the insulating substrate, and a pulse power amplifier module is arranged inside the signal amplification region, and a substrate layer is arranged on the lower surface of the insulating substrate.

[0008] Preferably, the insulating substrate is a P-type semiconductor material.

[0009] Preferably, the outer sides of the insulating substrate, the conductive channel layer and the insulating protective layer are encapsulated with an encapsulation protective layer, which plays a good protective role on the field effect transistor.

[0010] Preferably, a surface channel is provided on the surface of the conductive channel layer.

[0011] Preferably, the insulating protective layer is made of silicon dioxide material.

[0012] Preferably, a P-type nickel oxide thin film layer is provided on the outer surface of the gate electrode to protect the gate electrode.

[0013] Preferably, a gate insulating layer is provided on the lower surface of the gate electrode to provide insulation.

[0014] Preferably, the gate insulating layer is made of silicon dioxide material.

[0015] Preferably, the encapsulation protection layer is a gallium oxide thin film layer.

[0016] Preferably, the surface channel is made of graphene material, which has very excellent electrical, thermal and mechanical properties and has an implicit amplifying effect on the signal of the field effect transistor.

[0017] Compared with the prior art, the beneficial effects of the present invention are: the field effect transistor with a pulse power amplifier can increase the output power and the amplitude of the signal, can achieve efficient, stable and reliable pulse signal amplification, and can meet the needs of specific applications;

[0018] The field effect transistor is mainly composed of an insulating substrate, a conductive channel layer, an insulating protection layer, a first N-type region, a source electrode, a second N-type region, a drain electrode, and a gate electrode. Since a signal amplification region is provided inside the insulating substrate, and a pulse power amplifier module is provided inside the signal amplification region, the pulse power amplifier module can amplify a low-voltage, low-current signal into a high-voltage, high-current signal, thereby increasing the output power and the amplitude of the signal. Through appropriate power amplifier selection and optimization, efficient, stable and reliable pulse signal amplification can be achieved, thereby meeting the needs of specific applications. Secondly, the surface channel on the surface of the conductive channel layer is made of graphene material, which has very excellent electrical, thermal and mechanical properties, and has an implicit amplification effect on the signal of the field effect transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a schematic diagram of the main structure of the present invention;

[0020] Figure 2 For the present invention Figure 1 The enlarged structural diagram at A in the middle;

[0021] Figure 3 It is a side view structural schematic diagram of the present invention;

[0022] Figure 4 It is a cross-sectional structural schematic diagram of the present invention;

[0023] Figure 5 It is a schematic diagram of the three-dimensional amplification structure of the pulse power amplifier module of the present invention;

[0024] Figure 6 It is a schematic diagram of a partially enlarged structure of the conductive channel layer of the present invention.

[0025] In the figure: 1. insulating substrate; 2. conductive channel layer; 3. first N-type region; 4. source electrode; 5. insulating protection layer; 6. gate electrode; 7. gate insulating layer; 8. second N-type region; 9. drain electrode; 10. depletion layer; 11. encapsulation protection layer; 12. substrate layer; 13. signal amplification region; 14. pulse power amplifier module; 15. P-type nickel oxide thin film layer; 16. surface channel. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "vertical", "horizontal", "inner", "outer", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the invented product is usually placed when in use. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0028] In addition, the terms "horizontal", "vertical" and the like do not mean that the components are required to be absolutely horizontal or suspended, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0029] In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0030] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. All other embodiments obtained by ordinary technicians in the field without making creative work based on the embodiments of the present invention shall fall within the scope of protection of the present invention.

[0031] See also Figure 1-6, an embodiment of the present invention: a field effect transistor with a pulse power amplifier, comprising an insulating substrate 1, a conductive channel layer 2, a source electrode 4, a gate electrode 6 and a drain electrode 9, the conductive channel layer 2 is arranged on the upper surface of the insulating substrate 1, an insulating protection layer 5 is arranged on the upper surface of the conductive channel layer 2, a first N-type region 3 is arranged on one side inside the insulating protection layer 5, and a second N-type region 8 is arranged on the other side inside the insulating protection layer 5, the source electrode 4 covers the upper surface of the first N-type region 3, the drain electrode 9 covers the upper surface of the second N-type region 8, a depletion layer 10 is arranged on the outer sides of the first N-type region 3 and the second N-type region 8, and the gate electrode 6 is arranged at the center of the surface of the insulating protection layer 5;

[0032] A signal amplification area 13 is disposed inside the insulating substrate 1, and a pulse power amplifier module 14 is disposed inside the signal amplification area 13. A substrate layer 12 is disposed on the lower surface of the insulating substrate 1.

[0033] The insulating substrate 1 is a P-type semiconductor material;

[0034] The outer sides of the insulating substrate 1, the conductive channel layer 2 and the insulating protective layer 5 are encapsulated with an encapsulation protective layer 11, which plays a good protective role for the field effect transistor;

[0035] The surface of the conductive channel layer 2 is provided with a surface channel 16;

[0036] The insulating protective layer 5 is made of silicon dioxide material;

[0037] The outer surface of the gate electrode 6 is provided with a P-type nickel oxide thin film layer 15, which plays a good protective role for the gate electrode 6;

[0038] The lower surface of the gate electrode 6 is provided with a gate insulating layer 7, which has an insulating function;

[0039] The gate insulating layer 7 is made of silicon dioxide;

[0040] The encapsulation protection layer 11 is a gallium oxide thin film layer;

[0041] The surface channel 16 is made of graphene, which has very excellent electrical, thermal and mechanical properties and has an implicit amplification effect on the signal of the field effect transistor.

[0042] When the embodiment of the present application is used: first, the field effect transistor is mainly composed of an insulating substrate 1, a conductive channel layer 2, an insulating protection layer 5, a first N-type region 3, a source electrode 4, a second N-type region 8, a drain electrode 9, and a gate electrode 6. Since a signal amplification region 13 is provided inside the insulating substrate 1, and a pulse power amplifier module 14 is provided inside the signal amplification region 13, the pulse power amplifier module 14 can amplify a low-voltage, low-current signal into a high-voltage, high-current signal, thereby increasing the output power and the amplitude of the signal. Through appropriate power amplifier selection and optimization, efficient, stable and reliable pulse signal amplification can be achieved, thereby meeting the needs of specific applications. Secondly, the surface channel 16 on the surface of the conductive channel layer 2 is made of graphene, which has very excellent electrical, thermal and mechanical properties, and has an implicit amplification effect on the signal of the field effect transistor. Then, the encapsulation protection layer 11 on the outside of the field effect transistor is a gallium oxide thin film layer, which plays a good protective role on the field effect transistor. The P-type nickel oxide thin film layer 15 arranged on the outer surface of the gate electrode 6 plays a protective role on the gate electrode 6.

[0043] Obviously, the above-described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0044] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0045] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein.

[0046] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A field effect transistor with a pulse power amplifier, characterized in that: The invention comprises an insulating substrate (1), a conductive channel layer (2), a source electrode (4), a gate electrode (6) and a drain electrode (9), wherein the conductive channel layer (2) is arranged on the upper surface of the insulating substrate (1), an insulating protection layer (5) is arranged on the upper surface of the conductive channel layer (2), a first N-type region (3) is arranged on one side inside the insulating protection layer (5), and a second N-type region (8) is arranged on the other side inside the insulating protection layer (5), the source electrode (4) covers the upper surface of the first N-type region (3), the drain electrode (9) covers the upper surface of the second N-type region (8), and the outer surfaces of the first N-type region (3) and the second N-type region (8) are A depletion layer (10) is arranged on both sides of the insulating protective layer (5), the gate electrode (6) is arranged at the center of the surface of the insulating protective layer (5), a signal amplification area (13) is arranged inside the insulating substrate (1), and a pulse power amplifier module (14) is arranged inside the signal amplification area (13), a substrate layer (12) is arranged on the lower surface of the insulating substrate (1), the insulating substrate (1) is a P-type semiconductor material, a surface channel (16) is arranged on the surface of the conductive channel layer (2), a P-type nickel oxide thin film layer (15) is arranged on the outer surface of the gate electrode (6), and a gate insulating layer (7) is arranged on the lower surface of the gate electrode (6).

2. A field effect transistor with a pulse power amplifier according to claim 1, characterized in that: The outer sides of the insulating substrate (1), the conductive channel layer (2) and the insulating protective layer (5) are encapsulated with an encapsulation protective layer (11).

3. The field effect transistor with a pulse power amplifier according to claim 1, characterized in that: The insulating protective layer (5) is made of silicon dioxide material.

4. The field effect transistor with a pulse power amplifier according to claim 1, characterized in that: The gate insulating layer (7) is made of silicon dioxide material.

5. The field effect transistor with a pulse power amplifier according to claim 1, characterized in that: The packaging protection layer (11) is a gallium oxide thin film layer.

6. The field effect transistor with a pulse power amplifier according to claim 1, characterized in that: The surface channel (16) is made of graphene material.

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