Luminescent substrate and preparation method thereof, and luminescent device

Abstract

A light-emitting substrate comprises: a substrate (200), at least one light-emitting element (10), at least one antistatic trace (15), and a ground trace (13). The substrate (200) comprises a display area (AA) and a peripheral area (BB) located at least on one side of the display area (AA). The at least one light-emitting element (10) and the at least one antistatic trace (15) are located in the display area (AA), and the at least one antistatic trace (15) is configured to surround the at least one light-emitting element (10). The ground trace (13) is located in the peripheral area (BB), and the ground trace (13) is electrically connected to the at least one antistatic trace (15).

Description

Technical Field

[0001] This article relates to but is not limited to the field of display technology, and in particular to a light-emitting substrate and a preparation method thereof, and a light-emitting device. Background Art

[0002] Organic Light Emitting Diode (OLED) and Quantum-dot Light Emitting Diode (QLED) are active light-emitting display devices with the advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, extremely high response speed, light weight, flexibility and low cost. Summary of the invention

[0003] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0004] Embodiments of the present disclosure provide a light-emitting substrate and a method for preparing the same, and a light-emitting device.

[0005] On the one hand, an embodiment of the present disclosure provides a light-emitting substrate, comprising: a substrate substrate, at least one light-emitting element, at least one antistatic trace, and a ground trace. The substrate substrate comprises a display area and a peripheral area located on at least one side of the display area. At least one light-emitting element and at least one antistatic trace are located in the display area. At least one antistatic trace is configured to surround at least one light-emitting element. The ground trace is located in the peripheral area, and the ground trace is electrically connected to the at least one antistatic trace.

[0006] In some exemplary embodiments, the at least one antistatic trace forms a mesh structure, the mesh structure comprising at least one grid, and the at least one grid surrounds the at least one light emitting element.

[0007] In some exemplary embodiments, adjacent anti-static wirings in the display area are an integrated structure, or are electrically connected via a first connection electrode.

[0008] In some exemplary embodiments, the anti-static trace includes: a first extension portion and a first connection portion that are interconnected, the first extension portion having a ring-shaped orthographic projection on the substrate; the first connection portion of the anti-static trace is an integral structure with the first connection portion of another anti-static trace, or the first connection portion of the anti-static trace is electrically connected to the first connection portion of another anti-static trace through the first connection electrode.

[0009] In some exemplary embodiments, the first connection electrode is located on a side of the anti-static trace away from the substrate.

[0010] In some exemplary embodiments, the ground trace is electrically connected to the at least one anti-static trace through a second connection electrode.

[0011] In some exemplary embodiments, the ground trace and the anti-static trace are in the same layer structure, and the second connection electrode is located on a side of the ground trace away from the base substrate.

[0012] In some exemplary embodiments, the display area is further provided with a pixel definition layer, the pixel definition layer has at least one pixel opening, and the portion of the light-emitting element located in the pixel opening is used to emit light; the orthographic projection of the pixel definition layer on the base substrate covers the orthographic projection of the anti-static trace on the base substrate.

[0013] In some exemplary embodiments, the light emitting element includes: a first electrode, a second electrode, and an organic light emitting layer disposed between the first electrode and the second electrode. The first electrode is located on a side of the organic light emitting layer close to the base substrate, a pixel opening of the pixel definition layer exposes at least a portion of the first electrode, the organic light emitting layer contacts the first electrode through the pixel opening, and the second electrode is located on a side of the organic light emitting layer away from the base substrate, the second electrode contacts the organic light emitting layer.

[0014] In some exemplary embodiments, the light-emitting substrate further includes: at least one first signal routing line and at least one second signal routing line, wherein the first signal routing line extends from the peripheral area to the display area and is electrically connected to the first electrode of the at least one light-emitting element; and the second signal routing line is located in the peripheral area and is electrically connected to the second electrode of the at least one light-emitting element.

[0015] In some exemplary embodiments, in the display area, the anti-static wiring is located between the first signal wiring and the light emitting element.

[0016] In some exemplary embodiments, in the peripheral area, the ground trace is located between the second signal trace and the first signal trace.

[0017] In some exemplary embodiments, the light-emitting substrate further includes: a first conductive layer located on a side of the at least one light-emitting element close to the base substrate, and the first signal trace, the second signal trace, the anti-static trace and the ground trace are all located in the first conductive layer.

[0018] In some exemplary embodiments, the light-emitting substrate further comprises: a first insulating layer between the light-emitting element and the first conductive layer, wherein the orthographic projection of the first insulating layer on the base substrate does not overlap with the orthographic projection of the portion of the at least one light-emitting element for emitting light on the base substrate.

[0019] In some exemplary embodiments, a material of the first electrode of the light emitting element includes a transparent conductive material, and a material of the second electrode includes a metal material.

[0020] In some exemplary embodiments, the peripheral area includes: a binding area located on one side of the display area, the binding area including: at least one first ground pin, at least one first signal pin and at least one second signal pin; the first ground pin is electrically connected to the ground routing, the first signal pin is electrically connected to the first signal routing, and the second signal pin is electrically connected to the second signal routing; the first ground pin is located between the first signal pin and the second signal pin.

[0021] In some exemplary embodiments, the portion of the light emitting element for emitting light has an orthographic projection on the base substrate in the shape of a triangle.

[0022] On the other hand, an embodiment of the present disclosure provides a light-emitting device, comprising the light-emitting substrate as described above.

[0023] On the other hand, the embodiment of the present disclosure provides a method for preparing a light-emitting substrate, which is used to prepare the light-emitting substrate as described above, and the preparation method includes: forming at least one anti-static trace in the display area of ​​the base substrate, forming a ground trace in the peripheral area of ​​at least one side of the display area; and forming at least one light-emitting element in the display area. The ground trace is electrically connected to the at least one anti-static trace, and the at least one anti-static trace is configured to surround the at least one light-emitting element.

[0024] Other aspects will be apparent upon reading and understanding the drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The accompanying drawings are used to provide an understanding of the technical solution of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solution of the present disclosure and do not constitute a limitation on the technical solution of the present disclosure. The shape and size of one or more components in the accompanying drawings do not reflect the actual proportions and are only intended to illustrate the contents of the present disclosure.

[0026] Figure 1 is a schematic diagram of a light-emitting substrate according to at least one embodiment of the present disclosure;

[0027] Figure 2is a schematic diagram of a binding area of ​​a light-emitting substrate according to at least one embodiment of the present disclosure;

[0028] Figure 3 A schematic diagram of the arrangement of a first signal line according to at least one embodiment of the present disclosure;

[0029] Figure 4 A schematic diagram of the arrangement of anti-static wiring according to at least one embodiment of the present disclosure;

[0030] Figure 5A for Figure 1 A partial enlarged schematic diagram of the middle area S1;

[0031] Figure 5B for Figure 5A A schematic diagram of a light-emitting substrate after forming a second conductive layer;

[0032] Figure 5C for Figure 5A A schematic diagram of a light-emitting substrate after forming a first insulating layer;

[0033] Figure 5D for Figure 5A A schematic diagram of a light-emitting substrate after forming a first conductive layer;

[0034] Fig. 6A for Figure 5A A local enlarged schematic diagram of region S4 in FIG.

[0035] Figure 6B for Fig. 6A A schematic diagram of a light-emitting substrate after forming a second conductive layer;

[0036] Figure 6C for Fig. 6A A schematic diagram of a light-emitting substrate after forming a first insulating layer;

[0037] Fig.6D for Fig. 6A A schematic diagram of a light-emitting substrate after forming a first conductive layer;

[0038] Figure 7 for Fig. 6A Schematic diagram of a local cross section along the P-P' direction;

[0039] Figure 8 for Fig. 6A A schematic diagram of a local cross section along the Q-Q' direction;

[0040] Fig.9A for Figure 1 A partial enlarged schematic diagram of the middle area S2;

[0041] Fig. 9B for Fig.9A A schematic diagram of a light-emitting substrate after forming a second conductive layer;

[0042] Fig. 9C for Fig.9A A schematic diagram of a light-emitting substrate after forming a first insulating layer;

[0043] Fig.9D for Fig.9A A schematic diagram of a light-emitting substrate after forming a first conductive layer;

[0044] Fig. 10A for Figure 1 A partial enlarged schematic diagram of the middle area S3;

[0045] Fig. 10B for Fig. 10A A schematic diagram of a light-emitting substrate after forming a second conductive layer;

[0046] Fig. 10C for Fig. 10A A schematic diagram of a light-emitting substrate after forming a first insulating layer;

[0047] Fig. 10D for Fig. 10A A schematic diagram of a light-emitting substrate after forming a first conductive layer;

[0048] Fig.11 is a schematic diagram of a light emitting device according to at least one embodiment of the present disclosure. DETAILED DESCRIPTION

[0049] The embodiments of the present disclosure will be described in detail below in conjunction with the accompanying drawings. The embodiments can be implemented in a plurality of different forms. A person skilled in the art can easily understand the fact that the method and content can be transformed into one or more forms without departing from the purpose and scope of the present disclosure. Therefore, the present disclosure should not be interpreted as being limited to the contents described in the following embodiments. In the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be combined with each other arbitrarily.

[0050] In the drawings, the size of one or more components, the thickness of a layer, or an area is sometimes exaggerated for the sake of clarity. Therefore, one embodiment of the present disclosure is not necessarily limited to the size, and the shape and size of one or more components in the drawings do not reflect the true proportion. In addition, the drawings schematically show ideal examples, and one embodiment of the present disclosure is not limited to the shapes or values ​​shown in the drawings.

[0051] The ordinal numbers such as "first", "second", and "third" in the present disclosure are provided to avoid confusion of constituent elements, rather than to limit the quantity. The "plurality" in the present disclosure means a quantity of two or more.

[0052] In the present disclosure, for the sake of convenience, the words and phrases indicating the orientation or positional relationship, such as "middle", "upper", "lower", "front", "back", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., are used to illustrate the positional relationship of the constituent elements with reference to the drawings. This is only for the convenience of describing the present specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation of the present disclosure. The positional relationship of the constituent elements is appropriately changed according to the direction in which the constituent elements are described. Therefore, it is not limited to the words and phrases described in the specification, and can be appropriately replaced according to the situation.

[0053] In the present disclosure, unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense. For example, it can be a fixed connection, or a detachable connection, or an integral connection; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal connection of two elements. For ordinary technicians in this field, the meanings of the above terms in the present disclosure can be understood according to the circumstances. Among them, "electrical connection" includes the situation where constituent elements are connected together through an element with some electrical function. There is no special restriction on "elements with some electrical function" as long as they can transmit electrical signals between connected constituent elements. Examples of "elements with some electrical function" include not only electrodes and wirings, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with one or more functions.

[0054] In the present disclosure, "parallel" means a state where the angle formed by two straight lines is greater than -10° and less than 10°, and therefore, a state where the angle is greater than -5° and less than 5° may be included. In addition, "perpendicular" means a state where the angle formed by two straight lines is greater than 80° and less than 100°, and therefore, a state where the angle is greater than 85° and less than 95° may be included.

[0055] In the present disclosure, "film" and "layer" may be interchanged. For example, "conductive layer" may be replaced with "conductive film" in some cases. Similarly, "insulating film" may be replaced with "insulating layer" in some cases.

[0056] The triangles, rectangles, trapezoids, pentagons or hexagons in this specification are not in the strict sense, and may be approximate triangles, rectangles, trapezoids, pentagons or hexagons, etc. There may be some small deformations caused by tolerances, and there may be chamfers, arc edges and deformations.

[0057] The terms “about” and “substantially” in the present disclosure do not strictly define the limits, but allow for a range of process and measurement errors.

[0058] During the production, manufacturing, testing and use of displays, there are usually some external factors that cause the accumulation of static electricity on the display. When the accumulation reaches a certain amount, electrostatic discharge (ESD) will occur. ESD will generate extremely high current, which can easily break down components in the circuit or damage the signal conductive line, causing signal abnormality or even interruption.

[0059] With the development of OLED display technology, automotive OLED products have gradually begun to enter the eyes of consumers, but automotive-grade products are more stringent than consumer-grade products in many aspects. For example, for automotive-grade products, under working conditions, they need to meet the electrostatic discharge protection of ±8kV for contact static electricity and ±8 / 10 / 12 / 15kV for air. They need to meet the A-level requirements of no abnormalities during the entire process after electrostatic discharge occurs, and the B-level requirements of flashing bright lines but automatically recovering within a specified number of seconds when electrostatic discharge occurs. For consumer-grade products, they only need to meet the C-level requirements of being able to restore normal display after restarting after abnormal electrostatic discharge.

[0060] The embodiments of the present disclosure provide a light-emitting substrate and a preparation method thereof, and a light-emitting device, which can increase the anti-static capability and improve the anti-breakdown performance of the light-emitting substrate under high-intensity ESD conditions.

[0061] The light-emitting substrate provided in the embodiment of the present disclosure includes: a substrate substrate, at least one light-emitting element, at least one antistatic trace, and a ground trace. The substrate substrate includes a display area and a peripheral area located on at least one side of the display area. At least one light-emitting element and at least one antistatic trace are located in the display area. At least one antistatic trace is configured to surround at least one light-emitting element. The ground trace is located in the peripheral area, and the ground trace is electrically connected to the at least one antistatic trace.

[0062] In some examples, each light-emitting element of the light-emitting substrate may be surrounded by an anti-static trace, or a plurality of light-emitting elements may be surrounded by an anti-static trace. In some examples, an orthographic projection of the anti-static trace on the substrate substrate may surround an orthographic projection of a portion of at least one light-emitting element for emitting light on the substrate substrate.

[0063] The light-emitting substrate provided in this embodiment can enhance the anti-static capability by arranging anti-static wiring to surround the light-emitting element, thereby improving the anti-breakdown performance of the light-emitting substrate under high-intensity ESD conditions.

[0064] In some exemplary embodiments, at least one antistatic routing wire may form a mesh structure, the mesh structure may include at least one grid, and at least one grid may surround at least one light emitting element. In some examples, an antistatic routing wire may have a grid, and multiple antistatic routing wires may be connected to form multiple grids. Each grid may surround a light emitting element. However, this embodiment is not limited to this. For example, each grid may include two or more light emitting elements.

[0065] In some exemplary embodiments, adjacent antistatic traces in the display area may be an integral structure, or may be electrically connected through a first connecting electrode. In some examples, the antistatic trace may include: a first extension portion and a first connecting portion that are connected to each other. The orthographic projection of the first extension portion on the substrate substrate may be a ring. The first connecting portion of the antistatic trace and the first connecting portion of another antistatic trace may be an integral structure, or the first connecting portion of the antistatic trace may be electrically connected to the first connecting portion of another antistatic trace through a first connecting electrode. In some examples, the first extension portion of the antistatic trace may form at least one grid, and electrical connection between the grids is achieved through the first connecting portion. However, this embodiment is not limited to this.

[0066] In some exemplary embodiments, the first connection electrode may be located on a side of the antistatic wiring away from the base substrate. In some examples, the first connection electrode may be in the same layer structure as the first electrode of the light emitting element. However, this embodiment is not limited to this.

[0067] In some exemplary embodiments, the ground trace may be electrically connected to at least one anti-static trace through a second connection electrode. In some examples, the ground trace and the anti-static trace may be in the same layer structure, and the second connection electrode may be located on a side of the ground trace away from the substrate. For example, the second connection electrode may be in the same layer structure as the first electrode of the light-emitting element.

[0068] In some exemplary embodiments, the display area may also be provided with a pixel definition layer. The pixel definition layer may have at least one pixel opening, and the portion of the light-emitting element located at the pixel opening may be used to emit light. The orthographic projection of the pixel definition layer on the substrate may cover the orthographic projection of the antistatic trace on the substrate. In this example, the portion of the light-emitting element used to emit light may be the area corresponding to the pixel opening of the pixel definition layer.

[0069] In some exemplary embodiments, the light emitting element may include: a first electrode, a second electrode, and an organic light emitting layer disposed between the first electrode and the second electrode. The first electrode may be located on a side of the organic light emitting layer close to the base substrate, a pixel opening of the pixel definition layer may expose at least a portion of the first electrode, the organic light emitting layer may contact the first electrode through the pixel opening, the second electrode may be located on a side of the organic light emitting layer away from the base substrate, and the second electrode may contact the organic light emitting layer. In some examples, the light emitting element may be an organic light emitting element (OLED).

[0070] In some exemplary embodiments, the light-emitting substrate may further include: at least one first signal line and at least one second signal line. The first signal line extends from the peripheral area to the display area and is electrically connected to the first electrode of at least one light-emitting element. The second signal line is located in the peripheral area and is electrically connected to the second electrode of at least one light-emitting element. In some examples, the light-emitting substrate only needs to realize lighting display without complex pixel circuit control, and a driving voltage can be provided to the first electrode and the second electrode of the light-emitting element through the signal line, thereby driving the light-emitting element to emit light.

[0071] In some exemplary embodiments, in the display area, the antistatic trace may be located between the first signal trace and the light emitting element. In some examples, the antistatic trace may surround the light emitting element in the display area, and the first signal trace may be located on a side of the antistatic trace away from the light emitting element, thereby enhancing the antistatic capability of the light emitting element.

[0072] In some exemplary embodiments, in the peripheral area, the ground trace may be located between the second signal trace and the first signal trace. In this example, the ground trace is disposed between the first signal trace and the second signal trace, and the heat dissipation of the first signal trace and the second signal trace can be appropriately released, thereby ensuring the life of the light-emitting element.

[0073] In some exemplary embodiments, the light-emitting substrate may further include: a first conductive layer located on a side of at least one light-emitting element close to the base substrate. The first signal trace, the second signal trace, the antistatic trace, and the ground trace may all be located in the first conductive layer. In this example, the first signal trace, the second signal trace, the antistatic trace, and the ground trace are arranged in the same layer, which can simplify the preparation process of the light-emitting substrate. However, this embodiment is not limited to this. For example, the antistatic trace may be located between the first conductive layer and the light-emitting element.

[0074] In some exemplary embodiments, the light-emitting substrate may further include: a first insulating layer located between the light-emitting element and the first conductive layer. The orthographic projection of the first insulating layer on the substrate substrate may not overlap with the orthographic projection of the portion of at least one light-emitting element used for emitting light on the substrate substrate. In some examples, the light-emitting substrate may be a bottom-emitting structure, that is, light may be emitted from one side of the substrate substrate. By removing part of the first insulating layer on the side of the light-emitting element close to the substrate substrate, the light shielding effect of the first insulating layer may be avoided, thereby ensuring the light emitting effect of the light-emitting substrate.

[0075] In some exemplary embodiments, the peripheral area may include: a binding area located on one side of the display area. The binding area may include: at least one first ground pin, at least one first signal pin, and at least one second signal pin. The first ground pin may be electrically connected to a ground trace, the first signal pin may be electrically connected to a first signal trace, and the second signal pin may be electrically connected to a second signal trace. The first ground pin may be located between the first signal pin and the second signal pin. This example may ensure grounding performance and increase electrostatic protection.

[0076] The structure of this embodiment is described below by means of some examples.

[0077] Figure 1 is a schematic diagram of a light-emitting substrate of at least one embodiment of the present disclosure. In some exemplary embodiments, Figure 1 As shown, the light-emitting substrate may include: a display area AA and a peripheral area BB located outside the display area AA. The peripheral area BB may include a binding area B1 located on one side of the display area AA and a frame area B2 located on the other side of the display area AA. For example, the peripheral area BB may be located around the display area AA, the binding area B1 may be located on the lower side of the display area AA, and the frame area B2 may include areas on the left, upper and right sides of the display area AA. However, this embodiment is not limited to this. For example, the peripheral area BB may be located on at least one side of the display area AA, and the binding area B1 may be located on the upper side, left side or right side of the display area AA.

[0078] In some examples, such as Figure 1 As shown, the display area AA of the light-emitting substrate may be a quadrilateral, for example, a parallelogram. However, this embodiment is not limited to this. For example, the display area AA of the light-emitting substrate may be a circle, an ellipse, a rectangle, a pentagon, a hexagon or other shapes.

[0079] In some examples, such as Figure 1As shown, the display area AA may be provided with a plurality of light emitting elements 10. The plurality of light emitting elements 10 may be regularly arranged in the display area AA. For example, the plurality of light emitting elements 10 may be arranged in a plurality of columns along the first direction D1 in the display area AA, and may be arranged in a plurality of rows along the second direction D2. The plurality of light emitting elements 10 arranged in the first direction D1 may be referred to as a row of light emitting elements, and the plurality of light emitting elements 10 arranged in the second direction D2 may be referred to as a column of light emitting elements. Figure 1 The light-emitting substrate shown may include six rows and six columns of light-emitting elements 10, each row includes three light-emitting elements 10, each column includes three light-emitting elements 10, and a total of eighteen light-emitting elements 10 may be included. However, the present embodiment does not limit the number of light-emitting elements 10 included in the light-emitting substrate. In some examples, the first direction D1 and the second direction D2 may intersect. For example, the angle between the first direction D1 and the second direction D2 along the counterclockwise direction may be approximately 108 degrees to 132 degrees, such as approximately 120 degrees. However, the present embodiment does not limit this. For example, the light-emitting substrate may be rectangular, and the first direction and the second direction may be perpendicular to each other.

[0080] In some examples, such as Figure 1 As shown, the shape of the light emitting element 10 can be a triangle, such as an equilateral triangle. For example, the side length of the light emitting element 10 can be about 9 millimeters (mm) to 11 mm, such as about 10 mm. However, this embodiment is not limited to this. In other examples, the shape of the light emitting element 10 can be other shapes such as a rectangle, a rhombus, a pentagon or a hexagon.

[0081] In some examples, such as Figure 1 As shown, the color of the light emitted by the light emitting element 10 can be determined as needed. For example, the light emitting element 10 can emit red light, green light, blue light, or white light, etc. In some examples, the light emitting element 10 can be an organic light emitting diode (OLED). The light emitting element 10 may include: a first electrode, a second electrode, and an organic light emitting layer located between the first electrode and the second electrode. Driven by the voltage of the first electrode and the second electrode, the light emitting characteristics of the organic material of the organic light emitting layer can be used to emit light according to the required grayscale. For example, the first electrode can be an anode and the second electrode can be a cathode. However, this embodiment is not limited to this. In the embodiment of the present disclosure, the portion of the light emitting element used for emitting light may refer to the overlapping portion of the first electrode, the organic light emitting layer, and the second electrode of the light emitting element.

[0082] In some examples, such as Figure 1As shown, the light-emitting element 10 can be an independent light-emitting element. However, this embodiment is not limited to this. In other examples, the light-emitting element 10 may include a plurality of regularly arranged sub-light-emitting elements. The shapes and sizes of the plurality of sub-light-emitting elements may be substantially the same. The first electrodes of the plurality of sub-light-emitting elements may be connected in parallel to achieve synchronous light emission. For example, the shape of the sub-light-emitting element may be a triangle, such as an equilateral triangle, and the side length of the sub-light-emitting element may be approximately 270 micrometers (um) to 330um, such as approximately 300 micrometers.

[0083] Figure 2 FIG. 1 is a schematic diagram of a binding region of a light-emitting substrate according to at least one embodiment of the present disclosure. Figure 1 and Figure 2 As shown, the binding area B1 may be provided with a plurality of binding pins. Among them, the plurality of binding pins may include: at least one (for example, two) first grounding pins 23, a plurality of (for example, eighteen) first signal pins 21, and a plurality of (for example, four) second signal pins 22. For example, two second signal pins 22, one first grounding pin 23, eighteen first signal pins 21, one first grounding pin 23, and two second signal pins 22 may be arranged in sequence along the first direction D1. The first grounding pin 23 may be located between the second signal pin 22 and the first signal pin 21. This embodiment does not limit the number of binding pins.

[0084] In some examples, such as Figure 2 As shown, the first ground pin 23 can be electrically connected to the ground trace 13, for example, the first ground pin 23 and the ground trace 13 can be an integral structure. After the ground trace 13 is electrically connected to the first ground pin 23 in the binding area B1, it can extend from the binding area B1 to the frame area B2. The ground trace 13 can be arranged around the display area AA in the frame area B2.

[0085] In some examples, such as Figure 2 As shown, the second signal pin 22 can be electrically connected to the second signal trace 12. For example, the plurality of second signal pins 22 and the second signal trace 12 can be an integral structure. The second signal trace 12 can extend from the binding area B1 to the frame area B2. The second signal trace 12 can be arranged around the display area AA in the frame area B2, and in the frame area B2, the second signal trace 12 can be located on the side of the ground trace 13 away from the display area AA.

[0086] In some examples, such as Figure 2As shown, the first signal pin 21 can be electrically connected to the first signal wire 11. Multiple first signal pins 21 and multiple first signal wires 11 can be electrically connected in a one-to-one correspondence. For example, a first signal pin 21 and a first signal wire 11 can be an integral structure. At least one first signal wire 11 can extend from the binding area B1 to the frame area B2, and at least one first signal wire 11 can extend from the binding area B1 to the display area AA, and be arranged in the gap between adjacent light-emitting elements 10. In some examples, multiple first signal wires 11 can be electrically connected to multiple light-emitting elements 10 in a one-to-one correspondence. A first signal wire 11 can be configured to provide a driving signal to a light-emitting element 10. However, this embodiment is not limited to this. For example, a first signal wire 11 can be electrically connected to multiple light-emitting elements 110, and is configured to provide a driving signal to the multiple light-emitting elements 10.

[0087] In this example, if Figure 2 As shown, in the frame area B2, the grounding line 13 is located between the first signal line 11 and the second signal line 12, and in the binding area B1, the first grounding pin 23 is located between the first signal pin 21 and the second signal pin 22. In this way, the grounding performance can be ensured to be good, and the ESD protection can be increased, and the heat dissipation of the first signal line 11 and the second signal line 12 can be appropriately released to ensure the life of the light-emitting substrate.

[0088] Figure 3 FIG. 1 is a schematic diagram of the arrangement of the first signal routing line of at least one embodiment of the present disclosure. Figure 1 and Figure 3 As shown, a plurality of first signal lines 11 can be arranged between the second and third columns of light-emitting elements 10, and between the fourth and fifth columns of light-emitting elements 10 in the display area AA, and the first signal lines 11 can also be arranged in the frame area B2 on the left and right sides of the display area AA. A first signal line 11 may include a second extension portion 111 and a second connection portion 112. The second extension portion 111 may extend along the second direction D2. The second connection portion 112 of the first signal line 11 may extend along the first direction D1, or may extend along the third direction D3. The third direction D3 intersects both the first direction D1 and the second direction D2. For example, the angle between the first direction D1 and the third direction D3 in the clockwise direction may be approximately 108 degrees to 132 degrees, such as approximately 120 degrees. The second extension portion 111 and the second connection portion 112 of a first signal line 11 may be an integral structure. The second connection portion 112 of the first signal line 11 may be electrically connected to the corresponding light-emitting element 10.

[0089] Figure 4 Schematic diagram of the arrangement of anti-static wiring in at least one embodiment of the present disclosure. Figure 1 and Figure 4 As shown, the display area AA may be provided with a plurality of antistatic wires 15. The antistatic wire 15 may be located on a side of the first signal wire 11 close to the light-emitting element 10. For example, adjacent antistatic wires 15 arranged along the second direction D2 may be an integral structure. In the first direction D1, the antistatic wires 15 located on both sides of the first signal wire 11 may be electrically connected through a first connecting electrode to cross the first signal wire 11. A plurality of antistatic wires 15 may be connected in the display area AA to form a mesh structure, and the mesh structure may include a plurality of grids, each of which may surround a light-emitting element 10. However, this embodiment is not limited to this. In other examples, a grid of the mesh structure may surround a plurality of light-emitting elements.

[0090] Figure 5A for Figure 1 A partial enlarged schematic diagram of the middle area S1. Figure 5B for Figure 5A Schematic diagram of the light-emitting substrate after the second conductive layer is formed. Figure 5C for Figure 5A Schematic diagram of the light-emitting substrate after the first insulating layer is formed. Figure 5D for Figure 5A Schematic diagram of the light-emitting substrate after the first conductive layer is formed. Fig. 6A for Figure 5A A locally enlarged schematic diagram of area S4 in FIG. Figure 6B for Fig. 6A Schematic diagram of the light-emitting substrate after the second conductive layer is formed. Figure 6C for Fig. 6A Schematic diagram of the light-emitting substrate after the first insulating layer is formed. Fig.6D for Fig. 6A Schematic diagram of the light-emitting substrate after the first conductive layer is formed. Figure 7 for Fig. 6A Schematic diagram of the local cross-section along the P-P' direction. Figure 8 for Fig. 6A Schematic diagram of the local cross-section along the Q-Q' direction.

[0091] In some exemplary embodiments, Figure 7 and Figure 8 As shown, in a direction perpendicular to the light-emitting substrate, the light-emitting substrate of the display area AA may include: a base substrate 200, and a first conductive layer 21, a first insulating layer 201 and a light-emitting structure layer disposed on the base substrate 200. The light-emitting structure layer may include: a second conductive layer 22, a pixel definition layer 104, an organic light-emitting layer 103 and a third conductive layer 23 sequentially disposed on the base substrate 200. Among them, the first insulating layer 201 may be an inorganic insulating layer. However, this embodiment is not limited to this.

[0092] In some exemplary embodiments, Figure 5D and Fig.6D As shown, the first conductive layer 21 of the display area AA may include: a plurality of first signal lines 11 and a plurality of anti-static lines 15. The first signal line 11 may include a second connecting portion 112 and a second extending portion 111 extending along a second direction D2. The second connecting portion 112 of a portion of the first signal line 11 may extend along the first direction D1, and the second connecting portion 112 of a portion of the first signal line 11 may extend along a third direction D3. The second extending portion 111 and the second connecting portion 112 of the first signal line 11 may be an integral structure. The second extending portion 111 of the first signal line 11 may be located between adjacent columns of light-emitting elements, and the second connecting portion 112 may be located between adjacent rows of light-emitting elements. Fig.6D As shown, six first signal wires 11 may be arranged between adjacent columns of light emitting elements. However, this embodiment is not limited to this.

[0093] In some exemplary embodiments, Figure 5D and Fig.6D As shown, an antistatic trace 15 may include: a first extension portion 151 and at least one first connection portion 152. The first extension portion 151 may be in the shape of a ring, for example, a triangular ring. The first connection portion 152 of the antistatic trace 15 is electrically connected to the first extension portion 151, for example, may be an integral structure. The first connection portion 152 may be electrically connected to the first extension portion 151 at a corner of the first extension portion 151. A plurality of antistatic traces 15 located between adjacent first signal traces 11 may be arranged in sequence along the second direction D2, and the first connection portions 152 of adjacent antistatic traces 15 arranged along the second direction D2 may be an integral structure. As shown Figure 5D As shown, an antistatic trace 15 may include a first extension portion 151 and two first connection portions 152, wherein one first connection portion 152 may be located at the right corner of the first extension portion 151 and connected to the first connection portion of an adjacent antistatic trace in the second direction D2, and the other first connection portion 152 may be located at the lower corner of the first extension portion 151 and connected to the first connection portion of another antistatic trace in the second direction D2. The second connection portion 112 of the first signal trace 11 may be adjacent to the first connection portion 152 of the antistatic trace 15 in the second direction D2. The antistatic traces 15 located on both sides of the first signal trace 11 in the first direction D1 may be electrically connected via the first connection electrodes 16.

[0094] In some exemplary embodiments, Figure 5C and Figure 6CAs shown, the first insulating layer 201 of the display area AA may be provided with a plurality of vias and grooves, for example, may include: a first via K1, a second via K2, and a first groove K3. The first insulating layer 201 in the first via K1 is removed, exposing the surface of the first connecting portion 152 of the antistatic wiring 15. The first insulating layer 201 in the second via K2 is removed, exposing the surface of the second connecting portion 112 of the first signal wiring 11. The orthographic projection of the first groove K3 on the base substrate 200 may be located in the orthographic projection of the base substrate 200 surrounded by the first extension portion 151 of the antistatic wiring 15. The orthographic projection of the first groove K3 on the base substrate 200 may not overlap with the orthographic projection of the antistatic wiring 15 on the base substrate 200. In this example, by removing the first insulating layer 201 under the position of the light-emitting element, the light transmittance on one side of the base substrate 200 can be improved to prevent the first insulating layer 201 from affecting the light output of the light-emitting substrate.

[0095] In some exemplary embodiments, Figure 5B and Figure 6B As shown, the second conductive layer 22 of the display area AA may include: a first electrode 101 of a plurality of light-emitting elements, and a plurality of first connection electrodes 16. The first electrode 101 of the light-emitting element may include: a first body 1011 and a third connection portion 1012. The first body 1011 and the third connection portion 1012 of the first electrode 101 may be an integral structure. The orthographic projection of the first body 1011 on the base substrate 200 may be a triangle, for example, a rounded triangle. The third connection portion 1012 may be in the shape of a strip, one end of the third connection portion 1012 may be electrically connected to the first body 1011, and the other end may extend to be electrically connected to the second connection portion 112 of the first signal wiring 11. The third connection portion 1012 may be electrically connected to the second connection portion 112 of the first signal wiring 11 through a second via K2. The orthographic projection of the first extension portion 151 of the antistatic trace 15 on the base substrate 200 may not overlap with the orthographic projection of the first body 1011 of the first electrode 101 on the base substrate 200 , and the orthographic projection of the first body 1011 of the first electrode 101 on the base substrate 200 may be located within the orthographic projection of the first groove K3 on the base substrate 200 .

[0096] In some exemplary embodiments, Figure 5B and Figure 6BAs shown, one end of the first connection electrode 16 can be electrically connected to the first connection portion 152 of an antistatic trace 15 through a first via K1, and the other end can be electrically connected to the first connection portion 152 of another antistatic trace 15 through another first via K1, so as to cross the first signal trace 11 between the two antistatic traces 15. For example, one end of the first connection electrode 16 can extend along the first direction D1, and the other end can extend along the third direction D3. The orthographic projection of the first connection electrode 16 on the base substrate 200 can be V-shaped. However, this embodiment is not limited to this.

[0097] In some exemplary embodiments, Figure 5A and Fig. 6A As shown, the pixel definition layer 104 of the display area AA may have a plurality of pixel openings 100. The pixel definition layer 104 within the pixel opening 100 is removed, exposing at least a portion of the first electrode 101 of the light-emitting element. The orthographic projection of the first electrode 101 of the light-emitting element on the substrate 200 may include the orthographic projection of the pixel opening 100 on the substrate 200. In some examples, the orthographic projection of the pixel opening 100 on the substrate 200 may be a triangle, for example, a rounded triangle.

[0098] In some exemplary embodiments, Figure 7 and Figure 8 As shown, the organic light-emitting layer 103 of the light-emitting element can contact the first electrode 101 through the pixel opening 100. The third conductive layer 23 of the display area AA may include a plurality of second electrodes 102 of the light-emitting elements. The second electrode 102 of the light-emitting element may contact the organic light-emitting layer 103. The second electrodes 102 of the plurality of light-emitting elements may be an integral structure. In this example, the portion of the light-emitting element located at the pixel opening 100 is the overlapping portion of the first electrode 101, the organic light-emitting layer 103, and the second electrode 102, which can be used for emitting light. A grid formed by the first extension portion 151 of the antistatic trace 15 can surround the portion of a light-emitting element used for emitting light.

[0099] Fig.9A for Figure 1 A partial enlarged schematic diagram of the middle area S2. Fig. 9B for Fig.9A Schematic diagram of the light-emitting substrate after the second conductive layer is formed. Fig. 9C for Fig.9A Schematic diagram of the light-emitting substrate after the first insulating layer is formed. Fig.9D for Fig.9A Schematic diagram of the light-emitting substrate after the first conductive layer is formed.

[0100] In some exemplary embodiments, 9A to 9DAs shown, a second signal line 12, a ground line 13 and a plurality of first signal lines 11 are arranged in the frame area B2 on the left side of the display area AA. Fig.9D As shown, the second signal line 12, the ground line 13 and the plurality of first signal lines 11 can be arranged in sequence along a side close to the display area AA in the first direction D1. The second signal line 12, the ground line 13 and the first signal line 11 can all be located in the first conductive layer. The second extension portion 111 of the first signal line 11 can be located in the frame area B2, and the second connection portion 112 can extend into the display area AA so as to be electrically connected to the light-emitting element.

[0101] In some examples, such as Fig. 9C As shown, the first insulating layer of the border area B2 may be provided with a third opening K4 and a second groove K5. The first insulating layer in the third opening K4 may be removed to expose the surface of the ground trace 13. The first insulating layer in the second groove K5 is removed to expose the surface of the second signal trace 12. The second groove K5 may be a continuous groove in the border area B2. The second electrode of the light-emitting element may extend to the border area B2 and be electrically connected to the second signal trace 12 through the second groove K5. However, this embodiment is not limited to this. In other examples, the border area B2 may be provided with a plurality of independent second grooves K5, and the surface of the ground trace 13 may be exposed in sections.

[0102] In some examples, such as Fig.9A and Fig. 9B As shown, the light-emitting substrate may further include a second connecting electrode 17. The second connecting electrode 17 may be located in the second conductive layer. One end of the second connecting electrode 17 may extend to the display area AA, and be electrically connected to the first connecting portion 151 of the antistatic trace 15 in the display area AA through the first opening K1, and the other end may be located in the frame area B2, and be electrically connected to the ground trace 13 through the third opening K4. The orthographic projection of the second connecting electrode 17 on the base substrate 200 may be V-shaped. However, this embodiment is not limited to this. The electrical connection between the antistatic trace 15 and the ground trace 13 may be achieved in the frame area B2 on the left and right sides of the display area AA through the second connecting electrode 17.

[0103] Fig. 10A for Figure 1 A partial enlarged schematic diagram of the middle area S3. Fig. 10B for Fig. 10A Schematic diagram of the light-emitting substrate after the second conductive layer is formed. Fig. 10C for Fig. 10A Schematic diagram of the light-emitting substrate after the first insulating layer is formed. Fig. 10D for Fig. 10A Schematic diagram of the light-emitting substrate after the first conductive layer is formed.

[0104] In some exemplary embodiments, FIG. 10A to FIG. 10D As shown, the second signal trace 12 and the ground trace 13 disposed in the frame area B2 on the upper side of the display area AA may extend along the first direction D1. Fig. 10D As shown, the grounding wire 13 in the frame area B2 on the upper side of the display area AA and the first connecting portion 152 of at least one anti-static wire 15 in the display area AA may be an integrated structure. Fig. 10C As shown, the second groove K5 opened in the first insulating layer of the frame area B2 on the upper side of the display area AA can be connected to the second grooves K5 on the left and right sides. The rest of the structure of the upper frame area can refer to the above related description, so it will not be repeated here.

[0105] The preparation process of the light-emitting substrate is exemplified below. The "patterning process" mentioned in the present disclosure includes processes such as coating photoresist, mask exposure, development, etching, and stripping photoresist for metal materials, inorganic materials, or transparent conductive materials, and includes processes such as coating organic materials, mask exposure, and development for organic materials. Deposition can be any one or more of sputtering, evaporation, and chemical vapor deposition, coating can be any one or more of spraying, spin coating, and inkjet printing, and etching can be any one or more of dry etching and wet etching, which are not limited in the present disclosure. "Thin film" refers to a layer of thin film made by deposition, coating, or other processes on a substrate of a certain material. If the "thin film" does not require a patterning process during the entire production process, the "thin film" can also be called a "layer". If the "thin film" requires a patterning process during the entire production process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern". In the exemplary embodiments of the present disclosure, “the orthographic projection of A contains the orthographic projection of B” means that the boundary of the orthographic projection of B falls within the boundary range of the orthographic projection of A, or the boundary of the orthographic projection of A overlaps with the boundary of the orthographic projection of B.

[0106] In some exemplary embodiments, the preparation process of the light emitting substrate may include the following operations.

[0107] (1) Provide a substrate.

[0108] In some exemplary embodiments, the substrate substrate 200 may be a rigid substrate, such as a glass substrate. However, this embodiment is not limited to this. In other examples, the substrate substrate 200 may be a flexible substrate. For example, the substrate substrate may include a flexible substrate and a buffer layer stacked on the flexible substrate. The buffer layer can be used to improve the water blocking ability of the substrate substrate. For example, the flexible substrate may be made of materials such as polyimide (PI), polyethylene terephthalate (PET) or a surface-treated polymer soft film, and the buffer layer may be made of an inorganic material, for example, any one or more of silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride (SiON) may be used, which may be a single layer, a multilayer or a composite layer.

[0109] (2) Forming a first conductive layer.

[0110] In some exemplary embodiments, a first conductive film is deposited on the base substrate 200 forming the aforementioned structure, and the first conductive film is patterned by a patterning process to form a first conductive layer 21. Figure 5D , Fig.6D , Fig.9D and Fig. 10D As shown, the first conductive layer 21 may include: a plurality of first signal traces 11, a second signal trace 12, a ground trace 13, a plurality of anti-static traces 15, and a plurality of binding pins. The plurality of binding pins may be located in the binding area, the ground trace 13 and the second signal trace 12 may be located in the peripheral area BB, and the anti-static trace 15 may be located in the display area AA.

[0111] In some exemplary embodiments, the first conductive layer 21 may be made of a transparent conductive material, such as indium tin oxide (ITO); or, may be made of a metal material, such as any one or more of silver (Ag), copper (Cu), aluminum (Al) and molybdenum (Mo), or an alloy material of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), and may be a single-layer structure, or a multi-layer composite structure, such as Ti / Al / Ti, etc.

[0112] (3) Forming a first insulating layer.

[0113] In some exemplary embodiments, a first insulating film is deposited on the base substrate 200 forming the aforementioned structure, and the first insulating film is patterned by a patterning process to form a first insulating layer 201. Figure 5C , Figure 6C , Fig. 9C and Fig. 10CAs shown, the first insulating layer 201 may be provided with a plurality of openings and grooves, for example, may include a first opening K1, a second opening K2 and a first groove K3 located in the display area AA, and a third opening K4 and a second groove K5 located in the frame area B2.

[0114] In some exemplary embodiments, the first insulating layer may be any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single layer, a multi-layer, or a composite layer.

[0115] (4) Forming a second conductive layer.

[0116] In some exemplary embodiments, a second conductive film is deposited on the base substrate 200 forming the aforementioned structure, and the second conductive film is patterned by a patterning process to form a second conductive layer 22. Figure 5B , Figure 6B , Fig. 9B and Fig. 10B As shown, the second conductive layer 22 may include: a plurality of first connection electrodes 16, a plurality of second connection electrodes 17, and a plurality of first electrodes 101 of light-emitting elements. The first electrodes 101 of the plurality of light-emitting elements and the plurality of first connection electrodes 16 may be located in the display area. The plurality of second connection electrodes 17 may extend from the frame area B2 to the display area AA.

[0117] (5) Form a pixel definition layer.

[0118] In some exemplary embodiments, a pixel definition film is coated on the base substrate 200 on which the aforementioned pattern is formed, and the pixel definition layer 104 is formed by masking, exposure, and development processes. Figure 5A , Fig. 6A , Fig.9A and Fig. 10A As shown, the pixel definition layer 104 may have a plurality of pixel openings 100 exposing the second conductive layer 22. The plurality of pixel openings 100 may be located in the display area AA. In some examples, the pixel definition layer 104 may be made of organic materials such as polyimide, acrylic or polyethylene terephthalate.

[0119] (6) Forming an organic light-emitting layer.

[0120] In some exemplary embodiments, an organic light-emitting layer 103 is formed in the pixel opening 100 formed above, and the organic light-emitting layer 103 can be in contact with the first electrode 101 of the light-emitting element. In some examples, an open mask is used on the base substrate 200 on which the above pattern is formed to sequentially form a hole injection layer and a hole transport layer, and then a blue light-emitting layer, a green light-emitting layer and a red light-emitting layer are sequentially formed by evaporation using FMM, and then an electron transport layer and an electron injection layer are sequentially formed by evaporation using an open mask. In this example, the light-emitting element can emit white light. However, this embodiment is not limited to this.

[0121] (7) Forming a third conductive layer.

[0122] In some exemplary embodiments, a third conductive film is deposited on the base substrate 200 on which the aforementioned pattern is formed, and the third conductive film is patterned by a patterning process to form a third conductive layer 23, and the third conductive layer 23 may include a second electrode 102 of a plurality of light-emitting elements. The second electrodes 102 of the plurality of light-emitting elements may be an integral structure. The second electrode 102 may be formed on the pixel definition layer 104 and contact the organic light-emitting layer 103 of the light-emitting element. The second electrode 102 may be electrically connected to the second signal trace 12 in the frame area B2.

[0123] (8) Forming an encapsulation layer.

[0124] In some exemplary embodiments, an encapsulation layer is formed on the third conductive layer 23, and the encapsulation layer may include a laminated structure of inorganic material / organic material / inorganic material. However, this embodiment is not limited to this. In other examples, a filter method may be used to implement encapsulation of the light emitting element.

[0125] In some exemplary embodiments, the second conductive layer 22 may be made of a transparent conductive material, such as indium tin oxide (ITO). The third conductive layer 23 may be made of a reflective material such as metal, such as silver (Ag). The light-emitting substrate of this example may be a bottom emission structure, that is, the light-emitting substrate emits light from the side of the substrate 200. However, this embodiment is not limited to this. In other examples, the light-emitting substrate of this example may be a top emission structure, that is, the light-emitting substrate emits light from the side away from the substrate. Among them, the second conductive layer may be made of a reflective material such as metal, and the third conductive layer may be made of a transparent conductive material.

[0126] The illumination display required by the light-emitting substrate of this example does not need to control the light-emitting element through a complex pixel circuit, but drives the light-emitting element by leading out a driving signal through the first signal line and the second signal line. The light-emitting substrate of this example can use the first conductive layer and the second conductive layer to realize the anti-static routing of the mesh structure, which can cleverly divide the light-emitting element and improve the anti-static function. Moreover, by setting the grounding line between the first signal line and the second signal line, the first signal line and the second signal line can be effectively isolated and heat-dissipated.

[0127] The disclosed embodiment also provides a method for preparing a light-emitting substrate, comprising: forming at least one anti-static trace in a display area of ​​a base substrate, forming a ground trace in a peripheral area of ​​at least one side of the display area; and forming at least one light-emitting element in the display area. The ground trace is electrically connected to the at least one anti-static trace, and the anti-static trace is configured to surround the at least one light-emitting element.

[0128] The preparation method of the light-emitting substrate of this embodiment can refer to the description of the aforementioned embodiment, so it will not be described again here.

[0129] The embodiment of the present disclosure also provides a light-emitting device, comprising the light-emitting substrate as described above.

[0130] In some exemplary embodiments, the light emitting device may further include: a connection unit and a driving circuit board. The connection unit may include at least one second ground pin, and the driving circuit board may include a third ground pin. The second ground pin is electrically connected to the first ground pin of the binding area of ​​the light emitting substrate, and may also be electrically connected to the third ground pin of the driving circuit board.

[0131] Fig.11 is a schematic diagram of a light emitting device according to at least one embodiment of the present disclosure. In some exemplary embodiments, Fig.11 As shown, the light-emitting device may include: a light-emitting substrate M1, a connection unit M2, a driving circuit board M3 and a power interface M4. In some examples, the connection unit M2 may be a flexible printed circuit (FPC). The driving circuit board M3 may include: a microprocessor (MCU, Microcontroller Unit), a power chip (Power IC) and a flash memory (Flash). The flash memory may have built-in customized graphics. The microprocessor may be electrically connected to the power chip and the flash memory, and control the power chip and the flash memory through multiple input / output interfaces to drive the light-emitting substrate M1 to realize the lighting function of the light-emitting substrate M1.

[0132] In some examples, such as Fig.11As shown, the light-emitting substrate M1 may include: a display area AA and a peripheral area BB surrounding the display area AA. The peripheral area BB includes: a binding area B1 located on one side of the display area AA. The binding area B1 is provided with a plurality of binding pins. The plurality of binding pins of the binding area B1 may include: at least one first grounding pin. The connecting unit M2 may include at least one (for example, two) second grounding pins 31. The second grounding pin 31 of the connecting unit M2 may be bound and connected to the first grounding pin of the binding area B1 of the light-emitting substrate M1. The driving circuit board M3 may include a third grounding pin. The second grounding pin 31 of the connecting unit M2 may be electrically connected to the third grounding pin of the driving circuit board M3. The third grounding pin of the driving circuit board M3 is electrically connected to the ground wire of the power interface M4. In this example, the first ground pin of the light-emitting substrate M1 is electrically connected to the ground wire of the power interface M4 through the connecting unit and the driving circuit board, so as to achieve complete connection to the ground. The instantaneous large amount of static charge generated by the electrostatic discharge in the light-emitting substrate M1 can be directly discharged to the ground wire, thereby increasing the anti-static ability and improving the anti-breakdown performance of the light-emitting substrate under high-intensity ESD conditions, thereby meeting the requirements of automotive products.

[0133] In some exemplary embodiments, the light-emitting substrate may be a flexible OLED display substrate or a QLED display substrate. The light-emitting device may be any vehicle-mounted product or component with a display function, such as a headlight, a vehicle-mounted light-emitting device, or a navigator. By using the light-emitting device of this embodiment, the Class A discharge protection requirements of vehicle-grade products can be met, and the electrostatic discharge protection can have good stability, which has a wide range of application prospects.

[0134] The drawings in the present disclosure only relate to the structures involved in the present disclosure, and other structures may refer to the usual design. In the absence of conflict, the embodiments of the present disclosure and the features in the embodiments may be combined with each other to obtain new embodiments. It should be understood by those of ordinary skill in the art that the technical solutions of the present disclosure may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present disclosure, and should be included in the scope of the claims of the present disclosure.

Claims

1. A light-emitting substrate, comprising: A base substrate, comprising a display area and a peripheral area located on at least one side of the display area; At least one light emitting element, located in the display area; The light emitting element comprises: a first electrode, a second electrode and an organic light emitting layer arranged between the first electrode and the second electrode; the first electrode is located on a side of the organic light emitting layer close to the base substrate, and the second electrode is located on a side of the organic light emitting layer away from the base substrate; At least one anti-static wiring is located in the display area, and the at least one anti-static wiring is configured to surround the at least one light-emitting element; A grounding wire, located in the peripheral area, the grounding wire being electrically connected to the at least one anti-static wire; at least one first signal line and at least one second signal line, wherein the first signal line extends from the peripheral area to the display area and is electrically connected to the first electrode of the at least one light-emitting element, and the second signal line is located in the peripheral area and is electrically connected to the second electrode of the at least one light-emitting element; In the display area, the antistatic wiring is located between the first signal wiring and the light-emitting element; in the peripheral area, the ground wiring is located between the second signal wiring and the first signal wiring.

2. The light-emitting substrate according to claim 1, wherein: The at least one anti-static wiring forms a mesh structure, and the mesh structure includes at least one grid, and the at least one grid surrounds the at least one light-emitting element.

3. The light-emitting substrate according to claim 1, wherein: Adjacent anti-static wirings in the display area are integrated into one structure, or are electrically connected via first connection electrodes.

4. The light-emitting substrate according to claim 3, wherein: The anti-static trace comprises: a first extension portion and a first connection portion which are connected to each other, wherein the first extension portion has a ring-shaped orthographic projection on the substrate; the first connection portion of the anti-static trace is an integral structure with the first connection portion of another anti-static trace, or the first connection portion of the anti-static trace is electrically connected to the first connection portion of another anti-static trace through the first connection electrode.

5. The light emitting substrate according to claim 3, wherein: The first connecting electrode is located at a side of the anti-static wiring away from the base substrate.

6. The light-emitting substrate according to any one of claims 1 to 5, wherein: The grounding wire is electrically connected to the at least one anti-static wire through a second connection electrode.

7. The light-emitting substrate according to claim 6, wherein: The grounding trace and the anti-static trace are in the same layer structure, and the second connection electrode is located at a side of the grounding trace away from the base substrate.

8. The light-emitting substrate according to any one of claims 1 to 5, wherein The display area is also provided with a pixel definition layer, the pixel definition layer has at least one pixel opening, and the part of the light-emitting element located in the pixel opening is used for emitting light; the orthographic projection of the pixel definition layer on the base substrate covers the orthographic projection of the antistatic trace on the base substrate.

9. The light emitting substrate according to claim 8, wherein: The pixel opening of the pixel definition layer exposes at least a portion of the first electrode, the organic light emitting layer contacts the first electrode through the pixel opening, and the second electrode contacts the organic light emitting layer.

10. The light emitting substrate according to claim 1, further comprising: A first conductive layer is located on a side of the at least one light emitting element close to the base substrate, and the first signal trace, the second signal trace, the anti-static trace and the ground trace are all located on the first conductive layer.

11. The light-emitting substrate according to claim 10, further comprising: A first insulating layer is located between the light emitting element and the first conductive layer, wherein an orthographic projection of the first insulating layer on the base substrate does not overlap with an orthographic projection of a portion of the at least one light emitting element for emitting light on the base substrate.

12. The light emitting substrate according to claim 1, wherein: The material of the first electrode of the light emitting element includes a transparent conductive material, and the material of the second electrode includes a metal material.

13. The light emitting substrate according to claim 1, wherein: The peripheral area includes: a binding area located on one side of the display area, the binding area includes: at least one first ground pin, at least one first signal pin and at least one second signal pin; the first ground pin is electrically connected to the ground routing, the first signal pin is electrically connected to the first signal routing, and the second signal pin is electrically connected to the second signal routing; the first ground pin is located between the first signal pin and the second signal pin.

14. The light emitting substrate according to claim 1, wherein: The orthographic projection of the portion of the light emitting element for emitting light on the base substrate is a triangle.

15. A light-emitting device, comprising the light-emitting substrate according to any one of claims 1 to 14.

16. The light emitting device according to claim 15, further comprising: A connecting unit and a driving circuit board, wherein the connecting unit includes at least one second grounding pin, and the driving circuit board includes a third grounding pin; the second grounding pin is electrically connected to the first grounding pin of the binding area of ​​the light-emitting substrate, and is also electrically connected to the third grounding pin of the driving circuit board.

17. A method for preparing a light-emitting substrate, for preparing the light-emitting substrate according to any one of claims 1 to 14, the method comprising: At least one antistatic trace is formed in the display area of ​​the base substrate, at least one first signal trace is formed on the base substrate, and a ground trace and at least one second signal trace are formed in the peripheral area of ​​at least one side of the display area; At least one light-emitting element is formed in the display area; wherein the light-emitting element includes: a first electrode, a second electrode, and an organic light-emitting layer arranged between the first electrode and the second electrode; the first electrode is located on a side of the organic light-emitting layer close to the base substrate, and the second electrode is located on a side of the organic light-emitting layer away from the base substrate; the first signal trace extends from the peripheral area to the display area and is electrically connected to the first electrode of the at least one light-emitting element, and the second signal trace is electrically connected to the second electrode of the at least one light-emitting element; the ground trace is electrically connected to the at least one anti-static trace, and the anti-static trace is configured to surround the at least one light-emitting element; in the display area, the anti-static trace is located between the first signal trace and the light-emitting element; in the peripheral area, the ground trace is located between the second signal trace and the first signal trace.

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