A double-sided heat dissipation power module with dual power circuits

Abstract

The invention discloses a double-sided heat dissipation power module with dual power circuits, including an upper DBC substrate and a lower DBC substrate placed in parallel; the upper DBC substrate and the lower DBC substrate have symmetrical layout structures and the opposite side of the two is the inner surface; the upper DBC substrate includes an upper AlN substrate and an upper metal layer located on the inner surface of the upper AlN substrate; the lower DBC substrate includes a lower AlN substrate and a lower metal layer located on the inner surface of the lower AlN substrate; the upper metal layer and the lower metal layer both include a plurality of DC+ terminal metal layers, AC terminal metal layers, DC-terminal metal layers and a driving metal layer. The power module adopts a DBC layout design with symmetrical upper and lower structures, so that each DC+ terminal has two different power circuits, which reach different DC-terminals respectively, realize mutual inductance cancellation, reduce the parasitic inductance of the module power circuit, ensure the consistency of circuit parameters between internal chips, and mitigate the thermal coupling effect between adjacent chips.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductor power modules, and in particular relates to a double-sided heat dissipation power module with dual power circuits. Background Art

[0002] As a wide bandgap semiconductor device, silicon carbide devices have many advantages such as high voltage, high temperature tolerance, and low on-resistance. Silicon carbide devices can operate at higher junction temperatures, greatly reducing system power consumption. Therefore, silicon carbide devices are widely used in smart grids, new energy vehicles, photovoltaic power generation, rail transportation and other fields.

[0003] Traditional power module packaging is mainly based on two-dimensional planar packaging technologies such as solder connection and wire bonding. However, the traditional module packaging structure is difficult to give full play to the electrical and thermal advantages of silicon carbide devices. First, the traditional module packaging structure usually has a large parasitic inductance, which may cause serious electromagnetic interference and voltage overshoot in the power circuit. In addition, due to the asymmetry of the internal circuit layout and structure of the power module, the parasitic parameters of the chip external circuit are inconsistent. When multiple chips work in parallel, the current distribution may be uneven. This not only reduces the efficiency of the power module, but also may cause some chips to overheat, thereby shortening the life of the power module. In addition, in the traditional packaging structure, the problem of thermal coupling between chips is also prominent. Silicon carbide devices usually operate under high-frequency conditions, and the chip thermal coupling problem may limit the full performance of their performance, and may also cause some chips to overheat and fail.

[0004] Therefore, it is crucial to solve the problems of large parasitic inductance inside SiC power modules, inconsistent parasitic parameters of chip external circuits, and chip thermal coupling. Summary of the invention

[0005] The present invention aims to reduce the parasitic inductance inside the module through an innovative module layout design, achieve parameter consistency between the chips inside the module, thereby improving the current balance between the parallel chips, and provide a new solution for improving the performance and reliability of silicon carbide power modules. Based on this, the present invention proposes a double-sided heat dissipation power module with dual power circuits. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0006] A double-sided heat dissipation power module with dual power circuits, comprising an upper DBC substrate and a lower DBC substrate placed in parallel; the upper DBC substrate and the lower DBC substrate have symmetrical layout structures and the opposite sides of the upper DBC substrate and the lower DBC substrate are inner surfaces;

[0007] The upper DBC substrate comprises an upper AlN substrate and an upper metal layer located on the inner surface of the upper AlN substrate; the lower DBC substrate comprises a lower AlN substrate and a lower metal layer located on the inner surface of the lower AlN substrate;

[0008] The upper metal layer and the lower metal layer each include a plurality of DC+ terminal metal layers, AC terminal metal layers, DC- terminal metal layers and a driving metal layer;

[0009] The upper silicon carbide chip of the power circuit and the multiple DC+ terminals of the power circuit are placed on the multiple DC+ terminal metal layers; the lower silicon carbide chip of the power circuit and the AC terminal of the power circuit are placed on the AC terminal metal layer; the DC- terminal of the power circuit is placed on the DC-terminal metal layer; the drive terminal of the drive circuit is arranged on the drive metal layer;

[0010] The source electrode of the upper silicon carbide chip is connected to the AC terminal metal layer through molybdenum, and the source electrode of the lower silicon carbide chip is connected to the DC-terminal metal layer through molybdenum; and the source electrode of the upper silicon carbide chip and the source electrode of the lower silicon carbide chip are Kelvin-connected to the driving circuit through bonding wires;

[0011] The DC+ terminal metal layer in the upper metal layer and the DC- terminal metal layer in the lower metal layer are placed close to each other up and down; and the DC+ terminal metal layer in the upper metal layer and the DC+ terminal metal layer in the lower metal layer are connected through molybdenum compound, the DC- terminal metal layer in the upper metal layer and the DC- terminal metal layer in the lower metal layer are connected through molybdenum compound, and the AC terminal metal layer in the upper metal layer and the AC terminal metal layer in the lower metal layer are connected through molybdenum compound to form a ring structure in which the upper and lower metal layers are interconnected, so that each DC terminal has two different power circuits.

[0012] Beneficial effects of the present invention:

[0013] 1. The power module provided by the present invention makes full use of the characteristics of multiple pin terminals and multiple independent power circuits of the module. Through the ingenious DBC layout design, the DC+ and DC- terminal metal layers in the upper metal layer are placed close to the DC- and DC+ terminal metal layers in the lower metal layer, and the corresponding terminals in the upper and lower metal layers are connected through molybdenum compounds, so that each DC+ terminal has two different power circuits, reaching different DC- terminals respectively; one of the power circuits achieves mutual inductance cancellation with the other power circuit between the upper and lower metal layers, while the other power circuit achieves mutual inductance cancellation between the upper and lower metal layers and molybdenum compounds of its own circuit. This design greatly reduces the parasitic inductance of the module power circuit, effectively reduces the overvoltage and current oscillation of the power module during the opening and closing process, and also reduces the switching loss of the module.

[0014] 2. The power module of the present invention adopts a symmetrical design of upper and lower structures. Since the metal layer routing layout of the upper substrate and the lower substrate of the double-sided power module is exactly the same, this design ensures that the power circuit and drive circuit of each chip have completely consistent parasitic inductance, thereby ensuring the consistency of circuit parameters between internal chips. On the other hand, this can also greatly reduce the manufacturing cost of the power module.

[0015] 3. The symmetrical layout adopted by the power module provided by the present invention can increase the distance between adjacent chips, alleviate the thermal coupling effect between adjacent chips, reduce the temperature concentration phenomenon, achieve more uniform heat distribution and more efficient heat conduction, and help to extend the service life of the power module.

[0016] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a schematic diagram of the overall structure of a double-sided heat dissipation power module with dual power circuits provided by an embodiment of the present invention;

[0018] Figure 2 is a front view of a double-sided heat dissipation power module with dual power circuits provided by an embodiment of the present invention;

[0019] Figure 3 is a side view of a double-sided heat dissipation power module with dual power circuits provided by an embodiment of the present invention;

[0020] Figure 4 is a top view of a double-sided heat dissipation power module with dual power circuits provided by an embodiment of the present invention;

[0021] Figure 5 and Figure 6 is a lower metal layer layout diagram provided by an embodiment of the present invention;

[0022] Figure 7 and Figure 8 is a layout diagram of an upper metal layer provided by an embodiment of the present invention;

[0023] Fig. 9 is a schematic diagram of a connection method between an upper metal layer and a lower metal layer provided in an embodiment of the present invention;

[0024] Fig.10 is a regional connection diagram of a DC+ terminal metal layer provided by an embodiment of the present invention;

[0025] Fig.11 is a regional connection diagram of the AC terminal metal layer provided by an embodiment of the present invention;

[0026] Fig.12 is a regional connection diagram of a DC-terminal metal layer provided by an embodiment of the present invention;

[0027] Fig.13 It is a schematic diagram of a power circuit of a double-sided heat dissipation power module with dual power circuits provided by an embodiment of the present invention.

[0028] Description of reference numerals:

[0029] 101, upper AlN substrate; 102, upper metal layer; 103, upper AlN substrate upper metal; 201, lower AlN substrate; 202, lower metal layer; 203, lower AlN substrate lower metal; 301, first DC+ terminal; 302, second DC+ terminal; 303, first DC- terminal; 304, second DC- terminal; 305, first AC terminal; 306, second AC terminal; 307-314, lower layer driving terminal; 401, first DC+ terminal metal layer; 402, second DC+ terminal metal layer; 403, first AC terminal metal layer; 404, first DC- terminal metal layer; 405, third DC+ terminal metal layer; 406-413, lower layer driving metal layer; 501, fourth DC+ terminal; 502, third D C+ terminal; 503, fourth DC-terminal; 504, third DC-terminal; 505, fourth AC terminal; 506, third AC terminal; 507~514, upper drive terminal; 601, fourth DC+ terminal metal layer; 602, fifth DC+ terminal metal layer; 603, second AC terminal metal layer; 604, second DC-terminal metal layer; 605, sixth DC+ terminal metal layer; 606~613, upper drive metal layer; 701, first silicon carbide chip; 702, second silicon carbide chip; 703, third silicon carbide chip; 704, fourth silicon carbide chip; 705, fifth silicon carbide chip; 706, sixth silicon carbide chip; 707, seventh silicon carbide chip; 708, eighth silicon carbide chip; 801~820 molybdenum oxide. DETAILED DESCRIPTION

[0030] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0031] Please see the joint Figure 1-4 ,in, Figure 1 is a schematic diagram of the overall structure of a double-sided heat dissipation power module with dual power circuits provided by an embodiment of the present invention. Figure 2 is a front view of a double-sided heat dissipation power module with dual power circuits provided by an embodiment of the present invention, Figure 3 is a side view of a double-sided heat dissipation power module with dual power circuits provided by an embodiment of the present invention, Figure 4 It is a top view of a double-sided heat dissipation power module with dual power circuits provided by an embodiment of the present invention.

[0032] The double-sided heat dissipation power module with dual power circuits provided in this embodiment includes an upper DBC substrate and a lower DBC substrate placed in parallel; the upper DBC substrate and the lower DBC substrate have a symmetrical layout structure and the opposite side of the upper DBC substrate and the lower DBC substrate are inner surfaces;

[0033] The upper DBC substrate includes an upper AlN substrate 101 and an upper metal layer 102 located on the inner surface of the upper AlN substrate 101 ; the lower DBC substrate includes a lower AlN substrate 201 and a lower metal layer 202 located on the inner surface of the lower AlN substrate 201 .

[0034] It is understandable that if Figure 2 As shown in FIG. 3 , an upper AlN substrate upper metal 103 is further provided on the upper surface of the upper AlN substrate 101 to form an upper DBC substrate together with the upper AlN substrate 101 and the upper metal layer 102. Correspondingly, a lower AlN substrate lower metal 203 is also provided on the lower surface of the lower AlN substrate 201 to form a lower DBC substrate together with the lower AlN substrate 201 and the lower metal layer 202.

[0035] In this embodiment, a heat sink can be installed on the upper AlN substrate upper metal 103 and the lower AlN substrate lower metal 203 to achieve double-sided heat dissipation, so that the power module has a stronger heat dissipation capability. The heat sink can be a natural air cooling, forced air cooling or liquid cooling heat sink.

[0036] Specifically, in this embodiment, the upper metal layer 102 and the lower metal layer 202 each include a plurality of DC+ terminal metal layers, AC terminal metal layers, DC- terminal metal layers, and a driving metal layer;

[0037] The upper silicon carbide chip of the power circuit and the multiple DC+ terminals of the power circuit are placed on the multiple DC+ terminal metal layers; the lower silicon carbide chip of the power circuit and the AC terminal of the power circuit are placed on the AC terminal metal layer; the DC- terminal of the power circuit is placed on the DC-terminal metal layer; the drive terminal of the drive circuit is set on the drive metal layer;

[0038] The source electrode of the upper silicon carbide chip is connected to the AC terminal metal layer through molybdenum, and the source electrode of the lower silicon carbide chip is connected to the DC-terminal metal layer through molybdenum; and the source electrode of the upper silicon carbide chip and the source electrode of the lower silicon carbide chip are Kelvin-connected to the driving circuit through bonding wires;

[0039] The DC+ terminal metal layer in the upper metal layer and the DC- terminal metal layer in the lower metal layer are placed close to each other, and the DC- terminal metal layer in the upper metal layer and the DC+ terminal metal layer in the lower metal layer are placed close to each other; and the DC+ terminal metal layer in the upper metal layer and the DC+ terminal metal layer in the lower metal layer are connected through molybdenum compound, the DC- terminal metal layer in the upper metal layer and the DC- terminal metal layer in the lower metal layer are connected through molybdenum compound, and the AC terminal metal layer in the upper metal layer and the AC terminal metal layer in the lower metal layer are connected through molybdenum compound to form a ring structure in which the upper and lower metal layers are interconnected, so that each DC terminal has two different power circuits.

[0040] For further information, see Figure 5 and Figure 6 , Figure 5 and Figure 6 is a lower metal layer layout diagram provided by an embodiment of the present invention. Specifically, in the lower metal layer 202, the multiple DC+ terminal metal layers specifically include a first DC+ terminal metal layer 401, a second DC+ terminal metal layer 402 and a third DC+ terminal metal layer 405; wherein,

[0041] The first DC+ terminal metal layer 401 and the second DC+ terminal metal layer 402 are both in the shape of right triangles, and are respectively arranged at the lower left corner and the lower right corner of the entire lower metal layer 202, and the right angle sides of the two are aligned with the right angle sides of the lower DBC substrate;

[0042] A first DC+ terminal 301 is fixedly disposed on the first DC+ terminal metal layer 401, and the two are electrically connected; a second DC+ terminal 302 is fixedly disposed on the second DC+ terminal metal layer 402, and the two are electrically connected; the first DC+ terminal 301 and the second DC+ terminal 302 are both led out from the bottom side;

[0043] The third DC+ terminal metal layer 405 is rectangular in shape and is disposed above the entire lower metal layer 202 .

[0044] Please continue to see Figure 5 and Figure 6 , wherein the AC terminal metal layer in the lower metal layer 202 specifically includes a first AC terminal metal layer 403;

[0045] The first AC terminal metal layer 403 is in an arcuate shape and is disposed above and adjacent to the first DC+ terminal metal layer 401 and the second DC+ terminal metal layer 402 ;

[0046] The first AC terminal 305 and the second AC terminal 306 are fixedly disposed on the left and right sides of the first AC terminal metal layer 403 , respectively; and the first AC terminal 305 and the second AC terminal 306 are both electrically connected to the first AC terminal metal layer 403 and led out from the left and right sides.

[0047] Please continue to see Figure 5 and Figure 6 , wherein the DC-terminal metal layer in the lower metal layer 202 specifically includes a first DC-terminal metal layer 404;

[0048] The first DC-terminal metal layer 404 is in the shape of an inverted convex letter, and is disposed between the first AC terminal metal layer 403 and the third DC+terminal metal layer 405;

[0049] The first DC-terminal 303 and the second DC-terminal 304 are fixedly disposed at the left and right ends of the first DC-terminal metal layer 404 , respectively. The first DC-terminal 303 and the second DC-terminal 304 are both electrically connected to the first DC-terminal metal layer 404 and led out from the upper side.

[0050] Furthermore, the upper metal layer 102 and the lower metal layer 202 provided in this embodiment have the same layout structure, which can be regarded as the layout of the lower metal layer 202 rotated 180° around the center. Figure 7 and Figure 8 , Figure 7 and Figure 8 is a layout diagram of the upper metal layer provided by an embodiment of the present invention. Specifically, in the upper metal layer 102, the plurality of DC+ terminal metal layers specifically include a fourth DC+ terminal metal layer 601, a fifth DC+ terminal metal layer 602, and a sixth DC+ terminal metal layer 605; wherein,

[0051] The fourth DC+ terminal metal layer 601 and the fifth DC+ terminal metal layer 602 are both in the shape of right triangles, and are respectively arranged at the upper left corner and the upper right corner of the entire lower metal layer 202, and the right angle sides of the two are aligned with the right angle sides of the upper DBC substrate;

[0052] The fourth DC+ terminal metal layer 601 is fixedly provided with the fourth DC+ terminal 501, and the two are electrically connected; the fifth DC+ terminal metal layer 602 is fixedly provided with the third DC+ terminal 502, and the two are electrically connected; the third DC+ terminal 502 and the fourth DC+ terminal 501 are both led out from the upper side;

[0053] The sixth DC+ terminal metal layer 605 is rectangular in shape and is disposed below the entire upper metal layer 102 .

[0054] In this embodiment, the upper metal layer 102 is rotated 180° counterclockwise along the central axis and is inverted on the lower metal layer 202, and interconnected through molybdenum compounds. The overall connection method is as follows: Fig. 9 As shown, the detailed connection relationship of all DC+ terminal metal layers is as follows:

[0055] The fourth DC+ terminal metal layer 601 connects the second DC+ terminal metal layer 402 and the third DC+ terminal metal layer 405 through molybdenum compound;

[0056] The fifth DC+ terminal metal layer 602 connects the first DC+ terminal metal layer 401 and the third DC+ terminal metal layer 405 through molybdenum compound;

[0057] The sixth DC+ terminal metal layer 605 connects the first DC+ terminal metal layer 401 and the second DC+ terminal metal layer 402 through molybdenum compound.

[0058] Specifically, combined Fig.10 From the regional connection diagram of the DC+ terminal metal layer shown, it can be seen that the fourth DC+ terminal metal layer 601 is connected to the second DC+ terminal metal layer 402 through the molybdenum compound 808 at the adjacent corner, and is connected to the third DC+ terminal metal layer 405 through the molybdenum compound 812; the fifth DC+ terminal metal layer 602 is connected to the first DC+ terminal metal layer 401 through the molybdenum compound 807, and is connected to the third DC+ terminal metal layer 405 through the molybdenum compound 811; the sixth DC+ terminal metal layer 605 is connected to the first DC+ terminal metal layer 401 through the molybdenum compound 813, and is connected to the second DC+ terminal metal layer 402 through the molybdenum compound 814.

[0059] For further information, please see Figure 7 and Figure 8 , wherein the AC terminal metal layer in the upper metal layer 102 specifically includes a second AC terminal metal layer 603;

[0060] The second AC terminal metal layer 603 is in an arcuate shape and is disposed below and adjacent to the fourth DC+ terminal metal layer 601 and the fifth DC+ terminal metal layer 602 ;

[0061] The fourth AC terminal 505 and the third AC terminal 506 are fixedly disposed on the left and right sides of the second AC terminal metal layer 603, respectively. The fourth AC terminal 505 and the third AC terminal 506 are both electrically connected to the second AC terminal metal layer 603 and are led out from the left and right sides.

[0062] The second AC terminal metal layer 603 is obtained by rotating the first AC terminal metal layer 403 by 180°, and the two are connected via molybdenum compound.

[0063] Specifically, combined Fig.11 The AC terminal metal layer area connection diagram and Figure 6 , Figure 8 It can be seen that the second AC terminal metal layer 603 in the upper metal layer 102 is connected to the first AC terminal metal layer 403 in the lower metal layer 202 through the molybdenum compound 805 , the molybdenum compound 816 , the molybdenum compound 802 and the molybdenum compound 819 .

[0064] For further information, please see Figure 7 and Figure 8 , wherein the DC-terminal metal layer in the upper metal layer 102 specifically includes a second DC-terminal metal layer 604;

[0065] The second DC-terminal metal layer 604 is in the shape of an upright convex letter, and is disposed between the second AC terminal metal layer 603 and the sixth DC+ terminal metal layer 605;

[0066] The fourth DC-terminal 503 and the third DC-terminal 504 are fixedly disposed at the left and right ends of the second DC-terminal metal layer 604, respectively, and the fourth DC-terminal 503 and the third DC-terminal 504 are both electrically connected to the second DC-terminal metal layer 604 and led out from the bottom;

[0067] The second DC-terminal metal layer 604 is connected to the first DC-terminal metal layer 404 through molybdenum compound.

[0068] Specifically, combined Fig.12 The area connection diagram of the DC-terminal metal layer is shown as well as Figure 6 It can be seen that the second DC-terminal metal layer 604 in the upper metal layer 102 is connected to the first DC-terminal metal layer 404 in the lower metal layer 202 through the molybdenum compounds 809 and 810 .

[0069] It should be noted that the DC+ terminals 301, 302, 501, 502 and the DC- terminals 303, 304, 503, 504 in this embodiment are placed close to each other on the package, so that the current flows through the DC+ terminal metal layers 401, 402, 601, 602 in the opposite direction to the DC+ terminal metal layers 404, 604, making full use of the mutual inductance cancellation principle to reduce the inductance of the power circuit.

[0070] For further information, please see Figure 5-Figure 8 , this embodiment designs four groups of eight silicon carbide power chips, including a first silicon carbide chip 701, a second silicon carbide chip 702, a third silicon carbide chip 703, a fourth silicon carbide chip 704, a fifth silicon carbide chip 705, a sixth silicon carbide chip 706, a seventh silicon carbide chip 707 and an eighth silicon carbide chip 708. The first silicon carbide chip 701, the fourth silicon carbide chip 704, the fifth silicon carbide chip 705 and the eighth silicon carbide chip 708 form the upper silicon carbide chip of the power loop, wherein the drain of the first silicon carbide chip 701 is fixed and electrically connected to the center upper position of the first DC+ terminal metal layer 401;

[0071] The drain of the fourth silicon carbide chip 704 is fixed and electrically connected to the upper center of the second DC+ terminal metal layer 402;

[0072] The drain of the fifth silicon carbide chip 705 is fixed and electrically connected to the lower center of the fourth DC+ terminal metal layer 601;

[0073] The drain of the eighth silicon carbide chip 708 is fixed and electrically connected to a lower center position of the fifth DC+ terminal metal layer 602 .

[0074] The lower silicon carbide chip includes a second silicon carbide chip 702, a third silicon carbide chip 703, a sixth silicon carbide chip 706, and a seventh silicon carbide chip 707, forming a lower silicon carbide chip of a power loop; wherein the drain electrodes of the second silicon carbide chip 702 and the third silicon carbide chip 703 are fixed and electrically connected to the lower center of the first AC terminal metal layer 403;

[0075] The drain electrodes of the sixth silicon carbide chip 706 and the seventh silicon carbide chip 707 are fixed and electrically connected to the upper center of the second AC terminal metal layer 603 .

[0076] In addition, in this embodiment, four groups of driving metal layers are arranged on both the upper metal layer 102 and the lower metal layer 202, and each group of driving metal layers is arranged close to the DC+ terminal metal layer or the AC terminal metal layer, and corresponds one to one to the silicon carbide chip on the metal layer;

[0077] Each set of driving metal layers includes two independent rounded rectangular metal islands, which serve as a gate driving metal layer and a source driving metal layer respectively;

[0078] A gate terminal is placed on one side of the gate drive metal layer, and the other side is connected to the gate of the adjacent silicon carbide chip;

[0079] The source terminal is placed on one side of the source drive metal layer, and the other side is connected to the source Kelvin of the adjacent silicon carbide chip.

[0080] Specific, combined Figure 5-8 As shown, the drain of the first silicon carbide chip 701 is welded at the upper center of the first DC+ terminal metal layer 401, and the source is connected to the second AC terminal metal layer 603 through the molybdenum compound 801; the source and gate of the first silicon carbide chip 701 are also connected to the lower driving metal layers 406 and 407 through bonding wires, respectively, and the other ends of the lower driving metal layers 406 and 407 are respectively connected to the upper driving terminals 308 and 307, and are led outward.

[0081] The drain of the second silicon carbide chip 702 is welded at a lower center position of the first AC terminal metal layer 403, and the source is connected to the second DC-terminal metal layer 604 through the molybdenum compound 803; the source and gate of the second silicon carbide chip 702 are respectively connected to the lower driving metal layers 408 and 409 through bonding wires, and the other ends of the lower driving metal layers 408 and 409 are respectively connected to the lower driving terminals 310 and 309 and are led outward.

[0082] The drain of the third silicon carbide chip 703 is welded at the lower center of the first AC terminal metal layer 403, and the source is connected to the second DC-terminal metal layer 604 through the molybdenum compound 804; the source and gate of the third silicon carbide chip 703 are respectively connected to the lower driving metal layers 410 and 411 through bonding wires, and the other ends of the lower driving metal layers 410 and 411 are respectively connected to the lower driving terminals 312 and 311 and are led outward.

[0083] The drain of the fourth silicon carbide chip 704 is welded at the upper center of the second DC+ terminal metal layer 402, and the source is connected to the second AC terminal metal layer 603 through the molybdenum compound 806; the source and gate of the fourth silicon carbide chip 704 are respectively connected to the lower driving metal layers 412 and 413 through bonding wires, and the other ends of the lower driving metal layers 412 and 413 are respectively connected to the lower driving terminals 314 and 313 and are led outward.

[0084] The drain of the fifth silicon carbide chip 705 is welded at the lower center of the fourth DC+ terminal metal layer 601, and the source is connected to the first AC terminal metal layer 403 through the molybdenum compound 815; the source and gate of the fifth silicon carbide chip 705 are connected to the upper driving metal layers 606 and 607 through bonding wires, respectively, and the other ends of the upper driving metal layers 606 and 607 are connected to the upper driving terminals 508 and 507, respectively, and are led outward.

[0085] The drain of the sixth silicon carbide chip 706 is welded at the upper center of the second AC terminal metal layer 603, and the source is connected to the first DC-terminal metal layer 404 through the molybdenum compound 817; the source and gate of the sixth silicon carbide chip 706 are connected to the upper driving metal layers 608 and 609 through bonding wires, respectively, and the other ends of the upper driving metal layers 608 and 609 are connected to the upper driving terminals 510 and 509, respectively, and are led outward.

[0086] The drain of the seventh silicon carbide chip 707 is welded at the upper center of the second AC terminal metal layer 603, and the source is connected to the first DC-terminal metal layer 404 through the molybdenum compound 818; the source and gate of the seventh silicon carbide chip 707 are respectively connected to the upper driving metal layers 610 and 611 through bonding wires, and the other ends of the upper driving metal layers 610 and 611 are respectively connected to the upper driving terminals 512 and 511 and are led outward.

[0087] The drain of the eighth silicon carbide chip 708 is welded at the lower center of the fifth DC+ terminal metal layer 602, and the source is connected to the first AC terminal metal layer 403 through the molybdenum compound 820; the source and gate of the eighth silicon carbide chip 708 are respectively connected to the upper driving metal layers 612 and 613 through bonding wires, and the other ends of the upper driving metal layers 612 and 613 are respectively connected to the upper driving terminals 514 and 513 and are led outward.

[0088] As a preferred implementation, the gate drive terminal and the source drive terminal are welded on the gate drive metal layer and the source drive metal layer corresponding to the upper and lower metal layers, and are led outward. The gate and source of the silicon carbide chip are connected to the gate drive metal layer and the source drive metal layer respectively through bonding wires. In addition, in this embodiment, various types of terminals and corresponding metal layers can be connected by welding.

[0089] The four groups of eight silicon carbide chips provided in this embodiment form eight power loops, and each DC+ terminal has two power loops, reaching different DC-terminals respectively, that is, there are two different power loops at each DC terminal. One of the power loops achieves mutual inductance cancellation with another power loop between the upper and lower metal layers, while the other power loop achieves mutual inductance cancellation between the upper and lower metal layers of its own loop and the molybdenum compound.

[0090] For details, see Fig.13 , Fig.13 This is a schematic diagram of a power circuit of a double-sided heat dissipation power module with dual power circuits provided by an embodiment of the present invention. The power circuits of the first DC+ terminal 301 and the third DC+ terminal 502 are taken as examples to illustrate the two power circuits on the DC+ terminal.

[0091] The first power loop starting from the first DC+ terminal 301 includes: the first DC+ terminal 301, the first DC+ terminal metal layer 401, the first silicon carbide chip 701, the molybdenum compound 801, the second AC terminal metal layer 603, the seventh silicon carbide chip 707, the molybdenum compound 818, the first DC-terminal metal layer 404 and the first DC-terminal 303.

[0092] The second power loop starting from the first DC+ terminal 301 includes: the first DC+ terminal 301, the first DC+ terminal metal layer 401, the first silicon carbide chip 701, the molybdenum compound 801, the second AC terminal metal layer 603, the molybdenum compound 802, the first AC terminal metal layer 403, the second silicon carbide chip 702, the molybdenum compound 803, the second DC-terminal metal layer 604 and the third DC-terminal 504.

[0093] The first power loop starting from the third DC+ terminal 502 includes: the third DC+ terminal 502, the fifth DC+ terminal metal layer 602, the eighth silicon carbide chip 708, the molybdenum compound 820, the first AC terminal metal layer 403, the second silicon carbide chip 702, the molybdenum compound 803, the second DC-terminal metal layer 604, and the third DC-terminal 504.

[0094] The second power loop starting from the third DC+ terminal 502 includes: the third DC+ terminal 502, the fifth DC+ terminal metal layer 602, the eighth silicon carbide chip 708, the molybdenum compound 820, the first AC terminal metal layer 403, the molybdenum compound 819, the second AC terminal metal layer 603, the seventh silicon carbide chip 707, the molybdenum compound 818, the first DC-terminal metal layer 404 and the first DC-terminal 303.

[0095] The first power loop starting from the first DC+ terminal 301 flows out from the first DC-terminal 303 through the upper and lower metal layers. The current direction of this power loop is opposite to that of the first power loop flowing from the third DC+ terminal 502 through the upper and lower metal layers to the third DC-terminal 504, achieving mutual inductance cancellation. In addition, when the current of the second power loop of the first DC+ terminal 301 flows through the upper second AC terminal metal layer 603, it will pass through the molybdenum compound 802 to reach the lower first AC terminal metal layer 403, and finally the current flows out from the third DC-terminal 504, achieving the reverse direction of the current between the upper and lower metal layers 401, 604, and the molybdenum compounds 801, 802, and 803. Similarly, the second power loop starting from the third DC+ terminal 502 flows out from the first DC-terminal 303 after passing through the molybdenum compounds 820, 819, and 818, achieving the self-mutual inductance cancellation of the second power loop.

[0096] Similarly, the second DC+ terminal 302 and the fourth DC+ terminal 501 will also have corresponding first and second power loops, and details can be found in the first DC+ terminal 301 and the third DC+ terminal 502 .

[0097] The power module provided by the present invention makes full use of the characteristics of multiple pin terminals and multiple independent power circuits of the module. Through the ingenious DBC layout design, each DC+ terminal has two different power circuits, which reach different DC- terminals respectively; one of the power circuits achieves mutual inductance cancellation with the other power circuit between the upper and lower metal layers, while the other power circuit achieves mutual inductance cancellation between the upper and lower metal layers of its own circuit and the molybdenum compound. This design greatly reduces the parasitic inductance of the module power circuit, effectively reduces the overvoltage and current oscillation of the power module during the opening and closing process, and also reduces the switching loss of the module.

[0098] The power module of the present invention also adopts a symmetrical upper and lower structural design. Since the metal layer routing layout of the upper substrate and the lower substrate of the double-sided power module is exactly the same, this design ensures that the power circuit and the drive circuit of each chip have completely consistent parasitic inductance, thereby ensuring the consistency of circuit parameters between internal chips. On the other hand, this can also greatly reduce the manufacturing cost of the power module.

[0099] In addition, the symmetrical layout adopted by the power module provided by the present invention can increase the spacing between adjacent chips, alleviate the thermal coupling effect between adjacent chips, reduce temperature concentration, achieve more uniform heat distribution and more efficient heat conduction, and help extend the service life of the power module.

[0100] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0101] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0102] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A double-sided heat dissipation power module with dual power circuits, characterized in that: It comprises an upper DBC substrate and a lower DBC substrate placed in parallel; the upper DBC substrate and the lower DBC substrate have a symmetrical layout structure and the opposite side of the upper DBC substrate and the lower DBC substrate is an inner surface; The upper DBC substrate comprises an upper AlN substrate and an upper metal layer located on the inner surface of the upper AlN substrate; the lower DBC substrate comprises a lower AlN substrate and a lower metal layer located on the inner surface of the lower AlN substrate; The upper metal layer and the lower metal layer each include a plurality of DC+ terminal metal layers, AC terminal metal layers, DC- terminal metal layers and a driving metal layer; The upper silicon carbide chip of the power circuit and the multiple DC+ terminals of the power circuit are placed on the multiple DC+ terminal metal layers; the lower silicon carbide chip of the power circuit and the AC terminal of the power circuit are placed on the AC terminal metal layer; the DC- terminal of the power circuit is placed on the DC-terminal metal layer; the drive terminal of the drive circuit is arranged on the drive metal layer; The source electrode of the upper silicon carbide chip is connected to the AC terminal metal layer through molybdenum, and the source electrode of the lower silicon carbide chip is connected to the DC-terminal metal layer through molybdenum; and the source electrode of the upper silicon carbide chip and the source electrode of the lower silicon carbide chip are Kelvin-connected to the driving circuit through bonding wires; The DC+ terminal metal layer in the upper metal layer and the DC- terminal metal layer in the lower metal layer are placed close to each other up and down, and the DC- terminal metal layer in the upper metal layer and the DC+ terminal metal layer in the lower metal layer are placed close to each other up and down; and the DC+ terminal metal layer in the upper metal layer and the DC+ terminal metal layer in the lower metal layer are connected through molybdenum compound, the DC- terminal metal layer in the upper metal layer and the DC- terminal metal layer in the lower metal layer are connected through molybdenum compound, and the AC terminal metal layer in the upper metal layer and the AC terminal metal layer in the lower metal layer are connected through molybdenum compound to form a ring structure in which the upper and lower metal layers are interconnected, so that each DC terminal has two different power circuits.

2. A double-sided heat dissipation power module with dual power circuits according to claim 1, characterized in that: In the lower metal layer, the plurality of DC+ terminal metal layers specifically include a first DC+ terminal metal layer, a second DC+ terminal metal layer and a third DC+ terminal metal layer; wherein, The first DC+ terminal metal layer and the second DC+ terminal metal layer are both in the shape of right triangles, and are respectively arranged at the lower left corner and the lower right corner of the entire lower metal layer, and the right angle sides of the two are aligned with the right angle sides of the lower DBC substrate; A first DC+ terminal is fixedly disposed on the first DC+ terminal metal layer, and the two are electrically connected; a second DC+ terminal is fixedly disposed on the second DC+ terminal metal layer, and the two are electrically connected; the first DC+ terminal and the second DC+ terminal are both led out from the bottom side; The third DC+ terminal metal layer is rectangular in shape and is disposed above the entire lower metal layer.

3. The double-sided heat dissipation power module with dual power circuits according to claim 2, characterized in that: In the lower metal layer, the AC terminal metal layer specifically includes a first AC terminal metal layer; The first AC terminal metal layer is in an arcuate shape and is disposed above and adjacent to the first DC+ terminal metal layer and the second DC+ terminal metal layer; The first AC terminal and the second AC terminal are fixedly disposed on the left and right sides of the first AC terminal metal layer respectively; and the first AC terminal and the second AC terminal are both electrically connected to the first AC terminal metal layer and are led out from the left and right sides.

4. The double-sided heat dissipation power module with dual power circuits according to claim 3, characterized in that: In the lower metal layer, the DC-terminal metal layer specifically includes a first DC-terminal metal layer; The first DC-terminal metal layer is in the shape of an inverted convex letter, and is disposed between the first AC terminal metal layer and the third DC+ terminal metal layer; The left and right ends of the first DC-terminal metal layer are respectively fixed with a first DC-terminal and a second DC-terminal, and the first DC-terminal and the second DC-terminal are both electrically connected to the first DC-terminal metal layer and led out from the upper side.

5. The double-sided heat dissipation power module with dual power circuits according to claim 4, characterized in that: In the upper metal layer, the plurality of DC+ terminal metal layers specifically include a fourth DC+ terminal metal layer, a fifth DC+ terminal metal layer and a sixth DC+ terminal metal layer; wherein, The fourth DC+ terminal metal layer and the fifth DC+ terminal metal layer are both in the shape of right triangles, and are respectively arranged at the upper left corner and the upper right corner of the entire lower metal layer, and the right angle sides of the two are aligned with the right angle sides of the upper DBC substrate; A fourth DC+ terminal is fixedly disposed on the fourth DC+ terminal metal layer, and the two are electrically connected; a third DC+ terminal is fixedly disposed on the fifth DC+ terminal metal layer, and the two are electrically connected; the third DC+ terminal and the fourth DC+ terminal are both led out from the upper side; The sixth DC+ terminal metal layer is rectangular in shape and is disposed below the entire upper metal layer; The fourth DC+ terminal metal layer connects the second DC+ terminal metal layer and the third DC+ terminal metal layer through molybdenum compound; The fifth DC+ terminal metal layer connects the first DC+ terminal metal layer and the third DC+ terminal metal layer through molybdenum compound; The sixth DC+ terminal metal layer connects the first DC+ terminal metal layer and the second DC+ terminal metal layer through molybdenum compound.

6. The double-sided heat dissipation power module with dual power circuits according to claim 5, characterized in that: In the upper metal layer, the AC terminal metal layer specifically includes a second AC terminal metal layer; The second AC terminal metal layer is in an arcuate shape and is disposed below and adjacent to the fourth DC+ terminal metal layer and the fifth DC+ terminal metal layer; A fourth AC terminal and a third AC terminal are fixedly disposed on the left and right sides of the second AC terminal metal layer, respectively, and the fourth AC terminal and the third AC terminal are both electrically connected to the second AC terminal metal layer and are led out from the left and right sides; The second AC terminal metal layer is obtained by rotating the first AC terminal metal layer by 180°, and the two are connected via molybdenum compound.

7. A double-sided heat dissipation power module with dual power circuits according to claim 6, characterized in that: In the upper metal layer, the DC-terminal metal layer specifically includes a second DC-terminal metal layer; The second DC-terminal metal layer is in the shape of an upright convex letter, and is disposed between the second AC terminal metal layer and the sixth DC+ terminal metal layer; A fourth DC-terminal and a third DC-terminal are fixedly disposed at the left and right ends of the second DC-terminal metal layer, respectively, and the fourth DC-terminal and the third DC-terminal are both electrically connected to the second DC-terminal metal layer and led out from the bottom; The second DC-terminal metal layer is connected to the first DC-terminal metal layer via molybdenum compound.

8. The double-sided heat dissipation power module with dual power circuits according to claim 5, characterized in that: The upper silicon carbide chip includes a first silicon carbide chip, a fourth silicon carbide chip, a fifth silicon carbide chip and an eighth silicon carbide chip; The drain of the first silicon carbide chip is fixed and electrically connected to the upper center of the first DC+ terminal metal layer; The drain of the fourth silicon carbide chip is fixed and electrically connected to the upper center of the second DC+ terminal metal layer; The drain of the fifth silicon carbide chip is fixed and electrically connected to the lower center of the fourth DC+ terminal metal layer; The drain of the eighth silicon carbide chip is fixed and electrically connected to a lower center position of the fifth DC+ terminal metal layer.

9. The double-sided heat dissipation power module with dual power circuits according to claim 6, characterized in that: The lower tube silicon carbide chip includes a second silicon carbide chip, a third silicon carbide chip, a sixth silicon carbide chip, and a seventh silicon carbide chip; The drain electrodes of the second silicon carbide chip and the third silicon carbide chip are fixed and electrically connected to the lower center of the first AC terminal metal layer; The drain electrodes of the sixth silicon carbide chip and the seventh silicon carbide chip are fixed and electrically connected to the upper center position of the second AC terminal metal layer.

10. The double-sided heat dissipation power module with dual power circuits according to claim 9, characterized in that: The upper metal layer and the lower metal layer each include four groups of driving metal layers, each group of driving metal layers is arranged close to the DC+ terminal metal layer and the AC terminal metal layer, and corresponds one to one to the silicon carbide chip on the metal layer; Each set of driving metal layers includes two independent rounded rectangular metal islands, which serve as a gate driving metal layer and a source driving metal layer respectively; A gate terminal is placed on one side of the gate drive metal layer, and the other side is connected to the gate of an adjacent silicon carbide chip; A source terminal is placed on one side of the source driving metal layer, and the other side is connected to the source Kelvin of the adjacent silicon carbide chip.

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