Hysteresis comparison circuit, voltage detection device, and over- and under-voltage detection device
By combining a hysteresis voltage comparator unit and an isolation unit, the problem of the hysteresis comparator load effect is solved, and the stability and isolation effect of the circuit output are achieved.
Patent Information
- Application Number
- CN202311252818.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-26
- Publication Date
- 2026-01-09
- Estimated Expiration
- 2043-09-26
AI Technical Summary
In existing technologies, hysteresis comparators suffer from load effects, which affect the analog output of the backend.
A combination of a hysteresis voltage comparator and an isolation unit is used. The hysteresis voltage comparator generates a reference voltage based on a reference voltage signal and a logic signal. The isolation unit isolates the hysteresis voltage comparator from the back end to avoid load effects.
This improves the stability of the circuit output and avoids the impact of load effects on the back-end analog quantities.
Smart Images
Figure CN117459033B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of comparator, in particular to a hysteresis comparison circuit, a voltage detection device and an over-voltage and under-voltage detection device. BACKGROUND
[0002] The hysteresis comparator is a commonly used comparator and is widely used in industrial control field. The voltage comparison threshold of the hysteresis comparator is determined according to the output state. When the output is high, the voltage comparison threshold is high, and when the output is low, the voltage comparison threshold is low, thereby generating a voltage hysteresis interval. The hysteresis comparator has a strong anti-interference ability and is widely used in industrial control field
[0003] In the prior art, an operational amplifier is usually used to form a hysteresis comparator, and a reference Figure 1 Due to the existence of the resistor, the hysteresis comparator circuit has a load effect, which affects the output of the rear-end analog quantity. SUMMARY
[0004] The embodiments of the present application provide a hysteresis comparison circuit, a voltage detection device and an over-voltage and under-voltage detection device to solve the problem that the output of the hysteresis comparator in the prior art has a load effect and affects the output of the rear-end analog quantity.
[0005] In a first aspect, the embodiments of the present application provide a hysteresis comparison circuit, comprising:
[0006] A hysteresis voltage comparison unit, a first input end of which receives a to-be-detected signal, and a second input end of which receives a reference voltage signal; the hysteresis voltage comparison unit compares the to-be-detected signal with the reference voltage, and when the voltage of the to-be-detected signal is greater than the reference voltage, a logic signal output from an output end is a first logic signal; when the voltage of the to-be-detected signal is not greater than the reference voltage, the logic signal is a second logic signal; the logic signal is fed back to the hysteresis voltage comparison unit, and the hysteresis voltage comparison unit generates the reference voltage based on the reference voltage signal and the logic signal; wherein the reference voltages corresponding to the first logic signal and the second logic signal are different in size;
[0007] An isolation unit, an input end of which receives the logic signal, and an output end of which outputs a comparison result signal after isolating the logic signal.
[0008] Optionally, when the logic signal is the first logic signal, the reference voltage generated by the hysteresis voltage comparison unit has a first voltage value; and when the logic signal is the second logic signal, the reference voltage generated by the hysteresis voltage comparison unit has a second voltage value.
[0009] The value of the reference voltage is switched from a first voltage value to a second voltage value when the logic signal is switched from a first logic signal to a second logic signal; the value of the reference voltage is switched from the second voltage value to the first voltage value when the logic signal is switched from the second logic signal to the first logic signal; wherein the first voltage value is different from the second voltage value.
[0010] Optionally, the hysteresis voltage comparison unit comprises a first comparator and a first resistor.
[0011] The first input end of the first comparator is coupled to the first input end of the hysteresis voltage comparison unit, the second input end of the first comparator is coupled to the second input end of the hysteresis voltage comparison unit, and the output end of the hysteresis voltage comparison unit is coupled to the second input end of the first comparator through the first resistor.
[0012] The logic signal is fed back to the second input end of the first comparator through the first resistor and is superimposed with the reference voltage signal to obtain the reference voltage.
[0013] Optionally, when the voltage of the to-be-detected signal is not greater than the reference voltage, the logic signal is high, and the value of the reference voltage is the second voltage value.
[0014] When the voltage of the to-be-detected signal is greater than the reference voltage, the logic signal is low, and the value of the reference voltage is the first voltage value.
[0015] When the logic signal is switched from high to low, the value of the reference voltage is switched from the second voltage value to the first voltage value; when the logic signal is switched from low to high, the value of the reference voltage is switched from the first voltage value to the second voltage value.
[0016] The second voltage value is greater than the first voltage value.
[0017] Optionally, the hysteresis voltage comparison unit comprises a second resistor, a third resistor and a fourth resistor.
[0018] The second input end of the first comparator is connected with the first end of the second resistor, the first end of the first resistor and the first end of the third resistor respectively, the first input end of the first comparator is connected with the first input end of the hysteresis voltage comparison unit, and the output end of the first comparator is connected with the second end of the first resistor, the first end of the fourth resistor and the output end of the hysteresis voltage comparison unit respectively.
[0019] The second end of the second resistor is connected with the second input end of the hysteresis voltage comparison unit.
[0020] The second end of the fourth resistor is connected to a pull-up power supply.
[0021] The second end of the third resistor is grounded.
[0022] Optionally, the isolation unit comprises a second comparator.
[0023] The first input end of the second comparator is connected with the input end of the isolation unit, the second input end of the second comparator is connected with the second input end of the first comparator, the first end of the first resistor, the first end of the second resistor and the first end of the third resistor respectively, and the output end of the second comparator is connected with the output end of the isolation unit.
[0024] Optionally, when the logic signal is switched from the first logic signal to the second logic signal, the comparison result signal is switched to the first result signal for indicating abnormal protection.
[0025] When the logic signal is switched from the second logic signal to the first logic signal, the comparison result signal is switched to the second result signal for indicating abnormal recovery.
[0026] In the second aspect, the embodiments of the present application provide a voltage detection device, comprising at least one hysteresis comparison circuit provided in the first aspect of the embodiments of the present application.
[0027] In the third aspect, the embodiments of the present application provide an overvoltage and undervoltage detection device, comprising two hysteresis comparison circuits provided in the first aspect of the embodiments of the present application connected in parallel.
[0028] The two reference voltages corresponding to the first hysteresis comparison circuit are different from the two reference voltages corresponding to the second hysteresis comparison circuit.
[0029] Optionally, in the first hysteresis comparison circuit, the first input end of the first comparator is a negative input end, the second input end of the first comparator is a positive input end, the first input end of the second comparator is a positive input end, and the second input end of the second comparator is a negative input end.
[0030] In the second hysteresis comparison circuit, the first input end of the first comparator is a negative input end, the second input end of the first comparator is a positive input end, the first input end of the second comparator is a negative input end, and the second input end of the second comparator is a positive input end.
[0031] The embodiment of the present application provides a hysteresis comparison circuit, a voltage detection device and an over-voltage and under-voltage detection device. The hysteresis comparison circuit comprises: a hysteresis voltage comparison unit, a first input end of which receives a to-be-detected signal, and a second input end of which receives a reference voltage signal; the hysteresis voltage comparison unit compares the to-be-detected signal with the reference voltage, and when the voltage of the to-be-detected signal is greater than the reference voltage, a logic signal output by an output end is a first logic signal; when the voltage of the to-be-detected signal is not greater than the reference voltage, the logic signal is a second logic signal; the logic signal is fed back to the hysteresis voltage comparison unit, and the hysteresis voltage comparison unit generates the reference voltage based on the reference voltage signal and the logic signal; and an isolation unit, an input end of which receives the logic signal, and an output end of which isolates and outputs a comparison result signal from the logic signal. In the embodiment of the present application, the hysteresis voltage comparison unit is isolated from the back end by the isolation unit, so that the load cannot affect the circuit, the load effect is avoided, and the output of the back-end analog quantity is affected. BRIEF DESCRIPTION OF DRAWINGS
[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.
[0033] Figure 1 is a circuit principle diagram of a hysteresis comparator in the prior art;
[0034] Figure 2 is a circuit structure schematic diagram of a hysteresis comparison circuit provided by the embodiment of the present application;
[0035] Figure 3 is a reference voltage change schematic diagram provided by the embodiment of the present application;
[0036] Figure 4 is a circuit principle diagram of a hysteresis voltage comparison unit provided by the embodiment of the present application;
[0037] Figure 5 is a circuit principle diagram of a hysteresis comparison circuit provided by the embodiment of the present application;
[0038] Figure 6 is a circuit principle diagram of another hysteresis comparison circuit provided by the embodiment of the present application;
[0039] Figure 7 is a circuit structure schematic diagram of an over-voltage and under-voltage detection device provided by the embodiment of the present application;
[0040] Figure 8 is a waveform diagram of two hysteresis comparison circuits in an over-voltage and under-voltage detection device provided by the embodiment of the present application. DETAILED DESCRIPTION
[0041] In order to make the person skilled in the art better understand the present scheme, the technical solutions in the embodiments of the present scheme will be clearly described below in combination with the drawings in the embodiments of the present scheme. Obviously, the described embodiments are part of the embodiments of the present scheme, rather than all the embodiments. Based on the embodiments in the present scheme, all other embodiments obtained by the person skilled in the art without creative labor should belong to the scope of protection of the present scheme.
[0042] The terms "comprising" and any other variant thereof in the specification and claims and the above drawings mean "including but not limited to", and are intended to cover non-exclusive inclusion, and are not limited to the examples listed in the text. In addition, the terms "first" and "second" and the like are used to distinguish different objects, rather than to describe a specific order.
[0043] The implementation of the present application is described in detail below in combination with specific drawings:
[0044] Figure 2 A structure schematic diagram of a hysteresis comparison circuit is provided for the embodiments of the present application. Referring to Figure 2 The hysteresis comparison circuit comprises:
[0045] The hysteresis voltage comparison unit 11 receives the to-be-detected signal Uin at the first input end and receives the reference voltage signal Vref1 at the second input end; it compares the to-be-detected signal Uin with the reference voltage, when the voltage of the to-be-detected signal Uin is greater than the reference voltage, the logic signal Uout1 output by the output end is the first logic signal; when the voltage of the to-be-detected signal Uin is not greater than the reference voltage, the logic signal Uout1 is the second logic signal; the logic signal Uout1 is fed back to the hysteresis voltage comparison unit 11, and the hysteresis voltage comparison unit 11 generates the reference voltage based on the reference voltage signal Vref1 and the logic signal Uout1; wherein the reference voltages corresponding to the first logic signal and the second logic signal are different in size;
[0046] The isolation unit 12 receives the logic signal Uout1 at the input end and outputs the comparison result signal Uout2 after isolating the logic signal Uout1.
[0047] In the embodiments of the present application, the hysteresis voltage comparison unit 11 generates the reference voltage based on the reference voltage signal Vref1 and the logic signal Uout1, when the logic signal Uout1 changes, the reference voltage also changes, thereby forming hysteresis. At the same time, the isolation unit 12 isolates the hysteresis voltage comparison unit 11 from the rear-end load, the rear-end load will not affect the output of the hysteresis comparison circuit, there is no load effect, and the stability of the circuit output is improved.
[0048] In a possible implementation, when the logic signal Uout1 is a first logic signal, the reference voltage generated by the hysteresis voltage comparison unit 11 has a first voltage value; when the logic signal Uout1 is a second logic signal, the reference voltage generated by the hysteresis voltage comparison unit 11 has a second voltage value.
[0049] When the logic signal Uout1 is switched from the first logic signal to the second logic signal, the value of the reference voltage is switched from the first voltage value to the second voltage value; when the logic signal Uout1 is switched from the second logic signal to the first logic signal, the value of the reference voltage is switched from the second voltage value to the first voltage value; wherein the first voltage value is different from the second voltage value.
[0050] The logic signal Uout1 is fed back to the hysteresis voltage comparison unit 11, and the hysteresis voltage comparison unit 11 generates a reference voltage based on the reference voltage signal Vref1 and the logic signal Uout1. When the logic signal Uout1 is a first logic signal, the reference voltage has a first voltage value (U1); when the logic signal Uout1 is a second logic signal, the reference voltage has a second voltage value (U2); the reference Figure 3 When the logic signal Uout1 is switched, the reference voltage is also switched, thereby forming hysteresis.
[0051] In a possible implementation, the reference Figure 4 The hysteresis voltage comparison unit 11 can include a first comparator U1 and a first resistor R1.
[0052] The first input end of the first comparator U1 is coupled to the first input end of the hysteresis voltage comparison unit 11, the second input end of the first comparator U1 is coupled to the second input end of the hysteresis voltage comparison unit 11, and the output end of the hysteresis voltage comparison unit 11 is fed back to the second input end of the first comparator U1 through the first resistor R1.
[0053] The logic signal Uout1 is fed back to the second input end of the first comparator U1 through the first resistor R1, and is superimposed with the reference voltage signal Vref1 to obtain the reference voltage.
[0054] In the embodiment of the application, the first comparator U1 outputs the logic signal Uout1, and the logic signal Uout1 is fed back to the second input end of the first comparator U1 through the first resistor R1, that is, the reference level input end, thereby affecting the reference voltage of the first comparator U1, and further forming hysteresis.
[0055] In a possible implementation, when the voltage of the to-be-detected signal Uin is not greater than the reference voltage, the logic signal Uout1 is a high level, and the reference voltage has the second voltage value.
[0056] When the voltage of the signal to be detected Uin is greater than the reference voltage, the logic signal Uout1 is low, and the value of the reference voltage is the first voltage value;
[0057] When the logic signal Uout1 is switched from high to low, the value of the reference voltage is switched from the second voltage value to the first voltage value; when the logic signal Uout1 is switched from low to high, the value of the reference voltage is switched from the first voltage value to the second voltage value.
[0058] The second voltage value is greater than the first voltage value.
[0059] Reference Figure 3 and Figure 4 The hysteresis voltage comparison circuit 11 is formed by a comparator, the first comparator U1 outputs high or low, the second input of the first comparator U1 is fed back, and the reference voltage of two different voltage values is formed. When the logic signal Uout1 is switched, the reference voltage is switched synchronously, thereby forming hysteresis.
[0060] For example, the first input of the first comparator U1 is the negative input, and the second input of the first comparator U1 is the positive input. Thus, when the voltage of the signal to be detected Uin is less than the reference voltage, the logic signal Uout1 is high; otherwise, it is low.
[0061] In a possible implementation, reference Figure 5 The hysteresis voltage comparison unit 11 can include a second resistor R2, a third resistor R3, and a fourth resistor R4.
[0062] The second input of the first comparator U1 is connected to the first end of the second resistor R2, the first end of the first resistor R1, and the first end of the third resistor R3, respectively; the first input of the first comparator U1 is connected to the first input of the hysteresis voltage comparison unit 11; and the output of the first comparator U1 is connected to the second end of the first resistor R1, the first end of the fourth resistor R4, and the output of the hysteresis voltage comparison unit 11, respectively.
[0063] The second end of the second resistor R2 is connected to the second input of the hysteresis voltage comparison unit 11.
[0064] The second end of the fourth resistor R4 is connected to the pull-up power supply Vref2.
[0065] The second end of the third resistor R3 is grounded.
[0066] The hysteresis voltage comparison unit 11 is formed by a first comparator U1, and outputs high impedance when the voltage at the positive input end is greater than the voltage at the negative input end. The fourth resistor R4 is a pull-up resistor for pulling up the voltage at the output end to a high level. The second resistor R2 and the third resistor R3 are used for voltage division to obtain a suitable level for the reference voltage signal Vref1, which matches the voltage of the to-be-detected signal Uin.
[0067] Specifically, the reference voltage of the first comparator U1 can be adjusted by adjusting the second resistor R2 and the third resistor R3.
[0068] The resistance values of the resistors can be set according to actual application requirements, which will not be described here.
[0069] In a possible implementation, the reference voltage signal Vref1 can be provided by a pull-up power supply Vref2.
[0070] In a possible implementation, the reference Figure 5 The isolation unit 12 includes a second comparator U2.
[0071] The first input end of the second comparator U2 is connected with the input end of the isolation unit 12, the second input end of the second comparator U2 is connected with the second input end of the first comparator U1, the first end of the first resistor R1, the first end of the second resistor R2 and the first end of the third resistor R3 respectively, and the output end of the second comparator U2 is connected with the output end of the isolation unit 12.
[0072] In the embodiment of the application, the isolation output of the logic signal Uout1 is also realized by a comparator. Referring to Figure 5 The reference voltage of the first comparator U1 is used as the reference voltage of the second comparator U2, which is input to the second input end of the second comparator U2, and the first input end of the second comparator U2 inputs the logic signal Uout1. Referring to Figure 5 When the logic signal Uout1 is at a high level, which is greater than the reference voltage, the second comparator U2 outputs a high level; when the logic signal Uout1 is at a low level, which is less than the reference voltage, the second comparator U2 outputs a low level. No resistor is arranged between the input and the output of the second comparator U2, which will not affect the output of the analog signal at the back end, and the effective isolation of the logic signal Uout1 is realized.
[0073] In a possible implementation, when the logic signal Uout1 is switched from the first logic signal to the second logic signal, the comparison result signal Uout2 is switched to the first result signal, which is used to indicate abnormal protection.
[0074] When the logic signal Uout1 is switched from the second logic signal to the first logic signal, the comparison result signal Uout2 is switched to the second result signal, which is used to indicate abnormal recovery.
[0075] The hysteresis comparison circuit can be used for voltage abnormality indication in the embodiment of the application. The first result signal and the second result signal are respectively used for indicating abnormality protection and abnormality recovery.
[0076] For example, referring to Figure 5 When the to-be-detected signal Uin is greater than the reference voltage (U2), the logic signal Uout1 is switched from high level to low level, and the result output signal is switched from high level to low level, which is used for indicating overvoltage protection. When the to-be-detected signal Uin decreases and is less than the reference voltage (U1), the logic signal Uout1 is switched from low level to high level, and the result output signal is also switched from low level to high level, which is used for indicating overvoltage abnormality recovery.
[0077] Specifically, the first result signal and the second result signal can also be respectively used for indicating abnormality recovery and abnormality protection. Specifically, the application demand of the actual circuit can be set.
[0078] For example, referring to Figure 6 The hysteresis voltage comparison circuit 11 can further include a voltage conditioning unit 13.
[0079] The input end of the voltage conditioning unit 13 is used for receiving an original voltage signal. The output end of the voltage conditioning unit 13 is connected with the first input end of the first comparator U1.
[0080] The voltage conditioning unit 13 is used for conditioning the original voltage signal to obtain a to-be-detected signal.
[0081] In a possible implementation, referring to Figure 6 The voltage conditioning unit 13 can include a fifth resistor R5 and a sixth resistor R6.
[0082] The first end of the fifth resistor R5 is connected with the input end of the voltage conditioning unit 13. The second end of the fifth resistor R5 is respectively connected with the first end of the sixth resistor R6 and the output end of the voltage conditioning unit 13.
[0083] The second end of the sixth resistor R6 is grounded.
[0084] The fifth resistor R5 and the sixth resistor R6 are used for voltage division of the original voltage signal, which matches the input voltage range of the first comparator U1 and the reference voltage signal.
[0085] In a possible implementation, referring to Figure 6 The voltage conditioning unit 13 can further include a first diode D1.
[0086] The anode of the first diode D1 is respectively connected with the input end of the voltage conditioning unit 13 and the first end of the fifth resistor R5. The cathode of the first diode D1 is connected with a voltage stabilizing power supply Vref3.
[0087] The first diode D1 is used for voltage regulation. When the original voltage signal is mixed with a voltage spike, the first diode D1 turns on to stabilize the original voltage signal at Vref3, thus preventing high voltage from damaging the first comparator U1.
[0088] The voltages of the regulated power supply Vref3 and the pull-up power supply Vref2 can be the same.
[0089] In one possible implementation, refer to Figure 6 The hysteresis comparator circuit may also include: an input filter unit 14;
[0090] The input terminal of the input filter unit 14 is connected to the output terminal of the voltage conditioning unit 13, and the output terminal of the input filter unit 14 is connected to the first input terminal of the first comparator U1.
[0091] In one possible implementation, refer to Figure 6 The input filtering unit 14 may include: a first capacitor C1;
[0092] The first terminal of the first capacitor C1 is connected to the input terminal and the output terminal of the input filter unit 14, respectively, and the second terminal of the first capacitor C1 is grounded.
[0093] Corresponding to the above embodiments, this embodiment of the invention also provides a voltage detection device, including: at least one hysteresis comparator circuit as provided in the above embodiments.
[0094] In this embodiment of the invention, a hysteresis comparator circuit can be used for voltage detection.
[0095] Meanwhile, since the hysteresis comparator circuit provided in this embodiment of the invention has no load effect, it can be directly connected in parallel. The voltage detection device can also be formed by multiple hysteresis comparator circuits. The output terminals of each hysteresis comparator circuit are connected, and the input terminals of each hysteresis comparator circuit are respectively used to connect the corresponding voltage to be measured, thereby realizing the simultaneous detection of multiple voltages. The hysteresis comparator circuits will not affect each other.
[0096] Based on the above embodiments, this invention also provides an overvoltage and undervoltage detection device, comprising: two parallel-connected devices such as... Figure 5 The hysteresis comparator circuit shown;
[0097] The two reference voltages corresponding to the first hysteresis comparator circuit are different from the two reference voltages corresponding to the second hysteresis comparator circuit.
[0098] The two hysteresis comparator circuits have different reference voltages, which are used to detect overvoltage and undervoltage respectively.
[0099] In one possible implementation, refer to Figure 7, the first input terminal of the first comparator U1 is the negative input terminal, the second input terminal of the first comparator U1 is the positive input terminal, the first input terminal of the second comparator is the positive input terminal, and the second input terminal of the second comparator is the negative input terminal;
[0100] In the second hysteresis comparison circuit, the first input terminal of the first comparator U1 is the negative input terminal, the second input terminal of the first comparator U1 is the positive input terminal, the first input terminal of the second comparator is the negative input terminal, and the second input terminal of the second comparator is the positive input terminal.
[0101] Reference Figure 7 The resistances of the two hysteresis comparison circuits are different, and the reference voltages of the two first comparators U1 are different. For example, reference Figure 8 The two reference voltages (U1 and U2, U2>U1) of the first first comparator U1 are both greater than the two reference voltages (U3 and U4, U4>U3) of the second first comparator U1, that is, U2>U1>U4>U3;
[0102] Reference Figure 8 When the voltage of the to-be-detected signal Uin is greater than U2, the first hysteresis comparison circuit outputs a low level, the second hysteresis comparison circuit outputs a high level, and the parallel output outputs a low level, indicating an abnormality (overvoltage);
[0103] When the voltage of the to-be-detected signal Uin is less than U3, the first hysteresis comparison circuit outputs a high level, the second hysteresis comparison circuit outputs a low level, and the parallel output outputs a low level, indicating an abnormality (undervoltage);
[0104] When the voltage of the to-be-detected signal Uin is greater than U4 and less than U1, the first hysteresis comparison circuit and the second hysteresis comparison circuit both output a high level, and the parallel output outputs a high level, indicating that the voltage is normal, thereby realizing overvoltage and undervoltage detection.
[0105] U3 and U4 are hysteresis intervals, when recovering from undervoltage, the U3 and U4 intervals still indicate undervoltage, and only when the voltage of the to-be-detected signal Uin is greater than U4, it indicates that it is normal; when entering undervoltage from normal, the U3 and U4 intervals still indicate normal, and only when the voltage of the to-be-detected signal Uin is less than U3, it indicates that it is undervoltage; the hysteresis interval is reserved to avoid frequent switching of the indication state.
[0106] Similarly, U2 and U1 are also hysteresis intervals, and the principle is the same as above, which will not be described here again. Similarly, the hysteresis interval is reserved to avoid frequent switching of the indication state.
[0107] The above examples are only used to illustrate the technical solutions of the present application, and are not intended to limit the present application; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that the technical solutions recorded in the foregoing examples can be modified, or some technical features can be replaced by equivalent features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. A hysteresis comparison circuit, characterized by, The application relates to a hysteresis voltage comparison unit, a first input end of which receives a signal to be detected, and a second input end of which receives a reference voltage signal; the hysteresis voltage comparison unit compares the signal to be detected with the reference voltage, when the voltage of the signal to be detected is greater than the reference voltage, a logic signal output from an output end is a first logic signal; when the voltage of the signal to be detected is not greater than the reference voltage, the logic signal is a second logic signal; the logic signal is fed back to the hysteresis voltage comparison unit, the hysteresis voltage comparison unit generates the reference voltage based on the reference voltage signal and the logic signal; wherein the reference voltage corresponding to the first logic signal and the second logic signal is different in size; an isolation unit receives the logic signal at an input end and outputs a comparison result signal after the logic signal is isolated; when the logic signal is the first logic signal, the reference voltage generated by the hysteresis voltage comparison unit is a first voltage value; when the logic signal is the second logic signal, the reference voltage generated by the hysteresis voltage comparison unit is a second voltage value; when the logic signal is switched from the first logic signal to the second logic signal, the reference voltage is switched from the first voltage value to the second voltage value; when the logic signal is switched from the second logic signal to the first logic signal, the reference voltage is switched from the second voltage value to the first voltage value; wherein the first voltage value is different from the second voltage value. The hysteresis voltage comparison unit comprises a first comparator and a first resistor; a first input end of the first comparator is coupled to a first input end of the hysteresis voltage comparison unit, a second input end of the first comparator is coupled to a second input end of the hysteresis voltage comparison unit, and an output end of the hysteresis voltage comparison unit is feedback coupled to the second input end of the first comparator through the first resistor; the logic signal is fed back to the second input end of the first comparator through the first resistor and is superimposed with the reference voltage signal to obtain the reference voltage. When the voltage of the signal to be detected is not greater than the reference voltage, the logic signal is a high level, and the value of the reference voltage is the second voltage value; when the voltage of the signal to be detected is greater than the reference voltage, the logic signal is a low level, and the value of the reference voltage is the first voltage value; when the logic signal is switched from a high level to a low level, the value of the reference voltage is switched from the second voltage value to the first voltage value; when the logic signal is switched from a low level to a high level, the value of the reference voltage is switched from the first voltage value to the second voltage value; wherein the second voltage value is greater than the first voltage value. The hysteresis voltage comparison unit comprises a second resistor, a third resistor and a fourth resistor. 2. The hysteresis comparison circuit of claim 1, wherein, 3. The hysteresis comparison circuit of claim 2, wherein, 4. The hysteresis comparison circuit of claim 2, wherein, a second input terminal of the first comparator is connected with a first terminal of the second resistor, a first terminal of the first resistor and a first terminal of the third resistor respectively, a first input terminal of the first comparator is connected with a first input terminal of the hysteresis voltage comparison unit, and an output terminal of the first comparator is connected with a second terminal of the first resistor, a first terminal of the fourth resistor and an output terminal of the hysteresis voltage comparison unit respectively; a second terminal of the second resistor is connected with a second input terminal of the hysteresis voltage comparison unit; a second terminal of the fourth resistor is connected to an upper pull power supply; a second terminal of the third resistor is grounded.
5. The hysteresis comparison circuit of claim 4, wherein, the isolation unit comprises a second comparator; a first input terminal of the second comparator is connected with an input terminal of the isolation unit, a second input terminal of the second comparator is connected with a second input terminal of the first comparator, a first terminal of the first resistor, a first terminal of the second resistor and a first terminal of the third resistor respectively, and an output terminal of the second comparator is connected with an output terminal of the isolation unit.
6. The hysteresis comparison circuit of any one of claims 1 to 5, wherein, when the logic signal is switched from the first logic signal to the second logic signal, the comparison result signal is switched to a first result signal for indicating abnormal protection; when the logic signal is switched from the second logic signal to the first logic signal, the comparison result signal is switched to a second result signal for indicating abnormal recovery.
7. A voltage detection device, characterized by comprising: comprising: at least one hysteresis comparison circuit according to any one of claims 1 to 6.
8. An over- and under-voltage detection device, characterized by comprising: two hysteresis comparison circuits according to claim 5 connected in parallel; wherein two reference voltages corresponding to the first hysteresis comparison circuit are different from two reference voltages corresponding to the second hysteresis comparison circuit.
9. The over / under voltage detecting apparatus according to claim 8, wherein in the first hysteresis comparison circuit, a first input terminal of the first comparator is a negative input terminal, a second input terminal of the first comparator is a positive input terminal, a first input terminal of the second comparator is a positive input terminal, and a second input terminal of the second comparator is a negative input terminal; in the second hysteresis comparison circuit, a first input terminal of the first comparator is a negative input terminal, a second input terminal of the first comparator is a positive input terminal, a first input terminal of the second comparator is a negative input terminal, and a second input terminal of the second comparator is a positive input terminal.
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