Liquid crystal display device and driving method thereof

Abstract

The application discloses a liquid crystal display device and a driving method thereof. The driving method comprises the following steps: obtaining picture refresh rate data, determining a change amount of a refresh frequency based on two adjacent picture refresh rate data, generating at least one group of adjustment instructions when the change amount of the refresh frequency is greater than zero, and adjusting a potential of a common voltage signal accessed by a pixel circuit in response to the adjustment instruction of each group. The number of groups of adjustment instructions and the potential of the corresponding common voltage signal can be dynamically changed according to the change amount of the refresh frequency between two adjacent frames, so that the brightness difference between adjacent frames can be adjusted, and the flicker phenomenon under the dynamic refresh frequency is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a liquid crystal display device and a driving method thereof. BACKGROUND

[0002] The display is usually fixed at a highest refresh frequency when working, and in some specific conditions, the display needs to display at a lower refresh rate.

[0003] For the display equipped with Free-Sync technology, if the display is switched at a refresh frequency in a short time according to a certain rule, the corresponding brightness difference at different refresh frequencies will cause corresponding flicker. SUMMARY

[0004] The present application provides a liquid crystal display device and a driving method thereof to alleviate the technical problem of large corresponding brightness difference at different refresh frequencies.

[0005] In a first aspect, the present application provides a driving method of a liquid crystal display device, comprising: obtaining picture refresh rate data of a current frame and picture refresh rate data of a previous frame or a next frame of the current frame; determining a change amount of refresh frequency based on the picture refresh rate data of the adjacent two frames; generating at least one group of adjustment instructions in the case that the change amount of refresh frequency is greater than zero; adjusting the potential of the common voltage signal accessed by the pixel circuit based on the adjustment instruction of each group.

[0006] In some embodiments, the step of determining the change amount of refresh frequency based on the picture refresh rate data of the adjacent two frames comprises: determining the vertical blanking period corresponding to each picture refresh rate data according to the picture refresh rate data; determining the change amount of refresh frequency according to the comparison result of the adjacent two vertical blanking periods.

[0007] In some embodiments, in the case that the change amount of refresh frequency is not zero, the step of generating at least one group of adjustment instructions comprises: determining the interval sending time between the adjacent two adjustment instructions according to the duration of the vertical blanking period of the current picture refresh rate data; determining the number of generated groups of adjustment instructions in a vertical blanking period based on the duration of the vertical blanking period and the interval sending time.

[0008] In some embodiments, the step of determining the interval sending time between the adjacent two adjustment instructions according to the duration of the vertical blanking period of the current picture refresh rate data comprises: shortening the interval sending time in response to the increase of the duration of the vertical blanking period.

[0009] In some embodiments, the step of determining the number of groups of adjustment instructions in a vertical blanking period based on the duration of the vertical blanking period and the interval sending time comprises: determining the number of groups of adjustment instructions in a vertical blanking period in response to the inverse change of the duration and the interval sending time.

[0010] In some embodiments, the step of determining the number of groups of adjustment instructions in a vertical blanking period in response to the inverse change of the duration and the interval sending time comprises: increasing the number of groups of adjustment instructions in a vertical blanking period in response to the increase of the duration of the vertical blanking period.

[0011] In some embodiments, the step of adjusting the potential of the common voltage signal accessed by the pixel circuit in response to the adjustment instruction of each group comprises: configuring the common voltage signal to include a first common voltage signal and a second common voltage signal; and adjusting the potential of at least one of the first common voltage signal and the second common voltage signal accessed by the pixel circuit in response to the adjustment instruction of each group.

[0012] In some embodiments, the step of determining the interval sending time between two adjacent adjustment instructions based on the duration of the vertical blanking period of the current frame refresh rate data comprises: configuring different interval sending times to gradually change in time sequence within the duration of the vertical blanking period.

[0013] In some embodiments, the step of configuring different interval sending times to gradually change in time sequence within the duration of the vertical blanking period comprises: configuring different interval sending times to sequentially increase in time sequence within the duration of the vertical blanking period.

[0014] In a second aspect, the present application provides a liquid crystal display device, which comprises a timing controller, a power management module and a pixel circuit. The timing controller is configured to determine a change in refresh frequency based on obtained picture refresh rate data of a current frame and picture refresh rate data of a previous frame or a next frame of the current frame, and generate at least one group of adjustment instructions when the change in refresh frequency is not zero. The power management module is connected to the timing controller, and is configured to output a corresponding common voltage signal based on the at least one group of adjustment instructions. The pixel circuit is connected to the power management module, and is configured to perform corresponding display based on the accessed common voltage signal.

[0015] The liquid crystal display device and driving method provided in this application first acquire screen refresh rate data, then determine the change in refresh frequency based on the screen refresh rate data of two adjacent frames, then generate at least one set of adjustment commands when the change in refresh frequency is not zero, and finally adjust the potential of the common voltage signal connected to the pixel circuit in response to each set of adjustment commands. According to the magnitude of the change in refresh frequency between two adjacent frames, the number of adjustment commands and the potential of the corresponding common voltage signal can be dynamically changed, thereby adjusting the brightness difference between adjacent frames and improving the flicker phenomenon under dynamic refresh frequency. Attached Figure Description

[0016] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0017] Figure 1 This is a schematic flowchart of a driving method for a liquid crystal display device provided in an embodiment of this application.

[0018] Figure 2 This is a schematic diagram of the structure of a liquid crystal display device provided in an embodiment of this application.

[0019] Figure 3 This is a schematic diagram of the pixel circuit provided in an embodiment of this application.

[0020] Figure 4 This is a timing diagram of a liquid crystal display device provided in an embodiment of this application. Detailed Implementation

[0021] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0022] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Features thus defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this invention, "a plurality of" means two or more unless otherwise explicitly specified.

[0023] In the related art, for the display equipped with the Free-Sync technology, the highest refresh frequency and the per-frame charging time under the lowest refresh frequency are the same, and the difference lies in the vertical blanking period (V-blank) between two frames. The reason is that the duration of each frame is longer at a low frame rate or refresh frequency, so the time of the vertical blanking period will also be longer relative to each frame at a high frame rate or refresh frequency.

[0024] However, the long vertical blanking period will exacerbate the leakage deterioration of the liquid crystal display device, and ultimately reduce the overall brightness of the liquid crystal display device. In this case, if the display is switched between high and low refresh frequencies within a short time according to a certain rule, the brightness difference between different refresh frequencies will also increase, thereby causing the flicker to worsen.

[0025] For the liquid crystal display device, it can be referred to Figure 3 As shown, the larger the storage capacitor Cst, the greater the improvement of pixel leakage, and the better the improvement effect on the picture flicker caused by the refresh frequency switching. However, sometimes the capacity of the storage capacitor Cst will be reduced due to process reasons, and there are two methods to offset this effect:

[0026] One is to increase the area of the storage capacitor Cst, and the other is to increase the voltage of the first common voltage signal ACOM. By increasing the voltage of the first common voltage signal ACOM, the storage capacitor Cst can be increased without affecting the transmittance, but the higher the voltage of the first common voltage signal ACOM, the higher the risk of loss of highlight yield, and a series of picture quality problems such as horizontal crosstalk (H-crosstalk) will also be caused.

[0027] On the other hand, the positive and negative polarity pixels in the vertical blanking period will cause the potential of the common voltage (Vcom) at this time to be not optimal due to leakage. By manually adjusting the Vcom voltage size, the picture brightness in the low frequency period can also be corrected.

[0028] In view of the technical problem of large brightness difference corresponding to different refresh frequencies mentioned above, the embodiment provides a driving method of a liquid crystal display device, please refer to Figures 1 to 4 As shown in Figure 1 The driving method comprises the following steps:

[0029] Step S10: obtaining the picture refresh rate data of the current frame and the picture refresh rate data of the previous frame or the next frame of the current frame.

[0030] Step S20: determining the change amount of the refresh frequency based on the picture refresh rate data of the adjacent two frames.

[0031] Step S30: If the change in refresh rate is greater than zero, generate at least one set of adjustment instructions.

[0032] Step S40: Based on the adjustment instructions for each group, adjust the potential of the common voltage signal connected to the pixel circuit.

[0033] It is understood that the driving method provided in this embodiment first obtains the screen refresh rate data, then determines the change in refresh frequency based on the screen refresh rate data of two adjacent frames, and then generates at least one set of adjustment instructions when the change in refresh frequency is not zero. Finally, in response to each set of adjustment instructions, the potential of the common voltage signal connected to the pixel circuit 31 is adjusted. According to the magnitude of the change in refresh frequency between two adjacent frames, the number of adjustment instructions and the potential of the corresponding common voltage signal can be dynamically changed, thereby adjusting the brightness difference between adjacent frames and improving the flickering phenomenon under dynamic refresh frequency.

[0034] In one embodiment, this embodiment provides a liquid crystal display device, such as... Figure 2 As shown, the liquid crystal display device includes a timing controller 10, a power management module 20, and a pixel circuit 31. The timing controller 10 is used to determine the change in refresh rate based on the obtained refresh rate data of the current frame and the refresh rate data of the previous or next frame, and generates at least one set of adjustment instructions (IIC) when the change in refresh rate is greater than zero. The power management module 20 is connected to the timing controller 10 and is used to output a corresponding common voltage signal according to at least one set of adjustment instructions (IIC). The pixel circuit 31 is connected to the power management module 20 and performs corresponding display according to the input common voltage signal.

[0035] It is understood that the liquid crystal display device provided in this embodiment first acquires the screen refresh rate data, then determines the change in refresh frequency based on the screen refresh rate data of two adjacent frames, and then generates at least one set of adjustment instructions IIC when the change in refresh frequency is not zero. Finally, in response to each set of adjustment instructions IIC, the potential of the common voltage signal connected to the pixel circuit 31 is adjusted. According to the magnitude of the change in refresh frequency between two adjacent frames, the number of adjustment instructions IIC and the potential of the corresponding common voltage signal can be dynamically changed, thereby adjusting the brightness difference between adjacent frames and improving the flicker phenomenon under dynamic refresh frequency.

[0036] It should be noted that the common voltage signal may include at least one of the first common voltage signal ACOM and the second common voltage signal CFCOM. The communication method between the timing controller 10 and the power management module 20 can be serial communication (I2C), and correspondingly, the adjustment command IIC can also be an I2C command.

[0037] The liquid crystal display device further includes a liquid crystal display panel 30 in which the pixel circuits 31 are arrayed.

[0038] The liquid crystal display device can further include a gate driver circuit 40, a gamma voltage generator 50, and a source driver 60.

[0039] The liquid crystal display panel 30 includes a display area for displaying an image and a peripheral area adjacent to the display area.

[0040] The liquid crystal display panel 30 includes a plurality of scan lines SL, a plurality of data lines DL, and a plurality of pixel circuits 31 electrically connected to the scan lines SL and the data lines DL. The scan lines SL extend in a first direction, and the data lines DL extend in a second direction crossing the first direction.

[0041] The timing controller 10 receives input image data RGB and input control signals CTR from an external device. The input image data RGB can include red image data R, green image data G, and blue image data B. The input control signals CTR can include a main clock signal and a data enable signal. The input control signals CTR can further include a vertical synchronization signal and a horizontal synchronization signal.

[0042] The timing controller 10 generates a first control signal CTR1, a second control signal CTR2, a third control signal CTR3, an adjustment instruction IIC, and a data signal Data based on the input image data RGB and the input control signals CTR.

[0043] The timing controller 10 generates the first control signal CTR1 for controlling the operation of the gate driver circuit 40 based on the input control signals CTR, and outputs the first control signal CTR1 to the gate driver circuit 40. The first control signal CTR1 can include a vertical start signal and a gate clock signal.

[0044] The timing controller 10 generates the second control signal CTR2 for controlling the operation of the source driver 60 based on the input control signals CTR, and outputs the second control signal CTR2 to the source driver 60. The second control signal CTR2 can include a horizontal start signal and a load signal.

[0045] The timing controller 10 generates a data signal Data based on the input image data RGB. The timing controller 10 outputs the data signal Data to the source driver 60. The data signal Data can be substantially the same as the input image data RGB, or the data signal Data can be compensated image data generated by compensating the input image data RGB. For example, the timing controller 10 can selectively perform image quality compensation, spot compensation, adaptive color correction (ACC), and / or dynamic capacitance compensation (DCC) on the input image data RGB to generate the data signal Data.

[0046] The timing controller 10 generates a third control signal CTR3 for controlling the operation of the gamma voltage generator 50 based on the input control signal CTR, and outputs the third control signal CTR3 to the gamma voltage generator 50 to provide corresponding gamma voltages (Vgm) or gamma reference voltages for the source driver 60.

[0047] The timing controller 10 generates an adjustment instruction IIC for controlling the operation of the power management module 20 based on the change amount of the refresh frequency, and outputs the adjustment instruction IIC to the power management module 20.

[0048] Figure 3 A structure schematic diagram of a pixel circuit 31 provided by an embodiment of the present application is shown in FIG. 1. The pixel circuit 31 includes a transistor T1 and a liquid crystal capacitor Clc. One of the source or drain of the transistor T1 is connected to a data line DL, the gate of the transistor T1 is connected to a scan line SL, the other of the source or drain of the transistor T1 is connected to one end of the liquid crystal capacitor Clc, and the other end of the liquid crystal capacitor Clc is connected to a second common voltage signal CFCOM.

[0049] In one embodiment, as shown in FIG. 2, the pixel circuit 31 further includes a storage capacitor Cst. One end of the storage capacitor Cst is connected to the other of the source or drain of the transistor T1, and the other end of the storage capacitor Cst is connected to a first common voltage signal ACOM. Figure 3

[0050] It should be noted that increasing the potential of the first common voltage signal ACOM and / or the potential of the second common voltage signal CFCOM can reduce the leakage current of the pixel circuit 31, and it is easier to obtain the desired brightness at a low refresh frequency. Increasing the potential of the first common voltage signal ACOM can also increase the brightness of the pixel circuit 31, and thus can increase the overall brightness of each frame on the basis of reducing the inter-frame brightness difference.

[0051] Figure 4 ​The timing diagram of the liquid crystal display device provided in the embodiments of the present application can include a vertical active display period (V-active) and a vertical blanking period (V-blank) in each frame. In the vertical active display period, the charging of the pixel circuit 31 and the corresponding display can be completed. The period in which the vertical blanking period is located can also be understood as being between two frames.

[0052] When the liquid crystal display device works at the highest refresh frequency, no I2C instruction can be sent in the vertical blanking period in the frame corresponding to the highest refresh frequency. Figure 4 Each pulse in a vertical blanking period can represent a group of adjustment instructions. With the decrease of the refresh frequency, the number of pulses in a vertical blanking period increases, and the number of groups of adjustment instructions also increases. When the number of groups of adjustment instructions increases by 1, the potential of the common voltage signal is adjusted once.

[0053] The working principle of the liquid crystal display device will be described below. Figures 1 to 4 The working principle of the liquid crystal display device will be described below.

[0054] When the refresh frequency of the liquid crystal display device changes, such as in a game mode, people usually pay most attention to the overall performance of the picture, such as whether it flickers. When switching from a high refresh frequency to a low refresh frequency, the picture refresh rate data of the first frame at the low refresh frequency is just sent to the timing controller 10, and the timing controller 10 cannot immediately recognize the refresh frequency of the first frame, so the gray scale compensation or voltage compensation can only be consistent with the picture refresh rate data of the high refresh frequency before the switching. When the picture refresh rate data of the first frame is sent, that is, the vertical active display period ends, the liquid crystal display device starts to enter the vertical blanking period of the first frame.

[0055] The frequency recognition module in the timing controller 10 can be set to determine the duration of the vertical blanking period of the picture refresh rate data according to each picture refresh rate data, and then determine the corresponding refresh frequency according to the duration of the vertical blanking period. The difference between the refresh frequencies of the adjacent two frames is calculated based on this, and the difference is the change amount of the refresh frequency.

[0056] It should be noted that when the durations of the vertical blanking periods of the adjacent two frames are the same, the timing controller 10 can not send an I2C instruction to the power management module 20. In this case, since the power management module 20 does not need to adjust the potential of the common voltage signal, the power consumption can be reduced.

[0057] In order to prevent the picture brightness from being reduced due to the continuous leakage in the vertical blanking period, the time sequence controller 10 can continuously send I2C instructions to the power management module 20 to change the potential of at least one of the first common voltage signal ACOM and the second common voltage signal CFCOM in the vertical blanking period.

[0058] The power management module 20 can be a power management chip (PMIC), which can save the non-display space of the liquid crystal display device and facilitate the realization of a narrower frame.

[0059] It should be noted that the adjustment direction and / or adjustment range of the potential of at least one of the first common voltage signal ACOM and the second common voltage signal CFCOM can be determined according to the display characteristics of the liquid crystal display device, and the display characteristics correspondingly differ on different products. However, this can be achieved under the guidance of the inventive concept of the present application.

[0060] When in the vertical blanking period of the first frame, the first group of I2C instructions is sent first, and then the number of groups of I2C instructions is sequentially increased. The longer the duration of the vertical blanking period, the more groups of I2C instructions are sent, and the greater the compensation of the potential of at least one of the first common voltage signal ACOM and the second common voltage signal CFCOM. Thus, the leakage problem of the first frame after the refresh frequency switching can be inhibited. Although the first frame cannot be identified as a frame with a low refresh frequency when it is just entered, the leakage inhibition effect of at least one of the first common voltage signal ACOM and the second common voltage signal CFCOM on the pixel circuit 31 is gradually enhanced as the duration of the vertical blanking period increases. Thus, the leakage inhibition effect on the first frame is improved. Figure 4 In the formula, the number of groups of I2C instructions is the largest when the refresh frequency is the lowest.

[0061] In the formula, a group of I2C instructions is sent every time the interval sending time in the vertical blanking period accumulates to a certain length, until the next vertical active display period arrives, and the I2C instructions are counted again. The final voltage of at least one of the first common voltage signal ACOM and the second common voltage signal CFCOM is also different under different refresh frequencies.

[0062] It should be noted that the voltage increase of the first common voltage signal ACOM will increase the brightness of the picture. Therefore, using the first common voltage signal ACOM with different potentials under different refresh frequencies can also reduce the brightness difference between the refresh frequencies.

[0063] After the first frame, if the gray scale compensation or gamma voltage compensation of the liquid crystal display device takes effect, the overall flicker phenomenon of the liquid crystal display device can be further improved.

[0064] The above describes the case of switching from high refresh frequency to low refresh frequency. It can be understood that when switching from low refresh frequency to high refresh frequency, the corresponding parameters can be adjusted reversely, which can also improve the leakage of the pixel circuit 31 and reduce the brightness difference between frames, and further improve the flicker phenomenon of the liquid crystal display device.

[0065] In the above embodiments, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can be referred to the relevant description of other embodiments.

[0066] The liquid crystal display device and the driving method thereof provided by the embodiments of the present application are described in detail above, and the principles and implementation manners of the present application are described by applying specific examples. The above description of the embodiments is only used to help understand the technical solutions of the present application and the core ideas thereof; it can be understood by those skilled in the art that the technical solutions recorded in the above embodiments can be modified, or some technical features can be replaced equivalently; and the modification or replacement does not make the essence of the corresponding technical solution deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A driving method for a liquid crystal display device, characterized in that, The driving method includes: Obtain the refresh rate data of the current frame and the refresh rate data of the previous or next frame of the current frame; Based on the screen refresh rate data, determine the vertical blank period corresponding to each screen refresh rate data. The change in refresh rate is determined based on the comparison results of two adjacent vertical blank cycles; When the change in refresh rate is greater than zero, the interval between two adjacent adjustment commands is determined based on the duration of the vertical blank period of the current screen refresh rate data. Based on the duration of the vertical blank period and the interval transmission time, the number of groups of adjustment instructions generated within one vertical blank period is determined; Based on the adjustment instructions for each group, the potential of the common voltage signal connected to the pixel circuit is adjusted; The step of determining the interval transmission time between two adjacent adjustment commands based on the duration of the vertical blank period of the current screen refresh rate data includes: configuring different interval transmission times to increase sequentially in time during the duration of a vertical blank period.

2. The driving method according to claim 1, characterized in that, The step of determining the interval sending time between two adjacent adjustment commands based on the duration of the vertical blank period of the current screen refresh rate data includes: In response to an increase in the duration of the vertical blank period, the interval transmission time is shortened.

3. The driving method according to claim 1, characterized in that, The step of determining the number of adjustment instruction generation groups within a vertical blank period based on the duration of the vertical blank period and the interval transmission time includes: In response to the inverse change of the duration and the interval transmission time, the number of groups of adjustment instructions generated within a vertical blank period is determined.

4. The driving method according to claim 3, characterized in that, The step of determining the number of generated adjustment instruction groups within a vertical blank period in response to the inverse change of the duration and the interval transmission time includes: In response to an increase in the duration of the vertical blank period, the number of generated groups within the vertical blank period is increased according to the adjustment instruction.

5. The driving method according to claim 2, characterized in that, The step of adjusting the potential of the common voltage signal connected to the pixel circuit in response to the adjustment command of each group includes: The configuration of the common voltage signal includes a first common voltage signal and a second common voltage signal; In response to the adjustment command of each group, the potential of at least one of the first common voltage signal and the second common voltage signal connected to the pixel circuit is adjusted.

6. A liquid crystal display device, characterized in that, The liquid crystal display device includes: A timing controller is used to determine the change in refresh rate based on the obtained refresh rate data of the current frame and the refresh rate data of the previous or next frame of the current frame, and to generate at least one set of adjustment instructions when the change in refresh rate is greater than zero. A power management module is connected to the timing controller, and the power management module is used to output a corresponding common voltage signal according to the at least one set of adjustment commands; A pixel circuit is connected to the power management module, and the pixel circuit performs corresponding display based on the input common voltage signal; The timing controller is further configured to: determine the vertical blanking period corresponding to each refresh rate data based on the refresh rate data; determine the change in refresh frequency based on the comparison result of two adjacent vertical blanking periods; if the change in refresh frequency is greater than zero, determine the interval transmission time between two adjacent adjustment commands based on the duration of the vertical blanking period of the current refresh rate data; and determine the number of adjustment command generation groups within a vertical blanking period based on the duration of the vertical blanking period and the interval transmission time. The timing controller is further configured to: configure different interval transmission times to increase sequentially in timing during the duration of a vertical blank period.

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