Capacitor structure and method of forming the same

Abstract

A capacitor structure and a method for forming the same are disclosed. The structure includes: a plurality of intermediate electrode layers, each of the intermediate electrode layers includes: a first intermediate electrode end and a second intermediate electrode end; a plurality of first intermediate finger plates located between the first intermediate electrode end and the second intermediate electrode end, the first intermediate finger plates include: a plurality of first segments and a plurality of second segments; the first segments and the second segments of adjacent upper and lower layers have a facing area. Since the gap between the first segments and the second segments can be controlled in a small range by a photolithography process, the storage density between the first segments and the second segments, and between the first finger plugs and the second finger plugs can be ensured to be large, thereby improving the storage density of the capacitor structure.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and in particular to a capacitor structure and a method for forming the same. Background Technology

[0002] In semiconductor integrated circuits, integrated capacitors fabricated on the same chip as transistor circuits are widely used. They mainly come in two forms: metal-insulator-metal (MIM) capacitors and metal-oxide-metal (MOM) capacitors. MIM capacitors use upper and lower metal layers as capacitor plates. Fabricating MIM capacitors generally requires additional photolithography layers, and the breakdown voltage of the capacitor dielectric layer and the capacitance size are inherently contradictory. Furthermore, planar capacitors typically require a large area, which is detrimental to device integration. MOM capacitors, on the other hand, use a combination of finger structures and stacked layers to fabricate larger capacitance values ​​in a relatively smaller area. In addition, MOM capacitors do not require additional photoresist layers and masks, making the fabrication process simpler and less expensive than that of MIM capacitors.

[0003] However, the storage density of existing MOM capacitors still needs to be improved. Summary of the Invention

[0004] The technical problem solved by this invention is to provide a capacitor structure and a method for forming the same, so as to improve the storage density of the capacitor structure.

[0005] To solve the above-mentioned technical problems, the present invention provides a capacitor structure, comprising: a substrate; a dielectric layer on the substrate; and a plurality of intermediate electrode layers within the dielectric layer, wherein each intermediate electrode layer comprises: a first intermediate electrode and a second intermediate electrode arranged parallel to each other along a first direction; and a plurality of first intermediate finger-shaped electrodes arranged parallel to each other along a second direction between the first intermediate electrode and the second intermediate electrode, wherein the first direction is perpendicular to the second direction, and the first intermediate finger-shaped electrodes comprise: a plurality of first segments and a plurality of second segments arranged alternately in parallel along the first direction, adjacent to the intermediate electrodes. Between layers, the first segment in the upper layer and the corresponding adjacent first and second segments in the lower layer have facing areas. Several corresponding first segments are arranged in a stepped manner along the vertical direction. The second segment in the upper layer and the corresponding adjacent second and first segments in the lower layer have facing areas. Several corresponding second segments are arranged in a stepped manner along the vertical direction. The first segments with facing areas in several intermediate electrode layers are connected by several first finger-shaped plugs. The second segments with facing areas in several intermediate electrode layers are connected by several second finger-shaped plugs.

[0006] Optionally, it further includes: a bottom electrode layer and a top electrode layer located within the dielectric layer, wherein the bottom electrode layer, the top electrode layer and a plurality of intermediate electrode layers are repeatedly stacked and connected, wherein the plurality of intermediate electrode layers are located between the bottom electrode layer and the top electrode layer, and the dielectric layer covers the bottom electrode layer, the top electrode layer and the intermediate electrode layers.

[0007] Optionally, the bottom electrode layer includes: a first bottom electrode and a second bottom electrode arranged in parallel along the first direction; a plurality of first bottom finger electrodes arranged in parallel along the second direction and respectively connected to the first bottom electrode; a plurality of second bottom finger electrodes arranged in parallel along the second direction and respectively connected to the second bottom electrode, wherein the plurality of first bottom finger electrodes and the plurality of second bottom finger electrodes are arranged in an alternating manner.

[0008] Optionally, the top electrode layer includes: a first top electrode terminal and a second top electrode terminal arranged in parallel along the first direction; a plurality of first top finger plates arranged in parallel along the second direction and respectively connected to the first top electrode terminal; a plurality of second top finger plates arranged in parallel along the second direction and respectively connected to the second top electrode terminal, wherein the plurality of first top finger plates and the plurality of second top finger plates are arranged in an alternating manner.

[0009] Optionally, the first bottom electrode, the first intermediate electrode, and the first top electrode are connected sequentially via a plurality of first end plugs; the second bottom electrode, the second intermediate electrode, and the second top electrode are connected sequentially via a plurality of second end plugs; the first segment with an opposing region in the plurality of intermediate electrode layers is connected to the first bottom finger plate via a plurality of first finger plugs; and the second segment with an opposing region in the plurality of intermediate electrode layers is connected to the second top finger plate via a plurality of second finger plugs.

[0010] Optionally, each intermediate electrode layer further includes: a plurality of second intermediate finger-shaped electrode plates located between the first intermediate electrode terminal and the second intermediate electrode terminal and arranged in parallel along the second direction, wherein the plurality of first intermediate finger-shaped electrode plates and the plurality of second intermediate finger-shaped electrode plates are arranged alternately in parallel along the second direction.

[0011] Optionally, the second intermediate finger-shaped electrode plate includes: a plurality of third segments and a plurality of fourth segments arranged alternately in parallel along the first direction, wherein between adjacent intermediate electrode layers, the third segment in the upper layer and the corresponding adjacent third segment and fourth segment in the lower layer have a facing region, and the fourth segment in the upper layer and the corresponding adjacent fourth segment and third segment in the lower layer have a facing region.

[0012] Optionally, in each intermediate electrode layer, a plurality of first segmented segments and a plurality of third segmented segments are arranged alternately in parallel along the second direction, and a plurality of second segmented segments and a plurality of fourth segmented segments are arranged alternately in parallel along the second direction; the third segmented segments with opposing regions in the plurality of intermediate electrode layers are connected to the second bottom layer finger electrode plate through a plurality of third finger plugs; the fourth segmented segments with opposing regions in the plurality of intermediate electrode layers are connected to the first top layer finger electrode plate through a plurality of fourth finger plugs.

[0013] Optionally, the spacing between adjacent first and second segments in the first intermediate finger-shaped electrode is 30 nanometers to 200 nanometers.

[0014] Optionally, the spacing between adjacent third and fourth segments in the second intermediate finger-shaped electrode is 30 nanometers to 200 nanometers.

[0015] Optionally, the spacing between adjacent first and second finger plugs in each layer is 50 nanometers to 500 nanometers.

[0016] Optionally, the spacing between adjacent third and fourth finger plugs in each layer is 50 nanometers to 500 nanometers.

[0017] Optionally, the material of the dielectric layer includes: a low-k dielectric material; the low-k dielectric material includes: silicon oxide, silicon nitride, or silicon oxynitride.

[0018] Accordingly, this technical solution also provides a method for forming a capacitor structure, comprising: providing a substrate; forming a dielectric layer on the substrate, the dielectric layer having a plurality of intermediate electrode layers, wherein each intermediate electrode layer comprises: a first intermediate electrode and a second intermediate electrode arranged in parallel along a first direction; a plurality of first intermediate finger-shaped electrodes located between the first intermediate electrode and the second intermediate electrode and arranged in parallel along a second direction, the first direction being perpendicular to the second direction, wherein the first intermediate finger-shaped electrodes comprise: a plurality of first segmented segments and a plurality of second segmented segments arranged alternately in parallel along the first direction, adjacent to the intermediate electrodes Between layers, the first segment in the upper layer and the corresponding adjacent first and second segments in the lower layer have facing areas. Several corresponding first segments are arranged in a stepped manner along the vertical direction. The second segment in the upper layer and the corresponding adjacent second and first segments in the lower layer have facing areas. Several corresponding second segments are arranged in a stepped manner along the vertical direction. The first segments with facing areas in several intermediate electrode layers are connected by several first finger-shaped plugs. The second segments with facing areas in several intermediate electrode layers are connected by several second finger-shaped plugs.

[0019] Optionally, the dielectric layer further includes a bottom electrode layer and a top electrode layer, wherein the bottom electrode layer, the top electrode layer and a plurality of intermediate electrode layers are repeatedly stacked and connected, and the plurality of intermediate electrode layers are located between the bottom electrode layer and the top electrode layer, and the dielectric layer covers the bottom electrode layer, the top electrode layer and the intermediate electrode layers.

[0020] Optionally, the bottom electrode layer includes: a first bottom electrode and a second bottom electrode arranged in parallel along the first direction; a plurality of first bottom finger electrodes arranged in parallel along the second direction and respectively connected to the first bottom electrode; a plurality of second bottom finger electrodes arranged in parallel along the second direction and respectively connected to the second bottom electrode, wherein the plurality of first bottom finger electrodes and the plurality of second bottom finger electrodes are arranged in an alternating manner.

[0021] Optionally, the top electrode layer includes: a first top electrode terminal and a second top electrode terminal arranged in parallel along the first direction; a plurality of first top finger plates arranged in parallel along the second direction and respectively connected to the first top electrode terminal; a plurality of second top finger plates arranged in parallel along the second direction and respectively connected to the second top electrode terminal, wherein the plurality of first top finger plates and the plurality of second top finger plates are arranged in an alternating manner.

[0022] Optionally, the first bottom electrode, the first intermediate electrode, and the first top electrode are connected sequentially via a plurality of first end plugs; the second bottom electrode, the second intermediate electrode, and the second top electrode are connected sequentially via a plurality of second end plugs; the first segment with an opposing region in the plurality of intermediate electrode layers is connected to the first bottom finger plate via a plurality of first finger plugs; and the second segment with an opposing region in the plurality of intermediate electrode layers is connected to the second top finger plate via a plurality of second finger plugs.

[0023] Optionally, each intermediate electrode layer further includes: a plurality of second intermediate finger-shaped electrode plates located between the first intermediate electrode terminal and the second intermediate electrode terminal and arranged in parallel along the second direction, wherein the plurality of first intermediate finger-shaped electrode plates and the plurality of second intermediate finger-shaped electrode plates are arranged alternately in parallel along the second direction.

[0024] Optionally, the second intermediate finger-shaped electrode plate includes: a plurality of third segments and a plurality of fourth segments arranged alternately in parallel along the first direction, wherein between adjacent intermediate electrode layers, the third segment in the upper layer and the corresponding adjacent third segment and fourth segment in the lower layer have a facing region, and the fourth segment in the upper layer and the corresponding adjacent fourth segment and third segment in the lower layer have a facing region.

[0025] Optionally, in each intermediate electrode layer, a plurality of first segmented segments and a plurality of third segmented segments are arranged alternately in parallel along the second direction, and a plurality of second segmented segments and a plurality of fourth segmented segments are arranged alternately in parallel along the second direction; the third segmented segments with opposing regions in the plurality of intermediate electrode layers are connected to the second bottom layer finger electrode plate through a plurality of third finger plugs; the fourth segmented segments with opposing regions in the plurality of intermediate electrode layers are connected to the first top layer finger electrode plate through a plurality of fourth finger plugs.

[0026] Optionally, the spacing between adjacent first and second segments in the first intermediate finger-shaped electrode is 30 nanometers to 200 nanometers.

[0027] Optionally, the spacing between adjacent third and fourth segments in the second intermediate finger-shaped electrode is 30 nanometers to 200 nanometers.

[0028] Optionally, the spacing between adjacent first and second finger plugs in each layer is 50 nanometers to 500 nanometers.

[0029] Optionally, the spacing between adjacent third and fourth finger plugs in each layer is 50 nanometers to 500 nanometers.

[0030] Optionally, the material of the dielectric layer includes: a low-k dielectric material; the low-k dielectric material includes: silicon oxide, silicon nitride, or silicon oxynitride.

[0031] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0032] In the capacitor structure provided by the present invention, the first intermediate finger-shaped electrode plate includes a plurality of first segmented segments and a plurality of second segmented segments arranged alternately in parallel along the first direction. Between adjacent intermediate electrode layers, the first segmented segment in the upper layer has a facing region with the corresponding adjacent first segmented segment and second segmented segment in the lower layer, and the second segmented segment in the upper layer has a facing region with the corresponding adjacent second segmented segment and first segmented segment in the lower layer. The storage density of the capacitor structure mainly originates from: the spaces between adjacent first segmented segments and second segmented segments in each first intermediate finger-shaped electrode plate, the spaces between adjacent first finger-shaped plugs and second finger-shaped plugs in each layer, and the spaces between first segmented segments and second segmented segments with facing regions between adjacent intermediate electrode layers. Since the gap between the first segmented segment and the second segmented segment can be controlled to a small range through photolithography, a large storage density can be ensured between the first segmented segment and the second segmented segment, and between the first finger-shaped plug and the second finger-shaped plug, thereby improving the storage density of the capacitor structure.

[0033] Furthermore, in each of the intermediate electrode layers, a plurality of first segmented segments and a plurality of third segmented segments are arranged alternately in parallel along the second direction, and a plurality of second segmented segments and a plurality of fourth segmented segments are arranged alternately in parallel along the second direction; the third segmented segments with opposing regions in the plurality of intermediate electrode layers are connected to the second bottom layer finger plate through a plurality of third finger plugs; the fourth segmented segments with opposing regions in the plurality of intermediate electrode layers are connected to the first top layer finger plate through a plurality of fourth finger plugs. The storage density of the capacitor structure can also be derived from: the spaces between adjacent third and fourth segments in each second intermediate finger plate, the spaces between adjacent third and fourth finger plugs in each layer, the spaces between adjacent first and third segments, adjacent second and fourth segments, adjacent first and third finger plugs, adjacent second and fourth finger plugs, and adjacent third and fourth finger plugs with facing regions between adjacent intermediate electrode layers, thereby further improving the storage density of the capacitor structure.

[0034] In the method for forming a capacitor structure provided by the present invention, the first intermediate finger-shaped electrode plate includes: a plurality of first segmented segments and a plurality of second segmented segments arranged alternately in parallel along the first direction. Between adjacent intermediate electrode layers, the first segmented segment in the upper layer has a facing region with the corresponding adjacent first segmented segment and second segmented segment in the lower layer, and the second segmented segment in the upper layer has a facing region with the corresponding adjacent second segmented segment and first segmented segment in the lower layer. The storage density of the capacitor structure mainly originates from: the spaces between adjacent first segmented segments and second segmented segments in each first intermediate finger-shaped electrode plate, the spaces between adjacent first finger-shaped plugs and second finger-shaped plugs in each layer, and the spaces between first segmented segments and second segmented segments with facing regions between adjacent intermediate electrode layers. Since the gap between the first segmented segment and the second segmented segment can be controlled within a small range by photolithography, a large storage density can be ensured between the first segmented segment and the second segmented segment, and between the first finger-shaped plug and the second finger-shaped plug, thereby improving the storage density of the capacitor structure.

[0035] Furthermore, in each of the intermediate electrode layers, a plurality of first segmented segments and a plurality of third segmented segments are arranged alternately in parallel along the second direction, and a plurality of second segmented segments and a plurality of fourth segmented segments are arranged alternately in parallel along the second direction; the third segmented segments with opposing regions in the plurality of intermediate electrode layers are connected to the second bottom layer finger plate through a plurality of third finger plugs; the fourth segmented segments with opposing regions in the plurality of intermediate electrode layers are connected to the first top layer finger plate through a plurality of fourth finger plugs. The storage density of the capacitor structure can also be derived from: the spaces between adjacent third and fourth segments in each second intermediate finger plate, the spaces between adjacent third and fourth finger plugs in each layer, the spaces between adjacent first and third segments, adjacent second and fourth segments, adjacent first and third finger plugs, adjacent second and fourth finger plugs, and adjacent third and fourth finger plugs with facing regions between adjacent intermediate electrode layers, thereby further improving the storage density of the capacitor structure. Attached Figure Description

[0036] Figure 1 and Figure 2 This is a schematic diagram of a capacitor structure.

[0037] Figures 3 to 6 This is a schematic diagram of the capacitor structure according to an embodiment of the present invention. Detailed Implementation

[0038] As described in the background section, the storage density of existing MOM capacitors still needs improvement. The following will provide a detailed explanation in conjunction with the accompanying drawings.

[0039] Please refer to Figure 1 and Figure 2 , Figure 1 This is a top view omitting the media layer. Figure 2 yes Figure 1A schematic cross-sectional view along line AA shows a capacitor structure 10, comprising: a substrate 100; a dielectric layer 101 located on the substrate 100; and repeatedly stacked and connected electrode layers, wherein the dielectric layer 101 covers the electrode layers, and wherein the electrode layers include: a first electrode 102 and a second electrode 103 arranged parallel to a first direction X; a plurality of first finger-shaped electrodes 102a arranged parallel to a second direction Y and connected to the first electrode 102, wherein the first direction X is perpendicular to the second direction Y; and a plurality of second finger-shaped electrodes 103a arranged parallel to the second direction Y and connected to the second electrode 103, wherein the plurality of first finger-shaped electrodes 102a and the plurality of second finger-shaped electrodes 103a are arranged in an interlaced manner.

[0040] In this embodiment, the storage density in the capacitor structure 10 mainly originates from the space between adjacent first finger plates 102a and second finger plates 103a in each electrode layer (e.g., Figure 2 C1), and between the first finger electrode 102a and the second finger electrode 103a adjacent to the electrode layer (e.g. Figure 2 (C2 in the example). Therefore, the storage density of the capacitor structure 10 in this embodiment still needs to be improved.

[0041] To address the aforementioned problems, the present invention provides a capacitor structure and a method for forming the same. Since the gap between the first segment and the second segment can be controlled within a small range by photolithography, a large storage density can be ensured between the first segment and the second segment, as well as between the first finger plug and the second finger plug, thereby improving the storage density of the capacitor structure.

[0042] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0043] Figures 3 to 6 This is a schematic diagram of the capacitor structure according to an embodiment of the present invention.

[0044] Please refer to Figure 3 and Figure 4 , Figure 3 This is a top view omitting the media layer. Figure 4 yes Figure 3A schematic cross-sectional view along line BB shows a capacitor structure 20, comprising: a substrate 200; a dielectric layer 201 on the substrate 200; and repeatedly stacked and connected bottom electrode layers, top electrode layers, and a plurality of intermediate electrode layers, wherein the plurality of intermediate electrode layers are located between the bottom electrode layers and the top electrode layers. The dielectric layer 201 covers the bottom electrode layers, top electrode layers, and intermediate electrode layers. The bottom electrode layers include: a first bottom electrode terminal 202 and a second bottom electrode terminal 203 arranged parallel to a first direction X; and a plurality of first electrode terminals 202 and a plurality of second electrode terminals 203 arranged parallel to a second direction Y, respectively connected to the first bottom electrode terminal 202. The bottom layer comprises a finger-shaped electrode 202a, wherein the first direction X is perpendicular to the second direction Y; a plurality of second bottom layer finger-shaped electrode 203a are connected to the second bottom layer electrode 203 and arranged parallel to the second direction Y, and the plurality of first bottom layer finger-shaped electrode 202a and the plurality of second bottom layer finger-shaped electrode 203a are arranged in an alternating manner; each intermediate electrode layer includes: a first intermediate electrode 204 and a second intermediate electrode 205 arranged parallel to the first direction X; and a plurality of first intermediate finger-shaped electrode 202a located between the first intermediate electrode 204 and the second intermediate electrode 205 and arranged parallel to the second direction Y. The electrode plate 206, wherein the first intermediate finger-shaped electrode plate 206 includes: a plurality of first segmented segments 206a and a plurality of second segmented segments 206b arranged alternately in parallel along the first direction. Between adjacent intermediate electrode layers, the first segmented segments 206a in the upper layer and the corresponding adjacent first segmented segments 206a and second segmented segments 206b in the lower layer have a facing region S. The plurality of corresponding first segmented segments 206a are arranged in a stepped manner along the vertical direction. The second segmented segments 206b in the upper layer and the corresponding adjacent second segmented segments 206b and first segmented segments 206b in the lower layer are arranged in a stepped manner. Segment 206a has a directly facing region S, and several corresponding second segmented segments 206b are arranged in a stepped manner along the vertical direction; the top electrode layer includes: a first top electrode end 207 and a second top electrode end 208 arranged parallel to the first direction X; several first top finger electrode plates 207a arranged parallel to the second direction Y and respectively connected to the first top electrode end 207; several second top finger electrode plates 208a arranged parallel to the second direction Y and respectively connected to the second top electrode end 208, and several first top finger electrode plates 207a and several second top finger electrode plates 208a are arranged in a cross pattern; the first bottom electrode end 202, the first intermediate electrode end 204 and the first top electrode end 207 are connected sequentially through several first end plugs 209; the second bottom electrode end 203, the second intermediate electrode end 205 and the second top electrode end 208 are connected sequentially through several second end plugs 210.The first segment 206a having an opposing region S in the plurality of intermediate electrode layers is connected to the first bottom layer finger electrode plate 202a via a plurality of first finger plugs 211; the second segment 206b having an opposing region S in the plurality of intermediate electrode layers is connected to the second top layer finger electrode plate 208a via a plurality of second finger plugs 212.

[0045] It should be noted that, in this embodiment, the voltages applied to the first bottom electrode 202, the first intermediate electrode 204, and the first top electrode 207 are different from the voltages applied to the second bottom electrode 203, the second intermediate electrode 205, and the second top electrode 208.

[0046] In this embodiment, the voltage applied to the first bottom electrode 202, the first intermediate electrode 204, and the first top electrode 207 is higher than the voltage applied to the second bottom electrode 203, the second intermediate electrode 205, and the second top electrode 208.

[0047] In other embodiments, the voltage applied to the first bottom electrode, the first intermediate electrode, and the first top electrode may be lower than the voltage applied to the second bottom electrode, the second intermediate electrode, and the second top electrode.

[0048] In this embodiment, the storage density of the capacitor structure 20 mainly originates from the space between adjacent first segment 206a and second segment 206b in each of the first intermediate finger plates (e.g., Figure 4 In C1), between adjacent first finger plugs 211 and second finger plugs 212 in each layer (e.g., Figure 4 (C2), and between the first segment 206a and the second segment 206b having a directly opposite region S between adjacent intermediate electrode layers (e.g., C2), Figure 4 (C3). Since the gap between the first segment 206a and the second segment 206b can be controlled within a small range by photolithography, a large storage density can be ensured between the first segment 206a and the second segment 206b, as well as between the first finger plug 211 and the second finger plug 212, thereby improving the storage density of the capacitor structure.

[0049] In this embodiment, the spacing between adjacent first segment 206a and second segment 206b in the first intermediate finger electrode is 30 nanometers to 200 nanometers.

[0050] In this embodiment, the spacing between adjacent first finger plugs 211 and second finger plugs 212 in each layer is 50 nanometers to 500 nanometers.

[0051] Please refer to Figure 5 , Figure 5 yes Figure 3 A schematic diagram of the cross-section along the CC line is shown in this embodiment. It also includes: a plurality of second intermediate finger-shaped electrode plates 213 located between the first intermediate electrode 204 and the second intermediate electrode 205 and arranged in parallel along the second direction Y. The plurality of first intermediate finger-shaped electrode plates 213 and the plurality of second intermediate finger-shaped electrode plates 206 are arranged alternately in parallel along the second direction Y.

[0052] In this embodiment, the second intermediate finger-shaped electrode plate 213 includes a plurality of third segmented segments 213a and a plurality of fourth segmented segments 213b arranged alternately in parallel along the first direction X. Between adjacent intermediate electrode layers, the third segmented segment 213a in the upper layer and the corresponding adjacent third segmented segment 213a and fourth segmented segment 213b in the lower layer have a facing region S, and the fourth segmented segment 213b in the upper layer and the corresponding adjacent fourth segmented segment 213b and third segmented segment 213a in the lower layer have a facing region S.

[0053] Please refer to Figure 6 In this embodiment, in each intermediate electrode layer, a plurality of first segmented segments 206a and a plurality of third segmented segments 213a are arranged alternately in parallel along the second direction Y, and a plurality of second segmented segments 206b and a plurality of fourth segmented segments 213b are arranged alternately in parallel along the second direction Y; the third segmented segments 213a having a facing region S in the plurality of intermediate electrode layers are connected to the second bottom layer finger electrode plate 203a through a plurality of third finger plugs 213; the fourth segmented segments 213b having a facing region S in the plurality of intermediate electrode layers are connected to the first top layer finger electrode plate 207a through a plurality of fourth finger plugs 215.

[0054] In this embodiment, the storage density of the capacitor structure 20 can also be derived from the space between adjacent third segments 213a and fourth segments 213b in each of the second intermediate finger plates 213 (e.g., Figure 5 (C4), and between adjacent third finger plugs 214 and fourth finger plugs 215 in each layer (e.g. Figure 5 In each of the intermediate electrode layers (C5), between the first segment 206a and the third segment 213a, which are arranged parallel to each other along the second direction Y and are adjacent to each other (e.g., C5), Figure 6 C6), between the adjacent second segment 206b and the fourth segment 213b (e.g. Figure 6C7), between the adjacent first finger plug 211 and the third finger plug 214 (e.g. Figure 6 C8), between the adjacent second finger plug 212 and the fourth finger plug 215 (e.g. Figure 6 (C9), and between the third segment 213a and the fourth segment 213b having a facing region S between adjacent intermediate electrode layers (e.g., C9), Figure 5 (C10) to further improve the storage density of the capacitor structure.

[0055] In this embodiment, the spacing between the adjacent third segment 213a and the fourth segment 213b in the second intermediate finger-shaped electrode 213 is 30 nanometers to 200 nanometers.

[0056] In this embodiment, the spacing between adjacent third finger plugs 214 and fourth finger plugs 215 in each layer is 50 nanometers to 500 nanometers.

[0057] In this embodiment, the material of the dielectric layer 201 includes a low-k dielectric material.

[0058] The low-k dielectric material includes silicon oxide, silicon nitride, or silicon oxynitride. In this embodiment, the dielectric layer is made of silicon oxide.

[0059] Accordingly, this invention also provides a method for forming a capacitor structure; please refer to the following: Figures 3 to 6The system includes: providing a substrate 200; forming a dielectric layer 201 on the substrate 200, and repeatedly stacked and connected bottom electrode layers, top electrode layers, and a plurality of intermediate electrode layers, wherein the plurality of intermediate electrode layers are located between the bottom electrode layers and the top electrode layers, and the dielectric layer 201 covers the bottom electrode layers, top electrode layers, and intermediate electrode layers, wherein the bottom electrode layers include: first bottom electrode terminals 202 and second bottom electrode terminals 203 arranged parallel to a first direction X; a plurality of first bottom finger electrodes 202a arranged parallel to a second direction Y and connected to the first bottom electrode terminals 202, wherein the first direction X is perpendicular to the second direction Y; and a plurality of second bottom finger electrodes 203a arranged parallel to the second direction Y and connected to the second bottom electrode terminals 203, wherein the plurality of first bottom finger electrodes 202a and the plurality of second bottom finger electrodes 203a are respectively connected to the second bottom electrode terminals 203. The intermediate electrode layers are arranged in a cross pattern. Each intermediate electrode layer includes: a first intermediate electrode end 204 and a second intermediate electrode end 205 arranged parallel to the first direction X; and a plurality of first intermediate finger-shaped electrode plates 206 arranged between the first intermediate electrode end 204 and the second intermediate electrode end 205 and parallel to the second direction Y. Each first intermediate finger-shaped electrode plate 206 includes: a plurality of first segmented segments 206a and a plurality of second segmented segments 206b arranged alternately in parallel to the first direction. Between adjacent intermediate electrode layers, the first segmented segments 206a in the upper layer and their corresponding adjacent segments in the lower layer have a facing region S. The corresponding first segmented segments 206a are arranged in a stepped pattern in the vertical direction. The second segmented segments 206b in the upper layer and their corresponding adjacent segments in the lower layer are also arranged in a stepped pattern. Having a facing region S, several corresponding second segmented segments 206b are arranged in a stepped manner along the vertical direction; the top electrode layer includes: a first top electrode end 207 and a second top electrode end 208 arranged parallel to the first direction X; several first top finger electrode plates 207a arranged parallel to the second direction Y and respectively connected to the first top electrode end 207; several second top finger electrode plates 208a arranged parallel to the second direction Y and respectively connected to the second top electrode end 208, and several first top finger electrode plates 207a and several second top finger electrode plates 208a are arranged in an interlaced manner; the first bottom electrode end 202, the first intermediate electrode end 204 and the first top electrode end 207 are connected sequentially through several first end plugs 209; the second bottom electrode end 203, the second intermediate electrode end 205 and the second top electrode end 208 are connected sequentially through several second end plugs 210.The first segment 206a having an opposing region S in the plurality of intermediate electrode layers is connected to the first bottom layer finger electrode plate 202a via a plurality of first finger plugs 211; the second segment 206b having an opposing region S in the plurality of intermediate electrode layers is connected to the second top layer finger electrode plate 208a via a plurality of second finger plugs 212.

[0060] It should be noted that, in this embodiment, the voltages applied to the first bottom electrode 202, the first intermediate electrode 204, and the first top electrode 207 are different from the voltages applied to the second bottom electrode 203, the second intermediate electrode 205, and the second top electrode 208.

[0061] In this embodiment, the voltage applied to the first bottom electrode 202, the first intermediate electrode 204, and the first top electrode 207 is higher than the voltage applied to the second bottom electrode 203, the second intermediate electrode 205, and the second top electrode 208.

[0062] In other embodiments, the voltage applied to the first bottom electrode, the first intermediate electrode, and the first top electrode may be lower than the voltage applied to the second bottom electrode, the second intermediate electrode, and the second top electrode.

[0063] In this embodiment, the storage density of the capacitor structure 20 mainly originates from the space between adjacent first segment 206a and second segment 206b in each of the first intermediate finger plates (e.g., Figure 4 In C1), between adjacent first finger plugs 211 and second finger plugs 212 in each layer (e.g., Figure 4 (C2), and between the first segment 206a and the second segment 206b having a directly opposite region S between adjacent intermediate electrode layers (e.g., C2), Figure 4 (C3). Since the gap between the first segment 206a and the second segment 206b can be controlled within a small range by photolithography, a large storage density can be ensured between the first segment 206a and the second segment 206b, as well as between the first finger plug 211 and the second finger plug 212, thereby improving the storage density of the capacitor structure.

[0064] In this embodiment, the spacing between adjacent first segment 206a and second segment 206b in the first intermediate finger electrode is 30 nanometers to 200 nanometers.

[0065] In this embodiment, the spacing between adjacent first finger plugs 211 and second finger plugs 212 in each layer is 50 nanometers to 500 nanometers.

[0066] Please refer to Figure 5 , Figure 5 yes Figure 3 A schematic diagram of the cross-section along the CC line is shown in this embodiment. It also includes: a plurality of second intermediate finger-shaped electrode plates 213 located between the first intermediate electrode 204 and the second intermediate electrode 205 and arranged in parallel along the second direction Y. The plurality of first intermediate finger-shaped electrode plates 213 and the plurality of second intermediate finger-shaped electrode plates 206 are arranged alternately in parallel along the second direction Y.

[0067] In this embodiment, the second intermediate finger-shaped electrode plate 213 includes a plurality of third segmented segments 213a and a plurality of fourth segmented segments 213b arranged alternately in parallel along the first direction X. Between adjacent intermediate electrode layers, the third segmented segment 213a in the upper layer and the corresponding adjacent third segmented segment 213a and fourth segmented segment 213b in the lower layer have a facing region S, and the fourth segmented segment 213b in the upper layer and the corresponding adjacent fourth segmented segment 213b and third segmented segment 213a in the lower layer have a facing region S.

[0068] Please refer to Figure 6 In this embodiment, in each intermediate electrode layer, a plurality of first segmented segments 206a and a plurality of third segmented segments 213a are arranged alternately in parallel along the second direction Y, and a plurality of second segmented segments 206b and a plurality of fourth segmented segments 213b are arranged alternately in parallel along the second direction Y; the third segmented segments 213a having a facing region S in the plurality of intermediate electrode layers are connected to the second bottom layer finger electrode plate 203a through a plurality of third finger plugs 213; the fourth segmented segments 213b having a facing region S in the plurality of intermediate electrode layers are connected to the first top layer finger electrode plate 207a through a plurality of fourth finger plugs 215.

[0069] In this embodiment, the storage density of the capacitor structure 20 can also be derived from the space between adjacent third segments 213a and fourth segments 213b in each of the second intermediate finger plates 213 (e.g., Figure 5 (C4), and between adjacent third finger plugs 214 and fourth finger plugs 215 in each layer (e.g. Figure 5 In each of the intermediate electrode layers (C5), between the first segment 206a and the third segment 213a, which are arranged parallel to each other along the second direction Y and are adjacent to each other (e.g., C5), Figure 6 C6), between the adjacent second segment 206b and the fourth segment 213b (e.g. Figure 6C7), between the adjacent first finger plug 211 and the third finger plug 214 (e.g. Figure 6 C8), between the adjacent second finger plug 212 and the fourth finger plug 215 (e.g. Figure 6 (C9), and between the third segment 213a and the fourth segment 213b having a facing region S between adjacent intermediate electrode layers (e.g., C9), Figure 5 (C10) to further improve the storage density of the capacitor structure.

[0070] In this embodiment, the spacing between the adjacent third segment 213a and the fourth segment 213b in the second intermediate finger-shaped electrode 213 is 30 nanometers to 200 nanometers.

[0071] In this embodiment, the spacing between adjacent third finger plugs 214 and fourth finger plugs 215 in each layer is 50 nanometers to 500 nanometers.

[0072] In this embodiment, the material of the dielectric layer 201 includes a low-k dielectric material.

[0073] The low-k dielectric material includes silicon oxide, silicon nitride, or silicon oxynitride. In this embodiment, the dielectric layer is made of silicon oxide.

[0074] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A capacitor structure, characterized in that, include: Substrate; A dielectric layer located on the substrate; A plurality of intermediate electrode layers are located within the dielectric layer, wherein, Each of the intermediate electrode layers includes: a first intermediate electrode terminal and a second intermediate electrode terminal arranged parallel to each other along a first direction; and a plurality of first intermediate finger-shaped electrode plates located between the first intermediate electrode terminal and the second intermediate electrode terminal and arranged parallel to each other along a second direction, wherein the first direction is perpendicular to the second direction. The first intermediate finger-shaped electrode plate includes: a plurality of first segments and a plurality of second segments arranged alternately in parallel along the first direction. Between adjacent intermediate electrode layers, the first segment in the upper layer and the corresponding adjacent first segment and second segment in the lower layer have a facing area. The plurality of corresponding first segments are arranged in a stepped manner along the vertical direction. The second segment in the upper layer and the corresponding adjacent second segment and first segment in the lower layer have a facing area. The plurality of corresponding second segments are arranged in a stepped manner along the vertical direction. The first segmented sections having opposing regions in several intermediate electrode layers are connected by several first finger-shaped plugs; The second segment having opposing regions in several intermediate electrode layers is connected by several second finger plugs.

2. The capacitor structure as described in claim 1, characterized in that, Also includes: The dielectric layer contains a bottom electrode layer and a top electrode layer, which are repeatedly stacked and connected. The bottom electrode layer, the top electrode layer, and a plurality of intermediate electrode layers are located between the bottom electrode layer and the top electrode layer. The dielectric layer covers the bottom electrode layer, the top electrode layer, and the intermediate electrode layers.

3. The capacitor structure as described in claim 2, characterized in that, The bottom electrode layer includes: a first bottom electrode and a second bottom electrode arranged in parallel along the first direction; a plurality of first bottom finger electrodes arranged in parallel along the second direction and respectively connected to the first bottom electrode; a plurality of second bottom finger electrodes arranged in parallel along the second direction and respectively connected to the second bottom electrode, wherein the plurality of first bottom finger electrodes and the plurality of second bottom finger electrodes are arranged in an interlaced manner.

4. The capacitor structure as described in claim 3, characterized in that, The top electrode layer includes: a first top electrode and a second top electrode arranged in parallel along the first direction; a plurality of first top finger plates arranged in parallel along the second direction and respectively connected to the first top electrode; a plurality of second top finger plates arranged in parallel along the second direction and respectively connected to the second top electrode, wherein the plurality of first top finger plates and the plurality of second top finger plates are arranged in an alternating manner.

5. The capacitor structure as described in claim 4, characterized in that, The first bottom electrode, the first intermediate electrode, and the first top electrode are connected sequentially by a plurality of first end plugs; the second bottom electrode, the second intermediate electrode, and the second top electrode are connected sequentially by a plurality of second end plugs; the first segment with an opposing region in the plurality of intermediate electrode layers is connected to the first bottom finger plate by a plurality of first finger plugs; the second segment with an opposing region in the plurality of intermediate electrode layers is connected to the second top finger plate by a plurality of second finger plugs.

6. The capacitor structure as described in claim 5, characterized in that, Each intermediate electrode layer further includes: a plurality of second intermediate finger-shaped electrode plates located between the first intermediate electrode terminal and the second intermediate electrode terminal and arranged in parallel along the second direction, wherein the plurality of first intermediate finger-shaped electrode plates and the plurality of second intermediate finger-shaped electrode plates are arranged alternately in parallel along the second direction.

7. The capacitor structure as described in claim 6, characterized in that, The second intermediate finger electrode plate includes a plurality of third segments and a plurality of fourth segments arranged alternately in parallel along the first direction. Between adjacent intermediate electrode layers, the third segment in the upper layer has a facing region with the corresponding adjacent third segment and fourth segment in the lower layer, and the fourth segment in the upper layer has a facing region with the corresponding adjacent fourth segment and third segment in the lower layer.

8. The capacitor structure as described in claim 7, characterized in that, In each intermediate electrode layer, a plurality of first segmented segments and a plurality of third segmented segments are arranged alternately in parallel along the second direction, and a plurality of second segmented segments and a plurality of fourth segmented segments are arranged alternately in parallel along the second direction; the third segmented segments with opposing regions in the plurality of intermediate electrode layers are connected to the second bottom layer finger plate through a plurality of third finger plugs; the fourth segmented segments with opposing regions in the plurality of intermediate electrode layers are connected to the first top layer finger plate through a plurality of fourth finger plugs.

9. The capacitor structure as described in claim 1, characterized in that, The spacing between adjacent first and second segments in the first intermediate finger-shaped electrode plate is 30 nanometers to 200 nanometers.

10. The capacitor structure as described in claim 7, characterized in that, The spacing between adjacent third and fourth segments in the second intermediate finger-shaped electrode is 30 nanometers to 200 nanometers.

11. The capacitor structure as described in claim 5, characterized in that, The spacing between adjacent first and second finger plugs in each layer is 50 nanometers to 500 nanometers.

12. The capacitor structure as described in claim 8, characterized in that, The spacing between adjacent third and fourth finger plugs in each layer is 50 nanometers to 500 nanometers.

13. The capacitor structure as described in claim 1, characterized in that, The dielectric layer is made of a low-k dielectric material, which includes silicon oxide, silicon nitride, or silicon oxynitride.

14. A method for forming a capacitor structure, characterized in that, include: Provide substrate; A dielectric layer is formed on the substrate, and the dielectric layer has a plurality of intermediate electrode layers, wherein each intermediate electrode layer includes: a first intermediate electrode terminal and a second intermediate electrode terminal arranged parallel to each other along a first direction; and a plurality of first intermediate finger-shaped electrodes arranged parallel to each other along a second direction between the first intermediate electrode terminal and the second intermediate electrode terminal, wherein the first direction is perpendicular to the second direction. The first intermediate finger-shaped electrode plate includes: a plurality of first segments and a plurality of second segments arranged alternately in parallel along the first direction. Between adjacent intermediate electrode layers, the first segment in the upper layer and the corresponding adjacent first segment and second segment in the lower layer have a facing area. The plurality of corresponding first segments are arranged in a stepped manner along the vertical direction. The second segment in the upper layer and the corresponding adjacent second segment and first segment in the lower layer have a facing area. The plurality of corresponding second segments are arranged in a stepped manner along the vertical direction. The first segmented sections having opposing regions in several intermediate electrode layers are connected by several first finger-shaped plugs; The second segment having opposing regions in several intermediate electrode layers is connected by several second finger plugs.

15. The method for forming a capacitor structure as described in claim 14, characterized in that, The dielectric layer also includes a bottom electrode layer and a top electrode layer. The bottom electrode layer, the top electrode layer, and a plurality of intermediate electrode layers are repeatedly stacked and connected. The plurality of intermediate electrode layers are located between the bottom electrode layer and the top electrode layer. The dielectric layer covers the bottom electrode layer, the top electrode layer, and the intermediate electrode layers.

16. The method for forming a capacitor structure as described in claim 15, characterized in that, The bottom electrode layer includes: a first bottom electrode and a second bottom electrode arranged in parallel along the first direction; a plurality of first bottom finger electrodes arranged in parallel along the second direction and respectively connected to the first bottom electrode; a plurality of second bottom finger electrodes arranged in parallel along the second direction and respectively connected to the second bottom electrode, wherein the plurality of first bottom finger electrodes and the plurality of second bottom finger electrodes are arranged in an interlaced manner.

17. The method for forming a capacitor structure as described in claim 16, characterized in that, The top electrode layer includes: a first top electrode and a second top electrode arranged in parallel along the first direction; a plurality of first top finger plates arranged in parallel along the second direction and respectively connected to the first top electrode; a plurality of second top finger plates arranged in parallel along the second direction and respectively connected to the second top electrode, wherein the plurality of first top finger plates and the plurality of second top finger plates are arranged in an alternating manner.

18. The method for forming a capacitor structure as described in claim 17, characterized in that, The first bottom electrode, the first intermediate electrode, and the first top electrode are connected sequentially by a plurality of first end plugs; the second bottom electrode, the second intermediate electrode, and the second top electrode are connected sequentially by a plurality of second end plugs; the first segment with an opposing region in the plurality of intermediate electrode layers is connected to the first bottom finger plate by a plurality of first finger plugs; the second segment with an opposing region in the plurality of intermediate electrode layers is connected to the second top finger plate by a plurality of second finger plugs.

19. The method for forming a capacitor structure as described in claim 18, characterized in that, Each intermediate electrode layer further includes: a plurality of second intermediate finger-shaped electrode plates located between the first intermediate electrode terminal and the second intermediate electrode terminal and arranged in parallel along the second direction, wherein the plurality of first intermediate finger-shaped electrode plates and the plurality of second intermediate finger-shaped electrode plates are arranged alternately in parallel along the second direction.

20. The method for forming a capacitor structure as described in claim 19, characterized in that, The second intermediate finger electrode plate includes a plurality of third segments and a plurality of fourth segments arranged alternately in parallel along the first direction. Between adjacent intermediate electrode layers, the third segment in the upper layer has a facing region with the corresponding adjacent third segment and fourth segment in the lower layer, and the fourth segment in the upper layer has a facing region with the corresponding adjacent fourth segment and third segment in the lower layer.

21. The method for forming a capacitor structure as described in claim 20, characterized in that, In each intermediate electrode layer, a plurality of first segmented segments and a plurality of third segmented segments are arranged alternately in parallel along the second direction, and a plurality of second segmented segments and a plurality of fourth segmented segments are arranged alternately in parallel along the second direction; the third segmented segments with opposing regions in the plurality of intermediate electrode layers are connected to the second bottom layer finger plate through a plurality of third finger plugs; the fourth segmented segments with opposing regions in the plurality of intermediate electrode layers are connected to the first top layer finger plate through a plurality of fourth finger plugs.

22. The method for forming a capacitor structure as described in claim 14, characterized in that, The spacing between adjacent first and second segments in the first intermediate finger-shaped electrode plate is 30 nanometers to 200 nanometers.

23. The method for forming a capacitor structure as described in claim 20, characterized in that, The spacing between adjacent third and fourth segments in the second intermediate finger-shaped electrode is 30 nanometers to 200 nanometers.

24. The method for forming a capacitor structure as described in claim 18, characterized in that, The spacing between adjacent first and second finger plugs in each layer is 50 nanometers to 500 nanometers.

25. The method for forming a capacitor structure as described in claim 21, characterized in that, The spacing between adjacent third and fourth finger plugs in each layer is 50 nanometers to 500 nanometers.

26. The method for forming a capacitor structure as described in claim 14, characterized in that, The dielectric layer is made of a low-k dielectric material, which includes silicon oxide, silicon nitride, or silicon oxynitride.

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