A Flash data management system, micro control unit and vehicle
By designing the Flash data management system, using the correspondence between storage units and information units, it provides initialization, detection, search and page-changing task interfaces, solving the problem of external EEPROM increasing costs and complexity, and achieving efficient data management and storage.
Patent Information
- Application Number
- CN202410147851.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-02-02
- Publication Date
- 2025-01-14
- Estimated Expiration
- 2044-02-02
AI Technical Summary
The prior art increases device cost and complexity when storing data using external EEPROM in automobiles, and cannot be effectively managed when facing a large amount of data, and on-chip Flash is inefficient in managing large amounts of data.
A Flash data management system is designed, including storage units and information units. It provides external and internal interfaces through the data management module to realize effective management of data in Flash, including initialization, detection, search and page change task interfaces to ensure data Storage and handling efficiency.
Reduces device costs and complexity, improves data management efficiency, can effectively handle large amounts of data storage, and reduces fault points and test costs.
Smart Images

Figure CN117687580B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of data storage, and in particular to a Flash data management system, a micro control unit and a vehicle. Background Art
[0002] As the market's requirements for automobile energy saving, comfort, connectivity, safety, etc. are getting higher and higher, especially the rise of new energy vehicles' intelligent cockpits, autonomous driving and other technologies in recent years, the development of automotive electronic technology has been greatly accelerated. The integration of automotive ECUs is getting higher and higher, and the amount of user data stored locally is also increasing. In the past, when automotive products needed to store a large amount of data locally, external EEPROM solutions were generally used. For storing a small amount of data, on-chip Flash was used for simple storage. If there was a demand for life, a balanced erase and write algorithm was added to ensure life.
[0003] However, the use of external EEPROM devices will increase the cost of additional devices and BOM, and the use of external EEPROM requires inter-board communication such as SPI, IIC, etc., which increases the overall data processing loop and additional failure points. The link is easily interfered by the external environment and causes errors, which increases the complexity of PCB design and testing costs. However, the use of on-chip Flash to simply store data cannot effectively manage data when faced with large amounts of data. Summary of the invention
[0004] In view of the deficiencies in the prior art, the present application provides a Flash data management system, a micro control unit and a vehicle. Through the Flash structure in the data management system and the internal and external interfaces provided, the data stored in the Flash can be better managed.
[0005] To solve the above problems, this application provides the following technical solutions:
[0006] In a first aspect, an embodiment of the present application provides a Flash data management system, the system comprising:
[0007] Flash, the Flash comprising at least one storage unit, the storage unit comprising at least a data unit storage space and an information unit storage space, the data unit storage space being used to store data units, the information unit storage space being used to store information units, the data units corresponding to the information units one by one, the information units comprising at least description information and a storage address of the corresponding data units;
[0008] The data management module includes an external interface for users to call and an internal interface for the data management system to call.
[0009] In some implementations, the internal interface includes an initialization interface, a first detection interface, and a second detection interface; wherein,
[0010] When the initialization interface is called, it is used to:
[0011] Calling the first detection interface; when the first detection interface is called, it is used to determine the state of each of the storage units;
[0012] The second detection interface is called; when the second detection interface is called, it is used to make the initialization interface perform different preset operations according to the state of each storage unit.
[0013] In some embodiments, the storage unit includes a header information storage space, and the header information storage space includes a first preset area, a second preset area, a third preset area, and a fourth preset area; wherein,
[0014] When the first preset area is written with the first preset information and the remaining preset areas are not written with the preset information, the storage unit is in the first state;
[0015] When the first preset area is written with the first preset information, the second preset area is written with the second preset information, and the remaining preset areas are not written with preset information, the storage unit is in the second state;
[0016] When the first preset area is written with the first preset information, the second preset area is written with the second preset information, the third preset area is written with the third preset information, and the fourth preset area is not written with the fourth preset information, the storage unit is in the third state;
[0017] When the first preset information is written into the first preset area, the second preset information is written into the second preset area, the third preset information is written into the third preset area, and the fourth preset information is written into the fourth preset area, the storage unit is in the fourth state.
[0018] In some implementations, the first detection interface, when called, is used to:
[0019] Detecting the header information storage space of the Nth storage unit, and determining the state of the Nth storage unit according to the information in the first preset area, the second preset area, the third preset area, and the fourth preset area; wherein N=1 in the initialization state;
[0020] Set N=N+1, and return to the execution step to detect the header information storage space of the Nth storage unit.
[0021] In some embodiments, the second detection interface is used when called to:
[0022] Determining whether there is an activated storage unit according to the state of each storage unit;
[0023] When there is a storage unit in the activation state and there is no storage unit in the page change state, causing the initialization interface to perform a first preset operation;
[0024] When there is a storage unit in the activated state and a storage unit in the page change state, determining whether the data to be transferred during the page change process has been transferred, and when the data transfer is completed, causing the initialization interface to perform a second preset operation;
[0025] When there is no storage unit in the activated state and there is a storage unit in the page change state, it is determined whether the data to be transferred during the page change process has been transferred, and when the data has not been transferred, the initialization interface is enabled to perform a third preset operation.
[0026] In some implementations, the second preset operation includes:
[0027] Fourth information is written into a fourth preset area of the storage unit in the third state.
[0028] In some implementations, the third preset operation includes:
[0029] All storage units in the Flash that are not in the fully erased state are erased.
[0030] In some implementations, the internal interface includes a search interface, which, when called, is used to:
[0031] Get the information unit write address;
[0032] Read the information unit according to the information unit write address;
[0033] When the information unit is readable, offsetting the information unit write address by a first preset byte as a new information unit write address;
[0034] Return to the execution step to read the information unit according to the information unit write address.
[0035] In some implementations, the search interface, when called, is also used to:
[0036] When the information unit is unreadable, obtaining a data unit write address;
[0037] Reading information of a second preset byte according to the data unit write address, and when it is determined that the data unit write address is not writable according to the information of the second preset byte, offsetting the data unit write address by a second preset byte as a new data unit write address;
[0038] Return to the execution step to read the information of the second preset byte according to the data unit write address.
[0039] In some implementations, the internal interface further includes a page-changing task interface, which, when called, is used to:
[0040] Determine the storage unit in the backup state and the storage unit in the active state;
[0041] Detecting the erasure state of the storage unit in the backup state, and erasing the storage unit when the storage unit is not in the full-erasure state;
[0042] Starting data transfer to transfer valid data in the storage unit in the active state to the storage unit in the backup state, and writing different preset information in the storage unit in the backup state according to the transfer progress;
[0043] After the data transfer is completed, the active storage cells are erased.
[0044] In a second aspect, an embodiment of the present application provides a micro control unit, wherein the micro control unit includes a Flash data management system as described in the first aspect.
[0045] In a third aspect, an embodiment of the present application provides a vehicle, comprising a micro control unit as described in the second aspect.
[0046] The present application provides a Flash data management system, a microcontroller unit, and a vehicle, the system comprising: Flash, the Flash comprising at least one storage unit, the storage unit comprising at least a data unit storage space and an information unit storage space, the data unit storage space being used to store data units, the information unit storage space being used to store information units, the data units corresponding to the information units one-to-one, the information units comprising at least description information and storage addresses of the corresponding data units; a data management module, the data management module comprising an external interface for user calls and an internal interface for internal calls of the data management system. The present application can better manage the data stored in the Flash through the structure of the Flash in the data management system and the internal and external interfaces provided. BRIEF DESCRIPTION OF THE DRAWINGS
[0047] Figure 1 It is a system schematic diagram of a Flash data management system provided by this application.
[0048] Figure 2 It is a schematic diagram of the structure of a Flash provided in an embodiment of the present application.
[0049] Figure 3 It is a structural schematic diagram of a header information storage space provided in an embodiment of the present application.
[0050] Figure 4 It is a schematic diagram of the detection process of the first detection interface provided in an embodiment of the present application.
[0051] Figure 5 It is a schematic diagram of the detection process of the second detection interface provided in an embodiment of the present application.
[0052] Figure 6 It is a structural diagram of the information unit provided in the embodiment of the present application.
[0053] Figure 7 It is a schematic diagram of the search process of the search interface provided in an embodiment of the present application.
[0054] Figure 8 It is a schematic diagram of the page switching process of the page switching interface provided in an embodiment of the present application.
[0055] Fig. 9 It is a schematic diagram of the structure of the micro control unit provided in the embodiment of the present application.
[0056] Fig.10 It is a schematic diagram of the structure of a vehicle provided in an embodiment of the present application. DETAILED DESCRIPTION
[0057] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0058] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0059] For the convenience of describing the first direction and the second direction in the embodiment of the present application, the first direction is the up-down direction in the drawings, the second direction is the front-back direction in the drawings, and the third direction is the left-right direction in the drawings. The x-axis arrow direction is referred to as the "up" direction in the following text, the y-axis arrow direction is referred to as the "back" direction in the following text, and the z-axis arrow direction is referred to as the "right" direction in the following text, which is not limited to the actual application of the present application.
[0060] See also Figure 1 , Figure 1 Schematic diagram of a Flash data management system provided by an embodiment of the present application. Figure 1 As shown, the system includes Flash 10000 and a data management module 20000.
[0061] In some embodiments, Flash 10000 includes at least one storage unit, the storage unit includes at least a data unit storage space and an information unit storage space, the data unit storage space is used to store data units, the information unit storage space is used to store information units, the data units correspond to the information units one by one, and the information units include at least description information and storage addresses of the corresponding data units;
[0062] In some implementations, the data management module 20000 includes an external interface for users to call and an internal interface for the data management system to call.
[0063] In some embodiments, the external interface includes at least a write interface for a user to call to perform data writing, a query interface for a user to call to perform data query, and a read interface for a user to call to perform data reading.
[0064] In some embodiments, the system is applied to a vehicle, the vehicle includes a microcontroller unit (MCU), the MCU includes Flash 10000, and the data management module 20000 is a program module running on the MCU.
[0065] In some implementations, the micro control unit further includes a random access memory (RAM).
[0066] See also Figure 2 , Figure 2 Schematic diagram of a Flash structure provided by an embodiment of the present application. Figure 2 As shown, Figure 2 The Flash in the embodiment includes a storage unit 1000, wherein the storage unit 1000 includes at least a data unit storage space 1200 and an information unit storage space 1400; wherein,
[0067] The data unit storage space 1200 is used to store data units, and the information unit storage space 1400 is used to store information units. The data units correspond to the information units one by one, and the information units at least include the description information and storage address of the corresponding data units.
[0068] In some embodiments, the storage unit 1000 further includes a header information storage space 1100 and a tail information storage space 1500 .
[0069] In some implementations, the header information storage space 1100 is used to store header information, the tail information storage space 1500 is used to store tail information, and the header information storage space 1100 and the tail information storage space 1500 are backed up to each other.
[0070] In some implementations, the header information is used to identify the storage unit 1000, for example, to identify the state of the storage unit 1000, which will be specifically introduced in the following part of the specification.
[0071] In some implementations, the storage unit 1000 further includes a reserved expansion space 1300 , which is a space used for subsequent expansion solutions.
[0072] In some implementations, the reserved expansion space 1300 is located between the data unit storage space 1200 and the information unit storage space 1400 .
[0073] In some implementations, the data in the reserved extension space 1300 is a preset value, for example, all are 0x00.
[0074] In some embodiments, the information unit in the information unit storage space 1400 includes description information and a physical address. The description information is used to describe the corresponding data unit, and the physical address is used to find the corresponding data unit. The user can find the physical address of the data unit corresponding to the description information by inputting the description information, thereby reading the corresponding data unit.
[0075] Through the above-mentioned information unit structure, the present application stores the description information and the storage address in the information unit in an orderly manner, so as to facilitate the subsequent search for the description information and the storage address.
[0076] See also Figure 3 , Figure 3 Schematic diagram of the structure of a header information storage space provided by an embodiment of the present application. Figure 3 As shown, the header information storage space 1100 includes: a first preset area 1110 , a second preset area 1120 , a third preset area 1130 and a fourth preset area 1140 .
[0077] In some implementations, the header information storage space 1100 also includes a reserved space 1150 , which can be used for subsequent solution expansion.
[0078] In some embodiments, the size of the first preset area is 8 bytes, and the first preset information includes first information and second information, each occupying four bytes. Exemplarily, the first information is 0x5A, 0x01, 0x00, and 0xCA from low address to high address, and the second information is the same as the first information and is written below the first information, and is also 0x5A, 0x01, 0x00, and 0xCA from low address to high address.
[0079] In some embodiments, the size of the second preset area is 8 bytes, and the second preset information includes third information and fourth information, each occupying four bytes. Exemplarily, the third information is 0x5A, 0x02, 0x00, and 0x1E from low address to high address, and the fourth information is the same as the third information and is written below the third information, and is also 0x5A, 0x02, 0x00, and 0x1E from low address to high address.
[0080] In some embodiments, the size of the third preset area is 8 bytes, and the third preset information includes fifth information and sixth information, each occupying four bytes. Exemplarily, the fifth information is 0x5A, 0x03, 0x00, and 0x52 from low address to high address, the fifth information and the sixth information are the same and the sixth information is written below the fifth information, and are also 0x5A, 0x03, 0x00, and 0x52 from low address to high address.
[0081] In some embodiments, the size of the fourth preset area is 8 bytes, and the fourth preset information includes seventh information and eighth information, each occupying four bytes. Exemplarily, the seventh information is 0x5A, 0x04, 0x00, and 0xAB from low address to high address, the seventh information is the same as the eighth information and the eighth information is written below the seventh information, and is also 0x5A, 0x04, 0x00, and 0xAB from low address to high address.
[0082] In some embodiments, when the first preset area is written with first preset information and the remaining preset areas are not written with preset information, the storage unit is in the first state.
[0083] In some embodiments, when the first preset information is written into the first preset area, the second preset information is written into the second preset area, and the preset information is not written into the remaining preset areas, the storage unit is in the second state.
[0084] In some embodiments, when the first preset information is written into the first preset area, the second preset information is written into the second preset area, the third preset information is written into the third preset area, and the fourth preset information is not written into the fourth preset area, the storage unit is in the third state.
[0085] In some embodiments, when the first preset area is written with the first preset information, the second preset area is written with the second preset information, the third preset area is written with the third preset information, and the fourth preset area is written with the fourth preset information, the storage unit is in the fourth state.
[0086] In some implementations, the first state, the second state, the third state, and the fourth state may all be used to identify the execution progress of the storage unit when executing the paging task.
[0087] In some embodiments, it is defined that the first storage unit is full, and the valid data of the first storage unit needs to be transferred to the second storage unit. During the transfer process, the above-mentioned preset information will be written to the preset area of the second storage unit; wherein, the first state is used to indicate that data transfer is ready to start, the second state is used to indicate that data transfer has started, the third state is used to indicate that data transfer is complete and erasing of the first storage unit has started, and the fourth state is used to indicate that erasing of the first storage unit is complete.
[0088] In some embodiments, when it is identified that the state of a storage unit is the fourth state, the storage unit is marked as an activated storage unit.
[0089] In some implementations, the header information storage space 1100 and the tail information storage space 1500 have the same structure.
[0090] In some implementations, when writing the preset information into the preset area of the head information storage space 1100 fails, the preset information is written into the preset area of the tail information storage space 1500 .
[0091] In some implementations, the internal interface includes an initialization interface, a first detection interface, and a second detection interface.
[0092] When the initialization interface is called, it is used to:
[0093] (1) calling the first detection interface; when the first detection interface is called, it is used to determine the state of each of the storage units;
[0094] (2) calling the second detection interface; when the second detection interface is called, it is used to make the initialization interface perform different preset operations according to the status of each storage unit.
[0095] In some embodiments, the initialization interface is used to query the status of the storage unit to find out the storage unit in the activated state, the storage unit in the backup state, and the storage unit in the error state, and correct the storage unit in the error state when the storage unit in the error state is found.
[0096] In some implementations, by initializing the interface, not only can the state of the storage unit be identified, but also the state of each storage unit can be ensured to be correct to ensure the operation of the system.
[0097] In some implementations, the first detection interface, when called, is used to:
[0098] Detecting the header information storage space of the Nth storage unit, and determining the state of the Nth storage unit according to the information in the first preset area, the second preset area, the third preset area, and the fourth preset area; wherein N=1 in the initialization state;
[0099] Set N=N+1, and return to the execution step to detect the header information storage space of the Nth storage unit.
[0100] In some embodiments, see Figure 4 , Figure 4 Schematic diagram of the detection process of the first detection interface provided in the embodiment of the present application. Figure 4 As shown, the detection process 100 executed when the first detection interface is called includes steps 101 to 117.
[0101] Step 101: Select the Nth storage unit.
[0102] In some embodiments, N is a positive integer, and N=1 in an initial state.
[0103] Step 102: Determine whether the storage unit is completely erased.
[0104] In some implementations, if the storage unit has been completely erased, step 103 is executed; if the storage unit has not been completely erased, step 115 is executed.
[0105] In some embodiments, full erasure of a storage unit means that the storage unit does not store valid data, for example, the data stored in the storage unit are all empty, such as 0x00.
[0106] Step 103: Determine whether the header information storage space is readable.
[0107] In some implementations, if the header information storage space is readable, step 104 is executed; if the header information storage space is not readable, step 105 is executed.
[0108] In some implementations, in the event of an unexpected situation, such as a power outage while writing information to the header information storage space, the header information storage space may become unreadable.
[0109] Step 104: Read the header information.
[0110] Step 105: Determine whether the tail information storage space is readable.
[0111] In some implementations, if the tail information storage space is readable, step 106 is executed; if the tail information storage space is not readable, step 115 is executed.
[0112] In some implementations, when writing information to the head information storage space fails, the information is written to the tail information storage space. Therefore, if the head information storage space is unreadable and the tail information storage space is readable, valid data is stored in the tail information storage space.
[0113] Step 106: Read the tail information.
[0114] Step 107: Determine whether there is first preset information in the first preset area.
[0115] In some implementations, when the first preset information exists in the first preset area, step 108 is executed; when the first preset information does not exist in the first preset area, step 117 is executed.
[0116] Step 108: Mark as the first state.
[0117] In some embodiments, marking as the first state refers to marking the storage unit as the first state in the RAM.
[0118] Step 109: Determine whether there is second preset information in the second preset area.
[0119] In some implementations, when the second preset information exists in the second preset area, step 110 is executed; when the second preset information does not exist in the second preset area, step 117 is executed.
[0120] Step 110: Mark as the second state.
[0121] Step 111: Determine whether there is third preset information in the third preset area.
[0122] In some implementations, when the third preset information exists in the third preset area, step 112 is executed; when the third preset information does not exist in the third preset area, step 117 is executed.
[0123] Step 112: Mark as the third state.
[0124] Step 113: Determine whether there is fourth preset information in the fourth preset area.
[0125] In some implementations, when the fourth preset information exists in the fourth preset area, step 114 is executed; when the fourth preset information does not exist in the fourth preset area, step 117 is executed.
[0126] Step 114: Mark as the fourth state.
[0127] Step 115: Determine whether all storage units have been traversed.
[0128] In some implementations, when all storage units have been traversed, step 117 is executed; when all storage units have not been traversed, step 116 is executed.
[0129] Step 116: N=N+1.
[0130] After executing step 116 , the process returns to executing step 101 .
[0131] Step 117: END.
[0132] In some implementations, executing step 117 means that the first detection interface call is completed.
[0133] Through the above detection process, the status of all storage units can be obtained through the first detection interface.
[0134] In some implementations, the second detection interface, when called, is used to:
[0135] Determining whether there is an activated storage unit according to the state of each storage unit;
[0136] When there is a storage unit in the activation state and there is no storage unit in the page change state, causing the initialization interface to perform a first preset operation;
[0137] When there is a storage unit in the activated state and a storage unit in the page change state, determining whether the data to be transferred during the page change process has been transferred, and when the data transfer is completed, causing the initialization interface to perform a second preset operation;
[0138] When there is no storage unit in the activated state and there is a storage unit in the page change state, it is determined whether the data to be transferred during the page change process has been transferred, and when the data has not been transferred, the initialization interface is enabled to perform a third preset operation.
[0139] In some implementations, the storage unit in the fourth state is marked as an active storage unit in the RAM.
[0140] In some implementations, if there is a storage unit in one of the first state, the second state, and the third state, it is determined that there is a storage unit in the page change state.
[0141] In some embodiments, if the storage unit changes from the second state to the third state, or the storage unit is directly detected to be in the third state, it is determined that the data transfer is completed.
[0142] Exemplarily, when the first storage unit is detected to be in the fourth state, it is determined that the first storage unit is an activated storage unit, and when the second storage unit is detected to be in the third state, it is determined that the second storage unit is a paging storage unit and data transfer has been completed.
[0143] In some embodiments, see Figure 5 , Figure 5 Schematic diagram of the detection process of the second detection interface provided in the embodiment of the present application. Figure 5 As shown, the detection process 200 executed when the second detection interface is called includes steps 201 to 213.
[0144] Step 201: Mark the activated storage unit in the RAM as empty.
[0145] Step 202: Search for storage units in the fourth state.
[0146] Step 203: Determine whether a storage unit in the fourth state is found.
[0147] In some implementations, when a storage unit in the fourth state is found, step 204 is executed; when a storage unit in the fourth state is not found, step 205 is executed.
[0148] Step 204: Mark the searched storage unit in the fourth state as an activated storage unit in the RAM.
[0149] Step 205: Mark the storage unit in the backup state as empty in the RAM.
[0150] Step 206: Determine whether there is a storage unit in a page-changing state.
[0151] In some implementations, when there is a storage unit in a page-changing state, step 207 is executed; when there is no storage unit in a page-changing state, step 212 is executed.
[0152] Step 207: Determine whether the data transfer is completed.
[0153] In some implementations, when the data transfer is completed, step 208 is executed; when the data transfer is not completed, step 210 is executed.
[0154] Step 208: Mark the storage unit in the paging state as the storage unit in the backup state in the RAM.
[0155] Step 209: Enable the initialization interface to execute a second preset operation.
[0156] Step 210: Determine whether there is an activated storage unit.
[0157] In some implementations, when there is an activated storage unit, step 212 is executed; when there is no activated storage unit, step 211 is executed.
[0158] Step 211: Enable the initialization interface to execute a third preset operation.
[0159] Step 212: Enable the initialization interface to execute a first preset operation.
[0160] In some embodiments, the first preset operation includes causing the second detection interface to end the detection process.
[0161] In some embodiments, the second preset operation includes: writing fourth information in a fourth preset area of the storage unit in the third state.
[0162] In some implementations, the fourth information is used to indicate that data transfer is complete and erasure of the storage unit in the original active state is complete during the page change process. After the fourth information is written, the storage unit in the backup state is set as the storage unit in the active state in the RAM.
[0163] In some embodiments, when writing the fourth information into the fourth preset area of the storage unit in the third state, if the structure of the header information storage space of the storage unit is as follows: Figure 3 As shown, when the fourth information cannot be written into the fourth preset area in the head information storage space of the storage unit, the fourth information is written into the fourth preset area in the tail information storage space of the storage unit.
[0164] In some implementations, the second preset operation includes the following steps.
[0165] The storage unit in the activated state is erased, and when the erasing of the storage unit in the activated state is completed, fourth information is written into the fourth preset area of the storage unit in the third state.
[0166] Among them, after writing the fourth information in the fourth preset area of the storage unit in the third state, the storage unit will change to the fourth state. Because the storage unit in the fourth state will be marked as an activated state storage unit in the RAM, the original activated state storage unit will be erased at this time.
[0167] It can be understood that erasing the storage unit in the original activated state will erase the first preset information, the second preset information, the third preset information and the fourth preset information in the storage unit.
[0168] In some implementations, the third preset operation includes: erasing all storage units in the Flash that are not in a fully erased state.
[0169] In some embodiments, the data transfer process is defined as transferring data from a first storage unit to a second storage unit. The presence of a storage unit in a paging state and the incomplete transfer of data to be transferred during the paging process refers to the second storage unit being in the first state or the second state. The second storage unit being in the first state or the second state reflects that the data transfer process has not ended, but there is no activated storage unit at this time, and data transfer is the process of transferring data from an activated storage unit to a backup storage unit, which means that the data in the original activated storage unit is damaged. At this time, the data to be transferred cannot be obtained from the first storage unit, and the data written to the second storage unit is also incomplete. Therefore, all storage units in the Flash that are not fully erased are erased and the Flash is initialized.
[0170] In some implementations, when erasing all storage units in the Flash that are not in a fully erased state, specific storage units may be skipped, such as storage units that are set by the user not to be erased.
[0171] In some implementations, the internal interface includes a search interface, which, when called, is used to:
[0172] Get the information unit write address;
[0173] Read the information unit according to the information unit write address;
[0174] When the information unit is readable, offsetting the information unit write address by a first preset byte as a new information unit write address;
[0175] Return to the execution step to read the information unit according to the information unit write address.
[0176] In some embodiments, please refer to Figure 6 , Figure 6 Schematic diagram of the structure of the information unit provided in the embodiment of the present application. Figure 6 As shown, the information unit 1410 includes: header information 1411 , description information 1412 , storage address 1414 and verification information 1415 .
[0177] The header information 1411 is used to identify the information unit 1410 , and the verification information 1415 is generated by at least the header information 1411 , the description information 1412 and the storage address 1414 in the information unit 1410 .
[0178] In some implementations, the verification information is a CRC check code.
[0179] In some embodiments, the information unit 1410 also includes a first reserved expansion space 1413 and a second reserved expansion space 1416. The reserved expansion space is used for subsequent solution expansion. The first reserved expansion space 1413 is located between the description information 1412 and the storage address 1414, and the second reserved expansion space 1416 is located below the verification information 1415.
[0180] In some embodiments, the size of the information unit 1410 is constant, and the first preset byte is equal to the size of the information unit 1410; illustratively, assuming that the information unit 1410 occupies a total of 16 bytes of address, the first preset byte is 16 bytes, so that each information unit 1410 is checked in turn.
[0181] Through the above-mentioned information unit structure, the present application stores the description information and the storage address in the information unit in an orderly manner, so as to facilitate the subsequent search for the description information and the storage address.
[0182] In some implementations, the search interface, when called, is also used to:
[0183] When the information unit is unreadable, obtaining a data unit write address;
[0184] Reading information of a second preset byte according to the data unit write address, and when it is determined that the data unit write address is not writable according to the information of the second preset byte, offsetting the data unit write address by a second preset byte as a new data unit write address;
[0185] Return to the execution step to read the information of the second preset byte according to the data unit write address.
[0186] Through the above steps, the data unit and the information unit can be comprehensively checked at the same time through the search interface, which is convenient for performing subsequent management operations on the data unit and the information unit.
[0187] In some embodiments, see Figure 7 , Figure 7 Schematic diagram of the search process of the search interface provided in the embodiment of the present application. Figure 7 As shown, the search process 300 includes steps: step 301 to step 312.
[0188] Step 301: Obtain the information unit writing address.
[0189] In some embodiments, the acquired information unit write address is the initial write address of the information unit, that is, the address of the first information unit written when no information unit is written into the storage unit.
[0190] In some implementations, the information unit is written from a high address to a low address. In this case, step 308 also includes an offset direction when offsetting the information unit write address, that is, offsetting the information unit write address toward the low address by a first preset byte.
[0191] Step 302: Determine whether the information unit write address is within the address range of the storage unit.
[0192] In some embodiments, after reading an information unit, the write address of the information unit needs to be offset, and the address may be moved out of the address range of the storage unit after the address offset. Therefore, step 302 is executed to check whether the write address of the information unit is within the address range of the storage unit to prevent errors in the read data.
[0193] In some implementations, if the information unit write address is not within the address range of the storage unit, the search interface stops working and feeds back an error message.
[0194] In some implementations, if the information unit write address is within the address range of the storage unit, step 303 is executed.
[0195] Step 303: Determine whether the information unit is readable.
[0196] In some implementations, if the read information units are all empty values, such as 0x00 or 0xff, the information units are unreadable.
[0197] In some implementations, when the information unit is readable, step 304 is executed; when the information unit is unreadable, step 309 is executed.
[0198] In some implementations, when the information unit is unreadable, not only step 309 is executed, but also the current information unit write address is recorded, and when a new information unit needs to be written, the new information unit is written from the current information unit write address.
[0199] The above steps can thus not only check the validity of the information unit, but also determine the write address when writing a new information unit.
[0200] Step 304: Read the information unit.
[0201] Step 305: Determine whether the information unit is legal.
[0202] In some implementations, legality of an information unit means that data in the information unit meets preset data requirements.
[0203] For example, it is assumed that the structure of the information unit is Figure 6In the structure shown, the legality of the information unit means that the pre-verification information and the verification information 1415 generated according to the header information 1411, the description information 1412 and the storage address 1414 are the same, and at this time, the information unit 1410 has a corresponding data unit.
[0204] In some implementations, if the information unit is legal, step 306 is performed.
[0205] In some implementations, if the information unit is illegal, it may be that the data of the information unit is damaged, so the information unit is skipped, the next information unit is read, and step 308 is executed.
[0206] Step 306: Read the description information and physical address in the information unit.
[0207] In some implementations, the description information in the information unit is used to describe the data unit corresponding to the information unit.
[0208] In some implementations, the physical address in the information unit is the address of the data unit corresponding to the information unit, and the data unit corresponding to the information unit can be found through the physical address in the information unit.
[0209] Step 307: Store the physical address and the corresponding relationship between the description information and the physical address in RAM.
[0210] In some embodiments, the physical address and the correspondence between the description information and the physical address are stored in RAM. After that, the user inputs the description information, for example, by calling a read interface in an external interface, the physical address of the data unit corresponding to the description information can be directly queried, and the data unit stored in RAM can be read.
[0211] Step 308: Write the information unit to the address offset by the first preset byte.
[0212] In some implementations, after executing step 308 , the process returns to executing step 302 to check whether the write address of the information unit after the offset of the first preset byte is within the address range of the storage unit.
[0213] In some implementations, step 308 includes the following steps.
[0214] The writing direction of the information unit is obtained, and the writing address of the information unit is offset by a first preset byte toward the writing direction of the information unit.
[0215] Step 309: Obtain the data unit write address.
[0216] In some embodiments, the acquired data unit write address is an initial write address of the data unit, that is, the address of the first data unit written when no data unit is written into the storage unit.
[0217] Step 310: Read the information of the second preset byte to determine whether it is writable.
[0218] In some implementations, because the address occupied by the data unit is not fixed, unlike the information unit which has a fixed size, only the second preset byte is read each time.
[0219] In some implementations, the size of the second preset byte depends on the minimum write unit of the Flash; illustratively, if the Flash writes at least 8 bytes of data each time, the second preset byte is 8 bytes.
[0220] In some embodiments, the information unit also stores information reflecting the size of the data unit. After step 306, the information reflecting the size of the data unit is also stored in RAM, so that when executing step 309, the complete data units are read in sequence according to the information.
[0221] In some implementations, if the information of the second preset byte is read and determined to be not writable, step 311 is executed; if the information of the second preset byte is read and determined to be writable, step 312 is executed.
[0222] In some implementations, writable means that all read information is empty.
[0223] Step 311: Write the data unit to an address offset of a second preset byte.
[0224] In some embodiments, step 311 includes the following steps.
[0225] The writing direction of the data unit is obtained, and the writing address of the data unit is offset by a second preset byte toward the writing direction of the data unit.
[0226] Step 312: Complete the search.
[0227] In some implementations, step 312 further executes the steps of: recording the current data unit write address, and when a new data unit needs to be written, writing the new data unit from the current data unit write address.
[0228] In some implementations, the internal interface further includes a page-changing task interface, which, when called, is used to:
[0229] (1) Determine the storage units in the backup state and the storage units in the active state;
[0230] (2) detecting the erasure state of the storage unit in the backup state, and erasing the storage unit when the storage unit is not in the full-erasure state;
[0231] (3) starting data transfer to transfer valid data in the storage unit in the active state to the storage unit in the backup state, and writing different preset information into the storage unit in the backup state according to the transfer progress;
[0232] (4) After the data transfer is completed, erase the storage unit in the activated state.
[0233] In some embodiments, the external interface of the data management system includes a write interface for users to call to perform data writing. When the write interface is called, if the storage unit is full during the writing process, the write interface will automatically call the paging interface.
[0234] In some implementations, when a storage unit is fully written, if there is no storage unit in a backup state, any storage unit that has been completely erased can be determined as a storage unit in a backup state.
[0235] In some implementations, after the Flash is powered on, it is necessary to determine that a storage unit is an activated storage unit, and when data is written to the Flash, the data is written to the activated storage unit.
[0236] In some embodiments, the data unit storage space of the storage unit in the activated state will store at least one data unit. For example, the data units stored from low address to high address are: block1, block2, block3, block4, block5, block1. At this time, there are a total of 5 data units with different description information, and the data unit storage space also includes 2 block1s, which are defined as block1A and block1B. At this time, the data units stored from low address to high address are: block1A, block2, block3, block4, block5, block1B. Which of block1A and block1B is valid data needs to be determined with reference to the writing order of the data units. For example, if the writing order of the data units is defined as writing from low address to high address, then block1B is valid data because it is the latest written data unit. At this time, the valid data in the data unit storage space are block2, block3, block4, block5, block1B.
[0237] In some embodiments, the data in the first storage unit is defined to be transferred to the second storage unit, see Figure 8 , Figure 8 Schematic diagram of the page switching process of the page switching interface provided in the embodiment of the present application. Figure 8 As shown, the page change process 400 includes steps: step 401 to step 406.
[0238] Step 401: Determine storage units in a backup state and storage units in an active state.
[0239] Step 402: Detect the erasure status of the storage unit in the backup state, and when the storage unit is not in the full-erasure state, erase the storage unit.
[0240] Step 403: When writing data to the first storage unit, if the available writing space of the first storage unit is insufficient, first preset information is written into a first preset area of the second storage unit to mark the second storage unit as being in a first state.
[0241] Step 404: Write second preset information into a second preset area of the second storage unit to identify the second storage unit as being in a second state, determine valid data in the first storage unit, and start writing the valid data into the second storage unit.
[0242] Step 405: After the writing of the valid data is completed, third preset information is written into the third preset area of the second storage unit to mark the second storage unit as being in the third state.
[0243] Step 406: Erasing the data in the first storage unit, and after erasing, writing fourth preset information into a fourth preset area of the second storage unit to mark the second storage unit as being in a fourth state.
[0244] In some implementations, the storage unit is a logic sector. The Flash in the present application includes at least two logic sectors, so that when one of the logic sectors is full, valid data can be transferred to another logic sector.
[0245] In some implementations, erasing the data in the first storage unit refers to changing all the data in the first storage unit to a null value, such as 0x00 or 0xff.
[0246] In some implementations, after executing step 406, the present application checks whether the reserved space 1150 is correctly filled; wherein, correctly filled means that each address of the reserved space 1150 is filled with preset data, such as 0x00.
[0247] Through the above-mentioned paging interface, preset information will be written to the preset area of the storage unit in the backup state during the paging process to record the progress of the writing process. Therefore, even if the writing process is interrupted due to an unexpected situation, the writing process before the unexpected situation can be restored according to the writing status of the preset information after power is restored.
[0248] In some embodiments, see Fig. 9 , Fig. 9 Schematic diagram of the structure of the micro control unit provided in the embodiment of the present application. Fig. 9 As shown, Fig. 9 The micro control unit 3000 includes the Flash data management system as described above, namely, includes Flash 10000 and a data management module 20000 .
[0249] In some implementations, the data management module 20000 is a program module running in the micro control unit 3000 .
[0250] In some embodiments, see Fig.10 , Fig.10 Schematic diagram of the structure of the vehicle provided in the embodiment of the present application. Fig.10 As shown, Fig.10 The vehicle 4000 includes the micro control unit 3000 as described above.
[0251] In some embodiments, the vehicle 4000 includes at least one micro control unit 3000 as described above.
[0252] In summary, the present application provides a Flash data management system, a microcontroller unit, and a vehicle, the system comprising: Flash, the Flash comprising at least one storage unit, the storage unit comprising at least a data unit storage space and an information unit storage space, the data unit storage space being used to store data units, the information unit storage space being used to store information units, the data units corresponding to the information units one-to-one, the information units comprising at least the corresponding description information and storage address of the data units; a data management module, the data management module comprising an external interface for user calls and an internal interface for internal calls of the data management system. The present application can better manage the data stored in the Flash through the structure of the Flash in the data management system and the internal and external interfaces provided.
[0253] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. A Flash data management system, characterized in that: The system comprises: Flash, the Flash comprising at least one storage unit, the storage unit comprising at least a data unit storage space and an information unit storage space, the data unit storage space being used to store data units, the information unit storage space being used to store information units, the data units corresponding to the information units one-to-one, the information units comprising at least description information and a storage address of the corresponding data units; the information units comprising header information, description information, a storage address and verification information; the header information being used to identify the information unit, the verification information being generated at least from the header information, the description information and the storage address in the information unit; A data management module, the data management module comprising an external interface for users to call and an internal interface for the data management system to call; The internal interface includes a search interface, which, when called, is used to: Get the information unit write address; Read the information unit according to the information unit write address; When the information unit is readable and legal, the description information and storage address in the information unit are read, and the storage address and the corresponding relationship between the description information and the storage address are stored in the RAM; wherein, when the read interface in the external interface is called, the storage address of the data unit corresponding to the description information is queried in the RAM according to the input description information, and the data of the data unit is read according to the storage address; The information unit write address is offset by a first preset byte as a new information unit write address; Return to the step of executing reading the information unit according to the write address of the information unit; The information unit is readable and legal and includes: Determine whether the pre-verification information and the verification information generated according to the header information, the description information and the storage address are the same; When the pre-verification information and the verification information are the same, it is determined that the information unit is legal.
2. The data management system according to claim 1, characterized in that: The internal interface includes an initialization interface, a first detection interface and a second detection interface; wherein, When the initialization interface is called, it is used to: Calling the first detection interface; when the first detection interface is called, it is used to determine the state of each of the storage units; The second detection interface is called; when the second detection interface is called, it is used to make the initialization interface perform different preset operations according to the state of each storage unit.
3. The data management system according to claim 2, characterized in that: The storage unit includes a header information storage space, and the header information storage space includes a first preset area, a second preset area, a third preset area, and a fourth preset area; wherein, When the first preset area is written with the first preset information and the remaining preset areas are not written with the preset information, the storage unit is in the first state; When the first preset area is written with the first preset information, the second preset area is written with the second preset information, and the remaining preset areas are not written with preset information, the storage unit is in the second state; When the first preset area is written with the first preset information, the second preset area is written with the second preset information, the third preset area is written with the third preset information, and the fourth preset area is not written with the fourth preset information, the storage unit is in the third state; When the first preset information is written into the first preset area, the second preset information is written into the second preset area, the third preset information is written into the third preset area, and the fourth preset information is written into the fourth preset area, the storage unit is in the fourth state.
4. The data management system according to claim 3, characterized in that: When the first detection interface is called, it is used to: Detecting the header information storage space of the Nth storage unit, and determining the state of the Nth storage unit according to the information in the first preset area, the second preset area, the third preset area, and the fourth preset area; wherein N=1 in the initialization state; Set N=N+1, and return to execute the step of detecting the header information storage space of the Nth storage unit.
5. The data management system according to claim 3, characterized in that: When the second detection interface is called, it is used to: Determining whether there is an activated storage unit according to the state of each storage unit; When there is a storage unit in the activation state and there is no storage unit in the page change state, causing the initialization interface to perform a first preset operation; When there is a storage unit in the activated state and a storage unit in the page change state, determining whether the data to be transferred during the page change process has been transferred, and when the data transfer is completed, causing the initialization interface to perform a second preset operation; When there is no storage unit in the activated state and there is a storage unit in the page change state, it is determined whether the data to be transferred during the page change process has been transferred, and when the data has not been transferred, the initialization interface is enabled to perform a third preset operation.
6. The data management system according to claim 5, characterized in that: The second preset operation includes: Fourth information is written into a fourth preset area of the storage unit in the third state.
7. The data management system according to claim 5, characterized in that: The third preset operation includes: All storage units in the Flash that are not in the fully erased state are erased.
8. The data management system according to claim 1, characterized in that: When the search interface is called, it is also used to: When the information unit is unreadable, obtaining a data unit write address; Reading information of a second preset byte according to the data unit write address, and when it is determined that the data unit write address is not writable according to the information of the second preset byte, offsetting the data unit write address by a second preset byte as a new data unit write address; Return to the execution step to read the information of the second preset byte according to the data unit write address.
9. The data management system according to claim 1, characterized in that: The internal interface also includes a page-changing task interface, which, when called, is used to: Determine the storage unit in the backup state and the storage unit in the active state; Detecting the erasure state of the storage unit in the backup state, and erasing the storage unit when the storage unit is not in the full-erasure state; Starting data transfer to transfer valid data in the storage unit in the activated state to the storage unit in the backup state, and writing different preset information in the storage unit in the backup state according to the transfer progress; After the data transfer is completed, the active storage cells are erased.
10. A micro control unit, characterized in that: The micro control unit includes a Flash data management system as described in any one of claims 1-9.
11. A vehicle, characterized in that: The vehicle comprises the micro control unit as claimed in claim 10 .
Citation Information
Patent Citations
Data reading and writing management method and device for SPI flash memory
CN104461401A
Memory, data storage method and data reading method
CN113568579A
SOC parameter power failure non-volatile storage method and device and computer equipment
CN116225985A