Circuit Optimization Method for Wideband High Efficiency Load Modulated Balanced Power Amplifier

Abstract

The present invention discloses a circuit optimization method for a broadband high-efficiency load-modulated balanced power amplifier. The method mainly solves the problem of limiting bandwidth and efficiency in the design of existing load-modulated balanced power amplifiers due to the inability to accurately predict the amplitude and phase offset of the control signal. The implementation steps are: 1. Determine the circuit topology, one path is a control signal power amplifier, and two paths are balanced power amplifiers; 2. Select the fundamental current amplitude ratio of the balanced power amplifier and the control signal power amplifier; 3. Make an equipotential line relationship diagram of drain efficiency, output power back-off, and phase offset; 4. Determine the target drain efficiency and the phase offset range of the target output power back-off from the equipotential line relationship diagram; 5. Optimize the broadband input / output matching circuit to meet the fundamental current amplitude ratio and phase offset range; 6. Experimentally verify the performance indicators. The present invention is used to optimize the design of a broadband high-efficiency load-modulated balanced power amplifier.

Description

Technical Field

[0001] The invention relates to the technical field of power amplifiers, and in particular to a circuit optimization method for a broadband high-efficiency load-modulated balanced power amplifier. Background Art

[0002] In order to achieve low-latency and high-capacity transmission characteristics, the Sub-6GHz base station system uses a broadband modulated signal with a high peak-to-average power ratio. This means that the power amplifier needs to maintain high-efficiency working performance under large bandwidth and large output power back-off. The architecture based on multi-transistor load modulation is one of the effective solutions for designing high-efficiency power amplifiers, such as Doherty power amplifiers and load-modulated balanced power amplifiers. For Doherty power amplifiers, it is difficult to maintain high efficiency within a very wide frequency band due to the bandwidth limitation of a quarter-wavelength transmission line. Compared with the Doherty power amplifier, the load-modulated balanced power amplifier is generally composed of a control signal power amplifier, two balanced power amplifiers, and several couplers. Its working principle is that the amplitude and phase offset of the control signal power amplifier play a load modulation role on the two balanced power amplifiers. The coupler of the load-modulated balanced power amplifier has a natural broadband characteristic, which is conducive to achieving both wide-band and high-efficiency working characteristics.

[0003] The amplitude and phase offset of the control signal power amplifier are the key technical difficulties in designing a broadband, high-efficiency, load-modulated balanced power amplifier. At present, there are relatively few optimization methods for load-modulated balanced power amplifiers. Traditional methods mainly use parameter scanning methods to predict the amplitude and phase offset of the control signal power amplifier. Since this method requires traversing parameter values, it requires a lot of computing resources, has a long design cycle, and is difficult to design. Summary of the invention

[0004] Technical problem: In order to solve the problem of bandwidth and efficiency limitation due to the inability to accurately predict the amplitude and phase offset of the control signal in the existing load-modulated balanced power amplifier design, the present invention provides a circuit optimization method for a broadband and high-efficiency load-modulated balanced power amplifier, which can reveal the relationship between drain efficiency and output power back-off and phase offset, and is helpful to optimize the design of a broadband and high-efficiency load-modulated balanced power amplifier.

[0005] Technical solution: To achieve this purpose, the circuit optimization method of the broadband high-efficiency load-modulated balanced power amplifier provided by the present invention adopts the following technical solution:

[0006] The optimization method is based on a load-modulated balanced power amplifier, whose circuit topology structure includes a control signal power amplifier with a broadband input / output matching circuit and two balanced power amplifiers with broadband input / output matching circuits, and a hybrid coupler for power distribution or synthesis; the hybrid coupler connected to the broadband input matching circuit is used to distribute the input power; the hybrid coupler connected to the broadband output matching circuit is used to synthesize the output power; after selecting the fundamental current amplitude ratio α of the balanced power amplifier and the control signal power amplifier, the circuit optimization method can make an equipotential line relationship diagram of the drain efficiency η of the load-modulated balanced power amplifier, the output power back-off OBO, and the phase shift θ; the equipotential line relationship diagram is used to determine the phase shift range corresponding to the target drain efficiency and the target output power back-off as the circuit optimization design target; the broadband input / output matching circuit is used to design a fundamental current amplitude ratio and a phase shift range to achieve a broadband high-efficiency load-modulated balanced power amplifier.

[0007] The one-way control signal power amplifier is in a class AB working state, and the two-way balanced power amplifiers are in a class C working state.

[0008] The equipotential line relationship diagram shows the relationship between the drain efficiency η of the load modulated balanced power amplifier and the output power back-off OBO and the phase shift θ. According to the closed and open states of the balanced power amplifier, the drain efficiency is respectively expressed by the relationship and Calculate and plot; where k represents the normalized input power, and its value changes from 0 to 1.

[0009] The output power back-off OBO is determined by the fundamental current amplitude ratio α of the balanced power amplifier and the control signal power amplifier, and its calculation formula is: Where lg represents the logarithmic function with base 10.

[0010] The circuit optimization design target, namely the phase shift range corresponding to the target drain efficiency and the target output power back-off, is optimized by optimizing the broadband input / output matching circuits of the control signal power amplifier and the balanced power amplifier so that their scattering parameters meet the phase shift range.

[0011] The method comprises the following steps:

[0012] S1: Determine the circuit topology of the load modulated balanced power amplifier, one path is a control signal power amplifier working in class AB, and two paths are balanced power amplifiers working in class C;

[0013] S2: Select the fundamental current amplitude ratio α of the balanced power amplifier and the control signal power amplifier, so that according to the formula Calculate expected output power back-off;

[0014] S3: According to the working status of the control signal power amplifier and the balanced power amplifier, use the relationship

[0015] and Calculate and draw the equipotential relationship diagram of drain efficiency, output power back-off and phase shift in sections;

[0016] S4: Determine the phase offset range of the target drain efficiency and the target output power back-off according to the equipotential line relationship diagram as a circuit optimization design target;

[0017] S5: For the control signal power amplifier and the balanced power amplifier, the broadband input / output matching circuits are optimized respectively so that their scattering parameters meet the expected fundamental current amplitude ratio and phase offset range;

[0018] S6: Simulation and measurement verification of the optimized design of load-modulated balanced power amplifier.

[0019] Beneficial effects: Compared with the prior art, the present invention provides a circuit optimization method for a broadband high-efficiency load-modulated balanced power amplifier, which can reveal the relationship between drain efficiency and output power back-off and phase shift, and is helpful to optimize the design of a broadband high-efficiency load-modulated balanced power amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a flow chart of the circuit optimization method of the broadband high-efficiency load-modulated balanced power amplifier in a specific implementation manner of the present invention.

[0021] Figure 2 In a specific implementation manner of the present invention, the circuit topology structure of the load-modulated balanced power amplifier is determined according to the circuit optimization method of the broadband high-efficiency load-modulated balanced power amplifier.

[0022] Figure 3 In a specific implementation of the present invention, according to the circuit optimization method of the broadband high-efficiency load-modulated balanced power amplifier, the equipotential line relationship diagram corresponding to the fundamental current amplitude ratio α of the balanced power amplifier and the control signal power amplifier is selected to be 2, that is, when the output power back-off OBO is about 9.5dB.

[0023] Figure 4 In a specific implementation manner of the present invention, according to the circuit optimization method of the broadband high-efficiency load-modulated balanced power amplifier, taking 2.7GHz as an example, a curve diagram of the control signal phase offset, fundamental current and output power obtained by simulation is shown.

[0024] Figure 5It is a fundamental impedance trajectory varying with output power obtained by simulation at 2.7 GHz according to the circuit optimization method of the broadband high-efficiency load-modulated balanced power amplifier in a specific implementation manner of the present invention.

[0025] Figure 6 In a specific implementation of the present invention, according to the circuit optimization method of the broadband high-efficiency load-modulated balanced power amplifier, the drain efficiency of the designed and implemented 1.9GHz-3.2GHz load-modulated balanced power amplifier is measured at saturated power, 6dB back-off, 8dB back-off and 10dB back-off respectively.

[0026] Figure 7 In a specific embodiment of the present invention, according to the circuit optimization method of the broadband high-efficiency load-modulated balanced power amplifier, a curve diagram of gain and drain efficiency versus output power is obtained by measuring the 1.9GHz-3.2GHz load-modulated balanced power amplifier. Among them, (a) is a curve diagram of gain and drain efficiency measured between 1.9GHz and 2.5GHz versus output power, and (b) is a curve diagram of gain and drain efficiency measured between 2.6GHz and 3.2GHz versus output power. DETAILED DESCRIPTION

[0027] The technical solution of the present invention is further introduced below in conjunction with specific implementation modes and drawings.

[0028] like Figure 1 As shown, the circuit optimization method of the broadband high-efficiency load-modulated balanced power amplifier mainly includes the following implementation steps: 1. Determine the circuit topology, one path is the control signal power amplifier, and two paths are balanced power amplifiers; 2. Select the fundamental current amplitude ratio of the balanced power amplifier and the control signal power amplifier; 3. Calculate and draw the equipotential line relationship diagram of the drain efficiency, output power back-off, and phase offset; 4. Determine the target drain efficiency and the phase offset range of the target output power back-off based on the equipotential line relationship diagram; 5. Optimize the broadband input / output matching circuit to meet the fundamental current amplitude ratio and phase offset range; 6. Simulate and measure to verify the optimized design of the load-modulated balanced power amplifier.

[0029] further, Figure 2The circuit topology of the load-modulated balanced power amplifier determined in the specific implementation mode of the present invention is given. The figure shows that the optimization method is based on a load-modulated balanced power amplifier, and its circuit topology includes a control signal power amplifier with a broadband input / output matching circuit and two balanced power amplifiers with broadband input / output matching circuits, and a hybrid coupler for power distribution or synthesis; the hybrid coupler connected to the broadband input matching circuit is used to distribute the input power; the hybrid coupler connected to the broadband output matching circuit is used to synthesize the output power; after selecting the fundamental current amplitude ratio α of the balanced power amplifier and the control signal power amplifier, the circuit optimization method can make an equipotential line relationship diagram of the drain efficiency η of the load-modulated balanced power amplifier, the output power back-off OBO, and the phase offset θ; the equipotential line relationship diagram is used to determine the phase offset range corresponding to the target drain efficiency and the target output power back-off as the circuit optimization design target; the broadband input / output matching circuit is used to design the fundamental current amplitude ratio and the phase offset range to achieve a broadband high-efficiency load-modulated balanced power amplifier.

[0030] Furthermore, on the reference plane of the output coupler, the fundamental impedance Z of the balanced power amplifier is b1 and Z b2 , control the fundamental impedance Z of the signal power amplifier c Calculated by formula (1):

[0031]

[0032] Among them, Z 0 is the characteristic impedance of the hybrid coupler, which is generally 50 ohms; b and I c are the fundamental currents of the balanced power amplifier and the control signal power amplifier respectively; θ is the phase shift of the control signal.

[0033] Furthermore, the output power P of the balanced power amplifier b1 and P b2 It can be calculated by formula (2)

[0034]

[0035] The output power of the control signal power amplifier P c Then we can calculate it by formula (3):

[0036]

[0037] Furthermore, the fundamental current ratio of the balanced power amplifier and the control signal power amplifier is defined as

[0038]

[0039] The expected output power back-off OBO value can be calculated by formula (5):

[0040]

[0041] Furthermore, by substituting equation (4) into equation (2) and equation (3), the output power ratio of the balanced power amplifier to the control signal power amplifier can be derived:

[0042]

[0043] Furthermore, for the control signal power amplifier, its normalized output power P c and normalized DC power P c,dc They can be expressed as formula (7) and formula (8) respectively:

[0044] P c =k 2 (7)

[0045]

[0046] Wherein, k represents the normalized input power, and its value changes from 0 to 1.

[0047] Furthermore, according to equation (6), the normalized output power P of the balanced power amplifier can be derived: b and normalized DC power P b,dc , respectively obtained from formula (9) and formula (10):

[0048]

[0049]

[0050] Furthermore, when only the control signal power amplifier working in class AB is turned on, the drain efficiency of the load-modulated balanced power amplifier is calculated by equation (11):

[0051]

[0052] When the balanced power amplifier working in class C is turned on, that is, in the output power back-off interval, the drain efficiency of the load-modulated balanced power amplifier is calculated by formula (12):

[0053]

[0054] It can be seen from formula (12) that in the output power back-off interval, the drain efficiency of the load-modulated balanced power amplifier depends on the fundamental current amplitude ratio α and the phase shift θ of the control signal.

[0055] like Figure 3 As shown, in a specific embodiment of the present invention, according to the circuit optimization method of the broadband high-efficiency load-modulated balanced power amplifier, the equipotential line relationship diagram corresponding to the fundamental current amplitude ratio α of the balanced power amplifier and the control signal power amplifier is selected to be 2, that is, the output power back-off OBO is about 9.5dB. The equipotential line relationship diagram shows that the optimal control signal phase offset θ is 180°; when the phase offset θ of the control signal differs from 180° within the range of ±45°, the drain efficiency is still greater than 50%, which provides a certain degree of freedom for the design of broadband input / output matching circuits.

[0056] like Figure 4 As shown, in a specific embodiment of the present invention, according to the circuit optimization method of the broadband high-efficiency load modulation balanced power amplifier, taking 2.7GHz as an example, the curve diagram of the control signal phase offset, fundamental current and output power obtained by simulation. b and I c They represent the fundamental currents of the balanced power amplifier and the control signal power amplifier respectively, and their ratios are approximately equal to the selected fundamental current amplitude ratio α=2. In addition, Figure 4 It is shown that in the power back-off interval, the phase offset θ of the control signal is between 147° and 192°, which is in line with the expected phase offset range.

[0057] like Figure 5 As shown in FIG. 1 , in a specific embodiment of the present invention, according to the circuit optimization method of the broadband high-efficiency load-modulated balanced power amplifier, the fundamental impedance trajectory obtained by simulation at 2.7 GHz with the change of output power. b1,pack With Z c,pack They represent the fundamental impedance trajectories of the balanced power amplifier and the control signal power amplifier on the transistor package surface, respectively. b1,Igen With Z c,Igen They respectively represent the fundamental impedance trajectories of the balanced power amplifier and the control signal power amplifier on the transistor current generating surface. Figure 5 The active load modulation effect between the control signal power amplifier and the balanced power amplifier is demonstrated.

[0058] like Figure 6 As shown, in a specific embodiment of the present invention, according to the circuit optimization method of the broadband high-efficiency load-modulated balanced power amplifier, a 1.9GHz-3.2GHz load-modulated balanced power amplifier is implemented through guidance of optimization design. The measurement results show that the drain efficiency is 47%-65% at saturated power, 40%-62% at 6dB back-off, 41%-61% at 8dB back-off, and 42%-60% at 10dB back-off.

[0059] like Figure 7As shown, in a specific embodiment of the present invention, based on the measurement results of the designed 1.9 GHz-3.2 GHz load-modulated balanced power amplifier, a curve diagram of gain and drain efficiency varying with output power is drawn. Figure 7 It shows that the designed load-modulated balanced power amplifier has broadband and high-efficiency working performance.

[0060] In summary, the above simulation results and experimental results show that the present invention is conducive to optimizing the design of a broadband and high-efficiency load-modulated balanced power amplifier.

Claims

1. A circuit optimization method for a broadband high-efficiency load-modulated balanced power amplifier, characterized in that: The optimization method is based on a load-modulated balanced power amplifier, whose circuit topology structure includes a control signal power amplifier with a broadband input / output matching circuit and two balanced power amplifiers with broadband input / output matching circuits, and a hybrid coupler for power distribution or synthesis; the hybrid coupler connected to the broadband input matching circuit is used to distribute the input power; the hybrid coupler connected to the broadband output matching circuit is used to synthesize the output power; after selecting the fundamental current amplitude ratio α of the balanced power amplifier and the control signal power amplifier, the circuit optimization method can make an equipotential line relationship diagram of the drain efficiency η of the load-modulated balanced power amplifier, the output power back-off OBO, and the phase shift θ; the equipotential line relationship diagram is used to determine the phase shift range corresponding to the target drain efficiency and the target output power back-off as the circuit optimization design target; the broadband input / output matching circuit is used to design a fundamental current amplitude ratio and a phase shift range to achieve a broadband high-efficiency load-modulated balanced power amplifier; The equipotential line relationship diagram shows the relationship between the drain efficiency η of the load-modulated balanced power amplifier and the output power back-off OBO and the phase shift θ. When the balanced power amplifier is in the off state, the drain efficiency is given by the relationship: Calculation and plotting show that when the balanced power amplifier is in the on state, the drain efficiency is given by the relation: Calculate and plot; where k represents the normalized input power, and its value changes from 0 to 1.

2. The circuit optimization method of a broadband high-efficiency load-modulated balanced power amplifier according to claim 1, characterized in that: The one-way control signal power amplifier is in a class AB working state, and the two-way balanced power amplifiers are in a class C working state.

3. The circuit optimization method of a broadband high-efficiency load-modulated balanced power amplifier according to claim 1, characterized in that: The output power back-off OBO is determined by the fundamental current amplitude ratio α of the balanced power amplifier and the control signal power amplifier, and its calculation formula is: Where lg represents the logarithmic function with base 10.

4. The circuit optimization method of a broadband high-efficiency load-modulated balanced power amplifier according to claim 1, characterized in that: The circuit optimization design target, namely the phase shift range corresponding to the target drain efficiency and the target output power back-off, is optimized by optimizing the broadband input / output matching circuits of the control signal power amplifier and the balanced power amplifier so that their scattering parameters meet the phase shift range.

5. The circuit optimization method of a broadband high-efficiency load-modulated balanced power amplifier according to claim 1, 2, 3 or 4, characterized in that: The method comprises the following steps: S1: Determine the circuit topology of the load modulated balanced power amplifier, one path is a control signal power amplifier working in class AB, and two paths are balanced power amplifiers working in class C; S2: Select the fundamental current amplitude ratio α of the balanced power amplifier and the control signal power amplifier, so that according to the formula Calculate expected output power back-off; S3: When the control signal power amplifier is turned on but the balance power amplifier is turned off, use the relationship Calculate and draw the relationship between drain efficiency, output power back-off, and phase shift; when both the control signal power amplifier and the balanced power amplifier are turned on, use the relationship Calculate and draw the equipotential relationship diagram of drain efficiency, output power back-off, and phase shift; S4: Determine the phase offset range of the target drain efficiency and the target output power back-off according to the equipotential line relationship diagram as a circuit optimization design target; S5: For the control signal power amplifier and the balanced power amplifier, the broadband input / output matching circuits are optimized respectively so that their scattering parameters meet the expected fundamental current amplitude ratio and phase offset range; S6: Simulation and measurement verification of the optimized design of load-modulated balanced power amplifier.

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